TW201349694A - Voltage protecting circuit - Google Patents

Abstract

A voltage protecting circuit includes a voltage stabilizing circuit, a comparator, and a first electronic switch. The voltage stabilizing circuit outputs a stabile voltage. The comparator compares the stabile voltage with a reference voltage. When the stabile voltage is greater than the reference voltage, the comparator outputs a high level signal to a control terminal of the first electronic switch to turn on a first terminal and a second terminal of the first electronic switch. A control pin of the stabilizing circuit receives a low level signal to make the stabilizing circuit not output the stabile voltage. When the stabile voltage is less than the reference voltage, the comparator outputs a low level signal to the control terminal of the first electronic switch to turn off the first terminal and the second terminal of the first electronic switch. The control pin of the stabilizing circuit receives a high level signal to make the stabilizing circuit output the stabile voltage.

Description

Voltage protection circuit

The invention relates to a voltage protection circuit.

Each component on the mainframe has a stable voltage range. If it exceeds this voltage range, it will work abnormally and even damage electronic components.

In view of the above, it is necessary to provide a voltage protection circuit that automatically stops power supply when the voltage exceeds a preset value to prevent electronic components from being damaged.

A voltage protection circuit includes a voltage stabilizing circuit, a comparator and a first electronic switch. The input end of the voltage stabilizing circuit is connected to a first power source, and the output end is connected to a non-inverting input end of the comparator. The inverting input terminal is connected to a reference voltage, and the output end of the comparator is connected to the control end of the first electronic switch, and the first end of the first electronic switch is connected to the first power source, and is also directly controlled by the voltage stabilizing circuit The voltage stabilizing circuit is configured to output a stable voltage, and the comparator is configured to compare the magnitude of the stable voltage and the reference voltage, and output a high level signal to the control end of the first electronic switch when the stable voltage is greater than the reference voltage. The first end of the first electronic switch is connected to the second end, and the control end of the voltage stabilizing circuit receives the low level signal to stop outputting the stable voltage; when the stable voltage is less than the reference voltage, the comparator output is low. Level signal to the control end of the first electronic switch, so that the first end and the second end of the first electronic switch are disconnected, and the control end of the voltage stabilizing circuit receives the high level signal to continue The stabilized output voltage.

The voltage protection circuit compares the voltage value outputted by the voltage regulator circuit with the reference voltage through a comparator, and turns on the first electronic switch when the voltage value outputted by the voltage stabilization circuit is greater than the reference voltage, so that the control terminal of the voltage stabilization circuit receives A low level signal, the regulator circuit stops continuing to output voltage.

Referring to FIG. 1 and FIG. 3, a preferred embodiment of the voltage protection circuit of the present invention includes a voltage stabilizing circuit 10, a comparator U2, and an electronic switch 30 (in this embodiment, a field effect transistor Q5, see FIG. Show). The input terminal of the voltage stabilizing circuit 10 is connected to an input power source 50 (in the present embodiment, a power source P5V_DUAL, as shown in FIG. 3) to output a stable voltage Vout from its output terminal. The output voltage Vout of the voltage stabilizing circuit 10 is divided by the voltage dividing resistors R12 and R13 (refer to FIG. 2) and connected to the non-inverting input terminal of the comparator U2. The inverting input terminal of the comparator U2 and a reference voltage 60 is connected, and the output terminal is connected to the gate of the field effect transistor Q5. The source of the field effect transistor Q5 is grounded, and the drain is connected to the power source P5V_DUAL through the resistor R17. The drain of the field effect transistor Q5 is also directly connected to the control terminal of the voltage stabilizing circuit 10. When the stable voltage Vout is divided by the voltage dividing resistors R12 and R13 and is greater than the reference voltage, the comparator U2 outputs a high level signal to the gate of the field effect transistor Q5 to make the gate and source of the field effect transistor Q5. Extremely connected. At this time, the control terminal of the voltage stabilizing circuit 10 will receive a low level signal to stop continuing to output the stable voltage Vout. When the stable voltage Vout is divided by the voltage dividing resistors R12 and R13 and is less than the reference voltage, the comparator U2 outputs a low level signal to the gate of the field effect transistor Q5, so that the source and the field of the field effect transistor Q5 The pole is disconnected. At this time, the control terminal of the voltage stabilizing circuit 10 will receive a high level signal to continue outputting the stable voltage Vout.

With continued reference to FIG. 2, the voltage stabilizing circuit 10 includes a control wafer U1, a triode Q1, Q2, and a field effect transistor Q3-Q4. The base of the triode Q1 is connected to a platform controller (PCH) 11 on the motherboard through a resistor R1 to receive a control signal from the PCH 11. The emitter of the triode Q1 is grounded, and the collector is connected to the power source P5V_DUAL through the resistor R2. The collector of the triode Q1 is also directly connected to the base of the triode Q2. The emitter of the triode Q2 is grounded, and the collector is connected to the control pin 1 of the control wafer U1.

The control pin 1 of the control chip U1 is also connected to the feedback pin 2 of the control chip U1 through the resistor R3 and the capacitor C1. The control pin 1 of the control chip U1 is also connected to the feedback pin 2 through the capacitor C2. The feedback pin 2 of the control chip U1 is grounded through the resistor R4. The feedback pin 2 of the control chip U1 is also connected to the control pin 1 through the capacitor C2.

The restart pin 3 of the control chip U1 is connected to the power supply P5V_DUAL through a resistor R5, and is also connected to a power supply (PSU) 13 to receive a power supply ready (PWRGOOD) signal from the power supply 13. The voltage pin 4 of the control chip U1 is grounded through the capacitor C3, and is also connected to the power source P5V_DUAL through the resistor R6. The power supply P5V_DUAL is also connected to the anode of the Schottky diode D1, and the cathode of the Schottky diode D1 is connected to the enable pin 5 of the control wafer U1. The enable pin 5 of the control chip U1 is also connected to the phase pin 6 of the control chip U1 through the resistor R7 and the capacitor C4. The first gate pin 7 of the control chip U1 is connected to the gate of the field effect transistor Q3 through the resistor R8. The drain of the field effect transistor Q3 is connected to the power source P5V_DUAL through the inductor L1, and is also grounded through the capacitor C5. C6 is connected in parallel with capacitor C5.

The gate of the field effect transistor Q3 is also connected to the drain of the field effect transistor Q4 through a resistor R9. The gate of the field effect transistor Q4 is connected to the second gate pin 8 of the control wafer U1, and also passes through the resistor R10. Connected to the ground pin 9 of the control chip U1, the ground pin 9 of the control chip U1 is grounded. The source of the field effect transistor Q4 is grounded, and is sequentially connected to the drain of the field effect transistor Q4 through the capacitor C7 and the resistor R11. The drain of the field effect transistor Q4 is also grounded through the inductor L2 and the capacitor C8 in sequence. . The node between the inductor L2 and the capacitor C8 is also grounded through the resistors R12 and R13 in sequence. The node between the inductor L2 and the capacitor C8 is also connected to the feedback pin 2 of the control chip U1 through the resistor R15. The resistor R16 and the capacitor C9 are connected in series and connected in parallel with the resistor R15.

The non-inverting input of comparator U2 is coupled to a node between resistors R12 and R13. The inverting input of the comparator U2 is connected to the anode of the battery Vdd, and the cathode of the battery Vdd is grounded. The output of the comparator U2 is connected to the gate of the field effect transistor Q5. The source of the field effect transistor Q5 is grounded, and the drain is connected to the power source P5V_DUAL through the resistor R17. The drain of the field effect transistor Q5 is also directly connected to the control pin 1 of the control wafer U1.

The working principle of the above voltage protection circuit will be described below:

The enable pin 5 of the control wafer U1 is used to provide a bias voltage for the field effect transistor Q3. The phase pin 6 is connected to the source of the field effect transistor Q3 and to the drain of the field effect transistor Q4 for detecting the voltage drop state of the field effect transistor Q4 and providing overcurrent protection. The first gate pin 7 is used to provide a pulse width modulation signal to drive the field effect transistor Q3. The second gate pin 8 is used to provide a pulse width modulation signal to drive the field effect transistor Q4. This restart pin 3 is used to implement the soft start function. The Schottky diode D1, the resistor R7 and the capacitor C4 form a bootstrap circuit for amplifying the voltage from the power supply P5V_DUAL. The resistor R3 and the capacitors C1 and C2 constitute a compensation circuit for making the control wafer U1 stable and avoiding oscillation.

When the motherboard is in the S0 state (the motherboard is in the normal working state), the S1 state (the CPU is in the inactive state), the S2 state (the CPU is in the off state), and the S3 (except that all the components outside the memory are all stopped), The control signal sent by PCH 11 is a high level signal. At this time, the triode Q1 is turned on, the triode Q2 is turned off, and the control pin 1 of the control wafer U1 receives the high level signal. The control wafer U1 is ready to work. At this time, the first gate pin 7 and the second gate pin 8 of the control chip U1 alternately output a high-level pulse signal, so that the field effect transistors Q3 and Q4 are sequentially turned on. When the first gate pin 7 outputs a high level signal, the field effect transistor Q3 is turned on, and the power supply P5V_DUAL is filtered by the inductor L1, the capacitors C5 and C6, and then the inductor L2 and the capacitor C8 are charged through the field effect transistor Q3. After that, the first gate pin 7 outputs a low level signal, and the second gate pin 8 outputs a high level signal. At this time, the field effect transistor Q3 is turned off, the field effect transistor Q4 is turned on, and the inductor L2 and the capacitor C8 are The discharge starts through the field effect transistor Q4. By repeating this cycle, a stable voltage Vout can be obtained at the node of the inductor L2 and the capacitor C8. The voltage Vout is divided by the resistors R4 and R15 and input to the feedback pin 2 of the control wafer U1. In this embodiment, the control chip U1 is of the type ISL6341. According to the specification, the feedback pin 2 is connected to the internal comparator. The voltage of the feedback pin 2 is a fixed value, so that the value of the voltage Vout is equal to The voltage value of the feedback pin 2 is multiplied by (1+R15/R4), where R15 and R4 are the resistance values of the resistors R15 and R4, respectively. Thus, the value of the voltage Vout can be adjusted by adjusting the resistance values of the resistors R15 and R4. The voltage Vout is divided by the resistors R12 and R13 and output to the non-inverting input terminal of the comparator U2.

When the voltage value of the voltage Vout exceeds a preset value, the voltage division after passing through the resistors R12 and R13 will exceed the voltage from the battery Vdd received by the inverting input terminal of the comparator U2. At this time, the comparator U2 outputs a high level signal, so that the field effect transistor Q5 is turned on. At this time, the control pin 1 of the control chip U1 will receive the low level signal, and the control chip U1 will stop working, that is, the voltage Vout will no longer be output.

When the voltage value of the voltage Vout does not exceed the preset value, the voltage division after the resistors R12 and R13 will not exceed the voltage from the battery Vdd received by the inverting input terminal of the comparator U2. At this time, the comparator U2 outputs a low level signal, so that the field effect transistor Q5 is not turned on. At this time, the control pin 1 of the control chip U1 will receive a high level signal, and the control chip U1 continues to operate, that is, continues to output the voltage Vout.

When the motherboard is in the S4 state (sleep state) and the S5 state (shutdown state), the control signal sent by the PCH 11 is a low level signal. At this time, the triode Q1 is turned off, the triode Q2 is turned on, and the control pin 1 of the control wafer U1 receives the low level signal. The control wafer U1 stops operating and the voltage Vout stops outputting.

As can be seen from the above description, the triodes Q1 and Q2 and the field effect transistors Q3-Q5 both function as electronic switches. Therefore, in other embodiments, the triodes Q1 and Q2 and the field effect transistor Q3- Q5 can be replaced by other electronic switches, such as field effect transistors and triodes. Wherein, the bases of the triodes Q1 and Q2 and the gates of the field effect transistors Q3-Q5 are the control terminals of the electronic switches, the collectors of the triodes Q1 and Q2, and the drains of the field effect transistors Q3-Q5. Both are the first ends of the electronic switches, the emitters of the transistors Q1, Q2, and the sources of the field effect transistors Q3-Q5 are the second ends of the electronic switches.

In summary, the present invention complies with the requirements of the invention patent and submits a patent application according to law. The above description is only the preferred embodiment of the present invention, and equivalent modifications or variations made by those skilled in the art will be included in the following claims.

10. . . Regulator circuit

U2. . . Comparators

30. . . electronic switch

50. . . Input power

60. . . Reference voltage

U1. . . Control chip

13. . . Power Supplier

11. . . PCH

Q1, Q2. . . Triode

Q3-Q5. . . Field effect transistor

R1-R7. . . resistance

C1-C9. . . capacitance

L1, L2. . . inductance

D1. . . Schottky diode

1 is a block diagram of a preferred embodiment of a voltage protection circuit of the present invention.

2 and 3 are circuit diagrams of the voltage protection circuit of Fig. 1.

10. . . Regulator circuit

U2. . . Comparators

30. . . electronic switch

50. . . Input power

60. . . Reference voltage

Claims (8)

A voltage protection circuit includes a voltage stabilizing circuit, a comparator and a first electronic switch. The input end of the voltage stabilizing circuit is connected to a first power source, and the output end is connected to a non-inverting input end of the comparator. The inverting input terminal is connected to a reference voltage, and the output end of the comparator is connected to the control end of the first electronic switch, and the first end of the first electronic switch is connected to the first power source, and is also directly controlled by the voltage stabilizing circuit The voltage stabilizing circuit is configured to output a stable voltage, and the comparator is configured to compare the magnitude of the stable voltage and the reference voltage, and output a high level signal to the control end of the first electronic switch when the stable voltage is greater than the reference voltage. The first end of the first electronic switch is connected to the second end, and the control end of the voltage stabilizing circuit receives the low level signal to stop outputting the stable voltage; when the stable voltage is less than the reference voltage, the comparator output is low. Level signal to the control end of the first electronic switch, so that the first end and the second end of the first electronic switch are disconnected, and the control end of the voltage stabilizing circuit receives the high level signal to continue The stabilized output voltage. The voltage protection circuit of claim 1, wherein the voltage regulator circuit comprises second to fifth electronic switches and a control chip of the type ISL6341, and the control end of the second electronic switch is configured to receive control from the platform. The control signal of the first terminal is connected to the control end of the first power source and the third electronic switch, the second end of the second electronic switch is grounded, and the first end of the third electronic switch is connected to the control pin of the control chip The second end of the third electronic switch is grounded, the first gate pin of the control chip is connected to the control end of the fourth electronic switch, and the first end of the fourth electronic switch is connected to the first power source, the fourth electron The second end of the switch is connected to the first end of the fifth electronic switch, the control end of the fifth electronic switch is connected to the second gate pin of the control chip, and the second end of the fifth electronic switch is grounded, the fifth electron The first end of the switch is also grounded through the first inductor and the first capacitor, and the node between the first inductor and the first capacitor is used as an output of the voltage regulator circuit for outputting the stable voltage; the first inductor and the first inductor One electric The node is also grounded through the first resistor and the second resistor in sequence, and the node between the first and second resistors is connected to the feedback pin of the control chip; the start pin of the control chip is sequentially transmitted through the third resistor And a second capacitor connected to the phase pin of the control chip, the start pin of the control chip is also connected to the cathode of a Schottky diode, and the anode of the Schottky diode is connected to the first power source, the control The control pin of the chip is connected to the first end of the fifth electronic switch, and the soft start pin and the power pin of the control chip are connected to the first power source, and the ground pin of the control chip is grounded. The voltage protection circuit of claim 2, wherein the voltage regulator circuit further includes a third capacitor, a fourth capacitor, and a fourth resistor, wherein the control pins of the control chip sequentially pass through the fourth resistor and the third capacitor Connected to the feedback pin of the control chip, the control pin of the control chip is also directly connected to the feedback pin of the control chip through the fourth capacitor. The voltage protection circuit of claim 2, wherein the voltage regulator circuit further includes a second inductor, a fifth and a sixth capacitor, and the first end of the fourth electronic switch is connected to the first power source through the second inductor It is also grounded through a fifth capacitor, which is connected in parallel with the fifth capacitor. The voltage protection circuit of claim 2, wherein the voltage regulator circuit further includes a fifth resistor and a seventh capacitor, wherein the first end of the fifth electronic switch is sequentially grounded through the fifth resistor and the seventh capacitor. The voltage protection circuit of claim 2, wherein the voltage regulator circuit further comprises a sixth resistor and an eighth capacitor, wherein the sixth resistor and the eighth capacitor are connected in series and connected in parallel with the first resistor. The voltage protection circuit of claim 1, wherein the first electronic switch is a field effect transistor or a triode, and the control end of the first electronic switch is a gate or a three pole of a field effect transistor. a base of the body, the first end of the first electronic switch is a collector of a field effect transistor or a collector of a triode, and the first end of the first electronic switch is a source or a triode of a field effect transistor The emitter of the body. The voltage protection circuit of claim 2, wherein the second to fifth electronic switches are field effect transistors or triodes, and the control terminals of the second to fifth electronic switches are field effect transistors. a base of the gate or the triode, the first ends of the second to fifth electronic switches being the collectors of the drain or the triode of the field effect transistor, and the first ends of the second to fifth electronic switches It is the source of the field effect transistor or the emitter of the triode.