TW201340224A - 形成微通孔部份地穿過在凸塊互連傳導層上之絕緣材料以用於應力緩和之半導體裝置和方法 - Google Patents

形成微通孔部份地穿過在凸塊互連傳導層上之絕緣材料以用於應力緩和之半導體裝置和方法 Download PDF

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TW201340224A
TW201340224A TW101149225A TW101149225A TW201340224A TW 201340224 A TW201340224 A TW 201340224A TW 101149225 A TW101149225 A TW 101149225A TW 101149225 A TW101149225 A TW 101149225A TW 201340224 A TW201340224 A TW 201340224A
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conductive layer
insulating layer
layer
semiconductor
micro
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TW101149225A
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TWI623987B (zh
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Yaojian Lin
Kang Chen
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Stats Chippac Ltd
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Abstract

一種半導體裝置，其具有半導體晶粒和形成於該半導體晶粒上之第一絕緣層。複數個第一微通孔可被形成於該第一絕緣層中。一傳導層係被形成於該第一微開口中並且在該第一絕緣層上。一第二絕緣層係被形成於該第一絕緣層和傳導層上。該第二絕緣層之一部份係被移除以曝露該傳導層並且形成複數個第二微開口於在該傳導層上之該第二絕緣層中。該第二微開口可為微通孔、微通孔環或是微通孔狹縫。移除該第二絕緣層之該部分留下一島狀物的該第二絕緣層於該傳導層上。一凸塊係被形成於該傳導層上。一第三絕緣層係被形成於在該凸塊上之該等第二微開口中。該等第二微開口提供應力緩和。

Description

形成微通孔部份地穿過在凸塊互連傳導層上之絕緣材料以用於應力緩和之半導體裝置和方法
本發明關於半導體裝置，更特別地係關於一種形成微通孔部分地穿過在凸塊互連傳導層上之一絕緣材料以用於應力緩和之半導體裝置和方法。
在現代的電子產品中經常會發現半導體裝置。半導體裝置會有不同數量與密度的電構件。分離式半導體裝置通常含有某一種類型的電構件，舉例來說，發光二極體(Light Emitting Diode，LED)、小訊號電晶體、電阻器、電容器、電感器、以及功率金屬氧化物半導體場效電晶體(Metal Oxide Semiconductor Field Effect Transistor，MOSFET)。整合式半導體裝置通常含有數百個至數百萬個電構件。整合式半導體裝置的範例包含微控制器、微處理器、電荷耦合裝置(Charged-Coupled Device，CCD)、太陽能電池、以及數位微鏡裝置(Digital Micro-mirror Device，DMD)。
半導體裝置會實施各式各樣的功能，例如，訊號處理、高速計算、傳送與接收電磁訊號、控制電子裝置、將太陽光轉換成電能、以及 產生電視顯示器的視覺投影。在娛樂領域、通訊領域、電力轉換領域、網路領域、電腦領域、以及消費性產品領域中皆會發現半導體裝置。在軍事應用、航空、自動車、工業控制器、以及辦公室設備中同樣會發現半導體裝置。
半導體裝置係利用半導體材料的電氣特性。半導體材料的原子結構會使得可藉由施加電場或基礎電流或是經由摻雜處理來操縱其導電性。摻雜會將雜質引入至該半導體材料之中，以便操縱及控制該半導體裝置的傳導性。
一半導體裝置含有主動式電氣結構與被動式電氣結構。主動式結構(其包含雙極電晶體與場效電晶體)會控制電流的流動。藉由改變摻雜程度以及施加一電場或基礎電流，該電晶體便會提高或限制電流的流動。被動式結構(其包含電阻器、電容器、以及電感器)會創造用以實施各式各樣電氣功能所需要的電壓和電流之間的關係。該被動式結構與主動式結構會被電連接用以形成能夠讓該半導體裝置實施高速計算以及其它實用功能的電路。
半導體裝置通常會使用兩種複雜的製程來製造，也就是，前端製造以及後端製造，每一者皆可能涉及數百道步驟。前端製造涉及在一半導體晶圓的表面上形成複數個晶粒。每一個半導體晶粒通常為相同並且含有藉由電連接主動式構件和被動式構件而形成的電路。後端製造涉及從已完成的晶圓中單體化裁切個別的半導體晶粒並且封裝該晶粒，用以提供結構性支撐及環境隔離。本文中所使用的「半導體晶粒(semiconductor die)」一詞兼具單數與複數兩種形式，據此，其可能係表示單一半導體裝置與多 個半導體裝置兩者。
半導體製造的其中一個目標係生產較小型的半導體裝置。較小型的裝置通常會消耗較少的電力，具有較高的效能，並且能夠被更有效地生產。此外，較小型的半導體裝置還具有較小的覆蓋範圍，這係較小型末端產品所需要的。藉由改善前端製程可以達成較小的半導體晶粒尺寸，從而導致具有較小尺寸以及較高密度之主動式構件和被動式構件的半導體晶粒。後端製程則可以藉由改善電互連材料及封裝材料而導致具有較小覆蓋範圍的半導體裝置封裝。
半導體晶圓典型地含有形成於該晶圓之主動表面上的複數個接觸襯墊。絕緣層係被形成於該主動表面和接觸襯墊上。該絕緣層之一部分係被移除以曝露該接觸襯墊。複數個凸塊係被形成於該經曝露的接觸襯墊上以用於電性的互連。由於該凸塊所增加的應力，圍繞該接觸襯墊之絕緣層已知道會破裂，特別是圍繞該接觸襯墊之邊緣的絕緣層。該絕緣層之破裂導致缺陷以及其他穩定性的問題。
本技術領域需要減少在該接觸襯墊之上的該絕緣層上由於凸塊所導致的應力。因此，在一實施例中，本發明為一種製造半導體裝置之方法，包含之步驟為：提供半導體晶粒、形成一第一絕緣層於該半導體晶粒上、形成一傳導層於該第一絕緣層上、形成一第二絕緣層於該第一絕緣層以及傳導層上、移除該第二絕緣層之一部分以曝露該傳導層並且在該傳導層之上的第二絕緣層中形成複數個第一微通孔以及形成一凸塊於該傳導層上。該第一微通孔提供應力緩和。
在另一實施例中，本發明為一種製造半導體裝置之方法，其包含之步驟為：提供一基板、形成一傳導層於該基板上、形成一第一絕緣層於該基板和傳導層上、移除該第一絕緣層之一部分以曝露該傳導層並且在該傳導層之上的第一絕緣層中形成複數個第一微開口以及形成一互連結構於該傳導層上。
在另一實施例中，本發明為一種製造半導體裝置之方法，其包含之步驟為：提供一基板、形成一傳導層於該基板上、形成具有複數個第一微開口之一第一絕緣層於該基板和傳導層上以及形成一互連結構於該傳導層上。
在另一實施例中，本發明為一種半導體裝置，其包含一基板以及形成於該基板上之傳導層。一第一絕緣層具有形成於該基板和傳導層上之複數個第一微開口。一互連結構，其係被形成於該傳導層上。
50‧‧‧電子裝置
52‧‧‧印刷電路板
54‧‧‧傳導訊號通路
56‧‧‧打線接合封裝
58‧‧‧覆晶
60‧‧‧球柵陣列
62‧‧‧凸塊晶片載體
64‧‧‧雙直列封裝
66‧‧‧平台格柵陣列
68‧‧‧多晶片模組
70‧‧‧方形扁平無導線封裝
72‧‧‧方形扁平封裝
74‧‧‧半導體晶粒
76‧‧‧接觸襯墊
78‧‧‧中間載體
80‧‧‧傳導導線
82‧‧‧打線接線
84‧‧‧囊封劑
88‧‧‧半導體晶粒
90‧‧‧載體
92‧‧‧底層填充材料或環氧樹脂黏著材料
94‧‧‧打線接線
96,98‧‧‧接觸襯墊
100‧‧‧模製化合物或囊封劑
102‧‧‧接觸襯墊
104‧‧‧凸塊
106‧‧‧中間載體
108‧‧‧主動區
110,112‧‧‧凸塊
114‧‧‧訊號線
116‧‧‧模製化合物或囊封劑
120‧‧‧半導體晶圓
122‧‧‧基底基板材料
124‧‧‧半導體晶粒或構件
126‧‧‧切割道
128‧‧‧背表面
130‧‧‧主動表面
132‧‧‧絕緣或鈍化層
134‧‧‧電性地傳導層
142‧‧‧絕緣或鈍化層
144‧‧‧微通孔或微開口
146‧‧‧微通孔環
150‧‧‧微通孔狹縫
154‧‧‧球或凸塊
156‧‧‧絕緣層
160‧‧‧絕緣或鈍化層
162‧‧‧雷射
164‧‧‧微通孔或微開口
166‧‧‧球或凸塊
168‧‧‧絕緣層
170‧‧‧絕緣或鈍化層
172‧‧‧雷射
174‧‧‧微通孔或微開口
176‧‧‧球或凸塊
178‧‧‧絕緣層
180‧‧‧絕緣或鈍化層
182‧‧‧微通孔或微開口
184‧‧‧雷射
186‧‧‧電性地傳導層
188‧‧‧絕緣或鈍化層
190‧‧‧雷射
192‧‧‧微通孔或微開口
196‧‧‧球或凸塊
198‧‧‧絕緣層
200‧‧‧非主動基板
圖1說明的係一印刷電路板(PCB)，在其表面上鑲嵌著不同類型的封裝；圖2a-2c說明的係被鑲嵌至該印刷電路板的代表性半導體封裝的進一步細節；圖3a-3b說明具有複數個半導體晶粒之一半導體晶圓係藉由切割道而被分離；圖4a-4j說明一用於應力緩和之製程，其形成微通孔部分地穿過在凸塊互連傳導層上之一絕緣材料； 圖5a-5e說明一用於應力緩和之製程，其形成微通孔部分地穿過具有島狀物之絕緣材料且配置於該凸塊互連結構之中央部分的一絕緣材料；圖6a-6e說明一用於應力緩和之製程，其形成微通孔部分地穿過具有複數個島狀物之絕緣材料且配置於該凸塊互連結構上之一絕緣材料；圖7a-7g說明一用於應力緩和之製程，其形成微通孔部分地穿過具有延伸進入一第二絕緣層之凸塊互連傳導層的一第一絕緣材料；以及圖8說明一用於應力緩和之非主動基板，其具有被形成部分地穿過在凸塊互連傳導層上之一絕緣材料的微通孔。
在下面的說明中會參考圖式於一或多個實施例中來說明本發明，於該等圖式中，相同的符號代表相同或雷同的元件。雖然本文係以達成本發明之目的的最佳模式來說明本發明；不過，熟習本技術的人士便會明白，本發明希望涵蓋受到下面揭示內容及圖式支持的隨附申請專利範圍及它們的等效範圍所定義的本發明的精神與範疇內可能併入的替代例、修正例、以及等效例。
半導體裝置通常會使用兩種複雜的製程來製造：前端製造和後端製造。前端製造涉及在一半導體晶圓的表面上形成複數個晶粒。該晶圓上的每一個晶粒皆含有主動式電構件和被動式電構件，它們會被電連接而形成功能性電路。主動式電構件(例如電晶體與二極體)能夠控制電流的流動。被動式電構件(例如電容器、電感器、電阻器、以及變壓器)會創造用以實施電路功能所需要的電壓和電流之間的關係。
被動式構件和主動式構件會藉由一連串的製程步驟被形成 在該半導體晶圓的表面上方，該製程步驟包含：摻雜、沉積、光微影術、蝕刻、以及平坦化。摻雜會藉由下面的技術將雜質引入至半導體材料之中，例如：離子植入或是熱擴散。摻雜製程會修正主動式裝置之中的半導體材料的導電性，將該半導體材料轉換成絕緣體、導體，或是響應於一電場或基礎電流來動態改變半導體材料傳導性。電晶體含有不同類型和摻雜程度的多個區域，它們會在必要時被排列成用以在施加該電場或基礎電流時讓該電晶體會提高或限制電流的流動。
主動式構件和被動式構件係由具有不同電氣特性的多層材料所構成。該等層能夠藉由各式各樣的沉積技術來形成，其部分取決於要被沉積的材料的類型。舉例來說，薄膜沉積可能包含：化學氣相沉積(Chemical Vapor Deposition，CVD)製程、物理氣相沉積(Physical Vapor Deposition，PVD)製程、電解電鍍製程、以及無電電鍍製程。每一層通常都會被圖案化，以便形成主動式構件的一部分、被動式構件的一部分、或是構件之間的電連接線的一部分。
該些層可使用光微影術而被圖案化，其涉及將例如光阻之光敏感材料沉積於要被圖案化的層上。使用光而使得一圖案從光罩而轉移到光阻。在一實施例中，該光阻圖案的經光照之該部分係使用溶劑以被移除且曝露部分的底層而被圖案化。在另一實施例中，該光阻圖案的未經光照之該部分(負光阻)係使用溶劑以被移除且曝露部分的底層而被圖案化。剩餘的光阻會被移除，從而留下一經圖案化的層。或者，某些類型的材料會藉由利用無電電鍍以及電解電鍍之類的技術將該材料直接沉積在由前一道沉積/蝕刻製程所形成的區域或是空隙之中而被圖案化。
圖案化是基本操作，藉由圖案化在該半導體晶圓表面上之頂層的部分係被移除。該半導體晶圓中的多個部分可以利用下面方式來移除：光微影術、光罩法、遮罩法、氧化物或金屬移除、照相術與模版印刷術、以及微型微影術(microlithography)。光微影術包含於多個主光罩(reticle)或是一光罩之中形成一圖案並且將該圖案轉印至該半導體晶圓的該等表面層。光微影術會於一雙步驟製程之中在該半導體晶圓的表面上形成主動式構件與被動式構件的水平維度。首先，該主光罩(reticle)或該等遮罩上的圖案會被轉印至一層光阻之中。光阻係一光敏感材料，當曝露於光之中時，結構與特性便會改變。改變該光阻之結構與特性的製程可以負向作用光阻(negative-acting photo resist)或是正向作用光阻(positive-acting photo resist)來進行。其次，該光阻層會被轉印至該半導體晶圓之中。當蝕刻移除半導體晶圓之頂端層中沒有被該光阻覆蓋的部分時，該轉印便會發生。光阻的化學特性會使得該光阻緩慢地溶解並且防止被化學蝕刻溶液移除，而該半導體晶圓之頂端層中沒有被該光阻覆蓋的部分則會比較快速地被移除。形成、曝光、以及移除該光阻的製程以及移除該半導體晶圓之一部分的製程可以根據所使用的特殊光阻以及所希望的結果來加以修正。
於負向作用光阻之中，光阻會曝露在光之中，並且在一被稱為聚合作用(polymerization)的製程之中從可溶解的狀態改變成不可溶解的狀態。於聚合作用之中，未被聚合的材料會曝露在一光或是能量源之中，而且多個聚合物則會形成一具有抗蝕刻性的交聯材料。於大部分的負向光阻之中，該聚合物為聚異戊二烯(polyisoprene)。利用化學溶劑或是顯影劑移除該等可溶解的部分(也就是，沒有曝露在光之中的部分)會在該光阻之中留下 一個孔洞，其會對應於該主光罩上的一不透明的圖案。一在該不透明的區域之中有圖案存在的遮罩會被稱為透明場遮罩(clear-field mask)。
於正向作用光阻之中，光阻會曝露在光之中，並且在一被稱為可光溶解作用(photosolubilization)的製程之中從相對不可溶解的狀態改變成非常可溶解的狀態。於可光溶解作用之中，該相對不可溶解的光阻會曝露在適當的光能量之中並且被轉換成比較可溶解的狀態。該光阻之經過可光溶解作用的部分會在顯影製程之中被一溶劑移除。基礎的正向光阻聚合物為酚甲醛(phenol formaldehyde)聚合物，其亦稱為酚甲醛酚醛樹脂。利用化學溶劑或是顯影劑移除該等可溶解的部分(也就是，曝露在光之中的部分)會在該光阻之中留下一個孔洞，其會對應於該主光罩上的透明圖案。一在該透明的區域之中有圖案存在的遮罩會被稱為暗場遮罩(dark-field mask)。
移除該半導體晶圓中沒有被該光阻覆蓋的頂端部分之後，剩餘的光阻會被移除，從而留下一經圖案化的層。或者，某些類型的材料會藉由利用無電極電鍍以及電解質電鍍之類的技術將該材料直接沉積在由前一道沉積/蝕刻製程所形成的區域或是空隙之中而被圖案化。
在一既有圖案的上方沉積一薄膜材料可能會擴大下方的圖案並且產生一不均勻平坦的表面。生產較小且更密集封裝的主動式構件和被動式構件會需要用到均勻平坦的表面。平坦化作用可以被用來從晶圓的表面處移除材料，並且產生一均勻平坦的表面。平坦化作用涉及利用一研磨墊來研磨晶圓的表面。一有磨蝕作用的材料以及腐蝕性的化學藥劑會在研磨期間被加到晶圓的表面。化學藥劑的磨蝕性作用及腐蝕性作用所組成的組合式機械作用會移除任何不規律的拓樸形狀，從而產生一均勻平坦的 表面。
後端製造係指將已完成的晶圓切割或單體化裁切成個別的半導體晶粒，並且接著封裝該半導體晶粒，以達結構性支撐及環境隔離的效果。為單體化裁切該半導體晶粒，晶圓會沿著該晶圓中被稱為切割道(saw street)或切割線(scribe)的非功能性區域被刻痕並且折斷。該晶圓會利用雷射切割工具或鋸片來進行單體化裁切。經過單體化裁切之後，該個別的半導體晶粒便會被鑲嵌至一封裝基板，其包含多根接針或是多個接觸襯墊，用以和其它系統構件進行互連。被形成在該半導體晶粒上方的接觸襯墊接著會被連接至該封裝裡面的接觸襯墊。該等電連接線可利用焊料凸塊、短柱凸塊(stud bump)、導電膏、或是打線接線來製成。一囊封劑或是其它模造材料會被沉積在該封裝的上方，用以提供物理性支撐和電隔離。接著，該已完成的封裝便會被插入一電氣系統之中並且讓其它系統構件可以利用該半導體裝置的功能。
圖1說明電子裝置50，其具有一晶片載體基板或是印刷電路板(Printed Circuit Board，PCB)52，在其表面上鑲嵌著複數個半導體封裝。電子裝置50可能具有某一種類型的半導體封裝或是多種類型的半導體封裝，端視應用而定。為達解釋的目的，圖1中便顯示該等不同類型的半導體封裝。
電子裝置50可能係一單機型系統，其會使用該等半導體封裝來實施一或多項電功能。或者，電子裝置50亦可能係一較大型系統中的一子構件。舉例來說，電子裝置50可能係一蜂巢式電話的一部分、一個人數位助理(Personal Digital Assistant，PDA)的一部分、一數位錄像機(Digital Video Camera，DVC)的一部分、或是其它電子通訊裝置的一部分。或者，電子裝置50亦可能係一圖形卡、一網路介面卡、或是能夠被插入一電腦之中的其它訊號處理卡。該半導體封裝可能包含：微處理器、記憶體、特定應用積體電路(Application Specific Integrated Circuits，ASIC)、邏輯電路、類比電路、RF電路、離散式裝置、或是其它半導體晶粒或電構件。對此等產品來說，若要被市場接受，微型化和減輕重量係必要的。半導體裝置之間的距離必須縮短，以便達到更高的密度。
在圖1中，PCB 52提供一種通用基板，用以結構性支撐及電互連被鑲嵌在該PCB之上的半導體封裝。多條傳導訊號通路54會利用下面製程被形成在PCB 52的一表面上方或是多層裡面：蒸發製程、電解質電鍍製程、無電極電鍍製程、網印製程、或是其它合宜的金屬沉積製程。訊號通路54會在該等半導體封裝、被鑲嵌的構件、以及其它外部系統構件中的每一者之間提供電通訊。通路54還會提供連接至每一個該等半導體封裝的電力連接線及接地連接線。
於某些實施例中，一半導體裝置會有兩個封裝層。第一層封裝係一種用於以機械方式及電氣方式將該半導體晶粒附著至一中間載體的技術。第二層封裝則涉及以機械方式及電氣方式將該中間載體附著至該PCB。於其它實施例中，一半導體裝置可能僅有該第一層封裝，其中，該半導體晶粒會以機械方式及電氣方式直接被鑲嵌至該PCB。
為達解釋的目的，圖中在PCB 52之上顯示數種類型的第一層封裝，其包含打線接合封裝56以及覆晶58。除此之外，圖中還顯示被鑲嵌在PCB 52之上的數種類型第二層封裝，其包含：球柵陣列(Ball Grid Array，BGA)60；凸塊晶片載板(Bump Chip Carrier，BCC)62；雙直列封裝(Dual In-line Package，DIP)64；平台格柵陣列(Land Grid Array，LGA)66；多晶片模組(Multi-Chip Module，MCM)68；方形扁平無導線封裝(Quad Flat Non-leaded package，QFN)70；以及方形扁平封裝72。端視系統需求而定，由被配置成具有第一層封裝樣式和第二層封裝樣式之任何組合的半導體封裝以及其它電子構件所組成的任何組合皆能夠被連接至PCB 52。於某些實施例中，電子裝置50包含單一附著半導體封裝；而其它實施例則可能需要多個互連封裝。藉由在單一基板上方組合一或多個半導體封裝，製造商便能夠將事先製造的構件併入電子裝置和系統之中。因為該等半導體封裝包含精密的功能，所以，能夠使用較便宜的構件及有效率的製程來製造電子裝置。所產生的裝置比較不可能會失效而且製造價格較低廉，從而讓消費者會有較低的成本。
圖2a至2c說明示範性半導體封裝。圖2a說明被鑲嵌在PCB 52之上的DIP 64的進一步細節。半導體晶粒74包含一含有類比電路或數位電路的主動區，該等類比電路或數位電路會被施行為被形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計來進行電性互連。舉例來說，該電路可能包含被形成在半導體晶粒74之主動區裡面的一或多個電晶體、二極體、電感器、電容器、電阻器、以及其它電路元件。接觸襯墊76係一或多層傳導材料(例如鋁(Al)、銅(Cu)、錫(Sn)、鎳(Ni)、金(Au)、或是銀(Ag))，並且會被電連接至形成在半導體晶粒74裡面的電路元件。在DIP 64的組裝期間，半導體晶粒74會利用一金-矽共熔合金層或是膠黏材料(例如熱環氧樹脂或環氧樹脂)被鑲嵌至一中間 載板78。該封裝主體包含一絕緣封裝材料，例如聚合物或是陶瓷。導體導線80以及打線接線82會在半導體晶粒74與PCB 52之間提供電互連。囊封劑84會被沉積在該封裝的上方，防止濕氣和粒子進入該封裝並污染半導體晶粒74或打線接線82，以達環境保護的目的。
圖2b說明被鑲嵌在PCB 52之上的BCC 62的進一步細節。半導體晶粒88會利用底層填充材料或環氧樹脂膠黏材料92被鑲嵌在載板90的上方。打線接線94會在接觸襯墊96與98之間提供第一層封裝互連。模製化合物或囊封劑100會被沉積在半導體晶粒88和打線接線94的上方，用以為該裝置提供物理性支撐以及電隔離效果。多個接觸襯墊102會利用一合宜的金屬沉積製程(例如電解電鍍或無電電鍍)被形成在PCB 52的一表面上方，用以防止氧化。接觸襯墊102會被電連接至PCB 52之中的一或多條傳導訊號通路54。多個凸塊104會被形成在BCC 62的接觸襯墊98和PCB 52的接觸襯墊102之間。
在圖2c中，半導體晶粒58會利用覆晶樣式的第一層封裝以面朝下的方式被鑲嵌至中間載板106。半導體晶粒58的主動區108含有類比電路或數位電路，該等類比電路或數位電路會被施行為根據該晶粒的電氣設計所形成的主動式裝置、被動式裝置、傳導層、以及介電層。舉例來說，該電路可能包含被形成在主動區108裡面的一或多個電晶體、二極體、電感器、電容器、電阻器、以及其它電路元件。半導體晶粒58會經由多個凸塊110以電氣方式及機械方式被連接至載板106。
BGA 60會利用使用多個凸塊112的BGA樣式第二層封裝以電氣方式及機械方式被連接至PCB 52。半導體晶粒58會經由凸塊110、訊 號線114、以及凸塊112被電連接至PCB 52之中的傳導訊號線路54。一模製化合物或囊封劑116會被沉積在半導體晶粒58和載板106的上方，用以為該裝置提供物理性支撐以及電隔離效果。該覆晶半導體裝置會從半導體晶粒58上的主動式裝置至PCB 52上的傳導軌提供一條短的電傳導路徑，用以縮短訊號傳導距離、降低電容、並且改善整體電路效能。於另一實施例中，該半導體晶粒58會利用覆晶樣式的第一層封裝以機械方式及電氣方式直接被連接至PCB 52，而沒有中間載板106。
圖3a顯示一半導體晶圓120，其具有一基底基板材料122，例如，矽、鍺、砷化鎵、磷化銦、或是碳化矽，用以達成結構性支撐的目的。複數個半導體晶粒或構件124會被形成在晶圓120之上，如上面所述，它們會藉由一非主動、晶粒內的晶圓區、或是切割道126而被隔開。切割道126會提供多個切割區，用以將半導體晶圓120單體化裁切成個別的半導體晶粒124。
圖3b顯示半導體晶圓120的一部分的剖視圖。每一個半導體晶粒124皆具有一背表面128與主動表面130，該主動表面130含有類比電路或數位電路，該等類比電路或數位電路會被施行為被形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面130裡面的一或多個電晶體、二極體、以及其它電路元件，用以施行類比電路或數位電路，例如，數位訊號處理器(Digital Signal Processor，DSP)、ASIC、記憶體、或是其它訊號處理電路。
圖4a至4j配合圖1以及2a至2c說明形成微通孔部分地穿 過在凸塊互連傳導層上之絕緣材料之製程以用於應力緩和。圖4a顯示半導體晶圓120之一半導體晶粒124的一部分。絕緣或鈍化層132係使用PVD、CVD、印刷、旋塗、噴塗、燒結、或是熱氧化而被形成於半導體晶粒124之主動表面130上。絕緣層132含有由下面所製成的一或多層：二氧化矽(SiO2)、氮化矽(Si3N4)、氮氧化矽(SiON)、五氧化二鉭(Ta2O5)、三氧化二鋁(Al2O3)、氧化鉿(HfO2)、苯環丁烯(BCB)、聚亞醯胺(PI)、聚苯噁唑(PBO)或是其他合宜的絕緣材料。
在圖4b中，電性地傳導層134係使用PVD、CVD、電解質電鍍製程、無電極電鍍製程、或是其它合宜的金屬沉積製程被形成在絕緣層132的上方。傳導層134可能係由下面所製成的一或多層：Al、Cu、Sn、Ni、Au、Ag、或是其它合宜的導電材料。傳導層134的操作方式如同被電連接至主動表面130上之電路的多個接觸襯墊。接觸觸墊134可能會以並列的方式被設置在和半導體晶粒124之邊緣相隔一第一距離的地方，如圖4b中所示。或者，接觸襯墊134亦可能會偏移排列在多列之中，使得第一列接觸襯墊係被設置在和該晶粒之邊緣相隔一第一距離的地方，而第二列接觸襯墊會錯開該第一列被配置在和該晶粒之邊緣相隔一第二距離的地方。
在圖4c中，絕緣或鈍化層142會被形成在絕緣層132以及傳導層134的上方，其係利用下面方法所形成：PVD、CVD、印刷、旋塗、噴塗、燒結、或是熱氧化。絕緣層142含有由下面所製成的一或多層：SiO2、Si3N4、SiON、Ta2O5、Al2O3、HfO2、BCB、PI、PBO或是其他合宜的絕緣材料。該絕緣層142具有3-70微米(μm)的厚度。
在圖4d中，一部分的絕緣層142被移除係藉由蝕刻製程穿 過一圖案化的光阻層以曝露傳導層134。或者是，一部分的絕緣層142被移除係藉由使用雷射143之雷射直接燒蝕(laser direct ablation，LDA)。該等蝕刻或LDA製程亦形成複數個微通孔或微開口144部分地延伸穿過傳導層134上之絕緣層142。微通孔144係小於該光阻分辨能力以達到部分地顯影圖案而未曝露傳導層134。
圖4e顯示半導體晶粒124之平面圖，該半導體晶粒124具有被形成部分地穿過傳導層134上之絕緣層142的傳導層134和微通孔144。在絕緣層142和傳導層134之間的重疊具有20-50 μm的寬度W1。微通孔144具有0.5-10 μm的寬度W2，並且深度小於絕緣層142之厚度以避免曝露傳導層134。圖4f顯示半導體晶粒124之平面圖，該半導體晶粒124具有多達32個被形成部份地穿過在傳導層134上之絕緣層142的微通孔144。
在另一實施例中，圖4g顯示半導體晶粒124之平面圖，該半導體晶粒124具有被形成部份地穿過傳導層134之上的絕緣層142之傳導層134和微通孔環146。在絕緣層142和傳導層134之間的重疊具有20-50 μm的寬度W3，而微通孔環146具有0.5-10 μm的寬度W4，並且深度小於絕緣層142之厚度以避免曝露傳導層134。
圖4h顯示半導體晶粒124之平面圖，半導體晶粒124具有有被形成部份地穿過傳導層134之上的絕緣層142之傳導層134和微通孔狹縫150。在絕緣層142和傳導層134之間的重疊具有20-50 μm的寬度W5，而微通孔狹縫150具有0.5-10 μm的寬度W6並且深度小於絕緣層142之厚度以避免曝露傳導層134。
在圖4i中，電性傳導凸塊材料使用蒸鍍(evaporation)、電解電鍍(electrolytic plating)、無電電鍍(electroless plating)、球墜(ball drop)或網版印刷(screen printing)製程而被沉積於傳導層134和絕緣層142之上。該凸塊材料可為Al、Sn、Ni、Au、Ag、Pb、Bi、Cu、焊接劑以及該些之組合物且具有可選擇的助焊劑溶劑。舉例來說，該凸塊材料可為共熔Sn/Pb、高鉛焊接劑或無鉛焊接劑。該凸塊材料使用一適當的附接或結合製程而被結合至傳導層134。在一實施例中，該凸塊材料藉由加熱該材料至高於其之熔點而被回流焊接以形成球或凸塊154。在某些應用中，凸塊154係被回流焊接第二次以提升電性接觸至傳導層134。凸塊154亦可被擠壓結合至傳導層134。凸塊154代表一種互連結構的形式，其可被形成於傳導層134之上。該等互連結構亦可使用柱形凸塊、微凸塊或其他電性互連。
在圖4j中，絕緣層156係被形成於微通孔144之上和之中並且於凸塊154之上用於增加該等凸塊的結構支撐。在一實施例中，絕緣層156係為助焊劑殘留聚合物。凸塊154係被電連接至形成在半導體晶粒124之主動表面130上的傳導層134。被形成在微通孔144中之絕緣層142藉由重新分配應力輪廓而提供對於凸塊154之應力緩和以減少破裂以及其他互連的缺陷。相同地，在微通孔環146或微通孔狹縫150中之絕緣層142於圖4h-4i中，藉由重新分配應力輪廓而提供對於凸塊154之應力緩和以減少在傳導層134之上的絕緣層142之破裂以及其他互連缺陷。
圖5a-5e顯示形成微通孔部分地穿過在凸塊互連傳導層上之絕緣材料之其他實施例以用於應力緩和，該凸塊互連傳導層具有島狀物的絕緣材料，其係被配置於該凸塊互連結構之中間部分上。接續自圖4b，一 絕緣或鈍化層160係藉由使用PVD、CVD、印刷、旋轉塗佈、噴塗塗佈、燒結或熱氧化而被形成於絕緣層132和傳導層134之上，如圖5a所示。絕緣層160含有SiO2、Si3N4、SiON、Ta2O5、Al2O3、HfO2、BCB、PI、PBO或其他適當的絕緣材料之一層或多層。絕緣層160具有3-70 μm之厚度。
在圖5b中，絕緣層160之一部分係藉由蝕刻製程穿過一圖案化的光阻層而被移除以曝露傳導層134。或者是，絕緣層160之一部分係藉由使用雷射162之LDA而被移除。特別是，該蝕刻或LDA製程留下配置在傳導層134之中間區域的絕緣層160的島狀物160a。該蝕刻或LDA製程亦形成延伸部分地穿過傳導層134之上的絕緣層160的複數個微通孔或微開口164。微通孔164係小於該光阻分辨能力以達到部分地顯影圖案而不會曝露傳導層134。
圖5c顯示半導體晶粒124之平面圖，該半導體晶粒124具有傳導層134以及經形成部分地穿過在傳導層134上之絕緣層160的微通孔164。在一實施例中，16個微通孔164被形成部分地穿過在傳導層134上之絕緣層160。在絕緣層160和傳導層134之間的重疊具有20-50 μm的寬度W1。微通孔164具有0.5-10 μm的寬度W2並且深度小於絕緣層160之厚度以避免曝露傳導層134。額外的微通孔164可被形成部分地穿過在傳導層134上之絕緣層160，相似於圖4f。微通孔環或微通孔狹縫可被形成部分地穿過在傳導層134上之絕緣層160，相似於圖4g-4h。
在圖5d中，電性傳導凸塊材料係藉由使用蒸鍍、電鍍、無電鍍、球墜或網版印刷製程而被沉積於傳導層134和絕緣層160上。該凸塊材料可為Al、Sn、Ni、Au、Ag、Pb、Bi、Cu、焊接劑以及該些之組合物且 具有可選擇的助焊劑溶劑。舉例來說，該凸塊材料可為共熔Sn/Pb、高鉛焊接劑或無鉛焊接劑。該凸塊材料使用一適當的附接或結合製程而被結合至傳導層134。在一實施例中，該凸塊材料藉由加熱該材料至高於其之熔點而被回流焊接以形成球或凸塊166。在某些應用中，凸塊166係被回流焊接第二次以提升電性接觸至傳導層134。凸塊166亦可被擠壓結合至傳導層134。凸塊166代表一種互連結構的形式，其可被形成於傳導層134之上。該等互連結構亦可使用柱形凸塊、微凸塊或其他電性互連。
在圖5e中，絕緣層168被形成於微通孔164之上和之中並且於凸塊166之上用於增加該等凸塊的結構支撐。在一實施例中，絕緣層168係為助焊劑殘留聚合物。凸塊166係被電連接至形成在半導體晶粒124之主動表面130上的傳導層134。絕緣層160形成有微通孔164，同時絕緣層160之島狀物160a被配置於傳導層134之中間區域，藉由重新分配應力輪廓而提供對於凸塊166之應力緩和以減少破裂以及其他互連的缺陷。
圖6a-6e顯示另一實施例，其形成微通孔部分地穿過凸塊互連傳導層上之絕緣材料，該凸塊互連傳導層具有複數個島狀物的絕緣材料被配置於該凸塊互連結構上用於應力緩和。接續圖4b，絕緣或鈍化層170係藉由使用PVD、CVD、印刷、旋轉塗佈、噴塗塗佈、燒結或熱氧化而被形成於絕緣層132和傳導層134之上，如圖6a所示。絕緣層170含有SiO2、Si3N4、SiON、Ta2O5、Al2O3、HfO2、BCB、PI、PBO或其他適當的絕緣材料之一層或多層。絕緣層170具有3-70 μm之厚度。
在圖6b中，絕緣層170之一部分係藉由蝕刻製程穿過一圖案化的光阻層而被移除以曝露傳導層134。或者是，絕緣層170之一部分係 藉由使用雷射172之LDA而被移除。特別是，該等蝕刻或LDA製程留下配置在傳導層134上之絕緣層170的複數個島狀物170a-170b。該等蝕刻或LDA製程亦形成延伸部分地穿過傳導層134之上的絕緣層170的複數個微通孔或微開口174。微通孔174係小於該光阻分辨能力以達到部分地顯影圖案而不會曝露傳導層134。
圖6c顯示半導體晶粒124之平面圖，該半導體晶粒124具有傳導層134以及經形成部分地穿過在傳導層134上之絕緣層170的微通孔174。在一實施例中，16個微通孔174被形成部分地穿過在傳導層134上之絕緣層170。在絕緣層170和傳導層134之間的重疊具有20-50 μm的寬度W1。微通孔174具有0.5-10 μm的寬度W2並且深度小於絕緣層170之厚度以避免曝露傳導層134。額外的微通孔174可被形成部分地穿過在傳導層134上之絕緣層170，相似於圖4f。微通孔環或微通孔狹縫可被形成部分地穿過在傳導層134上之絕緣層170，相似於圖4g-4h。
在圖6d中，電性傳導凸塊材料係藉由使用蒸鍍、電解電鍍、無電電鍍、球墜或網版印刷製程而被沉積於傳導層134和絕緣層170上。該凸塊材料可為Al、Sn、Ni、Au、Ag、Pb、Bi、Cu、焊接劑以及該些之組合物且具有可選擇的助焊劑溶劑。舉例來說，該凸塊材料可為共熔Sn/Pb、高鉛焊接劑或無鉛焊接劑。該凸塊材料使用一適當的附接或結合製程而被結合至傳導層134。在一實施例中，該凸塊材料藉由加熱該材料至高於其之熔點而被回流焊接以形成球或凸塊176。在某些應用中，凸塊176係被回流焊接第二次以提升電性接觸至傳導層134。凸塊176亦可被擠壓結合至傳導層134。凸塊176代表一種互連結構的形式，其可被形成於傳導層134之上。 該等互連結構亦可使用柱形凸塊、微凸塊或其他電性互連。
在圖6e中，絕緣層178被形成於微通孔174之上和之中並且於凸塊176之上用於增加該等凸塊的結構支撐。在一實施例中，絕緣層178係為助焊劑殘留聚合物。凸塊176係被電連接至形成在半導體晶粒124之主動表面130上的傳導層134。絕緣層170形成有微通孔174，同時絕緣層170之島狀物170a-170b被配置於傳導層134上，藉由重新分配應力輪廓而提供對於凸塊176之應力緩和以減少破裂以及其他互連的缺陷。
圖7a-7g顯示另一實施例，其形成微通孔部分地穿過具有凸塊互連傳導層之第一絕緣材料延伸進入第二絕緣層以用於應力緩和。接續自圖4a，絕緣或鈍化層180係藉由使用PVD、CVD、印刷、旋轉塗佈、噴塗塗佈、燒結或熱氧化而被形成於半導體晶粒124之主動表面130上，如圖7a所示。絕緣層180含有SiO2、Si3N4、SiON、Ta2O5、Al2O3、HfO2、BCB、PI、PBO或其他適當的絕緣材料之一層或多層。絕緣層180具有3-70 μm之厚度。絕緣層180之一部分係藉由蝕刻製程而被移除以在該絕緣層中形成微通孔或微開口182。微通孔182係小於該光阻分辨能力以達到部分地顯影圖案而不會曝露主動表面130。在一實施例中，微通孔182係被形成於具有寬5 μm和間距10 μm之交錯排列佈局中。或者是，絕緣層180之一部分係藉由使用雷射184之LDA而被移除以在該絕緣層中形成微通孔或微開口182。
在圖7b中，電性地傳導層186係使用PVD、CVD、電解質電鍍製程、無電極電鍍製程、或是其它合宜的金屬沉積製程被形成在絕緣層180的上方並且進入微通孔182中。傳導層186可能係由下面所製成的一 或多層：Al、Cu、Sn、Ni、Au、Ag、或是其它合宜的導電材料。傳導層186的操作方式如同被電連接至主動表面130上之電路的多個接觸襯墊。接觸襯墊186可能會以並列的方式被設置在和半導體晶粒124之邊緣相隔一第一距離的地方。或者，接觸襯墊186亦可能會偏移排列在多列之中，使得第一列接觸襯墊係被設置在和該晶粒之邊緣相隔一第一距離的地方，而第二列接觸襯墊會錯開該第一列被配置在和該晶粒之邊緣相隔一第二距離的地方。
在圖7c中，絕緣或鈍化層188係藉由使用PVD、CVD、印刷、旋轉塗佈、噴塗塗佈、燒結或熱氧化而被形成於絕緣層180和傳導層186之上。絕緣層188含有SiO2、Si3N4、SiON、Ta2O5、Al2O3、HfO2、BCB、PI、PBO或其他適當的絕緣材料之一層或多層。絕緣層188具有3-70 μm之厚度。
在圖7d中，絕緣層188之一部分係藉由蝕刻製程穿過一圖案化的光阻層而被移除以曝露傳導層186。微通孔192係小於該光阻分辨能力以達到部分地顯影圖案而不會曝露傳導層186。或者是，絕緣層188之一部分係藉由使用雷射190之LDA而被移除。該等蝕刻或LDA製程亦形成延伸部分地穿過傳導層186之上的絕緣層188的複數個微通孔或微開口192。
圖7e顯示半導體晶粒124之平面圖，該半導體晶粒124具有傳導層134以及經形成部分地穿過在傳導層186上之絕緣層188的微通孔192。在一實施例中，16個微通孔192被形成部分地穿過在傳導層186上之絕緣層188。在絕緣層188和傳導層186之間的重疊具有20-50 μm的寬度W1。微通孔192具有0.5-10 μm的直徑或寬度W2並且深度小於絕緣層188 之厚度以避免曝露傳導層186。額外的微通孔192，例如多達32個微通孔，可被形成部分地穿過在傳導層186上之絕緣層188，相似於圖4f。微通孔環或微通孔狹縫可被形成部分地穿過在傳導層186上之絕緣層188，相似於圖4g-4h。
在圖7f中，電性傳導凸塊材料係藉由使用蒸鍍、電解電鍍、無電電鍍、球墜或網版印刷製程而被沉積於傳導層186和絕緣層188上。該凸塊材料可為Al、Sn、Ni、Au、Ag、Pb、Bi、Cu、焊接劑以及該些之組合物且具有可選擇的助焊劑溶劑。舉例來說，該凸塊材料可為共熔Sn/Pb、高鉛焊接劑或無鉛焊接劑。該凸塊材料使用一適當的附接或結合製程而被結合至傳導層186。在一實施例中，該凸塊材料藉由加熱該材料至高於其之熔點而被回流焊接以形成球或凸塊196。在某些應用中，凸塊196係被回流焊接第二次以提升電性接觸至傳導層186。凸塊196亦可被擠壓結合至傳導層186。凸塊196代表一種互連結構的形式，其可被形成於傳導層186之上。該等互連結構亦可使用柱形凸塊、微凸塊或其他電性互連。
在圖7g中，絕緣層198被形成於微通孔192之上和之中並且於凸塊196之上用於增加該等凸塊的結構支撐。在一實施例中，絕緣層198係為助焊劑殘留聚合物。凸塊196係被電連接至形成在半導體晶粒124之主動表面130上的傳導層186。微通孔182增加在凸塊196下之傳導層186的厚度用於高穩定度。絕緣層188形成有微通孔192，藉由重新分配應力輪廓而提供對於凸塊196之應力緩和以減少破裂以及其他互連的缺陷。
圖8說明一實施例，像似於圖4a-4i，該實施例具有形成於例如為PCB之非主動基板200上之傳導層134、絕緣層142以及凸塊154。 傳導層134係被電連接至基板200中之傳導通路以用於電性互連。
本文雖然已經詳細解釋本發明的一或多個實施例；但是，熟習本技術的人士便會明白，可以對此等實施例進行修正與更動，其並不會脫離如後面的申請專利範圍之中所提出之本發明的範疇。
124‧‧‧半導體晶粒或構件
128‧‧‧背表面
130‧‧‧主動表面
132‧‧‧絕緣或鈍化層
134‧‧‧電性地傳導層
142‧‧‧絕緣或鈍化層
154‧‧‧球或凸塊
156‧‧‧絕緣層

Claims (15)

  1. 一種製造半導體裝置之方法，其包含：提供一基板；形成一傳導層於該基板上；形成一第一絕緣層於該基板和傳導層上；移除該第一絕緣層之一部分以曝露該傳導層並且形成複數個第一微開口於在該傳導層上之該第一絕緣層中；以及形成一互連結構於該傳導層上。
  2. 如申請專利範圍第1項之方法，其進一步包含在形成該傳導層之前形成一第二絕緣層於該基板上。
  3. 如申請專利範圍第2項之方法，其進一步包含：形成複數個第二微開口於該第二絕緣層中；以及形成該傳導層於該第二微開口上。
  4. 如申請專利範圍第1項之方法，其中，移除該第一絕緣層之該部分而留下一島狀物的該第一絕緣層於該傳導層上。
  5. 如申請專利範圍第1項之方法，其進一步包含形成一第二絕緣層於在該互連結構上之該第一微開口中。
  6. 一種製造半導體裝置之方法，其包含：提供一基板；形成一傳導層於該基板上；形成具有複數個第一微開口之一第一絕緣層於該基板和傳導層上；以及形成一互連結構於該傳導層上。
  7. 如申請專利範圍第6項之方法，其進一步包含形成一第二絕緣層於該基板上。
  8. 如申請專利範圍第7項之方法，其進一步包含：形成複數個第二微開口於該第二絕緣層中；以及形成該傳導層於該第二微開口上。
  9. 如申請專利範圍第6項之方法，其進一步包含形成一島狀物的該第一絕緣層於該傳導層上。
  10. 如申請專利範圍第6項之方法，其中該互連結構包含一凸塊。
  11. 一種半導體裝置，其包含：一基板；一傳導層，其形成於該基板上；一具有複數個第一微開口的第一絕緣層，其形成於該基板和傳導層上；以及一互連結構，其形成於該傳導層上。
  12. 如申請專利範圍第11項之半導體裝置，其進一步包含一第二絕緣層，其形成於該基板上。
  13. 如申請專利範圍第11項之半導體裝置，其進一步包含在該傳導層上之一島狀物的該第一絕緣層。
  14. 如申請專利範圍第11項之半導體裝置，其進一步包含一第二絕緣層，其形成於在該互連結構上之該第一微開口中。
  15. 如申請專利範圍第11項之半導體裝置，其中該第一微開口包含微通孔、微通孔環或是微通孔狹縫。
TW101149225A 2012-03-21 2012-12-22 形成微通孔部份地穿過在凸塊互連傳導層上之絕緣材料以用於應力緩和之半導體裝置和方法 TWI623987B (zh)

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US10939541B2 (en) * 2017-03-31 2021-03-02 Huawei Technologies Co., Ltd. Shield structure for a low crosstalk single ended clock distribution circuit
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