TW201248782A - Method for making stacked semiconductor package - Google Patents

Method for making stacked semiconductor package Download PDF

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Publication number
TW201248782A
TW201248782A TW100118226A TW100118226A TW201248782A TW 201248782 A TW201248782 A TW 201248782A TW 100118226 A TW100118226 A TW 100118226A TW 100118226 A TW100118226 A TW 100118226A TW 201248782 A TW201248782 A TW 201248782A
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TW
Taiwan
Prior art keywords
carrier
adhesive
manufacturing
wafer
package structure
Prior art date
Application number
TW100118226A
Other languages
Chinese (zh)
Other versions
TWI476865B (en
Inventor
Kuo-Pin Yang
Wei-Min Hsiao
Cheng-Hui Hung
Original Assignee
Advanced Semiconductor Eng
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Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Priority to TW100118226A priority Critical patent/TWI476865B/en
Publication of TW201248782A publication Critical patent/TW201248782A/en
Application granted granted Critical
Publication of TWI476865B publication Critical patent/TWI476865B/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Dicing (AREA)

Abstract

The present invention relates to a method for making a stacked semiconductor package. The method includes the steps of: (a) mounting a first carrier on a first surface of a wafer, wherein the wafer has the first surface, a second surface and a plurality of conductive vias, the second surface corresponding to the first surface; (b) mounting a second carrier on the second surface; (c) removing the first carrier; (d) mounting a plurality of dice on the first surface; (e) removing the second carrier; and (f) cutting the wafer to form the stacked semiconductor package. Using the second carrier, the chip to wafer process can be proceeded to shorten the process time, to simplify the process and to raise the yield rate.

Description

.201248782 / 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種封裝結構之製造方法，詳言之，係關 於一種堆疊式封裝結構之製造方法。 【先前技術】 習知具有複數個導通柱（C0nductive via)結構之晶圓立 主動面黏附一載體，以利於完成該晶圓之背面結構。再將 該晶圓之背面黏附至一框架之一切割膠帶，以移除該載 體；接著，再將該晶圓之該主動面轉貼至另一框架之一切 割膠帶，以切割該晶圓為複數個第一晶粒。之後，將至少 一第一晶粒設置於一基板，再堆疊第二晶粒至該第一晶粒 上’以形成複合晶粒。最後封裝至少一複合晶粒及該基 板’以形成堆疊式封裝結構。 !知堆疊式封裝結構之製造方法需要二次轉貼至不同之 框架’可能造成破片。另外切割晶sm，再進行晶粒對晶 粒之堆疊，使得整體之製程較為複雜。 有必要提供一種堆疊式封裝結構之製造方法，以 解決上述問題。 【發明内容】 <本發明提供-種堆疊式封裝結構之製造方法，包括：⑻ 置第載體於一晶圓之一第一表面，其中該晶圓包括 邊第一表而 、一第二表面及複數個導通柱，該第二表面係 相對於铋绽 X第—表面；（b)設置一第—載體於該第二表面； (C)移除該第—載體；（d)設置複數個晶粒於該第一表面； I55200.doc 201248782 : (e)移除該第二載體；及（〇切割該晶圓，以形成堆疊式封 裝結構。 利用該第二載體，可進行晶粒至晶圓（chip t0 wafer)製 程，以縮短製程時間、簡化製程及提高製程良率。 【實施方式】 參考圖1至20，顯示本發明堆疊式封裝結構之製造方法 之第一實施例之示意圖。參考圖1，提供一晶圓2】。該晶 圓21包括一第一表面211、一第二表面2]2及複數個孔洞 2 14。在本實施例中，該晶圓2 1係為一碎基材，該等孔洞 214係為盲孔，且開口於該第一表面211。在本實施例中， 該第一表面2]1係為一主動面並包含一些主動元件（未繪 示）’該第二表面212係為一背面。 參考圖2，形成一絕緣材料221(例如：聚亞酿胺 (Polyimide，PI)、環氧樹脂（Epoxy)、笨環丁烯 (Benzocyclobutene, BCB)等非導電性高分子亦或是無機絕 緣材料，例如：二氧化石夕（silicon dioxide (Si〇2))於該等孔 洞2 14之側壁上，且定出複數個中心槽。之後，填入一導 電材料2 2 2 (例如銅金屬）於該等中心槽内及形成—第一保護 層（Passivation Layer)26於該第一表面211。該第一保護層 26之材質係為非導電性高分子材料，例如：聚亞醯胺 (Polyimide, PI)、環氧樹脂（Epoxy)、笨環丁烯 (Benzocyclobutene，BCB)等，亦或是無機絕緣材料，例 • 如：二氧化石夕（silicon dioxide (Si〇2))。接著進行微影製 , 程，以形成至少一開口，而顯露該等導通柱223。該開口 155200.doc 201248782 之尺寸及位置係可由微影製程中所使用之光罩所定義。再 形成一第一金屬層27於該第一保護層26上及該開口内，以 接觸該等導通柱223及該些主動元件（未繪示）。之後，翻轉 180 度。 參考圖3,設置一第一載體31於該晶圓以之該第一表面 2Π。在本實施例中，利用一第一黏膠33使該第一載體 黏附於4第一表面21丨。以研磨及/或蝕刻方式移除部份該 第一表面2 12以薄化該晶圓2 1，使得該等孔洞2丨4變成複數 個貫孔2]3，且該等導電材料222變成複數個導通柱 (Conductive Via)223。 參考圖4，形成一第二保護層（PassivaH〇n Layer)23於該 第二表面212。該第二保護層23係為非導電性高分子材 料，例如：聚亞醯胺（Po丨yimide，PI)、環氧樹脂（Ep〇xy)、 苯環丁烯(Benzocyclobutene, BCB)等，亦或是無機絕緣材 料，例如：二氧化矽（slHc〇n dl〇?nde (Si〇2))。在本實施例 中°玄第一保3蔓層2 3係為一感光性高分子材料，例如是苯 環丁烯（Benzocyclobutene，BCB)，且係利用旋轉塗佈（spinBACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a package structure, and more particularly to a method of manufacturing a stacked package structure. [Prior Art] It is known that a wafer active surface having a plurality of conductive via structures adheres to a carrier to facilitate completion of the back surface structure of the wafer. Attaching the back side of the wafer to a dicing tape of a frame to remove the carrier; then, transferring the active surface of the wafer to one of the other frames to cut the wafer to cut the wafer into plural First grain. Thereafter, at least one first die is disposed on a substrate, and the second die is stacked on the first die to form a composite die. Finally, at least one composite die and the substrate ' are packaged to form a stacked package structure. Knowing that the manufacturing method of the stacked package structure requires a second transfer to a different frame may cause fragmentation. In addition, the crystal sm is cut, and the grain-to-crystal stacking is performed, so that the overall process is complicated. It is necessary to provide a method of manufacturing a stacked package structure to solve the above problems. SUMMARY OF THE INVENTION The present invention provides a method for fabricating a stacked package structure, comprising: (8) placing a carrier on a first surface of a wafer, wherein the wafer includes a first surface and a second surface And a plurality of conductive posts, the second surface is opposite to the surface of the X-ray; (b) a first carrier is disposed on the second surface; (C) the first carrier is removed; (d) a plurality of a die on the first surface; I55200.doc 201248782: (e) removing the second carrier; and (cutting the wafer to form a stacked package structure. With the second carrier, grain to crystal can be performed A process of a chip t0 wafer to shorten the process time, simplify the process, and improve the process yield. [Embodiment] Referring to Figures 1 to 20, there is shown a schematic view of a first embodiment of a method of fabricating a stacked package structure of the present invention. 1 , a wafer 2 is provided. The wafer 21 includes a first surface 211, a second surface 2] 2, and a plurality of holes 2 14. In this embodiment, the wafer 2 1 is broken. The substrate 214 is a blind hole and is open to the first surface 211. In this embodiment, the first surface 2]1 is an active surface and includes some active components (not shown). The second surface 212 is a back surface. Referring to FIG. 2, an insulating material 221 is formed (for example: Non-conductive polymers such as polyimide (PI), epoxy resin (Epoxy), Benzocyclobutene (BCB), or inorganic insulating materials, such as: silicon dioxide (Si) 〇 2)) on the sidewalls of the holes 2 14 and defining a plurality of central grooves. Thereafter, a conductive material 2 2 2 (for example, copper metal) is filled in the central grooves and a first protective layer is formed. (Passivation Layer) 26 is on the first surface 211. The material of the first protective layer 26 is a non-conductive polymer material, such as polyimide (PI), epoxy resin (Epoxy), and a stupid ring. Butene (Benzocyclobutene, BCB), etc., or inorganic insulating materials, such as: silicon dioxide (Si2), followed by lithography, to form at least one opening, and revealed The conductive column 223. The size and position of the opening 155200.doc 201248782 The first metal layer 27 is formed on the first protective layer 26 and in the opening to contact the conductive pillars 223 and the active components (not drawn). After that, flipping 180 degrees. Referring to Fig. 3, a first carrier 31 is disposed on the wafer with the first surface 2Π. In the embodiment, the first carrier is adhered by a first adhesive 33. At 4 first surface 21丨. Removing a portion of the first surface 2 12 by grinding and/or etching to thin the wafer 2 1 such that the holes 2丨4 become a plurality of through holes 2]3, and the conductive materials 222 become plural Conductive Via 223. Referring to FIG. 4, a second protective layer 23 is formed on the second surface 212. The second protective layer 23 is a non-conductive polymer material, for example, polyacrylamide (PI), epoxy resin (Ep〇xy), benzocyclobutene (BCB), etc. Or an inorganic insulating material such as cerium oxide (slHc〇n dl〇?nde (Si〇2)). In the present embodiment, the first layer of the vine layer 2 is a photosensitive polymer material, such as Benzocyclobutene (BCB), and is spin-coated (spin).

Coating)或噴霧塗佈（Spray c〇ating)方式形成該第二保護層 23 ° 多考圖5進行微影製程’以形成至少一開口231，而顯 路。亥等導通柱223。該開口231之尺寸及位置係可由微影製 程中所使用之光罩所定義。 參考圖6，形成一第二金屬層24於該第二保護層”上及 該開口 231内，以接觸該等導通柱223。之後，形成複數個 155200.doc 201248782 凸塊25於忒第二金屬層24上。在本實施例中，該第二金屬 層24可為一重佈層（RDL) ’使該等凸塊25可依據電路設計 而改變其設置位置。 參考圖7 ’設置—第二載體32於該晶圓21之該第二表面 2 1 2 °在本實施例中’利用一第二黏膠34使該第二載體32 黏附於該第二表面2 1 2。 參考圖8，移除該第一載體3 1。在本實施例中，該第一 黏膠3 3係為低溫分離膠材，該第二黏膠34係為高溫分離膠 材。當该第一黏膠33之解膠溫度為丁] °c，而該第二黏膠34 之解膠溫度為T/C時，丁丨應小於T2，較佳丁T1 + 4〇°C。 例如：該第一黏膠33之解膠溫度T,約為]8〇t至約200°C， 該第二黏膠34之解膠溫度T2係至少為22(TC至約240°C。因 此’當加熱溫度到達該第一黏膠33之解膠溫度几時，可使 該第一黏膠33解膠’分離該第一載體3】’且不影響該第二 載體3 2之支撐性。 在其他實施例，該第一黏膠33之解膠方式與該第二黏膠 3 4之解膠方式不同。例如該第一黏膠3 3之材料為住友化學 (SUMITOMO CHEMICAL)的 X5000 或是 X5300，是溶劑解 膠型黏膠，可溶解於γ- 丁酸内酯（GBL，gamma_ Butyrolactone)亦或是單甲基醚丙二醇乙酸酯（pGMEA Propylene Glycol Monomethyl Ether Acetate) ψ ;而該第-黏膠34之材料可為紫外光解膠型黏膠，例如是積水化學 (SEKISUI CHEMICAL)的SELFA膜，可在紫外光的照射下 解膠。因而可利用一第一剝離步驟，例如是將該第一點腺 155200.doc 201248782 33浸入-第一溶劑中，以移除該第一載體”1且不影響 該第二載體3 2之支撐性。 曰 在其他實施例，亦可透過隔離獏之使用協助移除第一載 體’請參考圖9至圖13，其顯示本發明利用隔離膜移除第 一載體之不同實施態樣示意圖。參考圖9,設置一第一隔 離膜4]於該第一載體3]及該第一黏膠33間，在本實施例 中，該第一黏膠33與該第一隔離膜41間之黏著力小於該第 一黏膠33與該第-載體3]間之黏著力，並且該第一隔離膜 4]之面積小於5亥第一載體3]之面積；並設置一第二隔離膜 42於該第二載體32及該第二黏膠“間，該第二隔離膜“之 面積小於該第一隔離膜4〗之面積，如圖〗〇所示。當該第一 隔離膜41之邊緣與該第一載體3】之邊緣間之距離為&毫 米’而该第二隔離膜42之邊緣與該第二載體32之邊緣間之 距離為X2毫米時，χ]應小於X〗，較佳Χι+2毫米 參考圖11，在本實施例中，該第一黏膠3 3之材料可與該 第二黏膠34之材料相同，皆為溶劑解膠型黏膠。當將該第 一黏膠33與該第二黏膠34浸入一溶劑後，因溶膠速度相 同，且該第二隔離膜42之面積小於該第一隔離膜41之面 積，故會因黏膠溶解而先顯露出該第一隔離膜41，且此時 未顯露該第二隔離膜42。此時，由於該第一黏膠33與該第 一隔離膜41間之黏著力弱’因而可輕易分離該第一黏膠33 與該第一隔離膜41及該第—載體31，而不影響該第二載體 32之支撐性，如圖12所示。 155200.doc :201248782 : 參考圖】3，為本發明之另一實施態樣’該實施態樣與上 述實施態樣不同之處在於，僅設置該第—隔離膜4丨於該第 —載體31及該第一黏膠33間，沒有設置該第二隔離膜於該 弟一載體及s亥苐一黏膠間，同樣地，亦可移除該第一载體 31及該第一隔離膜41，且不影響該第二载體”之支撐性。 參考圖14，於移除該第—載體31後，可進行一黏膠清除 步驟，利用溶劑將殘留之第一黏膠33清除乾淨，之後，設 置複數個晶粒51、52於該第一表面211，每一晶粒（以晶粒 51為例說明）包括複數個銲墊511、銅柱（c〇pper pinar)5i2 及焊料513，用以與第一金屬層27電性連接。利用該第二 載體，可進行上述晶粒至晶圓（Chip t0 wafer)製程，以縮短 製程時間、簡化製程及提高製程良率。 參考圖15，設置該晶圓21之該第一表面211至一框架 61，該框架61包括一切割膠帶⑴^叫tape)6u，該等晶粒 5 1、52黏附於該切割膠帶611。 參考圖16,移除該第二載體32。在本實施例中，如上所 述，可加熱至該第二黏膠34之解膠溫度，以使該第二黏膠 34解膠，分離該第二載體32。 在其他實施例，由於該第二黏膠34之材料與該第一黏膠 33之材料不同。可利用—第二剝離步驟移除該第二載體 32。或者，將該第二載體32及該第二黏膠34浸入—第二溶 劑，以移除該第二載體32。 ; 另外m膠34可為-紫外光解膠型雙㈣帶，具 - 有於紫外光照射下黏著性降低的特,sl, θ .. 千丨-、w符性，例如是積水化學 155200.doc 201248782 (sEk_ CHEMiCAL)的肌以膜，該第二載體32為透明 載體’例如是玻璃。制紫外光照射該第二載體32，由於 6亥第一載體32為透明載體，且該第二黏膠“具有於紫外光 照射下黏著性降低的特性，故可移除該第：黏料及該第 二載體32。之後，依據切割線切割該晶圓2ι，以形成複數 個複合晶粒62。 參考圖1 7，設置至少一複合晶粒62至一基板63。之後， 封裝至少一複合晶粒62及該基板63，α形成堆疊式封裝結 構60 ’如圖18所示。 參考圖19至22，顯示本發明堆疊式封裝結構之製造方法 之第二實施例之示意圖。本發明堆疊式封裝結構之製造方 法之第二實施例在#除該第一載體之步驟前之方法係與本 發明堆疊式封裝結構之製造方法之第一實施例相同，不再 敘述。 參考圖19，在移除該第一載體後，設置複數個晶粒71、 72於該第—表面211 ’每一晶粒（以晶粒7 i為例說明）包括複 數個銲墊7U、銅柱7〗2及焊料713，用以與第一金屬層27 電性連接。接著’封裝該等晶粒71、72及該第-表面 211，利用一封膠75包覆該等晶粒7〗、72及該第一表面 211。利用該第二載體32,可進行上述晶粒至晶圓（chip t〇 wafer)製程，以縮短製程時間、簡化製程及提高製程良 率〇 參考圖2G’移除該第二載體32。本發明第二實施例之移 除該第—載體之方法係與上述本發明第一實施例相同，不 155200.doc •10- 201248782 再敘述。 二設置該封膠75至一框架76’該框架76包括-=761’該封膠75黏附於該切割膠帶 線切割邊晶圓2丨及該封膠75，以 如圖22所示。 成隹疊式封裝結構80, 依據本發明堆疊式封裝結構 衣。傅炙氣以方法，利用該第二載 體’可進行上述晶粒至晶圓（丨 王日日iMUCh丨P t〇 wafer)製程，以縮短製 程時間、簡化製程及提高製程良率。且利用本發明堆疊式 封裝結構之製造方法不須要如習知方法二次轉貼至不同之 框架’故可降低破片之可能，進-步提高製程良率。 准上述貫施例僅為說明本發明之原理及其功效而非用 錄制本發明。因m此技術之人士對上述實施例進 行修改及變化仍不脫本發明 突月 < 精神。本發明之權利範圍應 如後述之申請專利範圍所列。 “ 【圖式簡單說明】 圖1至1 8顯示本發明埵暴彳& 堆®式封裝結構之製造方法之第一 實施例之示意圖；及 圖19至22顯示本發明雄聶彳此 罐璺式封裝結構之製造方法之第 實施例之示意圖。 【主要元件符號說明】 21 晶圓 23 第二保護層 24 第二金屬層 25 凸塊 155200.doc 201248782 26 第一保護層 27 第一金屬層 31 第一載體 32 第二載體 33 第一黏膠 34 第二黏膠 41 第一隔離膜 42 第二隔離膜 51、52 晶粒 60 第一實施例之堆疊式封裝結構 61 框架 62 複合晶粒 71 ' 72 晶粒 75 封膠 76 框架 80 第二實施例之堆疊式封裝結構 211 第一表面 212 第二表面 213 貫孔 214 孔洞 221 絕緣材料 222 導電材料 ; 223 導通柱 231 開口 155200.doc -12- 201248782 511 銲墊 512 銅柱 513 銲料 611 切割膠帶 711 銲墊 712 銅柱 713 銲料 761 切割膠帶 155200.doc - 13The second protective layer is formed by a coating or a spray coating method. The lithography process is performed to form at least one opening 231, and the circuit is formed. Conducting column 223 such as Hai. The size and position of the opening 231 can be defined by a reticle used in the lithography process. Referring to FIG. 6, a second metal layer 24 is formed on the second protective layer ” and in the opening 231 to contact the conductive pillars 223. Thereafter, a plurality of 155200.doc 201248782 bumps 25 are formed on the second metal. In the embodiment, the second metal layer 24 can be a redistribution layer (RDL) 'such that the bumps 25 can change their arrangement positions according to the circuit design. Referring to FIG. 7 'Setting - second carrier 32. The second surface of the wafer 21 is 2 1 2 °. In this embodiment, the second carrier 32 is adhered to the second surface 2 1 2 by using a second adhesive 34. Referring to FIG. 8, the removal is performed. The first carrier 31 is in the embodiment, the first adhesive 3 3 is a low temperature separation rubber material, and the second adhesive 34 is a high temperature separation rubber material. When the first adhesive 33 is degummed When the temperature of the second adhesive 34 is T/C, the temperature of the second adhesive 34 is less than T2, preferably T1 + 4〇 ° C. For example: the solution of the first adhesive 33 The glue temperature T is about 8 〇t to about 200 ° C, and the second adhesive 34 has a degumming temperature T2 of at least 22 (TC to about 240 ° C. Therefore 'when the heating temperature reaches the first adhesive 33 When the temperature of the glue is a few times, the first adhesive 33 can be debonded 'separating the first carrier 3' and does not affect the supportability of the second carrier 32. In other embodiments, the solution of the first adhesive 33 The glue method is different from the method of dissolving the second glue 34. For example, the material of the first adhesive 3 3 is SUMITOMO CHEMICAL X5000 or X5300, which is a solvent-solvent type adhesive, which is soluble in Γ-butyrolactone (GBL, gamma_ Butyrolactone) is also a monomethyl ether propylene glycol acetate (pGMEA Propylene Glycol Monomethyl Ether Acetate) ψ; and the material of the first-viscose 34 can be UV-ray-dissolving type The glue, for example, the SELFA film of SEKISUI CHEMICAL, can be degummed under the irradiation of ultraviolet light, so that a first peeling step can be utilized, for example, the first point gland 155200.doc 201248782 33 is immersed - first In the solvent, the first carrier "1" is removed and the supportability of the second carrier 32 is not affected. In other embodiments, the first carrier can also be assisted by the use of the spacers. Please refer to FIG. Figure 13, which shows the present invention uses a separator to remove the first carrier Referring to FIG. 9, a first isolation film 4] is disposed between the first carrier 3] and the first adhesive 33. In this embodiment, the first adhesive 33 and the first The adhesion between the isolation film 41 is less than the adhesion between the first adhesive 33 and the first carrier 3], and the area of the first isolation film 4] is less than the area of the first carrier 3]; A second isolation film 42 is between the second carrier 32 and the second adhesive, and the area of the second isolation film is smaller than the area of the first isolation film 4, as shown in FIG. When the distance between the edge of the first isolation film 41 and the edge of the first carrier 3 is & mm' and the distance between the edge of the second isolation film 42 and the edge of the second carrier 32 is X2 mm , χ] should be less than X, preferably +ι+2 mm. Referring to Figure 11, in this embodiment, the material of the first adhesive 3 3 can be the same as the material of the second adhesive 34, both of which are solvent debonding. Type of adhesive. When the first adhesive 33 and the second adhesive 34 are immersed in a solvent, since the sol speed is the same, and the area of the second isolation film 42 is smaller than the area of the first isolation film 41, it is dissolved by the adhesive. The first isolation film 41 is first exposed, and the second isolation film 42 is not exposed at this time. At this time, since the adhesion between the first adhesive 33 and the first isolation film 41 is weak, the first adhesive 33 and the first isolation film 41 and the first carrier 31 can be easily separated without affecting The supportability of the second carrier 32 is as shown in FIG. 155200.doc :201248782 : FIG. 3 is another embodiment of the present invention. The embodiment is different from the above embodiment in that only the first isolation film 4 is disposed on the first carrier 31. And the second adhesive film is not disposed between the first carrier and the first adhesive, and the first carrier 31 and the first isolation film 41 are also removed. And does not affect the supportability of the second carrier. Referring to FIG. 14, after removing the first carrier 31, a glue removing step may be performed to remove the remaining first adhesive 33 by using a solvent, and then A plurality of dies 51 and 52 are disposed on the first surface 211. Each of the dies (illustrated by the dies 51) includes a plurality of pads 511, copper pillars 5i2, and solder 513. The first metal layer 27 is electrically connected. With the second carrier, the chip to wafer process can be performed to shorten the processing time, simplify the process, and improve the process yield. The first surface 211 of the wafer 21 to a frame 61, the frame 61 includes a dicing tape (1) Tape) 6u, the dies 5 1 , 52 are adhered to the dicing tape 611. Referring to Figure 16, the second carrier 32 is removed. In this embodiment, as described above, the second adhesive 34 can be heated. Dissolving the temperature to disintegrate the second adhesive 34 to separate the second carrier 32. In other embodiments, the material of the second adhesive 34 is different from the material of the first adhesive 33. The second stripping step removes the second carrier 32. Alternatively, the second carrier 32 and the second adhesive 34 are immersed in a second solvent to remove the second carrier 32. - UV-clearing type double (four) belt, with - characteristic of reduced adhesion under ultraviolet light, sl, θ.. Millennium-, w-symmetry, for example, Sekisui Chemical 155200.doc 201248782 (sEk_ CHEMiCAL) The muscle is a film, and the second carrier 32 is a transparent carrier, such as glass. The second carrier 32 is irradiated with ultraviolet light, since the first carrier 32 is a transparent carrier, and the second adhesive "has ultraviolet light irradiation. The lower adhesion property is such that the first: the binder and the second carrier 32 can be removed. Thereafter, the wafer 2 is cut according to a dicing line to form a plurality of composite dies 62. Referring to FIG. 17, a plurality of composite crystal grains 62 to a substrate 63 are disposed. Thereafter, at least one composite die 62 and the substrate 63 are packaged, and α forms a stacked package structure 60' as shown in FIG. Referring to Figures 19 through 22, there is shown a schematic view of a second embodiment of a method of fabricating a stacked package structure of the present invention. The second embodiment of the method for fabricating the stacked package structure of the present invention is the same as the first embodiment of the method for fabricating the stacked package structure of the present invention, and will not be described. Referring to FIG. 19, after removing the first carrier, a plurality of crystal grains 71, 72 are disposed on the first surface 211'. Each of the crystal grains (illustrated by the crystal grain 7 i as an example) includes a plurality of pads 7U and copper. The pillars 7 and 2 and the solder 713 are electrically connected to the first metal layer 27. Then, the crystal grains 71, 72 and the first surface 211 are packaged, and the crystal grains 7 and 72 and the first surface 211 are covered with a glue 75. With the second carrier 32, the above-described chip t〇 wafer process can be performed to shorten the process time, simplify the process, and improve the process yield. The second carrier 32 is removed with reference to FIG. 2G'. The method of removing the first carrier of the second embodiment of the present invention is the same as the first embodiment of the present invention described above, and is not described again, 155200.doc •10-201248782. Second, the sealant 75 is provided to a frame 76'. The frame 76 includes -=761'. The sealant 75 is adhered to the dicing tape wire-cutting wafer 2 and the sealant 75 as shown in FIG. The stacked package structure 80 is a stacked package structure according to the present invention. In the method of using the second carrier, the above-mentioned die-to-wafer (iMUCh丨P t〇 wafer) process can be used to shorten the process time, simplify the process, and improve the process yield. Moreover, the manufacturing method of the stacked package structure of the present invention does not need to be re-posted to different frames as in the conventional method, so that the possibility of fragmentation can be reduced, and the process yield can be improved step by step. The above-described embodiments are merely illustrative of the principles of the invention and its utility, rather than recording the invention. Modifications and changes to the above-described embodiments by those skilled in the art will not depart from the invention. The scope of the invention should be as set forth in the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 to FIG. 8 are views showing a first embodiment of a manufacturing method of the smashing & Stack® package structure of the present invention; and FIGS. 19 to 22 show the cockroach of the present invention. Schematic diagram of the first embodiment of the manufacturing method of the package structure. [Main element symbol description] 21 wafer 23 second protective layer 24 second metal layer 25 bump 155200.doc 201248782 26 first protective layer 27 first metal layer 31 First carrier 32 second carrier 33 first adhesive 34 second adhesive 41 first isolation film 42 second isolation film 51, 52 die 60 stacked package structure 61 of the first embodiment frame 62 composite die 71 ' 72 granule 75 seal 76 frame 80 second embodiment of the stacked package structure 211 first surface 212 second surface 213 through hole 214 hole 221 insulating material 222 conductive material; 223 conductive column 231 opening 155200.doc -12- 201248782 511 Pad 512 Copper Post 513 Solder 611 Cutting Tape 711 Pad 712 Copper Post 713 Solder 761 Cutting Tape 155200.doc - 13

Claims (1)

201248782 七 、申請專利範園·· 1.種堆疊式封裝結構之製造方法，包括： ⑷設置-第-載體於一晶圓之—第一表面，其中該晶 圓包括該第-表面…第二表面及複數 兮笛-* γ 往， -弟一表面係相對於該第—表面； (b) 。又置一第二載體於該第二表面； (c) 移除該第—載體； ⑷设置複數個晶粒於該第一表面； (e)移除該第二載體；及 2. ⑴切割圓，以形成堆疊式封裝結構。 如請求項1之製造方法，其中在該步驟⑷中，利用—第 一黏膠使該第一載體點附於用弟 第一表面’在該步驟(b) 第—黏膠使該第二載體黏附於該第二表面。 3 ·如請求項2之製造方、本 I以方法，其中該第一黏膠係 :材並具有-第-解膠溫度Tlt，該第二黏膠 刀離膠材’並具有一第二解膠溫度乃。。，該第—解膠溫 度T〗°C低於該第二解膠溫度τ/c。 ^皿 4.如請求項3之製造方法，Α中 '、第解膠溫度TlC與該 ，溫度T2 C之關係式為T2 g Ti + 40°C。 5_如請求項2之製造方法’其中該第-黏耀之材料與該第 一黏膠之材料不同。 6.如》月求項5之製造方法，其中在該步驟⑷中係利用— 第剝離步驟移除該第_載體；在該步鄉⑻中，係利用 一第二剝離步驟移除該第二載體。 155200.doc 201248782 7_ 2凊未項5之製造方法’纟中在該步驟(C)中，係將該第 一載體及該第—黏膠浸n溶劑，以移除該第一載 體，在該步驟⑷中，係將該第二載體及該第二黏膠浸入 一第二溶劑，以移除該第二載體。 8. 如凊求項5之製造方法，其中在該步驟 外光照射該第二載體，以移除該第二黏膠及== 體。 9. 如請求項2之製造方法，其，在該步驟⑷令，另包括一 設置—乃已符 ” i弟—隔離膜於該第一載體及該第一黏膠間之步 驟，該第一隔離膜之面積小於該第—黏膠之面積。 1〇‘ 求項9之製造方法，其中在該步驟（b)中，另包括一 。又置厂第二隔離膜於該第二載體及該第二黏膠間之步 驟/第二隔離膜之面積小於該第—隔離膜之面積。 Π.:。月求項1之製造方法’其中在該步驟⑷前另包括一 :置該晶圓之該第一表面至一框架之步驟，該框架包括 -切割膠帶，該等晶粒黏附於該切割膠帶；在該步驟⑴ 2切割泫晶圓後形成複數個複合晶粒，設置至少一複 合晶粒至一基板，且封裝至少一複合晶粒及該基板，以 形成堆疊式封裝結構。 青求項1之製造方法，其中在該步驟⑷後，另包括一 封：5亥等晶粒及該第一表面之步驟，利用一封膠包覆該 等晶粒及該第—表面；在該步驟⑷後，另包括―設置該 封膠至一框架之步驟，該框架包括—切割膠帶，該封膠 黏附於該切割膠帶；在該步驟(f)中切割該晶圓及該封 膠’以形成堆疊式封裝結構。 155200.doc201248782 VII. Application for a patent garden 1. A method for manufacturing a stacked package structure, comprising: (4) setting a first carrier on a first surface of a wafer, wherein the wafer includes the first surface... second Surface and plural whistle - * γ to, - a surface of the body relative to the first surface; (b). And a second carrier is disposed on the second surface; (c) removing the first carrier; (4) providing a plurality of crystal grains on the first surface; (e) removing the second carrier; and 2. (1) cutting a circle To form a stacked package structure. The manufacturing method of claim 1, wherein in the step (4), the first carrier is attached to the first surface of the user by using the first adhesive, and the second carrier is in the step (b) Adhered to the second surface. 3. The method of claim 2, wherein the first adhesive system has a -d-debonding temperature Tlt, and the second adhesive knife is separated from the rubber material and has a second solution. The glue temperature is. . The first degumming temperature T is lower than the second dissolving temperature τ/c. ^皿 4. According to the manufacturing method of claim 3, the relationship between the first degumming temperature TlC and the temperature T2 C is T2 g Ti + 40 °C. 5_ The manufacturing method of claim 2, wherein the first-viscous material is different from the material of the first adhesive. 6. The manufacturing method of the item of claim 5, wherein in the step (4), the first carrier is removed by using a peeling step; in the step (8), the second peeling step is used to remove the second carrier Carrier. 155200.doc 201248782 7_ 2凊 Manufacturing method of the item 5, in the step (C), the first carrier and the first adhesive are immersed in a solvent to remove the first carrier, In the step (4), the second carrier and the second adhesive are immersed in a second solvent to remove the second carrier. 8. The method of claim 5, wherein the second carrier is irradiated with light outside the step to remove the second adhesive and the == body. 9. The method of claim 2, wherein, in the step (4), the method further comprises the step of: setting a second--a barrier between the first carrier and the first adhesive, the first The area of the separator is smaller than the area of the first adhesive. The manufacturing method of claim 9, wherein in the step (b), another one is included. The second separator is further disposed on the second carrier and the The step of the second adhesive/the area of the second insulating film is smaller than the area of the first insulating film. Π.: The manufacturing method of the first item 1 includes one before the step (4): placing the wafer a step of the first surface to a frame, the frame comprising: a dicing tape, the dies being adhered to the dicing tape; forming a plurality of composite dies after cutting the ruthenium wafer in the step (1) 2, and disposing at least one composite granule To a substrate, and packaging at least one composite die and the substrate to form a stacked package structure. The manufacturing method of claim 1, wherein after the step (4), a further: a 5 granule and the like a surface step of coating the grains and the first surface with a glue After the step (4), the method further includes the step of: setting the sealant to a frame, the frame comprising: a cutting tape, the sealant is adhered to the cutting tape; cutting the wafer and the seal in the step (f) Glue' to form a stacked package structure. 155200.doc
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