TW201247903A - Electronic package alloy wire and methods for manufacturing the same - Google Patents

Electronic package alloy wire and methods for manufacturing the same Download PDF

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Publication number
TW201247903A
TW201247903A TW101116138A TW101116138A TW201247903A TW 201247903 A TW201247903 A TW 201247903A TW 101116138 A TW101116138 A TW 101116138A TW 101116138 A TW101116138 A TW 101116138A TW 201247903 A TW201247903 A TW 201247903A
Authority
TW
Taiwan
Prior art keywords
wire
alloy wire
annealing
silver
alloy
Prior art date
Application number
TW101116138A
Other languages
Chinese (zh)
Other versions
TWI396756B (en
Inventor
Jun-Der Lee
Tung-Han Chuang
Hsing-Hua Tsai
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Wire technology co ltd
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Publication date
Application filed by Wire technology co ltd filed Critical Wire technology co ltd
Priority to TW101116138A priority Critical patent/TWI396756B/en
Publication of TW201247903A publication Critical patent/TW201247903A/en
Application granted granted Critical
Publication of TWI396756B publication Critical patent/TWI396756B/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45139Silver (Ag) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00011Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Conductive Materials (AREA)

Abstract

Embodiments of the invention provide an electronic package alloy wire and a method for manufacturing the same. The alloy wire is formed at least by silver, gold, and palladium, wherein the ratio of weight percentage of alloy wire is Ag: Au: Pd = 86 to 99.98: 0.01 to 8: 0.01 to 6. More than 20% of grains in the alloy wire have annealing twin structure therein.

Description

201247903 六、發明說明: 【發明所屬之技術領域】 本發明係有關於電子封裝合金線材及其形成方法,且 特別是有關於一種低阻抗的合金線材。 【先前技術】 於般電子產品封裝導線的基本要求。而對 ;冋、 阿頻的積體電路元件而言(例如.古对士 器、震盪器、電、、』如.咼速放大 為了避免峨積體電路、以及高速軌⑽等), ―腦),2(signal delaying)及串音干擾(鳴· 確保產品在長2線的電阻率要求更為嚴格。此外,為了 能,可靠度的考H嚴苛條件下能夠維持正常壽命與功 兼顧低阻抗且〜二為重要。因此,封裝產業需要能夠 然而,目ί 合線材°201247903 VI. Description of the Invention: [Technical Field] The present invention relates to an electronic package alloy wire and a method of forming the same, and more particularly to a low-impedance alloy wire. [Prior Art] The basic requirements for packaging wires for general electronic products. And for the 积, A frequency of the integrated circuit components (for example, ancient 士士器, oscillator, electricity,, 』, 咼 speed amplification to avoid hoarding circuit, high-speed rail (10), etc., brain ), 2 (signal delaying) and crosstalk interference (Ming·Ensure that the product's resistivity requirements are longer in the long line. In addition, in order to be able to maintain reliability, it is possible to maintain normal life and low power under severe conditions. Impedance and ~ two are important. Therefore, the packaging industry needs to be able to, however, focus on the wire °

導電性降低。;提Ν可*度的材料設計大多會造成其 度,因而影響其t —般低電阻率材料則具有較低的強 但材質較軟,而::例如-般純金屬的導電性較佳, 卻會提高其電喊二°’、他70素的合金可以改善機械性質, 在電子產業· φ A 擇: 巾見的封裝導線’例如包括下列幾種選 (1)金線:金 接合界面會大^可具有低電阻率,但是金線與餘塾打績 AuAU、Au為V形成f性介金屬化合物(包括Au2Al'線 金屬反應會伴暖羞使=導電性降低。此外,金/銘界面介 生許多柯肯達孔洞(Kirkendall v〇ids),更 201247903 加提高接合界面電阻率,而導致接點的可靠度降低。 ⑺鋼線·近年來’封裝產業開始採用銅線作為半導體 及發光/二極體打線接合的線材。銅線雖具有較佳的導電 ! 生仁卻很谷易氧化’故在線材儲存及運送過程均需要密 封保護,打線接合製程更需要昂責的氣氣加氯氣輔助,且 在後續封裝電子產品可靠度試驗仍然會遭遇氧化及腐録 的問題。此外,銅線材質太硬,打線接合容易造成晶片破 裂等問題。雖然在-些研究中提出在銅線表面鐘上其他金 屬鍍層以改善易氧化及腐钱的問題的方法(例如參照美國 專利 US 7645522B2、US 0173659A1、us 782〇913ϋ,、但 由於銅線本身硬度高,造成打線接合步驟易失敗,故仍無 法達到積體電路元件封裝時所需的可靠度。 (3)銀線:銀是在所有材料中電阻率最低的元素,但是 純銀在含硫的環境會有硫化腐蝕的問題,同時純銀線在鋁 墊上打線接合時也會生成脆性的介金屬化合物(Ag2A]或 Ag4Al)。此外’純銀線在含水氣的封裝材料内部很容易發 生電解離子遷移現象(I〇n Migration)。亦即,純銀在含水氣 環境會經由電流作用水解溶出銀離子,再與氧反應成為不 穩定的氧化銀(AgO),此氧化銀因而會進行去氧化作用 (Deoxidize)形成銀原子,並向正極成長出樹葉紋理狀(ieaf vein)的銀鬚,最後造成正負電極的短路(請參考:H. Tsutomu, Metal Migration on Electric Circuit Boards, Three Bond Technical News, Dec. 1, 1986.)。此外,在一些研究 中提出在銀線表面鍍上其他金屬鍍層以改善硫化腐蝕及銀 離子遷移問題的方法(例如參照美國專利US 6696756),但 4 201247903 所形成的線材仍無法達到理想的可靠度及電阻率。 (4)合金線:合金線例如包括以金為主的合金以及以銀 為主的合金。這些合金例如更包括銅、銘、锰、鉻、在弓、 銦等元素,然而這些合金線仍然無法同時兼具低阻抗及高 可靠度的性質。 綜上所述,現有的各種純金屬線材、表面鍍金屬的複 合線材、以及添加元素的合金線材都無法滿足高速運作與 高頻積體電路元件封裝的需求,因此,目前亟需一種兼具 低阻抗及高可靠度的線材。 【發明内容】 在本發明實施例中提供一種電子封裝合金線材,其係 至少由銀、金及妃所形成之合金線材,其中,該合金線材 中銀:金巴的重量比=86〜99.98 : 0.01〜8 : 0.01〜6,,且在該 合金線材中,具有退火孿晶結構(annealing twins structure) 的晶粒數量佔該合金線材的所有晶粒數量的20%以上。 在本發明另一實施例中提供一種電子封裝合金線材的 .製造方法,包括:提供一粗線材,該粗線材係至少由銀、 金及鈀所形成之合金線材;以及交替進行複數道冷加工成 形步驟及複數道退火步驟,以逐次縮減該粗線材的線徑而 形成一細線材,其中,該些冷加工成形步驟及該些退火步 驟至少包括下列步驟:進行倒數第二道冷加工成形步驟; 之後,進行倒數第二道退火步驟,該倒數第二道退火步驟 的退火溫度為0.5Tm〜0.7Tm,退火時間為2〜10秒,其中, Tm為該粗線材的材質的絕對溫標的溶點;之後,進行最後 201247903 之間的變形量;^步驟所形成的線材 退火步驟,該H 超過15%;以及進行最後一道 退火步驟的退步驟的退火溫度比倒數第二道 分鐘。 ’凰又阿20C〜200°C,退火時間為〇·01〜15 為讓本發明之上述和其他目的、縣外 顯易懂,下文特舉〜 和優點能更明 細說明如下:、較佳㈣例,並配合所附圖式,作詳 【實施方式】 發明出數個不同的實施例。本 ,為限。舉例而言,於第二元件二= :ί:„ι件與第三元件直接接觸的實施例,亦包 ;具有,元件形成在第-元件與第二元件之間、:; 明起m一7°件並未直接接觸的實施例。此外,為簡 林見’本發明在不同例子中以重複的元件符號及/或字母 係rs不代表所述各實施例及/或結構間具有特定的關 金电2明提供一種合金線材及其形成方法,除了藉由合 ㈣之外’更由線材晶粒結構進行改良,使 線材的導電性與可靠度都大幅提升。 开;成m㈣射,合讀材至^銀、金及免所 瓜成,且該合金線射銀··金:免的重量比m 6 201247903 0.01〜8 : 0.01〜6。此外,在合金線材中退火孿晶結構 (annealing twins structure)的晶粒數量佔其所有晶粒數量的 20%以上。習知打線接合金屬線材的内部組織均為微細晶 粒,其雖可提供足夠的拉伸強度與延展性,但是微細晶粒 本身存在大量的高角度晶界(High Angle Grain Boundary),這些高角度晶界會阻礙電子的傳輸,因而提 高線材的電阻率。此外,電阻升高會使得溫度上升,造成 線材通電流時較容易燒熔,而影響其可靠度。另一方面, 大量的高角度晶界也會加速線材的硫化腐蝕破壞,不利於 線材的導電性與可靠度。相對的,在本發明的實施例中所 提供的合金線材具有等軸粗大晶粒,故可減少高角度晶界 的形成’降低合金線材的電阻率。此外,大量的退火孿晶 結構可提升材料強度,故可提升可靠度。 第1圖顯示在本發明一實施例中之合金線材的形成方 法的流程圖。參照第1 在步驟102中,提供-粗線材, 該粗線材,少由銀、金及朗形成之合金線材 。在步驟 1〇4中’父替進行複數道冷加工成形步驟及複數道退火步 驟’以逐次縮減該粗線材的線徑,以形成—細線材。上述 步驟的詳細方法敘述如下。 >驟102 ’提供一粗線材,該粗線材係至少由銀、 金及1巴所形成之合金線材。纟、金、妃之選擇是因為這三 =兀’τ'在相平衡圖上可以完全互相固溶(^碰%㈣㈣,不 任,性的介金屬相析出物,故所形成的合金線材 ° ' 、仏的延展性,且金、把的添加也不會對電阻率有 太大的影響。 201247903 經實驗發現,適量的金可具有抗硫化及抗腐蝕的功 效,然而當金的含量太高時,會形成大量脆性介金屬化合 物,並且伴隨著產生許多柯肯達孔洞(Kirkendallvoids),造 成合金線材導電性及可靠度降低。另外,適量的鈀可具有 抗腐#、避免離子遷移破壞及抑制介面金屬反應的功效, 然而當鈀的含量過高時,則會造成合金線材的電阻升高。 在一實施例中,粗線材中銀的含量約為86〜99.98wt%, 金的含量約為0.01〜8wt%,纪的含量約為0.01〜6wt%。應 注意的是,在其他例子中,合金線材可更包括其他金屬、 非金屬元素、或其他雜質成分,本發明並不限定為銀_金_ 在巴的三元合金。因此,只要控制粗線材中銀、金、纪的重 量比=86〜99.98 : 0.01〜8 : 0.01〜6,其中銀為此粗線材的主 要成份,即在本發明之範疇以内。此外,由於在實際冶煉、 精煉、冷加工成形等的過程中,難以完全除去所有雜質而 準確達成數學上或理論上的特定濃度,因此當上述雜質含 量的範圍落於對應的標準或規格所訂定的允收範圍内,仍 視為在本發明的範疇之内。本發明所屬技術領域中具有通 常知識者應當瞭解依據不同的性質、條件、需求等等,上 述對應的標準或規格會有所不同,故下文中並未列出特定 的標準或規格。 在一實施例中,粗線材的形成方法係將銀、金及鈀加 熱熔融後,經澆鑄而成為鑄錠。而後,對鑄錠進行冷加工, 以形成上述至少由銀、金及鈀所形成之粗線材。在另一實 施例中,則是將銀、金及鈀加熱熔融後,以連續鑄造的方 式形成上述粗線材。在一實施例中,粗線材的線徑約為5〜10 8 201247903 步驟104’交替進行複數道 i首in-----从少灭輝及稷 ^,以逐次縮減該粗線材的線徑,以形成一細線 圖則顯示步驟104所述複數道冷加工 ::=r_。在第2圖中,步驟:= 驟刚-!由驟及退火步驟至少包括下列步驟:在步 工成矿+ ’進盯第一道冷加工成形步驟,該第-道冷加 ::步::形成的線材之間的變形量為1〇%以 ,在步驟淋2中,進行第—道退 = 魏火步驟的退火溫度為Q 5Tm〜Q 7Tm,退火時該】第一 衫,其中,Tm為該粗線材 、 —Γ 成形步驟及退火步驟可視需要重福 替進行數次。而後’在步驟―,進二= 步驟,該倒數第二道退Λ::數第二道退火 .丁m〜〇.7Tm,退火時間為2〜1〇秒,1 皿又為 材的材質的絕對溫標的溶點。在步^ ’m為該粗線 -道冷加工成形步驟,使得該最後_ A進行最後 形成的線材與該倒數第二道冷加 :加工成形步驟所 之間的變形量為1%以上^ 〜驟所形成的線材 冷加工成形步驟而對被冷3=,_量係指因 率。在步驟104-6中,進行k成的截面積縮減 道退火步驟的退火溫度比倒最後一 :_〜戰,退火時間為。 ::=火溫度 在一贯施例中,步驟104也 應,主忍的是, 進行二道冷加工成形步輝 9 201247903 (步驟104-3、104-5)及二道退火步驟(步驟]04-4、104-6)。 在一實施例中’上述冷加工成形步驟包括抽線、擠型 或前述之組合。或者,上述冷加工成形步驟及退火步驟可 為任何已知或未來發展的冷加工/退火方式。 在上述冷加工成形及退火步驟後所形成的細線材為至 少由銀、金及鈀所形成之合金線材,且該合金線材中銀:金: 鈀的重量比=86〜99.98 : 0力1〜8 : 0.01〜6。在一實施例中’ 該合金線材包括尺寸介於Ιμπι至ΙΟμπι的粗大晶粒’且在 該合金線材中,具有退火攣晶結構(annealing twins structure) 的晶粒數量佔該合金線材的所有晶粒數量的20%以上。在 一實施例中,細線材的線徑為1 〇〜50 μιη。相較於傳統的金 屬線材,上述細線材可具有較佳的可靠度及較低的電阻。 上述退火孿晶結構的形成原因可根據物理冶金學原理 推論(請參考 George E. Dieter, Mechanical Metallurgy, McGRAW-HILL Book Company, 1976, —P. 135-141.及 R.W. Cahn,PhysicalMetallurgy,1970,P.1 184-1185 )。退火孿晶 結構的形成是由於在冷加工製程時在材料内部累積應變能 (strain),這些應變能在後續退火熱處理時會驅動部分區域 之原子均勻剪移(Shear)至與其所在晶粒内部未剪移原子 形成相互鏡面對稱之b日格位置,此即為退火孿晶(Annealing Twin),而其相互對稱之界面即為孿晶界(Twin Boundary)。退火孿晶主要發生在晶格排列最緊密之面心 立方(Face Centered Cubic ; FCC )結晶材料,其孿晶界為 低能量之Σ 3特殊晶界’結晶方位均為(1】丨}面。相較於 一般退火再結晶(Recrystallization )所形成高角度晶界 201247903 (High Angle Grain Boundary ),孿晶界的界面能大約只有 高角度晶界的5°/。。此外,一般而言’疊差能(Stacking Fault Energy )愈小的材料愈容易產生退火孿晶,而金、銀、把 合金元素的疊差能均大約在50 erg/cm2以下,故容易形成 退火孿晶。亦即,並非所有金屬都能輕易形成孿晶結構。 例如,鋁雖為面心立方結晶構造材料,但其疊差能大約200 erg/cm2 ’故極少出現退火孿晶。 此外,第2圖所述的冷加工成形步驟也為退火孿晶結 構形成的因素之一。足夠的冷加工變形量所累積應變能可 提供原子驅動力以產生退火孿晶,但如果冷加工變形量太 大’在退火熱處理初始再結晶(Primary Recrystallization) 階段即會引發多數晶粒成核(Nuclei of Recrystallized Grains ) ’因而形成大量的微細晶粒,降低退火孿晶的產 生機會。應注意的是,第2圖所述形成合金線材的方法僅 為本發明一較佳實施例,然而本發明之合金線材的形成方 法並非以此為限。 第3A、3B圖顯示本發明一實施例所形成之合金線材 300。第3A圖顯示合金線材3〇〇的一部分的線段的示意 圖。第3B圖顯示沿著平行於第3A圖所示合金線材300的 長度方向的縱切面圖。 參照第3A圖’合金線材300為至少包括銀、金、鈀合 金線材。參照第3B圖’合金線材300的縱切面為面心立方 (face=centered cubic)晶相的多晶結構(p〇iycrystalline stmcture)’内含多數個晶粒3〇2。在一實施例中,晶粒3〇2 可為尺寸介於1 μπι至1 Ομυ!的粗大晶粒。此外,各晶粒之 201247903 間是以高角度晶界304為界,其中具有退火擎晶結構 (annealing twins structure)306的晶粒的數量,是佔此合金 線材300的所有晶粒數量的20%以上。在一較佳實施例中, 退火孿晶結構的晶粒的數量佔合金線材的所有晶粒數量的 40%—以上,且多數個粗大晶粒302的尺寸介於私111至印111。 在一實施例中,合金線材300中銀、金、鈀的重量比 =86〜99.98 : 〇.〇1〜8 ·· 0.01〜6 ’其中銀為此合金線材3〇〇的 主要成份,金、鈀或其他成份的含量不大於銀的含量。應 注意的是’上述合金線材雖以銀為主要成分並包含特定比 例的金絲’然而本發日狀料並心此為限。在其他例 子中’合金線材可更包括其他金屬、非金屬元素、或其他 =可避免的雜質成分。應注意的是,其他金屬元素的添加 需視應用上的需要調整,以避免影響合金線材的性質。例 α ’在十述合金線材中加入銅時,固然會產生材質強化效 仁疋鋼^素會使合金線材的抗氧化及碰化腐敍枝能大 低’而且由於銀·銅合金會在晶界產生不連續析出物, 扯5Γ成,線。此外’銅也會使合金的硬度增高變脆,使得 4製程困難’同時在打線接合過程也容易造成晶片擊穿。 另外’雖然添加稀土元素可以 對於封裝打線接A &妗# _ 呎口I的 η β 的線材應用需求,細晶粒有較多晶界, 崎2日日界會阻礙電子值^ 於高速運作及’使合金電阻率提高,故不適用 稀土的Ρ 電路電子產品之封装需求。此外, 在通電流;其氧化及腐崎’使得封裝線材 外,在厶今:而不利於電子產品的可靠度。此 .々、加約會使材料延展性變差;在合金中添加 201247903 :二:二、ά、形成低溫相,使線材耐溫性變差,持續 l础::蜗二線材融斷;添加鈹(Be)為具毒性之易燃性 固—d刀士或煙霧都是有毒的;添加舒(Ru)、铑(Rh)、 锇(Os)、敍(Ir)B夺’其炫點(分別為23i〇〇c、⑼5〇c、3〇45〇c 和241 均遠高於銀的彿點(22 n°c),因此其溶煉極為困 ί Η合2巾田增加電阻率。此外’部分添加元素在相平衡 圖ί ^、銀形齡金屬相的析*物(Precipitation),而造成 材貝的^化及較兩—性’更會降低線材的導電性。 ;傳統的線材’本發明實施例中之合金線材例如 玎具有下列優點,包括: (1)電阻低: j銀/、有如低的電阻率,但在傳統製程中之銀線材 :晶粒,数細晶粒(平均粒徑約為0.5〜1 _,故具有大量 % B界因而造成電阻率提高。此外,銀線材在紹墊 上打線接合時會生成脆性的介金屬化合物(減二銀 (AgzAl)或銘化_(Ag4A1)),故會造成導電性降低。 .而本發明之合金線材係包括退火孿晶(AnneaHng TW^)組織的孿晶界(Twin Boundary)為調諧(Coherent) t構造,屬於低能量之Σ3特殊晶界,其界面能僅為一 般南角度晶界的5 %。因此這些退火孿晶之對稱晶格排列 對電子傳輪的阻礙極小,而能展現較低的電阻率。此外, 在2明—較佳實施例中’合金線材包括等軸粗大晶粒, 故可減少高角度晶界的密度,而降低電阻。 (2)機械強度佳: 奴而言,微細晶粒組織金屬線材強度的強化係仰賴 201247903 高角度晶界阻擋差排移動,但會造成不利於打線接合、導 電性差、可靠度降低等問題。另外,若將晶粒的粒徑提高, 雖可降低電阻,但會造成線材機械強度太低的問題。 然而’本發明各實施例中之合金線材中包括至少20% 的晶粒内部含有退火孿晶(Annealing Twin)組織,故可維 持線材較佳的機械強度。更進一步說明,由於孿晶結構與 其所在之晶粒具有不同結晶方位(Crystal Orientation),因此 可以阻擋差排(Dislocation)的移動,而產生材料強化效 應°藉此可維持與一般微細晶粒結構線材相近之拉伸強 度’但由於差排及原子可經由孿晶界跨移(Cross Slip), 其延展性反而高於一般微細晶粒形成的線材。 (3)具抗氧化、抗腐蝕能力: 一般而言,銀在含硫環境下常有硫化腐蝕的問題,故 會以在銀上鍍其他貴金屬以避免硫化。然而,貴金屬在打 線接合結球過程也會完全溶入熔融的銀銲球基材内,使得 打線接合元成的球銲點成分僅是含微量保護性貴金屬的銀 合金,因此打線接合的球銲點仍會發生硫化腐蝕現象,因 此仍無法有效避免銀電解離子遷移所造成球銲點短路現 象,以及在鋁墊打線接合時的柯肯達孔洞效應。 然而’本發明各實施例中之合金線材中包括至少20% 的晶粒内部含有退火孿晶(Anneaiing Twin)組織,由於孿 晶界的較低的界面能,可以避免成為氧化、硫化及氯離子 腐蝕的路徑,故能展現較佳的抗氧化性與耐腐蝕性。 (4)封裝過程中晶粒成長不易: 傳統的線材之微細晶粒結構經過打線接合後,銲球點 14 201247903 凝固熱量在其附近線材累積,會使得其晶粒迅速成長而形 成熱影響區’因而降低拉線試驗強度。然而,本發明各實 施例之合金線材至少20%的晶粒内部含有退火孿晶 (Annealing Twin)組織,這些退火孿晶(AnnealingTwin) 組織具有較低的界面能,結構較—般高角度晶界穩定。因 此,不僅在高溫狀態下孿晶界本身不易移動,更會對其所 在晶粒之周圍的高角度晶界產生固鎖作用,使這些高角度 晶界亦無法移動,因而整體晶粒組織不會有明顯晶粒成長 現象。故即使在打線接合過程中第一接點(銲球點)從熔 融狀態冷卻至室溫,也可以維持原有晶粒尺寸。此外,當 封裝產品在經歷各種高溫可靠度試驗時,也較不易導致: 粒不穩定成長。 (5)電子遷移率低: 在傳統製程中,純銀線材在含水氣的封裝材料内部很 谷易發生電解離子遷移現象(i〇nMigration),最後造成正 電極的短路。此外,純銀線與鋁墊打線接合時,由於名、 鋁原子基地(Matrix)的擴散係數較鋁原子在銀基地、I么 1〇2至10。倍,此一界面擴散速度的巨大差異會造、大、’’勺 柯肯達孔洞,導致電阻率升高及打線接合銲^失=所謂的 而在本發明的合金線材中,由於原子經由低萨旦p 界或跨越孿晶界的擴散速率極低,因此當應用於1=1里丰晶 時,即使在高密度電流下其線材内部原子也不易產品 綜合上述優點,本發明之合金線材應用於積㈣带一 件的封裝打線接合,不僅具有較低的電阻率, 电路元 且較一般傳 15 201247903 統線材展現較佳的品質及可靠度。然而,依使用者的需求, 亦可將本發明之合金線材應用於其他技術領域與用途,例 如:音響線、訊號或功率傳輸線、變壓器線等,而合金線 材的線徑亦可依據需求加以變化,而不限定為上述例示的 範圍。 此外’經實驗發現’合金線材中至少20 %的晶粒含有 退火孿晶結構才可達到上述優點。因此’雖然在習知打線 接合用的金屬線材的製程中’或許偶有出現退火孿晶結構 的情況’但是含退火孿晶結構的晶粒數量通常為線材所有 的晶粒的10 %以下或甚至完全不含退火孿晶結構,故仍然 無法具有上述之優點。 本發明經過諸位發明人長久、精心的研究,發現利用 特定組成的合金元素並控制冷加工變形量與退火溫度時間 可形成内部含有大量退火孿晶的材料,因而獲得一種可具 低電阻率、高導熱性、高強度、高延展性、優良抗氧化腐 雀虫性之封裝導線。更詳細而言,合金組成提供導電性與機 械性賀的最佳協調,孿晶界則具有可以有效抑制電遷移現 象、提升材料強度及延展性等特性,因此在進行打線接合 的封裝時,不僅具有極低的電阻率,且在可靠度試驗時更 展現極佳的成績。例如,在最嚴苛的壓力鍋測試(pressure Cooker Test ; PCT)中,在溫度(Ta)=121°c、相對溼度 (RH)=100%、2大氣壓的條件下可耐受128小時以上,遠高 於一般電子產品可靠度測試所要求96小時。在另一實施例 中在南度加速等命试驗中(Highly Accelerated Stress Test ’ HAST) ’ 在溫度(Ta)勹48〇c、相對溼度(RH)^9〇%、 16 201247903 3.6伏特的偏壓的條件下可達到128小時以上,也遠高於一 般電子產品可靠度測試規範所要求96小時。因此,在本發 明各實施例中之合金線材可以應用於各種高速電源交換積 體電路中,例如輸入電壓範圍在4.5V至17V,工作頻率 1200KHZ的壓降型直流式電壓交換積體電路(Buck DC/DC Converter)’而不限於應用在—般速度較慢的5〇〇ΚΉΖ以下 的壓降型直流式電壓交換積體電路。 【比較例1】具微細晶粒之合金線材 利用高週波電熱熔煉89wt%銀-8wt.%金-3wt.%鈀合 金,再經過8次冷加工成形步驟抽線延伸與退火熱處理, 以形成線徑25.4 μιη之細線材。而後,進行倒數第二道冷 加工成形步驟抽線延伸而成為線徑22 6μιη之細線材,再經 過650 C退火5秒。最後進行最後一道冷加工成形步驟抽 線形成17.5μιη之細線材,並進行最後一道退火步驟,其退 火溫,為750。〇退火時間為1〇秒。完成最終退火步驟後’ 捲線完成打線接合所需要之合金線材產品。 第4圖顯不以微細晶粒之合金線材的剖面圖,其晶粒 尺寸平均約,退火孿晶結構大約只佔總晶粒數量的 10 %。 【比較例2】市售4N純金線材 隹第5圖顯示市售4N純金線材的剖面圖。參照第5圖, 市=4N純金線材的晶粒尺寸小,且退火孿晶結構數量低。 17 201247903 【比較例3】市售銅鍍纪線材 第6圖顯+ 也 _ '、不市售銅鍍鈀線材的剖面圖。參照第6圖, 市。銅鑛免線材的晶粒尺寸較大,但退火孿晶結構數量低。 【貝施例1】具有大量退火孿晶結構的合金線材 利用高週波電熱熔煉89wt0/c^_8wt·%金-3wt.%鈀合 金’再以連續鑄造方式獲得線徑6 mm之粗線材。其中, 銀的含量約為89 wt% ;金的含量約為8 wt% ;以及鈀的含 量約為3 wt%。進行15次冷加工成形步驟抽線延伸與退火 熱處理,以形成線徑22.6 μιη之細線材。而後,進行倒數 第二道冷加工成形步驟抽線延伸而成為線徑20μιη之細線 材’再經過53(TC退火4秒。最後進行最後一道冷加工成 形步驟抽線形成17.5μπι之細線材,並進行最後一道退火步 驟,其退火溫度為630°C、退火時間為1分鐘。完成最終 退火步驟後,捲線完成打線接合所需要之合金線材產品。 【實施例2】具有大量退火孿晶結構的合金線材 利用高週波電熱熔煉95wt%銀-3wt.%金-2wt·.%鈀合 金,再以連續鑄造方式獲得線徑6 mm之粗線材。其中, 銀的含量約為95 ;金的含量約為3 ;以及纪的含 量約為2 wt%。進行15次冷加工成形步驟抽線延伸與退火 熱處理,以形成線徑22.6 μιη之細線材。而後,進行倒數 第二道冷加工成形步驟抽線延伸而成為線徑20μιη之細線 材’再經過530。(3退火4秒。最後進行最後一道冷加工成 形步驟抽線形成17.5μηι之細線材’並進行最後一道退火步 18 201247903 驟’其退火溫度為63Gt、退火時間$ i分鐘。完成最終 退火步驟後,捲線完成打線接合所需要之合金線材產品。 第7圖顯7^貫施例1的合金線材的剖面圖。如第7圖 所示’其晶粒尺寸平均52⑽,其中具有退火孿晶結構的 晶粒佔總晶粒數晉女Μ/,。,. 里大約42 % ;實施例2的合金線材的晶粒 尺寸平均6.7ym ’其中具有退火孿晶結構的晶粒佔總晶粒 數量大約36%。 電阻率測試: 匕較例1之合金線材的電阻率約為6.8 μΩ . cm。比較 例2之4N純金線材的電阻率約為。比較例3 ^銅^線材的電阻率約為1.9μΩ . em。實施例1之電阻 率平均值大約5.〇 μΩ . cm,略高於比較例2之純金線與比 六j之銅錢銳線;實施例2之電阻率平均值大約3.1 μ Ω . —接L比較例1之純金線與比較例2之銅鑛把線。亦即, 只施例1與貫施例2之具有大量孿晶結構之銀合金線材與 Λ 之/、彳放細晶粒之銀合金線材相比,退火孿晶結構 確貫了以有效降低線材的電阻率。 機械性質測試: 比車乂例1之合金線材的拉伸強度約為7.5 g,延伸率大 、’勺7.1 /〇。比較例23之4N純金線材及銅鐘把線材的拉 伸強度約為6.6至10.7g,延伸率大約4.0-6.0%。實施例1 之拉伸強度大約8.8 g,且延伸率可達9.5 % ;實施例2之拉 201247903 伸強度大約8·1 g,延伸率可達12.5 %。亦即,實施例j與 實細< 例2之具有大量擎晶結構之合金線材可具有較佳的機 械強度及延展性。 可靠度測試: 利用實施例1之合金線材進行打線接合以形成高速電 源交換器產品,並對此高速電源交換器產品進行一系列可 靠度試驗,其結果綜合示於表〗,其中最嚴苛的壓力鍋測 試(Pressure Cooker Test, PCT)實際可耐受丨28小時以上, 遠高於一般電子產品可靠度測試所要求96小時,另一同樣 嚴可的鬲加速哥命試驗(Highly Accelerated Stress Test, HAST )可達到128小時以上’也遠高於一般電子產品可靠 度測試規範所要求96小時。 表1 試驗項目 (TEST ITEM) 試驗條件 (TEST CONDITION) 通過與否 1.前處理測試 (Precondition Test) 烘烤(125°C ; 24小時) 溫濕度測試(30°C ; 60%RH ; 192 小時); 重流(1^£1〇\¥):260°(1:;3次 通過 2.壓力鍋測試 (Pressure Cooker Test ; PCT) Ta=121°C ; 100%RH ; 2 大氣壓; 96小時 通過 3溫度循環測試 (Temperature Cycling Test ; TCT) Ta=-65〇C〜150oC (air to air) ; 15 分鐘;1000次循環 通過 4.溫濕度測試 (Temperature&Humidity Test ; THT) Ta=85°C ; 85%RH;無偏壓;1000 小時 通過 5.高溫儲存測試 (High Temperature Storage Test ; HTST) Ta=150°C ; 1000 小時 通過 20 201247903 6.低溫儲存測試 (Low Temperature Storage Test ; LTST) Ta=-40°C ; 1000 小時 通過 7.高度加速壽命試驗 (Highly Accelerated Stress Test ; HAST) Ta=148°C ; 90%RH ; 3.6 伏特的偏 壓;96小時 通過 8.冷熱衝擊測試 (Thermal shock Test ; TST) Ta= -65°C〜150 °C ; 5 分鐘;1000 次循環 通過 雖然本發明已以數個較佳實施例揭露如上,然其並非 用以限定本發明,任何所屬技術領域中具有通常知識者, 在不脫離本發明之精神和範圍内,當可作任意之更動與潤 飾,因此本發明之保護範圍當視後附之申請專利範圍所界 定者為準。 21 201247903 【圖式簡單說明】 第1圖顯示在本發明實施例中之合金線材的形成方法 的流程圖。 第2圖顯示步驟104所述複數道冷加工成形步驟及退 火步驟更詳細的步驟。 第3A-3B圖顯示本發明實施例所形成之合金線材。 第4-6圖顯示本發明之比較例之線材的剖面圖。 第7圖顯示本發明之實施例之具有大量孿晶結構的合 金線材的剖面圖。 【主要元件符號說明】 300〜合金線材 302〜晶粒 304〜向角度晶界 306〜退火孿晶結構 22The conductivity is lowered. Most of the material design of the Ν Ν 造成 造成 造成 , , , , , , , , , , 度 度 度 度 度 度 度 度 度 度 度 度 度 度 度 度 度 度 度 度 度 度 度 度 度 度 度 度 度But it will increase its electric shouting two °', his 70-yellow alloy can improve the mechanical properties, in the electronics industry · φ A choose: the packaged wire seen in the towel 'for example, including the following options (1) gold wire: gold joint interface will Large ^ can have low resistivity, but gold wire and Yu Yu performance AuAU, Au for V form f-type intermetallic compound (including Au2Al' line metal reaction will be accompanied by warm shame = conductivity is reduced. In addition, gold / Ming interface Many Kirkendall v〇ids are introduced, and 201247903 increases the joint interface resistivity, which leads to a decrease in the reliability of the joint. (7) Steel wire · In recent years, the packaging industry began to use copper wire as a semiconductor and light/ The wire of the diode wire is bonded. Although the copper wire has better conductivity! The raw kernel is very easy to oxidize. Therefore, the wire storage and transportation process needs to be sealed, and the wire bonding process requires more arrogant gas and chlorine gas assist. And in subsequent seals The reliability test of electronic products still suffers from the problems of oxidation and corrosion. In addition, the copper wire material is too hard, and the wire bonding is easy to cause the wafer to rupture, etc. Although in some studies, other metal plating on the copper wire clock is proposed to improve. The method of oxidizing and rotting money (for example, refer to US Pat. No. 7,645,522 B2, US 0 173 659 A1, US 782 〇 913 ϋ, but due to the high hardness of the copper wire itself, the wire bonding step is easy to fail, so the integrated circuit component package cannot be achieved. Reliability required. (3) Silver wire: Silver is the lowest resistivity element in all materials, but pure silver has the problem of vulcanization corrosion in a sulfur-containing environment, and the pure silver wire will also be bonded to the aluminum pad. A brittle intermetallic compound (Ag2A) or Ag4Al) is formed. In addition, the pure silver wire is prone to electrolytic ion migration inside an aqueous gas encapsulating material. That is, pure silver acts via an electric current in an aqueous gas environment. Hydrolysis dissolves silver ions and reacts with oxygen to become unstable silver oxide (AgO), which is then deoxidized (Deoxidi Ze) forms a silver atom and grows a silver whisker of the leaf texture to the positive electrode, which eventually causes a short circuit between the positive and negative electrodes (refer to: H. Tsutomu, Metal Migration on Electric Circuit Boards, Three Bond Technical News, Dec. 1, 1986.) In addition, in some studies, methods have been proposed to plate other metal plating on the surface of the silver wire to improve the problem of sulfide corrosion and silver ion migration (for example, refer to US Pat. No. 6,696,756), but the wire formed by 4 201247903 is still Unable to achieve the desired reliability and resistivity. (4) Alloy wire: The alloy wire includes, for example, an alloy mainly composed of gold and an alloy mainly composed of silver. These alloys include, for example, elements such as copper, indium, manganese, chromium, in the bow, indium, etc., however, these alloy wires are still not capable of both low impedance and high reliability. In summary, the existing various pure metal wires, metal-plated composite wires, and alloy wires with added elements cannot meet the requirements of high-speed operation and high-frequency integrated circuit component packaging. Therefore, it is urgent to have a low Impedance and high reliability wire. SUMMARY OF THE INVENTION In an embodiment of the present invention, an electronic package alloy wire is provided, which is an alloy wire formed of at least silver, gold, and tantalum, wherein the weight ratio of silver to gold bar in the alloy wire is 86 to 99.98: 0.01 〜8 : 0.01 to 6, and in the alloy wire, the number of crystal grains having an annealing twins structure accounts for more than 20% of the total number of crystal grains of the alloy wire. In another embodiment of the present invention, there is provided a method of manufacturing an electronic package alloy wire, comprising: providing a thick wire material of an alloy wire formed of at least silver, gold, and palladium; and alternately performing multiple cold forming processes. a step of forming a thin wire by sequentially reducing the wire diameter of the thick wire, wherein the cold forming step and the annealing step comprise at least the following steps: performing a penultimate cold forming step; Performing a penultimate annealing step, the annealing temperature of the penultimate annealing step is 0.5Tm~0.7Tm, and the annealing time is 2~10 seconds, wherein Tm is the melting point of the absolute temperature standard of the material of the thick wire; , the amount of deformation between the last 201247903; the wire annealing step formed by the step, the H exceeds 15%; and the annealing temperature of the retreating step of the last annealing step is higher than the penultimate minute. 'The phoenix is 20C~200°C, and the annealing time is 〇·01~15. In order to make the above and other purposes of the present invention and the county easy to understand, the following special features and advantages can be more clearly explained as follows: For example, in conjunction with the drawings, various embodiments are invented. This is limited. For example, in the second component two =: ί: the embodiment of the first component in direct contact with the third component is also included; and the component is formed between the first component and the second component, The embodiment in which the 7° member is not in direct contact with each other. In addition, for the sake of simplicity, the present invention has different component symbols and/or letter rs in different examples, and does not represent a specific one between the embodiments and/or the structures. Guan Jindian 2 Ming provides an alloy wire and a method for forming the same, except that by wire (4), the wire structure is improved, and the electrical conductivity and reliability of the wire are greatly improved. Open; into m (four) shot, combined Reading material to ^ silver, gold and free of melon, and the alloy line silver · gold: free weight ratio m 6 201247903 0.01~8: 0.01~6. In addition, annealing the twin structure in the alloy wire (annealing The number of grains in the twins structure is more than 20% of the total number of grains. It is known that the internal structure of the wire bonding metal wire is fine crystal grains, which can provide sufficient tensile strength and ductility, but fine grains. There are a large number of high angle grain boundaries (High Angle Gr Ain Boundary), these high-angle grain boundaries hinder the transmission of electrons, thus increasing the resistivity of the wire. In addition, the increase in resistance causes the temperature to rise, causing the wire to be easily melted when passing current, which affects its reliability. On the other hand, a large number of high-angle grain boundaries also accelerate the vulcanization corrosion damage of the wire, which is disadvantageous to the electrical conductivity and reliability of the wire. In contrast, the alloy wire provided in the embodiment of the present invention has equiaxed coarse grains, so The formation of a high-angle grain boundary can be reduced to reduce the electrical resistivity of the alloy wire. In addition, a large number of annealed twin structures can enhance the strength of the material, thereby improving reliability. FIG. 1 shows an alloy wire in an embodiment of the present invention. Flowchart of the forming method. Referring to the first step, in step 102, a thick wire material, the thick wire material, and an alloy wire material formed of silver, gold, and lang are provided. In step 1 〇 4, the parent is subjected to a plurality of cold forming steps. And a plurality of annealing steps 'to reduce the wire diameter of the thick wire successively to form a thin wire. The detailed method of the above steps is described below. > Thick wire, the thick wire is an alloy wire formed of at least silver, gold and 1 bar. The choice of bismuth, gold and bismuth is because the three = 兀 'τ' can completely dissolve each other on the phase equilibrium diagram (^ touch %(4)(4), not in use, the physical intermetallic phase precipitates, so the formed alloy wire ° ', the ductility of the crucible, and the addition of gold and do not have much influence on the electrical resistivity. 201247903 The right amount of gold can have the effect of resisting vulcanization and corrosion. However, when the content of gold is too high, a large amount of brittle intermetallic compound is formed, and a large number of Kirkendall voids are generated, resulting in electrical conductivity of the alloy wire and Reliability is reduced. In addition, an appropriate amount of palladium may have the effect of resisting corrosion, avoiding ion migration damage, and inhibiting interface metal reaction. However, when the content of palladium is too high, the electrical resistance of the alloy wire is increased. In one embodiment, the content of silver in the thick wire is about 86 to 99.98 wt%, the content of gold is about 0.01 to 8 wt%, and the content of the film is about 0.01 to 6 wt%. It should be noted that in other examples, the alloy wire may further include other metals, non-metal elements, or other impurity components, and the invention is not limited to the silver-gold ternary alloy. Therefore, as long as the weight ratio of silver, gold, and gold in the thick wire is controlled to be 86 to 99.98: 0.01 to 8: 0.01 to 6, wherein silver is the main component of the thick wire, that is, within the scope of the present invention. In addition, since it is difficult to completely remove all impurities in the process of actual smelting, refining, cold forming, etc., and accurately achieve a mathematical or theoretical specific concentration, when the above impurity content falls within the corresponding standard or specification Within the scope of the acceptance, it is still considered to be within the scope of the present invention. Those having ordinary knowledge in the art to which the present invention pertains should understand that the above-mentioned corresponding standards or specifications may vary depending on different properties, conditions, requirements, etc., and thus specific standards or specifications are not listed below. In one embodiment, the method of forming the thick wire is to heat-melt silver, gold, and palladium, and then cast into an ingot. Thereafter, the ingot is cold worked to form the above-mentioned thick wire formed of at least silver, gold and palladium. In another embodiment, the above-mentioned thick wire is formed by continuous casting after heating, melting silver, gold and palladium. In one embodiment, the wire diameter of the thick wire is about 5 to 10 8 201247903. Step 104' alternately performs a plurality of i-in-----from less defoliation and 稷^ to successively reduce the wire diameter of the thick wire. To form a thin line graph, the plurality of cold workings of step 104 are shown: :=r_. In Fig. 2, the steps: = squash-! The step of annealing and annealing includes at least the following steps: in the step-forming mineralization + 'into the first cold-forming forming step, the first-channel cold addition:: step:: The amount of deformation between the formed wires is 1%%. In the step 2, the annealing temperature of the first pass = Wei fire step is Q 5Tm~Q 7Tm, and during annealing, the first shirt, wherein Tm The thick wire, the 成形 forming step and the annealing step can be carried out several times as needed. Then in the 'steps', enter the second = step, the penultimate second retreat:: the number of second annealing. Ding m ~ 〇.7Tm, annealing time is 2~1 〇 seconds, 1 dish is made of material Absolute temperature scale melting point. In step ^m, the thick line-channel cold-forming forming step is such that the final _A is formed by the last formed wire and the penultimate cold-added: the amount of deformation between the forming steps is 1% or more. The formed wire is subjected to a cold forming step and the cold is 3 =, and the amount is referred to as a factor. In step 104-6, the annealing temperature of the k-cut cross-sectional area reduction step is compared to the last one: _~, and the annealing time is. ::= Fire temperature is consistently applied, step 104 should also be, the main endurance is, carry out two cold forming forming step Hui 9 201247903 (steps 104-3, 104-5) and two annealing steps (steps) 04- 4, 104-6). In one embodiment, the above cold forming step comprises drawing, extruding or a combination of the foregoing. Alternatively, the cold forming step and the annealing step described above may be any known or future developed cold working/annealing method. The thin wire formed after the cold forming and annealing step is an alloy wire formed of at least silver, gold and palladium, and the weight ratio of silver:gold:palladium in the alloy wire is 86~99.98: 0 force 1~8: 0.01~6. In an embodiment, the alloy wire comprises a coarse grain having a size between Ιμπι and ΙΟμπι, and in the alloy wire, the number of grains having an annealing twins structure occupies all grains of the alloy wire. More than 20% of the number. In one embodiment, the wire diameter of the thin wire is from 1 〇 to 50 μm. Compared with the conventional metal wire, the above-mentioned thin wire can have better reliability and lower electric resistance. The reason for the formation of the above annealed twin structure can be inferred according to the principle of physical metallurgy (refer to George E. Dieter, Mechanical Metallurgy, McGRAW-HILL Book Company, 1976, -P. 135-141. and RW Cahn, Physical Metallurgy, 1970, P .1 184-1185 ). The formation of the annealed twin structure is due to the accumulation of strain strain inside the material during the cold working process, which will drive the atomic uniform shear (Shear) of the partial region to the inside of the grain where it is not sheared during the subsequent annealing heat treatment. The moving atoms form a bi-symmetric position of the mirror symmetry, which is the Annealing Twin, and the mutually symmetrical interface is the Twin Boundary. Annealing twins mainly occur in the face centered Cubic (FCC) crystalline material with the closest lattice arrangement, and the twin boundary is low energy. 3 The special grain boundary 'crystal orientation is (1) 丨} surface. Compared with the high angle grain boundary 201247903 (High Angle Grain Boundary) formed by general annealing recrystallization, the interfacial energy of the twin boundary is only about 5 ° / of the high angle grain boundary. In addition, in general, the 'stack difference The smaller the material (Stacking Fault Energy), the more likely it is to produce annealed twins, and the gold, silver, and alloy elements have a stacking energy of less than 50 erg/cm2, which makes it easy to form annealed twins. That is, not all Metal can easily form a twin structure. For example, although aluminum is a face-centered cubic crystal structure material, its stacking energy is about 200 erg/cm2', so annealing twins rarely occur. In addition, the cold forming step described in Fig. 2 It is also one of the factors for the formation of an annealed twin structure. Sufficient cold working deformation can accumulate strain energy to provide atomic driving force to produce annealed twins, but if the amount of cold working deformation is too large 'in annealing heat The initial recrystallization stage will cause Nucleai of Recrystallized Grains to form a large number of fine grains, which reduces the chance of annealing twins. It should be noted that Figure 2 shows The method of forming the alloy wire is only a preferred embodiment of the present invention, but the method of forming the alloy wire of the present invention is not limited thereto. Figs. 3A and 3B show an alloy wire 300 formed according to an embodiment of the present invention. The figure shows a schematic view of a line segment of a portion of the alloy wire 3A. Fig. 3B shows a longitudinal section along the length direction parallel to the alloy wire 300 shown in Fig. 3A. Referring to Fig. 3A, the alloy wire 300 includes at least silver. , gold, palladium alloy wire. Referring to Figure 3B, the longitudinal section of the alloy wire 300 is a face-centered cubic polycrystalline structure (p〇iycrystalline stmcture) containing a plurality of grains 3〇2 In one embodiment, the grains 3〇2 may be coarse grains having a size ranging from 1 μm to 1 Ομυ! In addition, the 201247903 of each grain is bounded by a high-angle grain boundary 304, wherein The number of grains having an annealing twins structure 306 is more than 20% of the total number of grains of the alloy wire 300. In a preferred embodiment, the number of grains of the annealed twin structure is The size of all the crystal grains of the alloy wire is 40% or more, and the size of the plurality of coarse crystal grains 302 is between the private 111 and the printing 111. In one embodiment, the weight ratio of silver, gold, and palladium in the alloy wire 300 is 86 to 99.98: 〇.〇1~8 ··0.01~6 'wherein silver is the main component of the alloy wire 3〇〇, gold, palladium Or other ingredients are not more than silver. It should be noted that the above-mentioned alloy wire contains silver as a main component and contains a specific ratio of gold wire. However, the present invention is limited to this. In other examples, the alloy wire may further include other metals, non-metal elements, or other = avoidable impurity components. It should be noted that the addition of other metal elements needs to be adjusted as needed to avoid affecting the properties of the alloy wire. Example α' When copper is added to the eleven alloy wires, the material strengthening effect will be produced. The anti-oxidation and anti-corrosion of the alloy wire will be high and low, and since the silver-copper alloy will be in the crystal The boundary produces discontinuous precipitates, which are pulled into lines. In addition, 'copper will also increase the hardness of the alloy to become brittle, making the process difficult.' At the same time, it is easy to cause wafer breakdown during the wire bonding process. In addition, although the addition of rare earth elements can be applied to the wire application of η β of A &妗# 呎 I I, the fine grain has more grain boundaries, and the 2nd day boundary will hinder the electronic value ^ at high speed operation And 'to increase the electrical resistivity of the alloy, it is not applicable to the packaging requirements of rare earth Ρ circuit electronic products. In addition, the current is passed; its oxidation and yaki's make the package wire outside, in the present: it is not conducive to the reliability of electronic products. This 々, 加约 will make the material ductility worse; add 201247903 in the alloy: two: two, ά, the formation of low temperature phase, so that the temperature resistance of the wire is worse, continue l base:: worm two wire material melting; add 铍(Be) is toxic and flammable solid-d knife or smoke is toxic; add Shu (Ru), 铑 (Rh), 锇 (Os), Syria (Ir) B to win their bright points (respectively 23i〇〇c, (9)5〇c, 3〇45〇c and 241 are much higher than the silver point (22 n°c), so the melting is extremely difficult. The 2 towel fields increase the resistivity. Part of the added elements in the phase equilibrium diagram ί ^, the silver-aged metal phase of the precipitation (Precipitation), resulting in the materialization of the shell and the two - sex 'more will reduce the conductivity of the wire. The alloy wire such as ruthenium in the embodiment of the invention has the following advantages, including: (1) low electrical resistance: j silver /, like low electrical resistivity, but silver wire in a conventional process: grain, several fine grains (average grain The diameter is about 0.5~1 _, so it has a large amount of B boundary, which leads to an increase in resistivity. In addition, the silver wire will form a brittle intermetallic compound when it is wire bonded on the mat ( Reduction of silver (AgzAl) or infinity _ (Ag4A1)), resulting in reduced conductivity. The alloy wire of the present invention includes Twisted Boundary (AnneaHng TW^) structure for tuning (Coherent) t structure, belonging to the low energy Σ3 special grain boundary, the interface energy is only 5% of the general south angle grain boundary. Therefore, the symmetric lattice arrangement of these annealed twins has little obstruction to the electron transfer wheel, and can show In addition, in the preferred embodiment, the alloy wire includes equiaxed coarse grains, thereby reducing the density of the high-angle grain boundaries and reducing the electrical resistance. (2) Good mechanical strength: slave In other words, the strengthening of the strength of the fine-grained metal wire depends on the high-angle grain boundary blocking displacement movement of 201247903, but it is not conducive to wire bonding, poor conductivity, and reduced reliability. In addition, if the grain size is increased, Although the electrical resistance can be lowered, the mechanical strength of the wire is too low. However, the alloy wire in each embodiment of the present invention includes at least 20% of the crystal grains containing an Annealing Twin structure, so The preferred mechanical strength of the wire. Further, since the twin structure has a different crystal orientation with respect to the crystal grain in which it is located, it can block the displacement of the Dislocation and generate a material strengthening effect. Tensile strength similar to that of general fine-grained structure wires', but due to the difference between rows and atoms, the ductility of the cross-grain is higher than that of the general fine-grained wires. (3) With resistance Oxidation and Corrosion Resistance: Generally speaking, silver often has the problem of sulphide corrosion in a sulfur-containing environment, so other precious metals are plated on silver to avoid vulcanization. However, the noble metal is completely dissolved into the molten silver solder ball substrate during the wire bonding process, so that the ball bond component formed by the wire bonding component is only a silver alloy containing a trace amount of protective precious metal, so the wire bonding joint of the wire bonding Vulcanization corrosion still occurs, so it is still impossible to effectively avoid the short circuit of the ball joint caused by the migration of silver electrolysis ions, and the Kirkenda hole effect when the aluminum pad is wire-bonded. However, the alloy wire in each embodiment of the present invention includes at least 20% of the crystal grains containing an Anneaiing Twin structure, which can avoid oxidation, sulfurization, and chloride ions due to the lower interfacial energy of the twin boundary. Corrosion path, it can show better oxidation resistance and corrosion resistance. (4) The grain growth during the packaging process is not easy: after the fine grain structure of the conventional wire is bonded by wire bonding, the solidification heat of the solder ball point 14 201247903 accumulates in the vicinity of the wire, which causes the grain to rapidly grow to form a heat affected zone. Therefore, the tensile test strength is lowered. However, at least 20% of the grain of the alloy wire of each embodiment of the present invention contains an Annealing Twin structure, and the Annealing Twin structure has a lower interfacial energy and a higher-angle grain boundary structure. stable. Therefore, not only in the high temperature state, the twin boundary itself is not easy to move, but also the high-angle grain boundary around the crystal grain is locked, so that the high-angle grain boundaries cannot move, and the overall grain structure does not There is obvious grain growth. Therefore, even if the first contact (bump point) is cooled from the molten state to room temperature during the wire bonding process, the original grain size can be maintained. In addition, when the packaged product undergoes various high-temperature reliability tests, it is less likely to cause: The grain grows unsteadily. (5) Low electron mobility: In the conventional process, the pure silver wire is prone to electrolytic ion migration inside the water-containing encapsulating material, and finally causes a short circuit of the positive electrode. In addition, when the pure silver wire is bonded to the aluminum pad, the diffusion coefficient of the name, the aluminum atomic base (Matrix) is higher than that of the aluminum atom at the silver base, and I 1 to 2 to 10. Double, this huge difference in interface diffusion speed will create, large, ''spoon Kirkenda holes, resulting in increased resistivity and wire bonding welding = so-called in the alloy wire of the present invention, due to low atomic The diffusion rate of the Satan p boundary or across the twin boundary is extremely low. Therefore, when applied to 1=1, the internal atom of the wire is difficult to integrate the above advantages even at high density current, and the alloy wire application of the present invention is applied. In the product (4) with a piece of package wire bonding, not only has a lower resistivity, the circuit element and the general pass 15 201247903 wire shows better quality and reliability. However, depending on the needs of the user, the alloy wire of the present invention can also be applied to other technical fields and applications, such as: audio lines, signal or power transmission lines, transformer lines, etc., and the wire diameter of the alloy wire can also be changed according to requirements. It is not limited to the scope of the above exemplification. In addition, it has been found that at least 20% of the grains in the alloy wire contain an annealed twin structure to achieve the above advantages. Therefore, although in the process of conventional metal wire for wire bonding, the case of annealing the twin structure may occur occasionally, the number of grains containing the annealed twin structure is usually less than 10% of the total grain of the wire or even It does not contain an annealed twin structure at all, so it still cannot have the above advantages. The invention has been studied by the inventors for a long time and meticulously, and found that the use of alloying elements of a specific composition and controlling the amount of cold working deformation and annealing temperature can form a material containing a large amount of annealed twins inside, thereby obtaining a low resistivity and high heat conductivity. Suppository, high-strength, high-ductility, excellent anti-oxidation and rot. In more detail, the alloy composition provides the best coordination between electrical conductivity and mechanical properties, and the twin boundary has characteristics such as effectively suppressing electromigration, improving material strength and ductility, and therefore, in the case of wire bonding, not only It has a very low resistivity and is excellent in reliability testing. For example, in the most severe pressure cooker test (PCT), it can withstand more than 128 hours at temperatures (Ta) = 121 ° C, relative humidity (RH) = 100%, and 2 atm. It is higher than the 96 hours required for the reliability test of general electronic products. In another embodiment, in the High Accelerated Stress Test 'HAST', the temperature is (Ta) 勹 48 〇 c, relative humidity (RH) ^ 9 〇 %, 16 201247903 3.6 volts. Under pressure conditions, it can reach more than 128 hours, and is much higher than the 96 hours required by the general electronic product reliability test specification. Therefore, the alloy wire in the embodiments of the present invention can be applied to various high-speed power exchange integrated circuits, for example, a voltage drop type DC voltage exchange integrated circuit with an input voltage range of 4.5V to 17V and an operating frequency of 1200KHZ (Buck) DC/DC Converter) is not limited to a voltage drop type DC voltage switching integrated circuit that is used at a lower speed than 5 〇〇ΚΉΖ. [Comparative Example 1] The alloy wire with fine crystal grains was subjected to high-frequency electrothermal melting of 89 wt% silver-8 wt.% gold-3 wt.% palladium alloy, and then subjected to 8 cold forming forming steps by wire drawing extension and annealing heat treatment to form a wire diameter. 25.4 μιη thin wire. Then, the second to last cold working forming step was carried out by drawing to form a thin wire having a wire diameter of 22 μm, and then annealing at 650 C for 5 seconds. Finally, the final cold forming step was taken to form a thin wire of 17.5 μm, and the final annealing step was carried out, and the annealing temperature was 750. The annealing time is 1 second. After the final annealing step is completed, the coil wire is required to complete the alloy wire product required for wire bonding. Figure 4 shows a cross-sectional view of the fine-grained alloy wire with an average grain size of about 10% of the total grain size. [Comparative Example 2] Commercially available 4N pure gold wire 隹 Figure 5 shows a cross-sectional view of a commercially available 4N pure gold wire. Referring to Fig. 5, the city = 4N pure gold wire has a small grain size and a low number of annealed twin structures. 17 201247903 [Comparative Example 3] Commercially available copper plated wire material Fig. 6 shows + _ ', a cross-sectional view of a commercially available copper plated palladium wire. Refer to Figure 6, City. The copper ore-free wire has a larger grain size, but the number of annealed twin structures is low. [Bei Shi Example 1] An alloy wire having a large number of annealed twin structures was obtained by high-frequency electrothermal melting of 89 wt0/c^_8 wt·% gold-3 wt.% palladium alloy', and a thick wire having a wire diameter of 6 mm was obtained by continuous casting. Among them, the content of silver is about 89 wt%; the content of gold is about 8 wt%; and the content of palladium is about 3 wt%. 15 cold working forming steps were carried out by drawing extension and annealing heat treatment to form a thin wire having a wire diameter of 22.6 μm. Then, the second to last cold working forming step is drawn to form a thin wire having a wire diameter of 20 μm, and then pass through 53 (TC annealing for 4 seconds. Finally, the final cold forming step is performed to draw a thin wire of 17.5 μm, and finally An annealing step has an annealing temperature of 630 ° C and an annealing time of 1 minute. After the final annealing step is completed, the wound wire is subjected to the alloy wire product required for wire bonding. [Example 2] Alloy wire having a large number of annealed twin structures High-frequency electric heating smelting 95wt% silver-3wt.% gold-2wt·.% palladium alloy, and then obtaining a thick wire with a wire diameter of 6 mm by continuous casting. Among them, the content of silver is about 95; the content of gold is about 3; The content of the film is about 2 wt%. 15 cold forming steps are carried out by drawing and annealing heat treatment to form a thin wire having a wire diameter of 22.6 μm. Then, the second last cold working forming step is drawn to form a wire diameter. 20μιη of thin wire 'after 530. (3 annealing 4 seconds. Finally, the last cold forming step is drawn to form a thin wire of 17.5μηι' and the last one The annealing step 18 201247903 is followed by an annealing temperature of 63 Gt and an annealing time of $ i minutes. After the final annealing step is completed, the winding wire completes the alloy wire product required for wire bonding. Figure 7 shows the alloy wire of Example 1. The cross-sectional view, as shown in Fig. 7, has an average grain size of 52 (10), wherein the grain with the annealed twin structure accounts for about 42% of the total number of grains, and the alloy wire of the embodiment 2 The average grain size is 6.7 μm. The crystal grains with an annealed twin structure account for about 36% of the total crystal grains. Resistivity test: The resistivity of the alloy wire of Example 1 is about 6.8 μΩ·cm. Comparative Example 2 The resistivity of the 4N pure gold wire is about. The resistivity of the comparative example 3 ^ copper wire is about 1.9 μΩ. em. The average value of the resistivity of the embodiment 1 is about 5. 〇μΩ. cm, which is slightly higher than that of the comparative example 2. The pure gold wire and the copper wire sharp line of the six j; the average resistivity of the embodiment 2 is about 3.1 μ Ω. - the pure gold wire of the comparative example 1 and the copper ore wire of the comparative example 2. That is, only the example 1 And the silver alloy wire with a large number of twin crystal structures of Example 2 and the fine grains of Λ/, 彳Compared with the silver alloy wire, the annealed twin structure is confirmed to effectively reduce the electrical resistivity of the wire. Mechanical properties test: The tensile strength of the alloy wire of the car example 1 is about 7.5 g, and the elongation is large, 'spoon 7.1 /〇. The tensile strength of the 4N pure gold wire and copper bell wire of Comparative Example 23 is about 6.6 to 10.7 g, and the elongation is about 4.0-6.0%. The tensile strength of Example 1 is about 8.8 g, and the elongation is up to 9.5 %; Example 2 pull 201247903 The tensile strength is about 8.1 g and the elongation is up to 12.5%. That is, the alloy wire of the embodiment j and the actual thin article 2 having a large number of seed crystal structures can have better mechanical strength and ductility. Reliability test: The alloy wire of the first embodiment is used for wire bonding to form a high-speed power exchanger product, and a series of reliability tests are performed on the high-speed power exchanger product, and the results are comprehensively shown in the table, among which the most severe The Pressure Cooker Test (PCT) can withstand more than 28 hours, which is much higher than the 96 hours required for the reliability test of general electronic products. Another equally rigorous High Accelerated Stress Test (HAST) ) can reach more than 128 hours' is also much higher than the 96 hours required by the general electronic product reliability test specification. Table 1 Test item (TEST ITEM) Test conditions (TEST CONDITION) Pass or not 1. Precondition Test Bake (125 ° C; 24 hours) Temperature and humidity test (30 ° C; 60% RH; 192 hours) Heavy flow (1^£1〇\¥): 260° (1:; 3 passes 2. Pressure Cooker Test; PCT) Ta=121°C; 100% RH; 2 atm; 96 hours pass 3Temperature Cycling Test (TCT) Ta=-65〇C~150oC (air to air); 15 minutes; 1000 cycles through 4. Temperature and Humidity Test (Temperature & Humidity Test; THT) Ta=85°C 85% RH; no bias; 1000 hours pass 5. High Temperature Storage Test (HTST) Ta=150°C; 1000 hours pass 20 201247903 6. Low Temperature Storage Test (LTST) Ta =-40 ° C; 1000 hours pass 7. Highly Accelerated Stress Test (HAST) Ta = 148 ° C; 90% RH; 3.6 volt bias; 96 hours pass 8. Thermal shock test (Thermal shock Test ; TST) Ta = -65 ° C ~ 150 ° C; 5 minutes; 1000 cycles passed The present invention has been described above in terms of several preferred embodiments. However, it is not intended to limit the invention, and any one of ordinary skill in the art can make any changes without departing from the spirit and scope of the invention. The scope of the present invention is defined by the scope of the appended claims. 21 201247903 [Simplified Schematic] FIG. 1 is a flow chart showing a method of forming an alloy wire in an embodiment of the present invention. Figure 2 shows a more detailed procedure of the plurality of cold forming steps and annealing steps in step 104. Figures 3A-3B show alloy wires formed in accordance with an embodiment of the present invention. Figures 4-6 show comparative examples of the present invention. Sectional view of the wire. Fig. 7 is a cross-sectional view showing an alloy wire having a large number of twin structures according to an embodiment of the present invention. [Description of Main Elements] 300~ Alloy Wire 302~ Grain 304~Angular Grain Boundary 306~ Annealing Twin structure 22

Claims (1)

201247903 七、申請專利範圍: 1. 一種電子封裝合金線材,其係至少由銀、金及纪所形 成之合金線材,其中,該合金線材中銀:金:I巴的重量比 =86〜99.98 : 0.01〜8 : 0.01〜6,且在該合金線材中,具有退 火孿晶結構(annealing twins structure)的晶粒數量佔該合金 線材的所有晶粒數置的2 0 %以上。 2. 如申請專利範圍第1項所述之電子封裝合金線材,其 中該合金線材包括尺寸介於1 μιη至1 Ομιη的粗大晶粒。 3. 如申請專利範圍第1項所述之電子封裝合金線材,其 中該合金線材的線徑介於10至50μπι。 4. 一種電子封裝合金線材的製造方法,包括: 提供一粗線材,該粗線材係至少由銀、金及鈀所形成 之合金線材;以及 交替進行複數道冷加工成形步驟及複數道退火步驟, 以逐次縮減該粗線材的線徑而形成一細線材, 其中,該些冷加工成形步驟及該些退火步驟至少包括 下列步驟: 進行倒數第二道冷加工成形步驟; 之後,進行倒數第二道退火步驟,該倒數第二道退火 步驟的退火溫度為〇.5Tm〜0.7Tm,退火時間為2〜10秒,其 中,Tm為該粗線材的材質的絕對溫標的熔點; 之後,進行最後一道冷加工成形步驟,使得該最後一 道冷加工成形步驟所形成的線材與該倒數第二道冷加工成 形步驟所形成的線材之間的變形量為1%以上、不超過 15% ;以及 之後,進行最後一道退火步驟,該最後一道退火步驟 的退火溫度比倒數第二道退火步驟的退火溫度高2 0 °C〜2 0 0 201247903 C ’退火時間為0·0]〜15分鐘。 5·如申請專利範圍第4項所述之 = == =尺寸介於== 數量伯該細線材的所有晶粒數晶結構的晶粒 製造==rr述之電二線材的 述之組合。該些〜加工成形步驟包括抽線、擠型或前 製造====述之電子封裝合金線材的 及將銀、金及免加熱熔融後,經濟鑄而成為一鑄鍵;以 對該軸進行冷加1’㈣辆粗線材。 製造方4項所述之電子難合金線材的 將鉅1 的提供,包含下列步驟: 粗線材。1巴加熱溶融後,以連續鑄造的方式形成該 製造方1申t專中利範圍第4項所述之電子封裝合金線材的 0.01二粒線材中銀、金、絶的重量比=86〜99.98 : 0.01〜8 : 製造方:申:乾圍第4項所述之電子封裝合金線材的 線徑為1(Μ〇μπ^粗線材的線徑為5〜1()麵,該細線材的 24201247903 VII. Patent application scope: 1. An electronic package alloy wire, which is an alloy wire formed by at least silver, gold and Ji, wherein the weight ratio of silver: gold: I bar in the alloy wire is 86~99.98: 0.01 〜8 : 0.01 to 6, and in the alloy wire, the number of crystal grains having an annealing twins structure accounts for more than 20% of the total number of crystal grains of the alloy wire. 2. The electronic package alloy wire of claim 1, wherein the alloy wire comprises coarse grains having a size ranging from 1 μm to 1 μm. 3. The electronic package alloy wire according to claim 1, wherein the wire diameter of the alloy wire is between 10 and 50 μm. A method of manufacturing an electronic package alloy wire, comprising: providing a thick wire material of an alloy wire formed of at least silver, gold, and palladium; and alternately performing a plurality of cold working forming steps and a plurality of annealing steps to The wire diameter of the thick wire is successively reduced to form a thin wire, wherein the cold forming step and the annealing step comprise at least the following steps: performing a penultimate cold forming step; and then performing a penultimate annealing step, The annealing temperature of the penultimate annealing step is 〇5Tm~0.7Tm, and the annealing time is 2~10 seconds, wherein Tm is the melting point of the absolute temperature standard of the material of the thick wire; then, the last cold forming step is performed, The amount of deformation between the wire formed by the last cold forming step and the wire formed by the penultimate cold forming step is 1% or more and not more than 15%; and thereafter, a final annealing step is performed, and finally The annealing temperature of an annealing step is higher than the annealing temperature of the penultimate annealing step by 20 °C~ 2 0 0 201247903 C 'annealing time is 0·0]~15 minutes. 5. As described in item 4 of the scope of patent application = == = size between == number of grains of all the crystal grain numbers of the fine wire material Manufactured == rr The combination of the two wires described. The processing steps include: drawing, extruding or pre-manufacturing ==== said electronic packaging alloy wire and melting silver, gold and heat-free, economically casting into a casting key; Cold plus 1' (four) thick wire. The provision of the giant hard 1 of the electronic hard alloy wire described in Item 4 of the manufacturer includes the following steps: Thick wire. After heating and melting at 1 bar, the weight ratio of silver, gold and absolute in the 0.01 two-wire wire of the electronic packaging alloy wire according to item 4 of the manufacturer's patent range is formed in a continuous casting manner: 86 to 99.98: 0.01~8 : Manufacturer: Shen: The wire diameter of the electronic package alloy wire as described in item 4 of the dry circumference is 1 (the diameter of the 线μπ^ thick wire is 5~1 (), the wire of the thin wire 24
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI762342B (en) * 2021-06-03 2022-04-21 國立臺灣大學 Methods for forming bonding structures
TWI819339B (en) * 2021-07-20 2023-10-21 樂鑫材料科技股份有限公司 Methods for forming bonding structures

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US8101123B2 (en) * 2009-03-23 2012-01-24 Lee Jun-Der Composite alloy bonding wire and manufacturing method thereof
TW201204843A (en) * 2010-07-22 2012-02-01 jin-yong Wang Bonding silver wire for packaging and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI762342B (en) * 2021-06-03 2022-04-21 國立臺灣大學 Methods for forming bonding structures
TWI819339B (en) * 2021-07-20 2023-10-21 樂鑫材料科技股份有限公司 Methods for forming bonding structures

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