201240169 六、發明說明： 【發明所屬之技術領域】 本發明係有關於一種半導體元件，特別是有關於一種 可有效提升元件熱傳導並避免焊料接觸短路之半導體元 件。 【先前技術】 傳統 SMT (surface mount technology)元件結構中，在元 件與焊板之間存在一具特定厚度之焊料層，而由於此焊料 層之存在使得非焊料區順應地產生了一厚度空間。然，此 非焊料區所產生的厚度空間卻將嚴重阻礙元件的熱傳導， 導致元件壽命縮短。同樣地，此非焊料區的厚度空間，在 焊料過程中，將使錫膏（solder)因軟化流動而極易相互接觸 造成元件短路。 因此，開發一種可提升元件熱傳導並避免焊料接觸短 路的半導體元件是有其重要性的。 【發明内容】 本發明之一實施例，提供一種半導體元件，包括：一 第一基板，包括一第一凹槽與一第二凹槽；一第一焊料與 一第二焊料，分別填入該第一凹槽與該第二凹槽内；一第 二基板，包括一第一電極區與一第二電極區’該第一電極 區與該第二電極區分別藉由該第一焊料與該第二焊料黏著 於該第一凹槽與該第二凹槽中；以及一晶片，設置於該第 二基板上。 4 201240169 該第一基板為一印刷電路板。該第一凹槽與該第二凹 槽之底部大於其開口。 本發明半導體元件更包括一材料層，形成於該第一基 板上。該材料層形成於該第一基板未包括該第一凹槽與該 第二凹槽之區域上。該材料層與該第二基板接觸。該材料 層包括有機物、無機物或其混合物。該有機物包括聚乙烯 0比σ各烧酮（polyvinylpyrrolidone, PVP)或環氧樹脂。該無機 物包括氮化鋁或氧化鋁。 本發明半導體元件更包括一第一焊墊與一第二焊墊， 分別形成於該第一凹槽與該第二凹槽之底部。該第二基板 之該第一電極區與該第二電極區分別藉由該第一焊料與該 第二焊料黏著於該第一焊墊與該第二焊墊上。 該晶片為'一發光二極體。 本發明半導體元件更包括一封裝材料，覆蓋該材料 層、該弟二基板與該晶片。 本發明在焊板（第一基板）上設計出一凹槽結構，可有效 改善焊料時因焊墊(pad)太過接近而造成焊料接觸短路的狀 況。此凹槽結構設計的上方可進一步塗上增強熱傳導的填 充物（材料層），除可提升元件熱傳導以提高元件效率外， 亦可加強防止焊料時因焊墊太過接近而造成焊料接觸短路 的狀況。 本發明之一實施例，提供一種半導體元件，包括：一 第一基板，包括一第一焊塾與一第二焊墊；一第一焊料與 一第二焊料，分別形成於該第一焊墊與該第二焊墊上；一 材料層，形成於該第一基板未形成該第一焊料與該第二焊 201240169 料之區域上；一第二基板，包括一第一電極區與一第二電 極區’該第一電極區與該第二電極區分別藉由該第一焊料 與該第二焊料黏著於該第一焊墊與該第二焊墊上；以及一 晶片’設置於該第二基板上。 該第一基板為一印刷電路板。 該材料層形成於該第一焊料與該第二焊料之間。該材 料層與§玄第二基板接觸。該材料層包括有機物、無機物或 其混合物。該有機物包括聚乙烯吡咯烷酮 (P〇lyvinylPyrr〇lid0ne，PVP)或環氧樹脂。該無機物包括氮 化紹或氧化铭。該無機物於該混合物中之重量百分比大於 50%。該材料層之黏度介於1〇,〇〇〇〜1〇〇,〇〇〇cps。該材料層 更包括一黏著劑。該材料層之厚度介於 該晶片為一發光二極體。 本發明半導體元件更包括—封裝材料，覆蓋該材料 層、該第二基板與該晶片。 本發明在非焊料區的厚度空間中填人―軟材質的散】 填充物（材料層）’可有效改善非焊料區導熱不良的問題 本發明散熱填充物為包含熱導性良好的無機物(例如：氮< 紹）與有機黏、结高分子(例如：聚乙稀料烧嗣(PVP))的混/ 體其CTE特I·生為文熱膨脹，外觀可為膏狀物(黏度介> 10,000〜100,000Cps)或者成型後為單 發明散熱填充物可以任—从挪上 m 0.5μπι〜Ι,ΟΟΟμιη之厚度塗於 ^化學塗佈方式以大、〗 面或雙面黏性體的方式粘黏於焊板上。极）飞者叮以- 6 201240169 為讓本發明之上述目的、特徵及優點能更明顯易懂， 下文特舉一較佳實施例，作詳細說明如下： 【實施方式】 首。月參閱第1圖’根據本發明之一實施例，說明— =體元件。-半導體元件1()包括—第—基板^、—第一 笛一甘/第一谇枓2〇、—第二基板24以及一晶片3〇。 土板12包括一第一凹槽14與一第二凹槽16。第 二：與20分別填入第一凹槽14與第二凹槽以 第—m 第—電極區26與一第二電極㈣。 片30 晶 -焊料2〇°^與第—電極區28分別藉由第—焊料18與第 20黏者於第-凹槽14與第二凹槽16中 设置於第二基板24上。 凹枰mi2可為一印刷電路板。第一凹槽14與第二 U槽16之底部可大於其開口。 U上半件1G可更包括—材料層22,形成於第-基核 與第:=622可形成於第一基板12未包括第-凹槽Η 觸二之區域上。材料層22可與第二基板24接 機物可包料^包t有機物、無機物或其混合物。上述有 環氧榭r上 _0】yvi咖roUd_，PVP)或 、曰4無機物可包括氮化銘或氧化紹。 半導體元件10可# &紅 34，分別开彡成认结更匕括一第—焊墊％與一第二焊墊 基板24之第—電極了M與第二凹槽16之底部。第二 垾料18與第-焊料6與第二電極區28可分別藉由第-、弟20黏著於第一焊㈣與第二焊塾％ 201240169 上。 晶片30可為一發光二極體。 半導體元件10可更包括一封裝财料36 ’覆蓋材料層 22、第二基板24與晶片30。 本發明在焊板（第一基板)上設計出一凹槽結構，可有效 改善焊料時因焊墊(pacj)太過接近而造成焊料接觸短路的狀 況。此凹槽結構設計的上方可進一夕塗上增強熱傳導的填 充物（材料層），除可提升元件熱傳導以提高元件效率外， 亦可加強防止焊料時因焊墊太過接近而造成焊料接觸短路 的狀況。 請參閱第2圖，根據本發明之一實施例，說明—種半 導體疋件。—半導體元件10包括一第一基板12、一第— 焊料18與一第二焊料20、一材料層22、一第二基板24以 及一晶片3〇。第一基板12包括一第一焊墊32與一第二焊 墊34。第一焊料18與第二焊料2〇分別形成於第一焊墊η 與第二焊墊34上。材料層22形成於第一基板12未形 一焊料18與第二焊料2〇之區域上。第二基板24包括— 一電極區26與—第二電極區28。第一電極區％與第二 極區28分別藉由第一焊料18與第二焊料汕黏著於押 塾=2與第二焊塾34上。晶片（ehip) 3()設置於第二基板μ 物、無機物或其混合物。上述有機物可包曰括聚乙 8 201240169 酮（polyvinylpyrrolidone，P VP)或環氣樹脂。上述無機物可 包括氮化铭或氧化銘。上述無機物於上述混合物中之重量 百分比可大於50% °材料層22之黏度大體介於 10,000〜100,000cps。材料層22可更包括一黏著劑。材料層 22之厚度大體介於〇.5μηι〜Ι,ΟΟΟμηι。 晶片30可為一發光二極體。 半導體元件10可更包括一封裝材料36，覆蓋材料層 22、第二基板24與晶片30。 本發明在非焊料區的厚度空間中填入一軟材質的散熱 填充物（材料層），可有效改善#焊料區導熱不良的問題。 本發明散熱填充物為包含熱導性良好的無機物（例如：氮化 鋁）與有機黏結高分子（例如：聚乙烯吡咯烷酮(PVP))的混合 體’其CTE特性為受熱膨脹’外觀可為膏狀物（黏度介於 10,000〜100,000cps)或者成型後為單面或雙面的黏性體。本 發明散熱填充物可以任一物理或化學塗佈方式以大約 〇.5μιη〜Ι,ΟΟΟμηι之厚度塗於焊板（第一基板）上’或者可以單 面或雙面黏性體的方式粘黏於焊板上。 雖然本發明已以較佳實施例揭露如上，然其並非用以 限定本發明，任何熟習此項技藝者，在不脫離本發明之精 神和範圍内，當可作更動與潤飾’因此本發明之保護範圍 當視後附之申請專利範圍所界定者為準。 201240169 【圖式簡單說明】 第1圖係根據本發明之一實施例，揭露一種半導體元 件。 第2圖係根據本發明之一實施例，揭露一種半導體元 件。 【主要元件符號說明】 10〜半導體元件； 12〜第一基板； 14〜第一凹槽； 16〜第二凹槽； 18〜第一焊料； 20〜第二焊料； 22〜材料層； 24〜第二基板； 2 6〜第 一電極區， 2 8〜第二電極區， 30〜晶片， 32〜第一焊墊； 34〜第二焊墊； 3 6〜封裝材料。201240169 VI. Description of the Invention: [Technical Field] The present invention relates to a semiconductor element, and more particularly to a semiconductor device which can effectively improve heat conduction of a component and avoid contact short-circuit of solder. [Prior Art] In the conventional SMT (surface mount technology) device structure, a solder layer having a specific thickness exists between the device and the solder plate, and the existence of the solder layer allows the non-solder region to conformally generate a thickness space. However, the thickness space created by this non-solder zone will severely impede the heat conduction of the component, resulting in a shortened component life. Similarly, the thickness of the non-solder region, during the soldering process, will cause solder pastes to easily contact each other due to softening flow, causing short-circuiting of the components. Therefore, it is important to develop a semiconductor device that enhances the heat conduction of the component and avoids solder contact short circuits. SUMMARY OF THE INVENTION An embodiment of the present invention provides a semiconductor device including: a first substrate including a first recess and a second recess; a first solder and a second solder are respectively filled in the a first recess and the second recess; a second substrate comprising a first electrode region and a second electrode region, wherein the first electrode region and the second electrode region are respectively a second solder is adhered to the first recess and the second recess; and a wafer is disposed on the second substrate. 4 201240169 The first substrate is a printed circuit board. The bottom of the first recess and the second recess are larger than the opening thereof. The semiconductor device of the present invention further includes a material layer formed on the first substrate. The material layer is formed on a region of the first substrate that does not include the first recess and the second recess. The layer of material is in contact with the second substrate. The material layer includes organic matter, inorganic matter or a mixture thereof. The organic material includes polyethylene 0 to polyvinylpyrrolidone (PVP) or epoxy resin. The inorganic substance includes aluminum nitride or aluminum oxide. The semiconductor device of the present invention further includes a first pad and a second pad formed at the bottom of the first groove and the second groove, respectively. The first electrode region and the second electrode region of the second substrate are adhered to the first pad and the second pad by the first solder and the second solder, respectively. The wafer is a 'light emitting diode. The semiconductor device of the present invention further includes an encapsulating material covering the material layer, the second substrate, and the wafer. The invention designs a groove structure on the soldering plate (the first substrate), which can effectively improve the condition that the solder contacts are short-circuited due to the solder pads being too close. The groove structure design can be further coated with a filler (material layer) for enhancing heat conduction. In addition to improving the heat conduction of the component to improve the component efficiency, the solder can be prevented from being short-circuited due to the solder pad being too close. situation. An embodiment of the present invention provides a semiconductor device including: a first substrate including a first pad and a second pad; a first solder and a second solder respectively formed on the first pad And a second material layer formed on the first substrate and not forming the first solder and the second solder 201240169; a second substrate comprising a first electrode region and a second electrode The first electrode region and the second electrode region are adhered to the first pad and the second pad by the first solder and the second solder, respectively; and a wafer is disposed on the second substrate . The first substrate is a printed circuit board. The material layer is formed between the first solder and the second solder. The material layer is in contact with the second substrate. The material layer includes organic matter, inorganic matter or a mixture thereof. The organic material includes polyvinylpyrrolidone (P〇lyvinylPyrr〇lid0ne, PVP) or an epoxy resin. The inorganic substance includes nitrogen or oxidized. The inorganic substance is present in the mixture in a weight percentage greater than 50%. The material layer has a viscosity of 1 〇, 〇〇〇~1〇〇, 〇〇〇cps. The material layer further includes an adhesive. The thickness of the material layer is between the wafer and a light emitting diode. The semiconductor device of the present invention further includes an encapsulating material covering the material layer, the second substrate, and the wafer. The invention fills in the thickness space of the non-solder region, and the filler (material layer) can effectively improve the problem of poor thermal conductivity in the non-solder region. The heat dissipating filler of the present invention is an inorganic material containing good thermal conductivity (for example) : Nitrogen < 绍) and organic sticky, knot polymer (for example: Polyethylene (PVP)) mixed with CTE special I. Health is the text of thermal expansion, the appearance can be a paste (viscosity > 10,000~100,000Cps) or a single invention heat-dissipating filler after molding can be used - from the thickness of 0.5μπι~Ι, ΟΟΟμιη to the chemical coating method to stick to the large, sided or double-sided adhesive Stick to the soldering plate. In order to make the above objects, features and advantages of the present invention more apparent, the following detailed description of the preferred embodiments will be described as follows: Referring to Figure 1 'in accordance with an embodiment of the present invention, a body element is illustrated. The semiconductor element 1 () includes a first substrate, a first flute/first cymbal, a second substrate 24, and a wafer 3. The soil panel 12 includes a first recess 14 and a second recess 16. Second: and 20 are filled in the first groove 14 and the second groove, respectively, to the -m first electrode region 26 and a second electrode (four). The chip 30-solder and the first electrode region 28 are disposed on the second substrate 24 by the first solder 18 and the 20th adhesive in the first groove 14 and the second groove 16, respectively. The recessed mi2 can be a printed circuit board. The bottom of the first recess 14 and the second U-groove 16 may be larger than the opening thereof. The U upper half 1G may further include a material layer 22 formed on the first base nucleus and the first: 622 may be formed on a region of the first substrate 12 not including the first groove contact. The material layer 22 may be attached to the second substrate 24 to be packaged with organic, inorganic or a mixture thereof. The above-mentioned inorganic oxime on the epoxy 榭r _0]yvi coffee roUd_, PVP) or 曰4 may include nitriding or oxidation. The semiconductor device 10 can be opened and integrated to form a first pad-pad and a second pad substrate 24 to the bottom of the electrode M and the second recess 16. The second solder material 18 and the first solder 6 and the second electrode region 28 may be adhered to the first solder (four) and the second solder joint % 201240169 by the first and second electrodes, respectively. The wafer 30 can be a light emitting diode. The semiconductor component 10 can further include a package material 36' cover material layer 22, a second substrate 24 and a wafer 30. The invention designs a groove structure on the soldering plate (first substrate), which can effectively improve the condition that the solder contacts are short-circuited due to the pacj being too close to the solder. The groove structure design can be coated with a heat-enhancing filler (material layer), which can enhance the heat conduction of the component to improve the component efficiency, and can also strengthen the solder contact short circuit caused by the solder pad being too close. The situation. Referring to Figure 2, a semiconductor component is illustrated in accordance with an embodiment of the present invention. The semiconductor component 10 includes a first substrate 12, a first solder 18 and a second solder 20, a material layer 22, a second substrate 24, and a wafer 3. The first substrate 12 includes a first pad 32 and a second pad 34. The first solder 18 and the second solder 2 are formed on the first pad η and the second pad 34, respectively. The material layer 22 is formed on a region of the first substrate 12 where the solder 18 and the second solder 2 are not formed. The second substrate 24 includes an electrode region 26 and a second electrode region 28. The first electrode region % and the second electrode region 28 are adhered to the second solder bump 34 by the first solder 18 and the second solder bump, respectively. The ehip 3 () is disposed on the second substrate μ, the inorganic substance, or a mixture thereof. The above organic materials may include polyethylene 8 201240169 ketone (polyvinylpyrrolidone, P VP) or a ring gas resin. The above inorganic substances may include nitriding or oxidizing. The weight percentage of the above inorganic substance in the above mixture may be more than 50%. The viscosity of the material layer 22 is generally between 10,000 and 100,000 cps. Material layer 22 may further include an adhesive. The thickness of the material layer 22 is generally between 〇.5μηι~Ι, ΟΟΟμηι. The wafer 30 can be a light emitting diode. The semiconductor component 10 can further include a package material 36, a cover material layer 22, a second substrate 24, and a wafer 30. The invention fills a thickness space of the non-solder region with a heat-dissipating heat-dissipating filler (material layer), which can effectively improve the problem of poor thermal conductivity in the solder region. The heat-dissipating filler of the present invention is a mixture of an inorganic material (for example, aluminum nitride) and an organic binder polymer (for example, polyvinylpyrrolidone (PVP)) having good thermal conductivity, and its CTE property is thermally expanded. It has a viscosity (between 10,000 and 100,000 cps) or a single-sided or double-sided adhesive after molding. The heat-dissipating filler of the present invention can be applied to the soldering plate (first substrate) by any physical or chemical coating method at a thickness of about 55 μm Ι Ι Ι η ηηι or can be adhered by a single-sided or double-sided adhesive body. On the soldering plate. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the invention, and the present invention may be modified and retouched without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application attached. 201240169 [Simplified Description of the Drawings] Fig. 1 is a view showing a semiconductor element in accordance with an embodiment of the present invention. Fig. 2 is a view showing a semiconductor element in accordance with an embodiment of the present invention. [Main component symbol description] 10~Semiconductor component; 12~first substrate; 14~first recess; 16~second recess; 18~first solder; 20~second solder; 22~ material layer; The second substrate; 2 6 to the first electrode region, 2 8 to the second electrode region, 30 to the wafer, 32 to the first pad; 34 to the second pad; 3 to 6 to the encapsulating material.