TWM593659U - Packaging structure for directly exporting thermal energy of electronic components - Google Patents
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
提供一種直接導出電子元件熱能的封裝結構,主要包含絕緣層、電子元件與兩引出電極;電子元件是發熱元件或熱電分離元件,其中一引出電極與電子元件是以疊置方式組成一體且彼此構成電性連接,另一引出電極與疊接的引出電極及電子元件是相隔一適當間距,另一引出電極並透過電性連接方式與電子元件構成電性連接,絕緣層同時封裝固定電子元件及兩引出電極,該間距更可被絕緣層的填滿,兩引出電極的朝外的一面是外露於絕緣層,藉以構成使引接電極得以直接固定於外部散熱裝置上,而能實現以直接傳導方式散熱,而能有效提升散熱效率。To provide a packaging structure for directly exporting the heat energy of electronic components, which mainly includes an insulating layer, electronic components and two extraction electrodes; the electronic components are heating elements or thermoelectric separation elements, wherein one extraction electrode and the electronic component are integrated in a stacked manner and constitute each other Electrically connected, the other lead-out electrode is separated from the stacked lead-out electrode and the electronic component by an appropriate interval, the other lead-out electrode is electrically connected to the electronic component through an electrical connection, and the insulating layer simultaneously encapsulates and fixes the electronic component and the two The lead-out electrodes can be filled with an insulating layer, and the outward-facing surfaces of the two lead-out electrodes are exposed to the insulating layer, so that the lead-out electrodes can be directly fixed on the external heat dissipation device, and heat can be dissipated by direct conduction. , And can effectively improve the cooling efficiency.
Description
一種元件封裝結構,尤其是一種直接導出電子元件熱能的封裝結構,更具體而言,元件的熱能與電能藉由特殊製程與結構設計將其分流,而達到直接散熱與導電的封裝結構。並藉由絕緣材料將晶片與引接電極隔絕達到固定於絕緣效果。此封裝結構元件能能實現以直接傳導方式散熱,能有效提升散熱效率。 A component packaging structure, especially a packaging structure that directly derives the thermal energy of electronic components. More specifically, the thermal energy and electrical energy of the components are shunted by a special process and structural design to achieve a direct heat dissipation and conductive packaging structure. Moreover, the chip is isolated from the lead electrode by an insulating material to achieve an insulating effect. This package structure element can achieve heat dissipation by direct conduction, Can effectively improve the heat dissipation efficiency.
現有發熱及熱電分離元件封裝結構大部分使用金屬基板或是陶瓷基板進行晶片或元件封裝,金屬基板需要加上一絕緣層隔絕電路與散熱基板,會造成熱阻變大。 Most of the existing heat-generating and thermoelectric separation element packaging structures use metal substrates or ceramic substrates for chip or component packaging. The metal substrate needs to be added with an insulating layer to isolate the circuit from the heat-dissipating substrate, which will cause a large thermal resistance.
參閱圖1,圖1為習知技術的熱電分離元件封裝結構的示意圖。如圖1所示,習知技術的熱電分離元件封裝結構由下而上依序包含金屬層1a、絕緣層2a與發熱及熱電分離元件如晶片3a,晶片3a頂面與底面的正負極並被引接至兩外部電極5a、5b,兩外部電極5a、5b是設置於絕緣層2b之上並相隔一距離,透過絕緣層2b的設置,以使兩外部電極5a、5b不會短路。
Referring to FIG. 1, FIG. 1 is a schematic diagram of a package structure of a thermoelectric separation device of the conventional technology. As shown in FIG. 1, the conventional thermoelectric separation element package structure includes a metal layer 1a, an
然而,因絕緣層2b是設置於金屬層1a與晶片3a之間,當晶片3a工作時,晶片3a所產生的熱能必須經過絕緣2a而傳導至金屬層1a,然而,絕緣層2b的導熱效果不比於金屬材質,而為了提高絕緣層的導熱效果,雖然可以使用氧化鋁、氮化鋁及類鑽膜(DLC)等導熱效果佳的材料作為絕緣層,但此類材料的成
本也相當高;此外,此類材料雖然導熱性較佳但仍屬於絕緣材料,與使用金屬材質的外部電極在材料特性仍有不同,因此以兩種異質材料結合成的結構與材料特性,其可靠性仍嫌不足,因此需要一種能降低材料成本且透過排除元件熱阻提散熱能力的熱電分離元件封裝結構。
However, since the insulating layer 2b is disposed between the metal layer 1a and the
此外,現有技術中也會把多個發熱元件(如積體電路)與熱電分離元件等多個電子元件同時電性連接於電路板上,電路板的表面也會上絕緣層如防焊綠漆,如此會造成的問題就正如同前段所述,也就是熱能累積於電路板,蓄積於電路板的熱能又影響電子元件,最後造成電子元件過熱而影響其工作性能。 In addition, in the prior art, multiple heating elements (such as integrated circuits) and multiple electronic components such as thermoelectric separation elements are also electrically connected to the circuit board at the same time, and the surface of the circuit board is also coated with an insulating layer such as solder mask green paint This will cause the problem just as mentioned in the previous paragraph, that is, the heat energy accumulated in the circuit board, the heat energy accumulated in the circuit board affects the electronic component, and finally causes the electronic component to overheat and affect its performance.
提供一種直接導出電子元件熱能的封裝結構,利用特殊製程與結構設計將其熱能與電能分流,而達到直接導熱的封裝結構。 A packaging structure that directly derives the heat energy of electronic components is provided, and a special manufacturing process and structural design are used to shunt its thermal energy and electrical energy to achieve a directly thermally conductive packaging structure.
藉由絕緣材料將電子元件與引接電極分開隔絕並且固定;絕緣層中的其中一部分作為能阻隔第一電極層與第二電極層的障壁,藉此熱電分離的元件封裝結構能不透過絕緣層而直接或間接固定於散熱裝置上,以使電子元件的熱能能能直接傳導或即時傳導於散熱裝置上,因此減去電子元件與散熱裝置之間額外的熱阻,藉以達成能降低材料成本及提升封裝元件可靠度之發熱及熱電分離元件封裝結構。 The electronic components are separated from the lead electrodes by insulating materials and fixed; part of the insulating layer serves as a barrier that can block the first electrode layer and the second electrode layer, whereby the thermoelectrically separated device packaging structure can not penetrate the insulating layer It is directly or indirectly fixed on the heat dissipation device, so that the thermal energy of the electronic component can be directly or instantaneously conducted on the heat dissipation device, so the additional thermal resistance between the electronic component and the heat dissipation device is subtracted, so as to achieve the reduction of material cost and improvement Package element reliability heat generation and thermoelectric separation element package structure.
為達上述目的,提出的示範性的技術手段包含:一絕緣層、一電子元件與兩引出電極(P極及N極),該電子元件可以是發熱元件或熱電分離元件;該電子元件疊接於一引出電極之上並構成電性連接,該電子元件所產生的熱能直接傳導於該引出電極,另一引出電極與該引出電極與該電子元件是相隔一間距並透過一電性連接方式與該晶片構成電性連接,該絕緣層同時固定該電子元件及該 兩引出電極,且該兩引出電極的朝外的一面及該熱電分離元件之產生的熱能的一側是不受到該絕緣層的覆蓋。 To achieve the above purpose, the exemplary technical methods proposed include: an insulating layer, an electronic component and two extraction electrodes (P and N electrodes), the electronic component may be a heating element or a thermoelectric separation element; the electronic components are stacked Is formed on an extraction electrode and forms an electrical connection. The thermal energy generated by the electronic component is directly conducted to the extraction electrode. The other extraction electrode and the extraction electrode are separated from the electronic component by a distance and are electrically connected to The chip constitutes an electrical connection, and the insulating layer simultaneously fixes the electronic component and the Two lead-out electrodes, and the outward-facing side of the two lead-out electrodes and the side of the thermal energy generated by the thermoelectric separation element are not covered by the insulating layer.
一實施例中,該間距更可被絕緣層的一部份佔滿,而作為阻隔第一電極層與第二電極層的障壁。 In one embodiment, the gap can be filled by a portion of the insulating layer, and serves as a barrier to the first electrode layer and the second electrode layer.
在一實施例中,該引出電極為至少單層結構,該引出電極與該發熱或熱電分離元件藉由焊接或其他黏著方式固定於引出電極線路上。 In one embodiment, the extraction electrode has at least a single-layer structure, and the extraction electrode and the heat-generating or thermoelectric separation element are fixed on the extraction electrode circuit by welding or other adhesive methods.
在一實施例中,該兩引出電極之未受到該絕緣層覆蓋的一面是共平面,如此方便與外部的散熱裝置黏著貼合。 In one embodiment, the sides of the two lead-out electrodes that are not covered by the insulating layer are coplanar, which is convenient for adhesion and bonding with external heat dissipation devices.
在一實施例中,該電性連接方式是打線接合,或者,藉導電金屬(塊)的堆疊方式而使晶片與引接電極構成電性連接,該等導電件藉由焊接或黏著方式而連接固定。 In one embodiment, the electrical connection method is wire bonding, or the chip and the lead electrode are electrically connected by a stacking method of conductive metals (blocks), and the conductive members are connected and fixed by welding or adhesion .
在一較佳實施例中,更包含相對於該另一引出電極的一導電墊,該導電墊是設置於該等導電件之上,且該導電墊之朝外的一側不受到絕緣層的覆蓋,該引出電極之上更設置一導電柱,該導電柱與該熱電分離元件相隔一距離,該導電柱的底端固定及電性連接於該引出電極,該導電柱的頂端則至少不受該絕緣層的覆蓋,藉此,在絕緣層的兩面上都能外露出引出電極的一部分,而方便與外部電路或元件連接。 In a preferred embodiment, it further includes a conductive pad relative to the other lead-out electrode, the conductive pad is disposed on the conductive members, and the outer side of the conductive pad is not affected by the insulating layer Covered, a conductive post is further provided on the lead-out electrode, the conductive post is separated from the thermoelectric separation element by a distance, the bottom end of the conductive post is fixed and electrically connected to the lead-out electrode, and the top end of the conductive post is at least free from The covering of the insulating layer thereby exposes a part of the extraction electrode on both sides of the insulating layer, thereby facilitating connection with external circuits or components.
1:太陽能晶片 1: Solar chip
2:絕緣導熱板 2: Insulation and heat conduction board
11:N型電極 11: N-type electrode
13:P型電極 13: P-type electrode
31:第一電極層 31: First electrode layer
33:焊接黏著層 33: Welding adhesive layer
41:第二電極層 41: Second electrode layer
5:絕緣層 5: Insulation
61、63、65:導電件 61, 63, 65: conductive parts
67:導電柱 67: Conductive column
7:線路板 7: circuit board
71、73:外接電極 71, 73: external electrode
75:電子元件 75: Electronic components
8:散熱裝置 8: Heat sink
1a:金屬層 1a: metal layer
2a:絕緣層 2a: Insulation
3a:晶片 3a: chip
5a、5b:外部電極 5a, 5b: external electrode
圖1為習知技術的熱電分離元件封裝結構的示意圖。 FIG. 1 is a schematic diagram of a package structure of a thermoelectric separation device of the conventional technology.
圖2為顯示依據被描述的實施例的封裝太陽能晶片的示意圖。 FIG. 2 is a schematic diagram showing a packaged solar wafer according to the described embodiment.
圖3為顯示依據被描述的實施例之導電件的示意圖。 FIG. 3 is a schematic diagram showing a conductive member according to the described embodiment.
圖4為顯示依據被描述的實施例之兩電極分別位於絕緣層的兩側的示意圖。 FIG. 4 is a schematic diagram showing that two electrodes are located on both sides of an insulating layer according to the described embodiment.
圖5為顯示依據被描述的實施例的整合式封裝的示意圖。 5 is a schematic diagram showing an integrated package according to the described embodiment.
圖6為顯示依據圖5結構而更設置散熱裝置的示意圖。 FIG. 6 is a schematic diagram showing a heat dissipation device according to the structure of FIG. 5.
圖7為顯示依據被描述的另一實施例的整合式封裝的示意圖。 7 is a schematic diagram showing an integrated package according to another embodiment described.
圖8為顯示依據圖7結構而更設置散熱裝置的示意圖。 FIG. 8 is a schematic diagram showing that a heat dissipation device is further provided according to the structure of FIG. 7.
以下配合圖示及元件符號對本新型之實施方式做更詳細的說明,俾使熟習該項技藝者在研讀本說明書後能據以實施。 The following describes the embodiment of the present invention in more detail with the help of diagrams and component symbols, so that those skilled in the art can implement it after studying this manual.
提供的直接導出電子元件熱能的封裝結構包含絕緣層、電子元件與兩引出電極,其中電子元件是發熱元件或熱電分離元件。 The provided packaging structure for directly deriving the heat energy of the electronic component includes an insulating layer, an electronic component and two lead-out electrodes, wherein the electronic component is a heating element or a thermoelectric separation element.
其中一引出電極與電子元件是以疊置方式組成一體且彼此構成電性連接,另一引出電極與為疊接的引出電極及電子元件是相隔一適當間距,另一引出電極並透過電性連接方式與電子元件構成電性連接,絕緣層同時封裝固定晶片及兩引出電極,該間距更可被絕緣層的材料佔滿,兩引出電極的朝外的一面是外露於絕緣層。 One of the extraction electrodes and the electronic components are integrated in a stacked manner and form an electrical connection with each other. The other extraction electrode is separated from the overlapping extraction electrodes and the electronic components by an appropriate distance. The other extraction electrode is electrically connected It forms an electrical connection with the electronic component. The insulating layer encapsulates the fixed chip and the two lead-out electrodes at the same time. The gap can be more occupied by the material of the insulating layer. The outward-facing sides of the two lead-out electrodes are exposed to the insulating layer.
發熱元件是處理器、記憶體、控制元件或其他發熱元件;熱電分離元件是太陽能晶片(Solar cell)、二極體(Diode)、金屬氧化物半導體場效(MOSFET)絕緣柵雙極電晶體(IGBT)、發光二極體(LED)或其他熱電分離元件。 The heating element is a processor, memory, control element or other heating element; the thermoelectric separation element is a solar cell (Solar cell), diode (Diode), metal oxide semiconductor field effect (MOSFET) insulated gate bipolar transistor ( IGBT), light emitting diode (LED) or other thermoelectric separation elements.
參閱圖2,圖2為顯示依據被描述的實施例的封裝太陽能晶片的示意圖。如圖2的實施例所示,電子元件是以太陽能晶片1作為說明用的示例,太陽能晶片1的頂面與底面分別具有N型電極11與P型電極13;若太陽能晶片1的底面
是太陽能晶片1工作時的主要發熱面,第一電極層31(引出電極)可以透過焊接黏著層33而與太陽能晶片1的P型電極13構成電性連接;引出電極可以是如圖2所示的單層結構的第一電極層31;換言之,第一電極層31是片狀體、板狀體或塊狀體的形式的單層結構。
Referring to FIG. 2, FIG. 2 is a schematic diagram showing a packaged solar chip according to the described embodiment. As shown in the embodiment of FIG. 2, the electronic component uses the
較佳的,第一電極層31與太陽能晶片1是面對面接觸,以透過足夠散熱面積來散熱;要特別注意的是,在太陽能晶片1的主要發熱面的P型電極13與第一電極層31之間不具有介電層,而是彼此之間能透過整面焊接構成電性連接或透過整面黏著而構成電性連接,也就是第一電極層31與太陽能晶片1之間能直接或間接方式而連接固定,藉此使太陽能晶片所產生的熱能就直接傳導至第一電極層。
Preferably, the
接合而成的太陽能晶片1與第一電極層31需和第二電極層41之間需相距有一間隔,而第二電極層41與太陽能晶片1頂面的N型電極11是透過打線接合的電性連接方式而構成電性連接。
The
上述的太陽能晶片1與第一電極層31與第二電極層41皆被絕緣層5封裝成一體,第一電極層31與第二電極層41之間的間隔也被絕緣層5佔滿,而使第一電極層31與第二電極層41之間具有絕緣層障壁而避免短路,且第一電極層31與第二電極層41的相同側的一面都不會被絕緣層5覆蓋而得以外露於絕緣層5之外;較佳的,第一電極層31與第二電極層41的相同側的一面是共平面,且更與絕緣層同一平面,以利後續與散熱裝置穩定接合。
The above-mentioned
上述實施例所顯示封裝結構的特點之一在於是以絕緣層5作為同時固定太陽能晶片1、第一電極層31與第二電極層41的結構層,在第一實施例中,太陽能晶片中除了太陽能晶片的主要散熱側,太陽能晶片的其他部分皆被絕緣層
包覆,但不限於此,若絕緣層未覆蓋到太陽能晶片的頂面但還是能把熱電分離元件予以固定,也是本新型所欲保護的做法之一。
One of the characteristics of the packaging structure shown in the above embodiment is that the insulating
絕緣層除了封裝效果,還以絕緣層的一部分作為阻隔第一電極層與第二電極層的障壁,也就是第一電極層與第二電極層之除了第一電極層與第二電極層的露出面以外,第一電極層與第二電極層的其他部分皆被絕緣層包覆固定。 In addition to the packaging effect, the insulating layer also uses a part of the insulating layer as a barrier to block the first electrode layer and the second electrode layer, that is, the first electrode layer and the second electrode layer except the first electrode layer and the second electrode layer are exposed Outside of the plane, the other parts of the first electrode layer and the second electrode layer are covered and fixed by the insulating layer.
本新型直接將太陽能晶片透過焊接黏著層固定於金屬電極層上,顯然的以相同系列材質的結合性通常會優於異質材料的結合性,因此本新型以第一(二)電極層結合於金屬散熱基座,就能有效排除電子元件的熱能並提高封裝結構的可靠性。 The new type directly fixes the solar chip on the metal electrode layer through the welding adhesive layer. Obviously, the bonding of the same series of materials is usually better than the bonding of the heterogeneous materials, so the new type uses the first (two) electrode layer to bond to the metal The heat dissipation base can effectively remove the heat energy of electronic components and improve the reliability of the packaging structure.
參閱圖3,圖3為顯示依據被描述的實施例之導電件的示意圖。第二實施例與第一實施例的設置原理基本上是相同,只是第二實施例提供不同於的第一實施例的電性連接方式,第一實施例是利用導線做打線接合,第二實施例則是透過一個或多個導電件使第二電極層41與太陽能晶片1的N型電極11構成電性連接。
Referring to FIG. 3, FIG. 3 is a schematic diagram showing a conductive member according to the described embodiment. The setting principle of the second embodiment is basically the same as that of the first embodiment, except that the second embodiment provides an electrical connection method different from that of the first embodiment. The first embodiment uses wire bonding for wire bonding, and the second embodiment For example, the
如果是使用多個導電件61、63,可以透過將多個導電件61、63堆疊於第二電極層41的方式而與太陽能晶片1的N型電極11構成電性連接,因此會有其中一個導電件61要與太陽能晶片1的N型電極11構成電性連接,另一導電件63則搭接於導電件61與N型電極11之間,但除了導電件61、63與晶片電極的連接處之外,多個導電件61、63要與太陽能晶片1(連同第一電極層)相隔一適當距離。
If multiple
具體而言,若使用如圖3所示之數量為二的導電件61、63,直接配置於第二電極層41上的導電件61需具有適當高度,藉此使導電件61與第二電極層41的總高度能與太陽能晶片等高,與太陽能晶片等高是較好的做法但不以此為限,也就是可以盡量接近等高,即使非等高,也能透過提供適合形狀的導電件61來完成搭接;而配置在導電件61上的導電件63則具有適當水平長度,以使導電件63的兩端能分別固定於太陽能晶片1與導電件61,導電件61、63之間透過焊接黏著層33而相互連接固定。
Specifically, if two
參閱圖4,圖4為顯示依據被描述的實施例之兩電極分別位於絕緣層的兩側的示意圖,在前述兩實施例中,太陽能晶片的兩電極都是同時引接到絕緣層的其中一面(在圖式中為底側),在第三實施例中,則更提供將太陽能晶片的兩電極引接於絕緣層之的兩面上。 Referring to FIG. 4, FIG. 4 is a schematic diagram showing that the two electrodes are located on both sides of the insulating layer according to the described embodiment. In the foregoing two embodiments, the two electrodes of the solar chip are simultaneously led to one side of the insulating layer ( (Bottom side in the figure), in the third embodiment, it is further provided to connect the two electrodes of the solar wafer to both sides of the insulating layer.
在第三實施例中,第二電極層41上除了堆疊導電件61、63之外,更設置有一導電件65,導電件65是設置於導電件63之上,導電件63、65的一部份是超出於絕緣層5的頂面,導電件63、65之間也藉由焊接黏著層而連接固定。
In the third embodiment, in addition to stacking
而第一電極層31之上更設置導電柱67,導電柱67與太陽能晶片1需相隔一距離,該距離可以由絕緣層的一部份佔滿,導電柱67的一端固定於第一電極層上,導電件67的另一端則至少不受該絕緣層的覆蓋,較佳的,導電件的頂側可以齊平,或超出於絕緣層的頂面;在第三實施例中,第一電極層31的面積會大於太陽能晶片,因此第一電極層31之超出於太陽能晶片1的部分能供導電柱67設置。
On the
上述的實施例雖然都是關於單一電子元件的封裝,但並不限於單一電子元件的封裝,並可利用電路板達成多顆電子元件的串並聯的電路佈局應用。 Although the above-mentioned embodiments are all related to the packaging of a single electronic component, it is not limited to the packaging of a single electronic component, and a circuit board can be used to achieve a series and parallel circuit layout application of multiple electronic components.
參閱圖5,圖5為顯示依據被描述的實施例的絕緣層封裝線路板的部分與元件直接導熱結構的示意圖。如圖5所示,直接導出電子元件熱能的封裝結構包含絕緣層5、元件直接導熱結構與線路板7,線路板7是鄰設於元件直接導熱結構;元件直接導熱結構的元件在本實施例中為熱電分離晶片。
Referring to FIG. 5, FIG. 5 is a schematic diagram showing a direct thermal conduction structure of parts and components of an insulating layer package circuit board according to the described embodiment. As shown in FIG. 5, the packaging structure that directly derives the heat energy of the electronic component includes the insulating
元件直接導熱結構如前述實施例中,也包含熱電分離晶片如太陽能晶片1與第一電極層、第二電極層31、33(兩引出電極),太陽能晶片1與第一電極層、第二電極層31、33之間的配置方式與前述實施例大致相同在此不予贅述;只是第二電極層33(另一引出電極)是設置於線路板7上,比如第二電極層33可以是線路板7上的導電墊、導電凸塊或接點等。
The direct heat conduction structure of the device is as in the previous embodiment, and also includes a thermoelectric separation wafer such as the
線路板7並具有兩外接電極71、73,外接電極71與第一電極層31之間藉由打線接合極/或其他電性連接方式而間接或直接構成電性連接;第二電極層33與第二電極層33藉由線路板7上本身的導線線路與外接電極73構成電性連接。
The
絕緣層5同時封裝固定太陽能晶片1、第一電極層31、第二電極層33與線路板7的部分,但絕緣層5不覆蓋線路板7的兩外接電極71、73、線路板7之遠離於絕緣層的一側及第一電極層31之遠離於絕緣層的一側。
The insulating
線路板7上也能設置功率小或不容易蓄熱的各式電子元件75。
Various
在一實施例中,元件直接導熱結構可以設置在線路板7的開口或缺口中;或者也可以設置兩個以上的兩線路板,此時兩線路板上各設置一外接電極。
In an embodiment, the direct heat conduction structure of the element may be provided in the opening or notch of the
如圖5所示,元件直接導熱結構更包含絕緣導熱板2,絕緣導熱板2設置於第一電極層31之下方,以將熱能散逸出去;此外,絕緣導熱板與該8線路板之未受到該絕緣層所覆蓋的一面為共平面。
As shown in FIG. 5, the direct heat conduction structure of the element further includes an insulating
參閱圖6,圖6為顯示依據圖5結構而更設置散熱裝置的示意圖,如圖6所示,圖6更提供散熱裝置8,散熱裝置8是貼設於絕緣導熱板2之遠離於絕緣層5的一面,或者散熱裝置8更貼設於線路板7之遠離於絕緣層5的一面。
6, FIG. 6 is a schematic diagram showing a heat dissipation device according to the structure of FIG. 5, as shown in FIG. 6, FIG. 6 further provides a
參閱圖7與圖8,圖7與圖8的結構分別與圖5與圖6大致相同,僅差別在於圖7與圖8的第一電極層31是直接貼設於散熱裝置8,也就是不需設置絕緣導熱板2;上述的散熱裝置8可以是散熱金屬板。
Referring to FIGS. 7 and 8, the structures of FIGS. 7 and 8 are respectively the same as those of FIGS. 5 and 6, except that the
除整合熱電分離元件與發熱元件外,亦可整合其他控制元件,並藉由電性連結達到智能功率整合模組的設計應用。 In addition to integrating the thermoelectric separation element and the heating element, other control elements can also be integrated, and the design and application of the intelligent power integration module can be achieved by electrical connection.
以上所述者僅為用以解釋本新型之較佳實施例,並非企圖據以對本新型做任何形式上之限制,是以,凡有在相同之新型精神下所作有關本新型之任何修飾或變更,皆仍應包括在本新型意圖保護之範疇。 The above is only for explaining the preferred embodiment of the present invention, and it is not an attempt to restrict the present invention in any form, so that any modifications or changes made to the novel under the same spirit of the novel , Should still be included in the scope of the protection of this new model.
1:晶片 1: chip
11:N型電極 11: N-type electrode
13:P型電極 13: P-type electrode
31:第一電極層 31: First electrode layer
33:焊接黏著層 33: Welding adhesive layer
41:第二電極層 41: Second electrode layer
5:絕緣層 5: Insulation
Claims (16)
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