201222764 六、發明說明： 【發明所屬之技術領域】 構及關::種模組積體電路(—献)封躲 電路封其有電性屏蔽功能之模組積體 【先前技術】 έ士人’科技的快速成長’使得各種產品紛紛朝向 技的剌’並且林斷地在辭發展#中。此外由 模==!，使:目前大多數的產品都是採用 “ 5又计。然而，在產品中整合多種不同 八=m然得以使產品的魏大幅增加，但是在現 :二產品小型化及精美外觀的f求之下，要如何設計出 ^產品體積小且多雜的產品，便是目前各行各業都在 極力研究的目標。 而在半導體製造方面，便是不斷地透過製程技術的渾 進以越來越高·階的技術來製造出體積較小的晶片或元件 '’以使細賴組廠商相對得崎計丨較小的功能模組， $而可以讓終端產品做為更有效的利用及搭配。而目前的 習知^技術來看，大部分的應用模組仍是以印刷電路板（pcB )環氧树脂（FR_4)基板或 BT(Bisma〗eimideTriazine)基 板等不同材質的基板來作為模組的主要载板，而所有晶片 、元件等零件再透過表面黏著技術（Surface M〇unted Technology，SMT)等打件方式來黏著於載板之表面。於是 載板純粹只是用以當載具而形成電路連接之用，其中的結 構也只是用以作為線路走線佈局的分層結構。 再者，隨著射頻通訊技術的發展，意謂著無線通訊元 4/19 201222764 件於電路設計上必須更嚴謹與效能 大都要求重量輕、體積小、古σ ‘，，、線、汛產口口 及高可靠麟特點，這些彳:、_位、低消耗功率 技術開發與市場成長。'^ 了射頻/微波積體電路之 屏蔽功能及品質要求相對產品中無線模組之電磁 干擾而影響到通訊品質。、頁付重要’以確保信號不會彼此 習知無線模組或盆他愛 必須依據所需應用而力:Γ二路模組，其 金屬蓋體設計。而電磁屏的結構’例如電磁屏蔽 你帝此外’上述習知電磁屏蔽金屬蓋體的另-缺點我干並 作電磁屏蔽之電子電路或裂置的大小=為需要 同大小、形狀、區塊二手 金屬蓋體的製作困難且=步適磁屏蔽 二=習知電磁屏蔽金屬蓋财產的經濟效益與^ 【發明内容】 ，其種模組積體電路封裝結構 本發明實施例在於提供一種模 的製作方法，其能夠產生電性屏蔽功能貝。"封裝結構 本發明實施破供-種时·屏蔽魏之模組積 5/19 201222764 =封裝賴，，:—基板單元、一電子單元、一 早疋 Μ裝單元、及—屏蔽單元。美 少一電路基板，其令電路基板具有至少一^地^具有至 單二有多個設置且電性連接於電路基板上之 "電路基板上之導電元= 具有-設置於電路基板上料蓋上述多個電子=早= 電兀件的—部分之封裝膠體，其中導電元件的第_ 導 被裸露。屏蔽單元具有一接 件的第一末端部 屬屏蔽層，其中金屬屏蔽,2=粗的外表面上之金 彼此電性接觸。 t7L件的第二末端部兩者 本發明實施例提供一錄1女 體電路封驗翻製作村Μ;力能之模組積 供至少一電路美枯=包括下列步驟：首先，提 仏，t路基板，其中電路基板具有至少 捉 ，者，將多個電子元件設置且電性連接於:妙 後’將至少-導電元件設置於電路 j上，…、' 的第一末端部電性連接於接地焊塾^接下來:^導電= 膠上，以覆蓋上述多個電子元件與導電元‘ ’緊接者’ _縣膠體及電路基板，以使 切割’以形成-被裸露的切割面於導電元件的第 上；最後，成形一金屬屏蔽層於封裳膠體的外表^上^ 述被裸露的切割面上0外表面上及上 二末端部兩者彼此電性接觸Γ金屬屏敝層與導電元件的第 本發明實_提供—種射紐麵功能之模 製:Γ，其包括下列步驟:首先，』 f路基板’其中電路基板具有至少-接地烊墊； 6/19 201222764 接著，將多個電子元件扭 後，將至少—導電元件ς置於電路基板上；然 的第-末端部電性連接於接地焊墊^來其中導電元件 膠體於電路基板上1覆蓋上述多個電子封裝 ;切割封裝膠體及電路基板，以使2 =與導電元件 部的側面被裸露；最後 μ电凡件的第二末蠕 外表面上及導電元件的第層於封裝膠體的 元r，部得金屬 結構及其製作方法發莫組積體電路縣 路基板上的導電元件乂電性連接且設置於電 Γ層電性連接於至少1 將二=== 件=得金屬屏蔽層自然能夠產生二201222764 VI. Description of the invention: [Technical field of invention] Structure and closure:: Model integrated circuit (-) Sealing circuit to seal its module with electrical shielding function [Prior Art] Gentleman 'The rapid growth of technology' has caused various products to face the shackles of technology and to break into the development of #. In addition, by modulo ==!, so: most of the current products are based on "5. In addition, the integration of a variety of different eight in the product can greatly increase the product's Wei, but now: two products miniaturization Under the demand of exquisite appearance, how to design a product with small size and many miscellaneous products is the goal that all walks of life are trying to study. In semiconductor manufacturing, it is constantly through process technology. Into the use of higher and higher technology to create smaller wafers or components '' so that the manufacturers can be compared to the smaller functional modules, and the end products can be made more Effective use and matching. At present, most of the application modules are still made of different materials such as printed circuit board (pcB) epoxy (FR_4) substrate or BT (Bisma eimideTriazine) substrate. The substrate serves as the main carrier of the module, and all the wafers, components and the like are adhered to the surface of the carrier through surface mount technology (SMT), so the carrier is purely used only. When In order to form a circuit connection, the structure is only used as a layered structure of the line layout. Furthermore, with the development of radio frequency communication technology, it means that the wireless communication element 4/19 201222764 is in circuit design. Must be more rigorous and efficient, requiring light weight, small size, ancient σ ',, line, 汛 口 mouth and high reliability Lin characteristics, these 彳:, _ position, low power consumption technology development and market growth. '^ The shielding function and quality requirements of the RF/microwave integrated circuit affect the communication quality relative to the electromagnetic interference of the wireless module in the product. The page payment is important to ensure that the signals do not know each other. The wireless module or the basin must be based on the required Application and force: Γ two-way module, its metal cover design. And the structure of the electromagnetic screen 'such as electromagnetic shielding your emperor in addition to the above-mentioned conventional electromagnetic shielding metal cover body's other shortcomings I dry and electromagnetic shielding electronic circuit Or the size of the crack = the need to make the same size, shape, block second-hand metal cover difficult to manufacture and = step magnetic shield 2 = the economic benefits of the electromagnetic shield metal cover property and ^ The present invention provides a method for fabricating a module, which is capable of generating an electrical shielding function. "Package structure of the present invention Product 5/19 201222764=Package La,::—Substrate unit, an electronic unit, an early armor unit, and a shielding unit. The US-A-Case circuit board has at least one circuit to have a single a plurality of conductive elements on the circuit substrate that are electrically connected to the circuit substrate. The packaged body has a portion of the plurality of electrons (early = electrical components) disposed on the circuit substrate. The _ guide of the component is exposed. The shielding unit has a first end portion of the shield of the shield, wherein the metal shield, 2 = the gold on the thick outer surface is in electrical contact with each other. The second end portion of the t7L member is provided in the embodiment of the present invention. The module of the power device is provided for at least one circuit. The following steps are included: first, tick, t a circuit substrate, wherein the circuit substrate has at least a catcher, and a plurality of electronic components are disposed and electrically connected: the first end portion of the at least the conductive component is disposed on the circuit j, and the first end portion is electrically connected to Grounding soldering ^ Next: ^ Conductive = glue on to cover the above-mentioned multiple electronic components and conductive elements ''immediate' _ county colloid and circuit substrate, so that cutting 'to form - exposed surface is conductive Finally, a metal shielding layer is formed on the outer surface of the sealing body, and the exposed surface of the bare cutting surface and the upper two end portions are electrically contacted with each other, and the metal screen layer and the conductive layer are electrically conductive. The first invention of the component provides a molding of the noodle function: Γ, which comprises the following steps: First, the “circuit substrate” in which the circuit substrate has at least a grounding pad; 6/19 201222764 After the electronic components are twisted, at least - conductive elements The first end portion is electrically connected to the grounding pad; wherein the conductive element colloid is covered on the circuit substrate 1 to cover the plurality of electronic packages; the encapsulating colloid and the circuit substrate are cut so that 2 = The side surface of the conductive component portion is exposed; the second final outer surface of the piezoelectric component and the first layer of the conductive component are encapsulated in the element r, and the metal structure and the manufacturing method thereof are generated. The conductive elements on the circuit substrate are electrically connected and disposed on the electrical layer to be electrically connected to at least 1 to be two === parts = the metal shielding layer can naturally generate two
夕個电子7G件的電性屏蔽功能。 I 為^更進-步瞭解本發明之特徵及 明之::r與附圖，然而所附圖式二 【實施;式】’來對本發明加以限制者。 〔第一實施例〕 請參閱圖卜圖1A至圖1H所示 第貫也例的製作流程立體示意圖，圖lB、圖id、圖 =1”示第—實_的製作流程剖面示意圖’且圖 ^第一貫施例完成品的立體示意圖，圖1H為第一. A元成。的nlj面示思圖。由上述圖中可知，本發明第 方匕例提供-種具有電性屏蔽功能之模組積體電路封裝 201222764 其至少包括下列幾個步驟(從步驟-。 步驟S100 :首先，g己人圓1 ο 1 a 供至少-電路基板f。，:;圖電二r 墊100。舉例來古兒，…十去叮於有兩個接地焊 1:具广預定圖案的電路(圖未示)及兩個接地輝i 田…、、，上述兩個接地焊墊100的界定並 本=明’軌至少-個或超過兩偏±的接地焊墊1〇2 可應用於本發明。 白 步驟SH)2 :接著，配合圖卜圖】A與圖ΐβ所示 | ^固電子元件20設置且電性連接於電路基板1〇上例 來說’上述多個電子元件2G可為電阻、電容、電感、呈】The electrical shielding function of the 7G electronic device. I further understands the features of the present invention and the following: r and the accompanying drawings, but the second embodiment of the present invention is limited to the invention. [First Embodiment] Please refer to the perspective view of the production flow of the first example shown in FIG. 1A to FIG. 1H, and FIG. 1B, id, and FIG. 1 show the cross-sectional view of the production process of the first-real_ ^The first embodiment of the finished product is a three-dimensional schematic view, and FIG. 1H is the first. A element of the Nlj surface. As can be seen from the above figure, the first example of the present invention provides an electrical shielding function. The module integrated circuit package 201222764 includes at least the following steps (from step - step S100: first, g own circle 1 ο 1 a for at least - circuit substrate f., :; Fig. 2 r pad 100. Come to Guer, ... go to the ground with two grounding welding 1: a circuit with a predetermined pattern (not shown) and two grounding glows...,, the definition of the above two grounding pads 100 and A ground pad 1 〇 2 of at least one or more than ± is applicable to the present invention. White step SH) 2: Next, as shown in Fig. A and Fig. | | ^ Solid electronic component 20 is set And electrically connected to the circuit board 1 例, for example, 'the plurality of electronic components 2G can be resistance, capacitance, inductance, and presentation】
Vfr的功能晶片、具有一預定功能的半導體晶片、 …寺寺ϋ上述對於多個電子元件2G的描述只 來舉例而已，其並非用以限定本發明，舉凡任何種類 式的電子元件20皆可應用於本發明。 一 步驟S104 ··然後，配合圖卜圖u與圖ΐβ所示 兩個導電元件30設置於電路基板10上，其中每一個導電· 兀件30的第-末端部3〇A電性連接於每一個接地焊塾刚 。舉例來說’由於接地焊塾刚設置於電路基板ι〇的上 表面，所以導電元件30的第一末端部胤的底面可與接. 地焊塾1⑻兩者彼此電性接觸。另外，每-個導電元件3〇 可為導電金屬或任何具導電性質的電子零件。當然，上述 兩個導電元件30的界定並非用以限定本發明，舉凡至少 一個或超過兩個以上的導電元件30皆可剌於本發明。 步驟S1〇6:然後，配合圖1、圖1C與圖1D所示，成 8/19 201222764 形—封裝膠體40於電路基板1〇上， — 元件20與每一個導電元件3〇。 设盍上述多個電子 步驟S108 :接下來，配合圖丨、圖压盥 著圖1D的Α·Α切割線，切割物體:反 10 ’以使得每—個導電元件3G被切割，以㈣ 土， 的切割面300,於每-個導電元件 1 —被裸路 :例來5兄，封跡體40具有兩個開口4⑻，每— 讀30的第二末端部遞被每—個開口 4〇〇The functional chip of Vfr, the semiconductor wafer having a predetermined function, the description of the plurality of electronic components 2G, which are described above, are merely examples, which are not intended to limit the present invention, and any type of electronic component 20 can be applied. In the present invention. Step S104 ··· Then, two conductive elements 30 are provided on the circuit substrate 10 in conjunction with the diagrams u and ΐβ, wherein the first end portion 3〇A of each of the conductive members 30 is electrically connected to each A grounded welder just. For example, since the grounding pad is just disposed on the upper surface of the circuit board ι, the bottom surface of the first end portion 导电 of the conductive member 30 can be electrically contacted with the ground pad 1 (8). In addition, each of the conductive elements 3 〇 may be a conductive metal or any electronic part having conductive properties. Of course, the definition of the above two conductive elements 30 is not intended to limit the invention, and at least one or more than two or more conductive elements 30 may be used in the present invention. Step S1〇6: Then, as shown in Fig. 1, Fig. 1C and Fig. 1D, 8/19 201222764 is formed—the encapsulant 40 is on the circuit substrate 1 — the element 20 and each of the conductive elements 3 . The plurality of electronic steps S108 are disposed: next, the Α·Α cutting line of FIG. 1D is pressed in conjunction with the drawing, and the object is cut: the reverse 10′ is such that each of the conductive elements 3G is cut to (4) soil, The cutting face 300 is exposed to each of the conductive elements 1 : for example, 5 brothers, the sealing body 40 has two openings 4 (8), and the second end portion of each of the readings 30 is handed over by each opening 4〇〇
導電元件3〇的第二末端部_的切割面·，與封 裝膠肢40的其中一表面401齊平。 步驟S110:最後，配合圖卜圖1G與圖m 形二金屬屏蔽層50於封裝膠體4G的外表面上及每一 稞露的切割面3GG，上’以使得金屬屏蔽層％與每—個導 ，7L件30的第二末端部3GB兩者彼此電性接觸。舉 說，金屬屏蔽層50可覆蓋每一個開口 4〇〇，且金屬屏蔽層 5〇覆蓋且電性接觸每一鱗電元件30白勺第二末端部^ 的切割面3GG，。此外，依據不同的設計需求，金屬屏蔽層 5〇可為一透過喷塗方式(spraying)而形成之導電噴塗層、二 透過濺鍍方式(sputtering)而形成之導電濺鍍層、—透曰過印 刷方式(printing)而形成之導電印刷層、—透過電鍍方式 (electroplating)而形成之導電電鑛層…等等。 因此’配合上述圖1G與圖1H所示，本發明第一實施 例提供一種具有電性屏蔽功能之模組積體電路封裝結構z ，其包括：一基板單元1、一電子單元2、—導電單元3 、一封裝單元4、及一屏蔽單元5。基板單元丨具有至少 電路基板10,其中電路基板10具有至少—接地焊塾ι〇〇( 9/19 201222764 第一實施例顯示兩個接地焊墊100為例子說明）。電子單元 2具有多個設置且雜連接於電路基板1()上 = 2〇。導電單元3具有至少—設置於電路基板1〇上 讀30(第-實施例顯示兩個導電元件3〇為例子說 中導電^件3G的第-末端部遍電性連接於接地焊塾⑽ 。封裝單7G 4具有-設置於電路基板1()上且覆蓋上述 =子猶20與導電元件3㈣—部分之封裝膠體4〇，其 fTC件30的第二末端部遞被裸露。屏蔽單元$且 t =麵裝膠體4G的外表面上之金屬屏蔽層％，其 中金屬屏敝層50與導雷开杜. 此電性接觸。、導電70件30的第二末端部兩者彼 面，§兄，接地焊墊1GG ^置於電路基板1G的上表 100兩Μ 3G的第—末端部3GA的底面與接地焊墊 t接觸，賴4()具有至少—開口· 導電3G的第二末端部遞被開口 4GG所裸露。 :末端部_的切割面，_膠體 ，且全屬n /1齊平，金屬屏蔽層50覆蓋開口400 端部蓋且=刪 屬屏蔽層50可為一^雷再者’依據不同的設計需求，金 印刷層、-導電電鍍:3層、一導電賴層、-導電 〔第一貫施例〕 請參閱圖2A鱼Hi 7R α 4 製作方法的流程圖且，其中圖2Α為第二實施例 剖面示意®，且@% Λ 顯^第二實施㈣製作流程 實施例完成品的剖面中Γ第三個圖(最下面的圖式)為第二 面不思圖。由上述圖中可知，本發明第 10/19 201222764 二實施例提供一種I古 裝結構z的製作方;，=了蔽功能之模組積體電路封 S200至步驟S2l〇)/ ，八至少包括下列幾個步驟(從步驟 步驟S200:首养，❿人门 示，提供至少-電路％二A與圖2B中的步驟㈧所 接地焊墊1〇〇。舉例來二反_ :中電路基板10具有兩個 面預先成妒-1* X特可於1絲板1G的上表 。當然Ϊ、“ 預定圖案的電路及兩個接地焊塾⑽ 明，舉凡至墊1〇0的界定並非用以限定本發 用於二:上的接地焊_皆可應 步驟S202 :接菩，两？八国μ 牛例來况，上4多個電子元件2G可為餘、電容 =有:，能的功能晶片、具有-預定功能的半導 r曰Γ，寺’上述對於多個電子元件2〇的描述只 丨而已，其並非用以限定本發明，舉凡任何種類 或里式的電子凡件20皆可應用於本發明。 、 一步驟S204 :然後，配合圖2A與圖2β中的步驟 不/將兩個導電S件3G設置於電路基板1()上，其中每一 個導電it件3G的第-末端部3〇A電性連接於每一個接地 焊墊100。舉例來說，由於接地焊墊1〇〇設置於電路基板 1〇的上表面，所以導電元件30的第一末端部3〇八的$面 可與接地焊墊1〇〇兩者彼此電性接觸。另外，每一個導電 元件30可為導電金屬或任何具導電性質的電子零件。當 然，上述兩個導電元件30.的界定並非用以限定本發明: 舉凡至少一個或超過兩個以上的導電元件3〇皆可^用於 11/19 201222764 本發明。 _ ^驟S2〇6:然後，配合圖2A與圖2B中的 二成形—封裝膠體4G於電路基㈣上，心步風⑼所 個電子元件20與每一個導電元件3〇。 後盍上述多 一步驟S208:然後，配合圖从與圖跎 不，沿者圖2B中的步驟(B)的a_a 、^驟忙)所 4〇及電路基板1〇，以使彳σ、，’ ，刀割封裝膠體 部·的側面30。二母：電元件30的第二末端 兩個開口鲁每-個導電元件％的第二末端體=具有 一個開口 _所裸露，且每-個導電元件30 °的第= 部30B的側面與封裝膠體則其中—表面= // + 取後，配合圖2A與圖2B中步驟(D)所开 ’成形-金屬屏蔽層50於封裝膠體4〇的外表面上 個導電元件30的第二末端部30B的側面300上，以： 金屬屏蔽層50與每-個導電元件3〇的第二末端部遍^ 者彼此電性接觸。舉例來說，金屬屏蔽層％可覆蓋每一 個開口彻，且金屬屏蔽層％覆蓋且電性接觸每—個導灣 元件30的第二末端部30B的側面3〇〇。此外，依據不同以 設計需求’金屬屏蔽層5〇可為一透過喷塗方式(spraying) 而升> 成之V電喷塗層、一透過錢鑛方式(Sputtering)而形成 之導電濺鍍層、一透過印刷方式(printing)而形成之導電印 刷層、一透過電鍍方式(electroplating)而形成之導電電鍍層 …等等。 因此’如同上述圖2B中步驟(D)所示，本發明第二實 施例提供一種具有電性屏蔽功能之模組積體電路封裝結 12/19 201222764 構2，其包括：-基板單元卜 3、—封裝單元4、及—屏蔽單元5。導電單元 :電路基板]〇’其中電路基板1Q且有有至少 第②例顯:兩個接地焊㈣。為 ^ = 接於電路基板W 乂 元件30(第一杏咖曰g > 一設置於電路基板10上之導電 中導電元㈣的第—末:件3G為例子說明），其 。封裝單元4且有―Γ 1性連接於接地焊墊1〇〇 個電子元件電路基板…上域蓋上述多 7L件20/、導電元件3 中導電元件30的第二末端邻撤、二，^ 40，其 有-坡覆娜顧4Ϊ:==μ、_元5具 +金屬屏蔽層50舆導電元件^屏敝層5〇，其 此電性接觸。 "凡件30的弟二末端部3犯兩者彼 面，’接地轉⑽設置於電路基板1G的上表 ® ’且導電元件30的笛 J工衣 ⑽兩者彼此電性接Γ 30Α的底面與接地焊塾 ，且塞接觸。封裝膠體40具有至少一開口 400 導電-杜凡件30的第二末端部3〇Β被開口 400所裸露。 的1二Γ的第二末端部3〇Β的側面300與封裝膠體40 入屈戸„表面4〇1+齊平，麵屏蔽層5〇覆蓋開口 400，且 H層％覆蓋且電性接觸導電元件3G的第二末端部 # 50、可Γ 3〇0。再者’依據不同的設計需求，金屬屏蔽 曰50可為一導電喷塗 道士 c w成 、一導電電鑛層...料。W祕層、—導電印刷層 ^換i之’本發明第二實施例與第一實施例最大的差別 ;·第二實施例中’每-個導電元件30被設計成剛 13/19 201222764 好的尺寸大小，因— 切割步驟，即可被雇Z固導電70件30不需要額外進行 路封裝結構z内。、⑤具有電屏蔽功m组積體電 〔實施例的可能功致〕 综上所述’本發 路基板上的導電元件，、透過至夕―電性連接且設置於電 屏蔽層電性連接於至小=由任何成形方式製成的金屬 的接地焊墊，進而使得 、免土板上 多個雷πα 金屬屏敝層自然能夠產生用於保護 夕個電子7G件的電性屏蔽功能。 更 以上賴僅為本㈣之難可行實闕，非因此偈限 本發明之專利範圍，故舉凡運財發明·書及圖式内容 所為之等效技術變化，均包含於本發明之範圍内。 【圖式簡單說明】 圖1為本發明具有電性屏蔽功能之模組積體電路封褒結構 的製作方法的第一實施例之流程圖； 圖1Α顯示圖丨中步驟S100至步驟$1〇4的製作流程立體 示意圖； 圖1B為圖]a中的1B-1B剖面示意圖； 圖1C顯示圖！中步驟Sl〇6的製作流程立體示意圖； 圖1D為圖ic中的1D-1D剖面示意圖； 圖1E顯示圖1中步驟S108的製作流程立體示意圖； 圖1F為圖1E中的1F-1F剖面示意圖； 圖1G顯示圖1中步驟si10的製作流程立體示意圖； 圖1H為圖1G中的1H-1H剖面示意圖； 圖2 A為本發明具有電性屏蔽功能之模組積體電路封裝結 構的製作方法的第二實施例之流程圖；以及 14/19 201222764 圖2B為本發明具有電性屏蔽功能之模組積體電路封裝結 構的製作方法的第二實施例之製作流程剖面示意 圖。 【主要元件符號說明】The cut surface of the second end portion of the conductive member 3A is flush with one of the surfaces 401 of the package rubber body 40. Step S110: Finally, in conjunction with the FIG. 1G and the m-shaped metal shield layer 50 on the outer surface of the encapsulant 4G and each of the exposed cut surfaces 3GG, the metal shield layer is provided with a per-conductor The second end portion 3GB of the 7L member 30 is in electrical contact with each other. It is to be noted that the metal shield layer 50 covers each of the openings 4, and the metal shield layer 5 covers and electrically contacts the cut surface 3GG of the second end portion of each of the scale electrical components 30. In addition, according to different design requirements, the metal shielding layer 5 can be a conductive spraying layer formed by spray coating, a conductive sputtering layer formed by sputtering, and through printing. A conductive printed layer formed by printing, a conductive electric ore layer formed by electroplating, and the like. Therefore, in conjunction with the above-mentioned FIG. 1G and FIG. 1H, the first embodiment of the present invention provides a module integrated circuit package structure z having an electrical shielding function, which includes: a substrate unit 1, an electronic unit 2, and a conductive The unit 3, a package unit 4, and a shielding unit 5. The substrate unit 丨 has at least a circuit substrate 10, wherein the circuit substrate 10 has at least a grounding pad (9/19 201222764. The first embodiment shows two ground pads 100 as an example). The electronic unit 2 has a plurality of settings and is hetero-connected to the circuit substrate 1 () = 2 〇. The conductive unit 3 has at least a read 30 disposed on the circuit substrate 1 (the first embodiment shows two conductive elements 3 〇 as an example, the first end portion of the conductive member 3G is electrically connected to the ground pad (10). The package sheet 7G 4 has a package colloid 4 disposed on the circuit substrate 1 ( ) and covering the above-mentioned sub-subsequent 20 and the conductive member 3 (four), and the second end portion of the fTC member 30 is exposed. The shielding unit is t = % of the metal shielding layer on the outer surface of the surface mount colloid 4G, wherein the metal screen layer 50 is in contact with the thunder. The second end of the conductive 70 piece 30 is on the other side, § brother The ground pad 1GG ^ is placed on the bottom surface of the upper surface of the circuit board 1G. The bottom surface of the first end portion 3GA of the 3G is in contact with the ground pad t, and the bottom 4 () has at least the second end portion of the opening and the conductive 3G. Exposed by the opening 4GG. : The cutting surface of the end part _, the colloid, and all of them are n / 1 flush, the metal shielding layer 50 covers the opening end of the opening 400 and the Shielding layer 50 can be a 'According to different design requirements, gold printing layer, - conductive plating: 3 layers, a conductive layer, - conductive [first embodiment] Please refer to FIG. 2A for a flow chart of the method for manufacturing the fish Hi 7R α 4 , wherein FIG. 2A is a schematic cross-sectional view of the second embodiment, and @% Λ 显 ^^^^^^^^^^^^^^^^^^^^^^^^^ The figure (the lowermost drawing) is the second aspect. As can be seen from the above figure, the second embodiment of the present invention 10/19 201222764 provides a method for fabricating the I ancient structure z; The integrated circuit block S200 to the step S2l 〇) / , at least includes the following steps (from step S200: first raising, the door is shown, providing at least - circuit % A A and step (8) in Figure 2B are grounded The solder pad is 1 〇〇. For example, the circuit board 10 has two faces which are pre-formed to be 妒-1* X. The upper table of the 1 wire plate 1G. Of course, the circuit of the predetermined pattern and the two grounds Soldering 塾 (10) Ming, the definition of the mat to the pad 1 〇 0 is not used to limit the grounding of the second: the grounding welding _ can be in step S202: picking up the bodhisattva, two? eight countries μ cattle case, more than 4 The electronic component 2G can be a capacitor, a capacitor = a function chip, a semi-conductor with a predetermined function, and a temple The description of the electronic component 2 is only for the purpose of limiting the invention, and any electronic component 20 of any kind or of the formula can be applied to the present invention. A step S204: then, in conjunction with FIG. 2A and FIG. The step of disposing/disposing the two conductive members 3G on the circuit substrate 1 (), wherein the first end portion 3A of each of the conductive members 3G is electrically connected to each of the ground pads 100. For example, Since the ground pad 1 is disposed on the upper surface of the circuit substrate 1 , the first end portion of the conductive member 30 can be electrically contacted with the ground pad 1 . Additionally, each of the electrically conductive elements 30 can be a conductive metal or any electronic component having electrically conductive properties. Of course, the definition of the above two conductive elements 30. is not intended to limit the invention: Any one or more than two or more conductive elements 3 can be used in the present invention 11/19 201222764. Then, S2〇6: Then, with the two forming-packaging colloids 4G in Figs. 2A and 2B on the circuit base (4), the electronic components 20 of the step (9) and each of the conductive elements 3〇. Then, the above step S208 is further performed: then, in conjunction with the figure, the a_a and the step (B) of the step (B) in FIG. 2B are followed by the circuit board 1〇, so that 彳σ, ', the side 30 of the encapsulating gel body part is cut. Two mothers: the second end of the electrical component 30, the two openings, the second end body of each of the conductive elements, the side of the first portion 30B having an opening _ exposed, and each of the conductive elements 30° The colloid is then - surface = // + after taking the second end of the conductive element 30 on the outer surface of the encapsulant 4A with the 'forming-metal shield 50' opened in step (D) of Figures 2A and 2B. On the side 300 of the 30B, the metal shield layer 50 and the second end portion of each of the conductive elements 3A are electrically in contact with each other. For example, the metal shield layer % can cover each opening, and the metal shield layer covers and electrically contacts the side surface 3 of the second end portion 30B of each of the bay members 30. In addition, depending on the design requirements, the metal shield layer 5 can be a spray coating, a V-electrospray layer, a conductive sputter layer formed by a sputtering method, A conductive printed layer formed by printing, a conductive plating formed by electroplating, and the like. Therefore, as shown in the above step (D) of FIG. 2B, the second embodiment of the present invention provides a module integrated circuit package junction 12/19 201222764 having an electrical shielding function, which includes: - a substrate unit - packaging unit 4, and - shielding unit 5. Conductive unit: The circuit board 〇' where the circuit board 1Q has at least a second example: two grounding welds (four). ^ = is connected to the circuit substrate W 乂 element 30 (first apricot coffee g > a conductive intermediate conductive element (four) provided on the circuit substrate 10 - the last: 3G as an example). The package unit 4 has a Γ1 connection to the ground pad 1 电子 an electronic component circuit substrate... The upper cover covers the above 7L pieces 20/, and the second end of the conductive element 30 in the conductive element 3 is contiguous, two, ^ 40, which has - Po Fen Na Gu 4 Ϊ: = = μ, _ yuan 5 + metal shield 50 舆 conductive elements ^ screen layer 5 〇, this electrical contact. "The second end of the 30th member of the member 30 commits the two sides, 'the grounding rotation (10) is set on the upper surface of the circuit board 1G®' and the two sides of the conductive element 30 are electrically connected to each other. The bottom surface is grounded and the plug is in contact. The encapsulant 40 has at least one opening 400. The second end portion 3 of the conductive member 30 is exposed by the opening 400. The side surface 300 of the second end portion 3 of the 1 Γ is flush with the encapsulant 40, the surface shield layer 5 〇 covers the opening 400, and the H layer covers and electrically contacts the conductive element. The second end part of the 3G is #50, which can be 〇3〇0. Furthermore, according to different design requirements, the metal shield 曰50 can be a conductive coating priest cw, a conductive electric ore layer. The layer, the conductive printed layer is the largest difference between the second embodiment of the present invention and the first embodiment; in the second embodiment, each of the conductive elements 30 is designed to have a size of just 13/19 201222764. Size, because - cutting step, you can be hired Z solid conductive 70 pieces 30 do not need to carry out additional road package structure z., 5 has electrical shielding work m assembly body electricity [possible work of the embodiment] 'The conductive element on the substrate of the transmission path is electrically connected to the electric shielding layer and is electrically connected to the grounding pad of the metal made of any forming method, thereby making the soil-free board The upper πα metal screen layer can naturally generate electrical properties for protecting the 7G pieces of the electronic Further, the above is only the difficulty of this (4), and therefore does not limit the scope of the patent of the present invention. Therefore, the equivalent technical changes of the inventions and the contents of the drawings are included in the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a flow chart of a first embodiment of a method for fabricating a module integrated circuit sealing structure having an electrical shielding function according to the present invention; FIG. 1A shows a step S100 to a step in the drawing. Fig. 1B is a schematic cross-sectional view of the 1B-1B in Fig. 1a; Fig. 1C is a schematic view showing the manufacturing process of the step S1〇6 in Fig. 1; Fig. 1D is a 1D-1D cross section in Fig. 1E is a schematic perspective view of the manufacturing process of step S108 of FIG. 1; FIG. 1F is a schematic cross-sectional view of the process of step 1 of FIG. 1; FIG. 1G is a schematic view of the process of step si10 of FIG. 1H-1H cross-sectional view; FIG. 2A is a flow chart of a second embodiment of a method for fabricating a module integrated circuit package structure having an electrical shielding function; and 14/19 201222764 FIG. 2B is an electrical Mode of shielding function Production process of a second embodiment of the method of manufacturing the packaging laminate a schematic cross-sectional structure of a circuit of FIG. Main reference numerals DESCRIPTION
模組積體電路封裝結構Z 基板單元 1 電路基板 10 接地焊墊 100 電子單元 2 電子元件 20 導電單元 3 導電元件 30 第一末端部 30A 第二末端部 30B 切割面 300, 側面 300 封裝單元 4 封裝膠體 40 開口 400 表面 401 屏蔽單元 5 金屬屏蔽層 50 15/19Module integrated circuit package structure Z substrate unit 1 circuit substrate 10 ground pad 100 electronic unit 2 electronic component 20 conductive unit 3 conductive element 30 first end portion 30A second end portion 30B cutting surface 300, side 300 package unit 4 package Colloid 40 opening 400 surface 401 shielding unit 5 metal shielding layer 50 15/19