TW201204209A - Wiring board and method for fabricating the same - Google Patents
Wiring board and method for fabricating the same Download PDFInfo
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- TW201204209A TW201204209A TW99122654A TW99122654A TW201204209A TW 201204209 A TW201204209 A TW 201204209A TW 99122654 A TW99122654 A TW 99122654A TW 99122654 A TW99122654 A TW 99122654A TW 201204209 A TW201204209 A TW 201204209A
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201204209 钃 六、發明說明: 【發明所屬之技術領域】 本發明是有關於一種線路板(wiring board) .及其製造 方法,且特別是有關於一種具有高密度内連線板(High Density Interconnection Board,HDI Board)的線路板及其 製造方法。 【先前技術】 • 線路板是目前手機、電腦與數位相機等電子裝置 (electronic device ),以及電視、洗衣機與冰箱等家電用品 所需要的零件。詳細而言’線路板能承載以及供晶片 (chip )、被動元件(passive component )、主動元件(active component)以及微機電系統元件(Microelectromechanical Systems ’ MEMS )等多種電子元件(electronic component) 所裝設。如此,電流可以經由線路板而傳輸至這些電子元 • 件,進而讓這些電子裝置以及家電用品能夠運作。 【發明内容】 本發明提供一種線路板,其能裝設至少一個電子元件。 本發明提供一種線路板的製造方法,其用來製造上述 線路板。 本發明提出一種線路板,其包括一外層線路層(outer wiring layer)、一 線路層、一主體層(body layer)、—高密 度内連線板(HDI board)以及至少一第一導電桎。炙體層 201204209 配置在外層線路層與線路層之間,而高密度内連線板内埋 在主體層中。第一導電柱配置在主體層中,並且連接於高 密度内連線板與外層線路層之間。 在本發明一實施例中,上述主體層包括一黏合層 (adhesive layer)以及一絕緣層(insulation layer)。黏合 層黏合於高密度内連線板與外層線路層之間,而第一導電 柱穿過黏合層。絕緣層覆蓋高密度内連線板,而線路層配 φ 置在絕緣層上,並且接觸絕緣層。 在本發明一實施例中’上述黏合層全面性覆蓋外層線 路層。 在本發明一實施例中,上述黏合層局部覆蓋外層線路 層。 在本發明一實施例中,上述主體層更包括一位在外層 線路層與絕緣層之間的基材,而基材圍繞高密度内連線板。 春 在本發明一實施例中,上述線路板更包括至少一穿過 絕緣層的第二導電柱。第二導電柱連接於高密度内連線板 與線路層之間,而基材為一半固化膠片(prepreg);或者, 在本發明另一實施例中,基材為一線路基板(wiring substrate),而第二導電柱連接於線路基板與線路層之間。 在本發明一實施例中,當基材為線路基板時,高密度 内連線板與外層線路層之間的距離小於高密度内連線板與 線路層之間的距離。 201204209 在本發明一實施例中,上述高密度内連線板的層數大 於或等於線路基板的層數,且高密度内連線板的平均佈線 密度(mean layout density)大於或等於線路基板的平均佈 線密度。 在本發明一實施例中,上述線路板更包括一高密度内 連線子板(HDI Sub-board)。高密度内連線子板内埋於高 密度内連線板中。 φ 在本發明一實施例中,上述高密度内連線子板的層數 大於或等於高密度内連線板的層數,而高密度内連線子板 的平均佈線密度大於或等於高密度内連線板的平均佈線密 度。 在本發明一實施例中,上述第一導電柱從外層線路層 延伸至高密度内連線板的内部。 本發明另提出一種線路板的製造方法。首先,在一基 φ 板上形成至少一貫孔。在形成貫孔之後,將一高密度内連 線板固定在基板上,其中高密度内連線板遮蓋貫孔。在基 板上形成一主體層,其中主體層包覆高密度内連線板。在 主體層上形成一金屬層。在形成主體層之後’形成至少一 連接於高密度内連線板與基板之間的第一導電柱。在形成 第一導電柱之後,圖案化基板與金屬層’以分別形成一外 層線路層以及一線路層。 在本發明一實施例中,將高密度内連線板固定在基板 201204209 .上的方法以及形成主體層的方法如下所述。.在基板上塗佈 (applying )或貼合(sticking ) —黏合層。接著’將高密 度内連線板黏合在黏合層上。之後,在基板上以及在高密 度内連線板上形成一絕緣層’其中絕緣層覆蓋高密度内連 線板。 在本發明一實施例中’上述黏合層填滿貫孔,而形成 第一導電柱的方法如下所述。移除貫孔内的部分黏合層。 在移除部分黏合層之後以及在圖案化基板之前,對貫孔進 行通孔電鑛(Plating Through Hole,PTH)。 在本發明一實施例中,當對貫孔進行通孔電鍍時,對 貝孔進行填滿孔電鍍(Full_Filled Plating)。 在本發明一實施例中,形成主體層的方法更包括:在 巧绝度内連線板黏合在黏合層上之後,在絕緣層與基板之 間配置一基材,其中基材具有一開口,而高密度内連線板 位在開口内。 在本發明一實施例中,在形成主體層之後,更包括形 至小 夕一連接於高密度内連線板與金屬層之間的第二導電 ^中其中基材為—半固轉片;或者,在本發明另一實施 步、,基材為一線路基板,而在形成主體層之後,更包括 '成至少—連接於線路基板與金屬層之間的第二導電柱。 在本㈣—實_中,#基材為祕基板時,形成主 曰的方法更包括在基材與基板之間配置—半固化谬片。201204209 钃六、发明说明: Technical Field of the Invention The present invention relates to a wiring board and a method of manufacturing the same, and more particularly to a high density interconnecting board (High Density Interconnection Board) , HDI Board) circuit board and its manufacturing method. [Prior Art] • The circuit board is currently the electronic device for mobile phones, computers and digital cameras, and the parts required for home appliances such as TVs, washing machines and refrigerators. In detail, 'the circuit board can carry and be equipped with various electronic components such as chips, passive components, active components, and microelectromechanical systems 'MEMS'. . In this way, current can be transmitted to these electronic components via the circuit board, thereby enabling these electronic devices and home appliances to operate. SUMMARY OF THE INVENTION The present invention provides a wiring board capable of mounting at least one electronic component. The present invention provides a method of manufacturing a wiring board for manufacturing the above wiring board. The present invention provides a wiring board comprising an outer wiring layer, a wiring layer, a body layer, a high density interconnecting board (HDI board), and at least one first conductive germanium. The body layer 201204209 is disposed between the outer circuit layer and the circuit layer, and the high-density interconnection plate is buried in the main layer. The first conductive pillar is disposed in the body layer and is connected between the high density interconnecting board and the outer wiring layer. In an embodiment of the invention, the body layer includes an adhesive layer and an insulation layer. The adhesive layer is bonded between the high density inner wiring board and the outer wiring layer, and the first conductive pillar passes through the adhesive layer. The insulating layer covers the high-density interconnecting board, and the wiring layer is disposed on the insulating layer and contacts the insulating layer. In an embodiment of the invention, the adhesive layer covers the outer layer of the outer layer in a comprehensive manner. In an embodiment of the invention, the adhesive layer partially covers the outer wiring layer. In an embodiment of the invention, the body layer further includes a substrate between the outer wiring layer and the insulating layer, and the substrate surrounds the high density interconnecting board. In an embodiment of the invention, the circuit board further includes at least one second conductive pillar passing through the insulating layer. The second conductive pillar is connected between the high-density interconnecting board and the wiring layer, and the substrate is a semipreg; or, in another embodiment of the invention, the substrate is a wiring substrate. And the second conductive pillar is connected between the circuit substrate and the circuit layer. In an embodiment of the invention, when the substrate is a wiring substrate, the distance between the high-density interconnecting board and the outer wiring layer is smaller than the distance between the high-density interconnecting board and the wiring layer. 201204209 In an embodiment of the invention, the number of layers of the high-density interconnecting board is greater than or equal to the number of layers of the circuit substrate, and the average layout density of the high-density interconnecting board is greater than or equal to the circuit substrate. Average wiring density. In an embodiment of the invention, the circuit board further includes a high density interconnect board (HDI Sub-board). The high density interconnected daughter boards are embedded in high density interconnect boards. In an embodiment of the invention, the number of layers of the high-density interconnecting sub-board is greater than or equal to the number of layers of the high-density interconnecting board, and the average wiring density of the high-density interconnecting sub-board is greater than or equal to the high density. The average wiring density of the interconnect boards. In an embodiment of the invention, the first conductive post extends from the outer circuit layer to the interior of the high density interconnect. The invention further provides a method of manufacturing a circuit board. First, at least a uniform hole is formed on a base φ plate. After the through holes are formed, a high density inner wiring board is fixed on the substrate, wherein the high density inner wiring board covers the through holes. A body layer is formed on the substrate, wherein the body layer covers the high density interconnector. A metal layer is formed on the body layer. At least one first conductive pillar connected between the high density interconnector plate and the substrate is formed after the formation of the body layer. After forming the first conductive pillars, the substrate and the metal layer are patterned to form an outer wiring layer and a wiring layer, respectively. In an embodiment of the present invention, a method of fixing a high-density interconnecting board to a substrate 201204209 and a method of forming a main body layer are as follows. Applying or sticking on the substrate - the adhesive layer. Next, the high density inner wiring board is bonded to the adhesive layer. Thereafter, an insulating layer is formed on the substrate and on the high-density wiring board, wherein the insulating layer covers the high-density interconnecting board. In an embodiment of the invention, the method of forming the first conductive pillar by the above-mentioned adhesive layer filling the through hole is as follows. Remove some of the adhesive layer in the through hole. After the partial adhesion layer is removed and before the substrate is patterned, a through hole (PTH) is applied to the through hole. In an embodiment of the invention, when the via hole is subjected to via plating, the via hole is subjected to full_Filled Plating. In an embodiment of the invention, the method for forming the main body layer further comprises: after the bonding board is bonded to the adhesive layer, the substrate is disposed between the insulating layer and the substrate, wherein the substrate has an opening. The high-density interconnect wiring board is located in the opening. In an embodiment of the present invention, after forming the main body layer, the second conductive material is connected to the second conductive layer between the high-density interconnecting board and the metal layer, wherein the substrate is a semi-solid rotating sheet; Alternatively, in another embodiment of the present invention, the substrate is a circuit substrate, and after forming the body layer, further includes 'at least—connecting the second conductive pillar between the circuit substrate and the metal layer. In the present invention, when the substrate is a secret substrate, the method of forming the host further includes disposing a semi-cured film between the substrate and the substrate.
FSI 6 201204209 . 在本發明一實施例中,上述高密度内連線板是切割一 第線路母板(first wiring panel)而形成’而線路基板是 刀°】第一線路母板而形成,其中第一線路母板包括多個 度内連線板,而第二線路母板包括多個線路基板。 在本發明一實施例中,上述高密度内連線板具有至少 一接墊,而接墊遮蓋貫孔。 在本發明一實施例中,上述高密度内連線板具有一内 鲁層線路層’而第一導電柱連接於内層線路層。 本發明的線路板因包括外層線路層而能電性連接至少 们電子元件,因此本發明的線路板可以供至少一個電子 元件所裝設,叫電流可則㈣至電子it件。 為讓本發明之上述特徵和優點能更明顯易懂,下文特 舉實施例’並配合所附圖式,作詳細說明如下。 【實施方式】 • 圖1A至圖II為本發明一實施例之線路板的製造方法 的流程剖面不意圖,而圖1G繪示出本實施例之線路板的 剖面結構。凊先參閱圖,在此先介紹本實施例的線路板 100的結構特徵。本實施例的線路板1〇〇包括一外層線路 層110、一線路層12〇、一主體層13〇、一高密度内連線板 140以及多根第一導電柱15〇。 主體層130配置在外層線路層110與線路層120之 間,即外層線路層11〇以及線路層120分別位在主體層130 201204209 的相對二表面上。高密度内連線板140内埋在主體層130 « 中,也就是說,主體層丨3〇包覆高密度内連線板140。這 些第一導電柱150配置在主體層130中,並且連接於高密 度内連線板14〇與外層線路層110之間。 外層線路層11〇可以包括多個接墊(pad) 112以及至 少一條走線(trace) 114 ’而高密度内連線板140具有多個 接墊142a、142b ’其中這些第一導電柱150可以連接於這 φ 些接墊112與這些接墊142a之間。至少一個電子元件300 能裝設在線路板上,並且電性連接這些接墊112。電 子元件300例如是晶片、被動元件、主動元件或微機電系 統元件等,而且電子元件300可以是以覆晶(flip chip)或 打線(wire bonding)等方式裝設在線路板1〇〇上。 以圖1G為例,電子元件300是以覆晶的方式裝設在 線路板100上,所以多個焊料塊S1會連接在電子元件300 φ 以及這些接墊112之間,以使電子元件300能透過這些焊 料塊S1而電性連接這些接墊112,其中焊料塊S1例如是 焊球(solder ball)。如此,電子元件300可以經由這些接 墊112以及第一導電柱150而電性連接高密度内連線板 140,進而讓電流能經由線路板1〇〇而傳輸至電子元件3〇〇。 雖然圖1G繪示出多根第一導電柱150,但是在其他實 施例中’線路板.100可以只包括一根第一導電柱15〇,即 線路板100所包括的第一導電柱150的數量可以僅為一FSI 6 201204209. In an embodiment of the invention, the high-density interconnecting board is formed by cutting a first wiring panel to form a 'the circuit substrate is a knife', a first line mother board, wherein The first line mother board includes a plurality of inner wiring boards, and the second line mother board includes a plurality of circuit boards. In an embodiment of the invention, the high density interconnecting strip has at least one pad, and the pad covers the through hole. In an embodiment of the invention, the high density interconnector board has an inner layer of wiring layers and the first conductive pillars are connected to the inner layer of wiring layers. The circuit board of the present invention can electrically connect at least the electronic components by including the outer circuit layer. Therefore, the circuit board of the present invention can be provided with at least one electronic component, that is, the current can be (4) to the electronic component. The above described features and advantages of the present invention will be more apparent from the following description of the appended claims. [Embodiment] FIG. 1A to FIG. 1 are a schematic cross-sectional view showing a method of manufacturing a wiring board according to an embodiment of the present invention, and FIG. 1G is a cross-sectional view showing the wiring board of the present embodiment. Referring first to the drawings, the structural features of the circuit board 100 of the present embodiment will be described first. The circuit board 1 of the present embodiment includes an outer wiring layer 110, a wiring layer 12, a main body layer 13, a high-density interconnecting board 140, and a plurality of first conductive pillars 15A. The main body layer 130 is disposed between the outer circuit layer 110 and the circuit layer 120, that is, the outer circuit layer 11A and the circuit layer 120 are respectively located on opposite surfaces of the main body layer 130201204209. The high-density interconnecting board 140 is buried in the main body layer 130 « , that is, the main body layer 〇 3 〇 covers the high-density interconnecting board 140. These first conductive pillars 150 are disposed in the body layer 130 and are connected between the high density inner wiring board 14 and the outer wiring layer 110. The outer wiring layer 11A may include a plurality of pads 112 and at least one trace 114' and the high density interconnecting board 140 has a plurality of pads 142a, 142b 'where the first conductive pillars 150 may Connected between the φ pads 112 and the pads 142a. At least one electronic component 300 can be mounted on the circuit board and electrically connected to the pads 112. The electronic component 300 is, for example, a wafer, a passive component, an active component, or a microelectromechanical system component, and the electronic component 300 may be mounted on the wiring board 1 by means of flip chip or wire bonding. Taking FIG. 1G as an example, the electronic component 300 is mounted on the circuit board 100 in a flip chip manner, so that a plurality of solder bumps S1 are connected between the electronic component 300 φ and the pads 112 so that the electronic component 300 can The pads 112 are electrically connected through the solder bumps S1, wherein the solder bumps S1 are, for example, solder balls. In this manner, the electronic component 300 can be electrically connected to the high-density interconnecting board 140 via the pads 112 and the first conductive pillars 150, thereby allowing current to be transmitted to the electronic component 3 via the wiring board 1 . Although FIG. 1G illustrates a plurality of first conductive pillars 150, in other embodiments, the 'circuit board 100 may include only one first conductive pillar 15 〇, that is, the first conductive pillar 150 included in the wiring board 100. The number can be only one
'f SI 201204209 r c - 個。因此’圖1G所示的第一導電柱150的數量僅為舉例 說明,並非限定本發明。 在本實施例中,主體層130可以包括一黏合層132、 一基材134以及一絕緣層136,其中黏合層132、基材134 以及絕緣層136三者材料皆可為樹脂材料,而基材134更 可以是一種半固化膠片。黏备層132黏合於高密度内連線 板140與外層線路層110之間,並且局部覆蓋外層線路層 • 110 ’而這些第一導電柱150會穿過黏合層132而連接高密 度内連線板140與外層線路層11〇。 絕緣層136覆蓋高密度内連線板14〇,而線路層120 配置在絕緣層136上,並接觸絕緣層136。基材134位在 外層線路層110與絕緣層136之間,並圍繞高密度内連線 板140’所以絕緣層136位在線路層12〇與基材134之間。 由於黏合層132黏合高密度内連線板14〇,基材134圍繞 • 高密度内連線板丨4〇,而絕緣層136覆蓋高密度内連線板 140,因此高密度内連線板14〇得以内埋在主體層13〇中。 須說明的是,雖然圖1G所示的主體層13()包括基材 134,但是在其他實施例中,特別是當高密度内連線板14〇 具有很薄的厚度T1時,絕緣層136可為半固化膠片,而主 體層130可以不需要基材134,即基材134僅為本發明的 選擇性元件’並非必要元件。因此,高密度内連線板140 可以只被黏合層132與絕緣層136所包圍,而圖lG所示 201204209 的基材134僅為舉例說明,並非限定本發明。 線路板100可以更包括至少一根第二導電柱160,例 如圖1G所示的線路板1〇〇包括多根第二導電柱16〇,但在 其他實施例中,線路板1〇〇可以僅包括一根第二導電柱 160。這些第二導電柱160穿過絕緣層136,並且連接於高 密度内連線板140與線路層120之間。這些第二導電柱ι6〇 可以分別連接這些接墊142b,如此高密度内連線板140能 φ 經由第二導電柱160而電性連接線路層120。 另外’線路板1 〇〇可以更包括至少一個導電連接結構 (conductive connection structure )。導電連接結構配置在主 體層130中,並且連接於外層線路層110與線路層ι2〇之 間’其中導電連接結構可為一種導電盲孔結構(c〇n(juctive blind via structure)或導電通孔結構(conductiVe thr0Ugh hole structure)。利用導電連接結構,外層線路層11()能電 φ 性連接線路層12〇。 值得一提的是,線路板100不僅可以是一塊已經製造 完成的線路板成品’且也可為一種多層線路板(multiiayer wiring board)的其中一個部件(part),即線路板1〇〇可作 為多層線路板内的線路結構。詳細而言,在其他實施例中, 可以利用增層法(build-up )或疊合法,在絕緣層136上額 外製作出一層或二層以上的線路層,使得線路層120成為 多層線路板的内層線路層(inner wiring layer)。 201204209 因此,雖然在圖1G所示的實施例中,線路層120與 絕緣層136上方沒有繪示出任何線路層,使得圖1G所繪 示的線路板100看似為一種已經製造完成的線路板成品, 但是在其他實施例中,線路板100也可以作為多層線路板 内的線路結構。因此’圖1G所繪示的線路板僅為舉 例說明,並非限定本發明。 請參閱圖1H,其放大繪示出圖1G中高密度内連線板 140。線路板1〇〇可以更包括一高密度内連線子板180,其 為一種高密度内連線板。高密度内連線子板180内埋於高 密度内連線板140中’並且可經由增層法(build-up)或疊 合法而内埋在高密度内連線板140中。此外,高密度内連 線子板180的平均佈線密度及層數皆可以大於或等於高密 度内連線板140的平均佈線密度及層數,其中本發明所提 及的層數乃是指線路層的數量。 以圖1H為例,除了接墊142a、142b之外,高密度内 連線板140更具有二層線路層144a、144b,其中線路層 144a、144b皆為高密度内連線板140的内層線路層,因此 高密度内連線板140共具有四層線路層,即高密度内連線 板140的層數為四層。然而,必須強調的是’圖1H中的 高密度内連線板140的層數僅為舉例說明’並非限定本發 明。 另外,高密度内連線板140可以更具有至少一根導電 201204209 • 柱146、至少一根導電柱148a以及至少一根導電柱148b, 其中導電柱146連接於線路層144a與144b之間,導電柱 148a連接於高密度内連線子板18〇與接墊142a之間,而導 電柱148b連接於高密度内連線子板180與接墊142b之 間。利用這些導電柱148a與148b,高密度内連線子板180 得以電性連接高密度内連線板14〇,以使電流能在高密度 内連線子板180與高密度内連線板丨4〇之間傳輸。 • 特別一提的是,雖然這些第一導電柱150可以連接於 這些接墊112與這些接墊142a之間,但在其他實施例中, 第導電柱丨5〇也可以不穿過任何一個接塾i42a而直接連 接於接墊112與線路層144a或144b之間,或是直接連接於 向密度内連線子板180。換句話說,第一導電柱15〇可以從 外層線路層110延伸至高密度内連線板14〇的内部。 以上主要介紹線路板1〇〇的結構特徵。接下來,將配 • 合圖1A至圖II來詳細介紹線路板100的製造方法。 請參閱圖1A,關於線路板1〇〇的製造方法,首先,在 一基板ίο上形成至少一個貫孔H1,例如在圖1A的實施例 中,在基板1〇上形成多個貫孔H1,但在其他實施例中, 可以只形成一個貫孔H1。形成貫孔H1的方法有很多種, 例如是雷射鑽孔(laser drilling)、機械鑽孔(mechanical drilling )或微影钱刻(lithography etching )。此外,基板 10可為金屬箔片,例如銅箔或鋁箔;或者,基板1〇也可 m 12 201204209 為複合板材’例如銅箔基板(Copper Clad Laminate,CCL)。 請參閱圖IB與圖1C,在形成貫孔HI之後,將高密 度内連線板140固定在基板丨〇上,其中高密度内連線板 140會遮蓋這些貫孔H1,而且是高密度内連線板140的接 墊142a遮蓋貫孔H1 ’即這些接墊142a會分別對應這些貫 孔H1。固定高密度内連線板14〇在基板10上的方式有多 種’而在圖1B與圖1C所示的實施例中,高密度内連線板 φ 140可利用黏合的方式固定在基板10上。 詳細而言,請先參閱圖1B,先在基板10上塗佈或貼 合一層黏合層132。黏合層132可局部覆蓋基板10的一平 面12 ’並且遮蓋這些貫孔H1。黏合層132可以是由樹脂 材料所形成,其中此樹脂材料例如是環氧樹脂(epoxy), 而其中塗佈黏合層132的方法可以是喷塗、刷塗或網印等 方法。 • 請參閱圖1C,之後,將高密度内連線板140黏合在黏 合層132上。如此,高密度内連線板140得以固定在基板 10上。此外,黏合層132可以是具有流動性的液態材料或 膏狀材料,所以在黏合層132能填滿這些貫孔H1。另外, 在高密度内連線板140黏合在黏合層132上以前,可以對 高密度内連線板140進行對位程序,以使高密度内連線板 140能座落在正確的位置中。 請參閱圖1D與圖1E,接著,在基板10上形成包覆高'f SI 201204209 r c - each. Thus, the number of first conductive pillars 150 shown in Fig. 1G is for illustrative purposes only and is not intended to limit the invention. In this embodiment, the main body layer 130 may include an adhesive layer 132, a substrate 134, and an insulating layer 136. The adhesive layer 132, the substrate 134, and the insulating layer 136 may be made of a resin material. 134 can be a semi-cured film. The adhesive layer 132 is bonded between the high-density interconnecting board 140 and the outer wiring layer 110, and partially covers the outer wiring layer 110' and the first conductive pillars 150 pass through the bonding layer 132 to connect the high-density interconnecting lines. The board 140 is connected to the outer wiring layer 11 . The insulating layer 136 covers the high-density interconnecting board 14A, and the wiring layer 120 is disposed on the insulating layer 136 and contacts the insulating layer 136. The substrate 134 is positioned between the outer wiring layer 110 and the insulating layer 136 and surrounds the high density interconnecting board 140' so that the insulating layer 136 is positioned between the wiring layer 12 and the substrate 134. Since the adhesive layer 132 is bonded to the high-density interconnecting board 14 〇, the substrate 134 surrounds the high-density interconnecting board, and the insulating layer 136 covers the high-density interconnecting board 140, so the high-density interconnecting board 14 The crucible can be buried in the main body layer 13〇. It should be noted that although the body layer 13() shown in FIG. 1G includes the substrate 134, in other embodiments, particularly when the high density interconnecting plate 14A has a very thin thickness T1, the insulating layer 136 It may be a semi-cured film, and the body layer 130 may not require the substrate 134, i.e., the substrate 134 is only a selective element of the present invention 'not a necessary element. Therefore, the high-density interconnecting board 140 may be surrounded only by the adhesive layer 132 and the insulating layer 136, and the substrate 134 of 201204209 shown in FIG. 1G is merely illustrative and not limiting. The circuit board 100 may further include at least one second conductive pillar 160. For example, the circuit board 1 shown in FIG. 1G includes a plurality of second conductive pillars 16A, but in other embodiments, the circuit board 1〇〇 may only A second conductive post 160 is included. These second conductive pillars 160 pass through the insulating layer 136 and are connected between the high density interconnecting board 140 and the wiring layer 120. The second conductive pillars ι6 〇 can be connected to the pads 142b, respectively, such that the high-density interconnecting board 140 can be electrically connected to the wiring layer 120 via the second conductive pillars 160. Further, the circuit board 1 〇〇 may further include at least one conductive connection structure. The conductive connection structure is disposed in the main body layer 130 and is connected between the outer circuit layer 110 and the circuit layer ι2 ', wherein the conductive connection structure may be a conductive blind via structure or a conductive via hole (c〇n) Structure (conductiVe thr0Ugh hole structure). With the conductive connection structure, the outer circuit layer 11 () can electrically connect the circuit layer 12 〇. It is worth mentioning that the circuit board 100 can not only be a finished circuit board finished product' And it can also be a part of a multiiayer wiring board, that is, the circuit board 1 can be used as a line structure in the multilayer circuit board. In detail, in other embodiments, it can be utilized In the build-up or stacking process, one or more wiring layers are additionally formed on the insulating layer 136, so that the wiring layer 120 becomes an inner wiring layer of the multilayer wiring board. In the embodiment shown in FIG. 1G, no circuit layer is shown above the circuit layer 120 and the insulating layer 136, so that the circuit board 100 shown in FIG. 1G is seen. It is a finished circuit board finished product, but in other embodiments, the circuit board 100 can also be used as a circuit structure in a multilayer circuit board. Therefore, the circuit board shown in FIG. 1G is merely illustrative and does not limit the present invention. Referring to FIG. 1H, the high-density interconnecting board 140 of FIG. 1G is illustrated in an enlarged manner. The circuit board 1 may further include a high-density interconnecting sub-board 180, which is a high-density interconnecting board. The density interconnecting sub-board 180 is buried in the high-density interconnecting board 140' and may be buried in the high-density interconnecting board 140 via build-up or stacking. In addition, high density The average wiring density and the number of layers of the interconnecting sub-board 180 may be greater than or equal to the average wiring density and the number of layers of the high-density interconnecting board 140, wherein the number of layers referred to in the present invention refers to the number of wiring layers. Taking FIG. 1H as an example, in addition to the pads 142a, 142b, the high-density interconnecting board 140 further has two wiring layers 144a, 144b, wherein the circuit layers 144a, 144b are the inner wiring of the high-density interconnecting board 140. Layer, so high-density interconnector board 140 The four-layer circuit layer, that is, the number of layers of the high-density interconnecting board 140 is four. However, it must be emphasized that 'the number of layers of the high-density interconnecting board 140 in FIG. 1H is merely an example' and does not limit the present invention. In addition, the high-density interconnecting board 140 may further have at least one conductive 201204209 • pillar 146, at least one conductive pillar 148a, and at least one conductive pillar 148b, wherein the conductive pillar 146 is connected between the circuit layers 144a and 144b. The conductive post 148a is connected between the high-density interconnecting sub-board 18A and the pad 142a, and the conductive post 148b is connected between the high-density interconnecting sub-board 180 and the pad 142b. With these conductive pillars 148a and 148b, the high-density interconnect wiring sub-board 180 is electrically connected to the high-density interconnecting board 14〇 so that current can be connected between the high-density interconnecting sub-board 180 and the high-density interconnecting board. Transfer between 4〇. In particular, although the first conductive pillars 150 may be connected between the pads 112 and the pads 142a, in other embodiments, the first conductive pillars 5〇 may not pass through any one of the connections. The 塾i42a is directly connected between the pad 112 and the wiring layer 144a or 144b, or directly connected to the density interconnecting sub-board 180. In other words, the first conductive pillar 15A can extend from the outer wiring layer 110 to the inside of the high-density interconnecting board 14A. The above mainly introduces the structural features of the circuit board. Next, a method of manufacturing the wiring board 100 will be described in detail with reference to Figs. 1A to II. Referring to FIG. 1A, with respect to a method of manufacturing a circuit board, first, at least one through hole H1 is formed on a substrate ίο. For example, in the embodiment of FIG. 1A, a plurality of through holes H1 are formed on the substrate 1? However, in other embodiments, only one through hole H1 may be formed. There are many ways to form the through hole H1, such as laser drilling, mechanical drilling, or lithography etching. Further, the substrate 10 may be a metal foil such as a copper foil or an aluminum foil; or the substrate 1 may be a composite sheet such as a copper foil substrate (Copper Clad Laminate, CCL). Referring to FIG. 1B and FIG. 1C, after the through holes HI are formed, the high-density interconnecting wires 140 are fixed on the substrate, wherein the high-density interconnecting plates 140 cover the through holes H1 and are in a high density. The pads 142a of the wiring board 140 cover the through holes H1', that is, the pads 142a correspond to the through holes H1, respectively. There are various ways of fixing the high-density interconnecting board 14 on the substrate 10. In the embodiment shown in FIG. 1B and FIG. 1C, the high-density interconnecting board φ 140 can be fixed on the substrate 10 by bonding. . In detail, referring to FIG. 1B, an adhesive layer 132 is first coated or bonded on the substrate 10. The adhesive layer 132 may partially cover a flat surface 12' of the substrate 10 and cover the through holes H1. The adhesive layer 132 may be formed of a resin material such as epoxy, and the method of applying the adhesive layer 132 may be a method such as spraying, brushing or screen printing. • Referring to FIG. 1C, the high density interconnecting board 140 is then bonded to the adhesive layer 132. Thus, the high-density interconnecting board 140 is fixed to the substrate 10. Further, the adhesive layer 132 may be a liquid material or a paste material having fluidity, so that the adhesive layer 132 can fill the through holes H1. In addition, the high-density interconnecting board 140 can be aligned until the high-density interconnecting board 140 is bonded to the adhesive layer 132 so that the high-density interconnecting board 140 can be seated in the correct position. Please refer to FIG. 1D and FIG. 1E, and then, a high cladding is formed on the substrate 10.
、 [SI 13 201204209 密度内連線板140的主體層130。形成主體層130的方法 有很多種,而在本實施例中,由於主體層130包括黏合層 132,因此,當在基板10上塗佈或貼合黏合層132,以黏 合高密度内連線板140時,主體層130已經開始形成。[SI 13 201204209 The main body layer 130 of the density inner wiring board 140. There are many methods for forming the main body layer 130. In the present embodiment, since the main body layer 130 includes the adhesive layer 132, when the adhesive layer 132 is coated or bonded on the substrate 10, the high-density interconnecting board is bonded. At 140 o'clock, the body layer 130 has begun to form.
在高密度内連線板140黏合在黏合層132上之後,在 基板10上以及在高密度内連線板140上形成絕緣層136, 並且在絕緣層136與基板10之間配置基材134。基材I% 具有一開口 H2,而開口 H2可以是經由外型切割(r〇uting) 或雷射燒蝕(laser ablation)而形成。當配置基材134時, 阿进度内連線板140會位在開口 H2内,所以基材134能 園繞向密度内連線板140。 絕緣層136與基材134可以是經由壓合而形成。詳細 °形成絕緣層130與基材134的方法可以是將樹脂層 與丰同〆 膠片二者壓合在基板1〇上,其中半固化膠片配置 ' ί月曰層與基板1〇之間。在進行壓合的過程中,可以加熱 e與半固化膠片,也就是對樹脂層與半固化膠片進行 熱壓合,,、,^ 以形成主體層130。 形成另外’線路板100的製造方法還包括在主體層130上 :成金屬層122。金屬層122可以形成在絕緣層136上, 且可以是厶屈斤 I屬箔片,例如銅箔或鋁箔。金屬層122可以與 絕緣層Ik 的方。同時形成,例如形成金屬層122與絕緣層136 、 可以疋將一塊複合板材壓合在基材134上,而此複 201204209 . 合板材可具有金屬箔片與樹脂層,例如銅箔基板。 須說明的是,由於基材134並非為本發明的必要元 件’所以在其他實施例中,不一定要形成基# 134,而在 不形成基材134的條件下,可以只壓合_片金屬羯片以及 一片半固化膠片在基板1〇上,以形成金屬層122與主體層 130 ’其中此金屬箔片可以是表面塗有黏膠的箔片,例如背 膠銅羯(Resin Coated Copper,RCC)。因此,圖 1D與圖 φ 1E所示的基材134僅為舉例說明,並非限定本發明。 請參閱圖1E與圖1F,接著,形成至少一根第一導電 柱150以及至少一根第二導電柱160。第一導電柱150連 接於高密度内連線板140與基板10之間,而第二導電柱 160連接於高密度内連線板140與金屬層122之間。第一 導電柱150與第二導電枉160二者可以是經由通孔電鍍而 形成,而形成第一導電柱150與第二導電柱160的方法可 φ 以包括無電電鍍(electroless plating )以及有電電鍍 (electroplating) ° 形成第一導電柱15〇的方法可包括以下流程。首先, 當黏合層132填滿這些貫孔H1時(如圖1D所示),移除 這些貫孔H1内的部分黏合層132’其中移除部分黏合層 132的方法可以包括雷射燒蝕(laser ablation)’也就是照 射一雷射光束在這些貫孔H1所暴露的黏合層132’使得貫 孔H1能局部暴露出高密度内連線板140。After the high-density interconnecting board 140 is bonded to the adhesive layer 132, an insulating layer 136 is formed on the substrate 10 and on the high-density interconnecting board 140, and the substrate 134 is disposed between the insulating layer 136 and the substrate 10. The substrate I% has an opening H2, and the opening H2 may be formed by external singulation or laser ablation. When the substrate 134 is disposed, the progress inner wiring board 140 is positioned in the opening H2, so that the substrate 134 can be wound around the density inner wiring board 140. The insulating layer 136 and the substrate 134 may be formed by press bonding. The method of forming the insulating layer 130 and the substrate 134 in detail may be performed by laminating both the resin layer and the rhodium film on the substrate 1 , wherein the semi-cured film is disposed between the layer and the substrate 1 . In the process of pressing, e and semi-cured film may be heated, that is, the resin layer and the prepreg film are thermocompression-bonded to form the main body layer 130. A method of forming another 'circuit board 100' is further included on the body layer 130: forming a metal layer 122. The metal layer 122 may be formed on the insulating layer 136, and may be a foil such as a copper foil or an aluminum foil. The metal layer 122 may be on the side of the insulating layer Ik. At the same time, for example, the metal layer 122 and the insulating layer 136 are formed, and a composite sheet can be pressed onto the substrate 134, and the composite sheet can have a metal foil and a resin layer, such as a copper foil substrate. It should be noted that since the substrate 134 is not an essential component of the present invention, in other embodiments, the base #134 is not necessarily formed, and only the substrate 134 may be formed without pressing the substrate. The ruthenium and a piece of semi-cured film are on the substrate 1 to form a metal layer 122 and a body layer 130', wherein the metal foil may be a surface coated with a glue, such as a Resin Coated Copper (RCC) ). Therefore, the substrate 134 shown in Fig. 1D and Fig. φ 1E is merely illustrative and not intended to limit the invention. Referring to FIG. 1E and FIG. 1F, then, at least one first conductive pillar 150 and at least one second conductive pillar 160 are formed. The first conductive pillar 150 is connected between the high-density interconnecting board 140 and the substrate 10, and the second conductive pillar 160 is connected between the high-density interconnecting board 140 and the metal layer 122. The first conductive pillar 150 and the second conductive crucible 160 may be formed by via plating, and the method of forming the first conductive pillar 150 and the second conductive pillar 160 may include electroless plating and electricity. Electroplating ° The method of forming the first conductive pillar 15A may include the following process. First, when the adhesive layer 132 fills the through holes H1 (as shown in FIG. 1D), the partial adhesive layer 132' in the through holes H1 is removed, and the method of removing the partial adhesive layer 132 may include laser ablation ( The laser ablation)', that is, the adhesive layer 132' exposed by the laser beam at the through holes H1 enables the through hole H1 to partially expose the high density interconnecting plate 140.
i SI 15 201204209 另外,在進行上述雷射燒蝕之後,可以對這些貫孔HI 進行去膠渣(desmear),以清潔這些貫孔HI。之後,對這 些貫孔H1進行通孔電鍍,即對這些貫孔H1依序進行無電 電鍍與有電電鍍。如此,第一導電柱150得以形成在貫孔 H1内,並且連接基板10以及高密度内連線板140。當對 這些貫孔H1進行通孔電鍍時,更可以對這些貫孔H1進行 填滿孔電鍍,使這些第一導電柱150成為實心導電柱體結 鲁 構。 當形成第一導電柱150時,可以進行形成第二導電柱 160的流程,以使第一導電柱150與第二導電柱160能同 時形成,而第二導電柱160的形成方法如下所述。首先, 在金屬層122上形成一個或多個開孔H3,其中這些開孔 H3是貫穿金屬層122與絕緣層136而形成,而形成開孔 H3的方法可以是雷射鑽孔或微影蝕刻。此外,在進行上述 φ 雷射鑽孔之後,也可以對這些開孔H3進行去膠渣。 在形成開孔H3之後,對開孔H3進行通孔電鍍,也就 是對這些開孔H3依序進行無電電鍍與有電電鍍,其中更 可對這些貫孔H1與開孔H3同時進行通孔電鍍。如此,這 些第二導電柱160能分別形成在這些開孔H3内,並連接 高密度内連線板140與金屬層122,而第一導電柱150與 第二導電柱160更可以在同一道通孔電鍍的流程中形成。 此外,當對這些開孔H3進行通孔電鍍時,更可以對這些 201204209 開孔H3進行填滿孔電鑛’使這些第二導電柱i6〇成為實 心導電柱體結構。 請參閱圖1F與圖1G,接著,圖案化基板1〇以及金屬 層122,以分別形成外層線路層11〇以及線路層12〇,其中 圖案化基板10與金屬層122的方法可以是微影韻刻。至 此’線路板100基本上已製造完成。另外,在線路板1〇〇 製造完成之後,可利用增層法或疊合法,在絕緣層136或 • 外層線路層110上額外製作出一層或多層線路層,使得外 層線路層110或線路層120成為多層線路板的内層線路層。 請參閱圖II,值得一提的是’由於第一導電柱15〇可 以延伸至南密度内連線板140的内部,因此在形成第一導 電柱150的過程中’第一導電柱15〇也可以連接於高密度 内連線板140的一内層線路層144,如圖π所示,其中内 層線路層144例如是線路層144a或144b(請參考圖1H)。 Φ 圖2A至圖2F為本發明另一貫施例之線路板的製造方 法的流程剖面示意圖。請先參閱圖2D,本實施例的線路板 200與前述實施例的線路板1〇〇二者結構相似,而以下主 要介紹線路板100、200二者在結構特徵上的差異。 線路板200可以供至少一個電子元件300 (請參閱圖 1G)來裝設,而且線路板200所包括的元件相似於線路板 100的元件’例如線路板200也包括一外層線路層11〇、一 線路層120、一高密度内連線板14〇以及多根第一導電柱 201204209 150。然而,線路板200所包括的主體層230不同於前述線 路板100的主體層130。 詳細而言,主體層230包括一黏合層232、一基材234、 一絕緣層236以及一半固化膠片238。半固化膠片238配 置在基材234與外層線路層110之間,而黏合層232黏合 在高密度内連線板140與外層線路層110之間,並且全面 性覆蓋外層線路層110,其中黏合層232與絕緣層236二 鲁 者材料可包括樹脂材料。由於黏合層232全面性覆蓋外層 線路層110,所以絕緣層236、基材234與半固化膠片238 基本上是不接觸到外層線路層110。 另外,在本實施例中,基材234具有一開口 H4,而高 密度内連線板140位在開口 H4内,因此基材234圍繞高 ,密度内連線板140。基材234為線路基板,所以基材234 實質上可以視為一種線路板。以圖2D為例,基材234例 ® 如可以視為一種具有四層線路層的多層線路板。此外,高 密度内連線板140的平均佈線密度可以大於或等於線路基 板(即基材234)的平均佈線密度,且高密度内連線板140 的層數也可以大於或等於基材234的層數。 舉例而言’圖1H所示的高密度内連線板140的層數 可為四層,而圖2D所示的基材234可具有四層線路層, 所以從圖1H與圖2D來看,高密度内連線板140的層數可 以等於基材234的層數。當然,在其他實施例中,高密度 201204209 内連線板140的層數也可以大於基材234的層數,所以圖 1H所示的高密度内連線板140的層數,以及圖2D所示的 基材234的層數二者皆為舉例說明,並非限定本發明。 當基材234為線路基板時,基材234的厚度T2可以大 於或等於高密度内連線板140的厚度T1,以至於高密度内 連線板140與外層線路層110之間的距離D1小於高密度内 連線板140與線路層120之間的距離D2,所以高密度内連 φ 線板140距離外層線路層110較近,距離線路層120較遠。 因此,電子元件300能裝設在接近高密度内連線板140 的地方,並且經由外層線路層110與第一導電柱150而電 性連接高密度内連線板140。此外,由於高密度内連線板 140的平均佈線密度大於基材234的平均佈線密度,而比 較高密度内連線板140與基材234二者的平均佈線密度, 電子元件300的平均佈線密度會比較接近高密度内連線板 φ 140的平均佈線密度,因而有利於將電子元件300裝設在 接近高密度内連線板140的地方,如圖2D所示。 另外,雖然線路板200可以更包括至少一根第二導電 柱260,而且第二導電柱260的外形及材料皆與前述第二 導電柱160大體相同,但有別於前述實施例,本實施例的 第二導電柱260會穿過絕緣層236,並且連接於線路基板 (即基材234)與線路層120之間。如此,基材234可以 經由第二導電柱160而電性連接線路層120。不過,在其 201204209 他實施例中,至少一根第二導電柱160也可以穿過絕緣層 236而連接於高密度内連線板140與線路層120之間。 以上主要介紹線路板200的結構特徵。接下來,將配 合圖2A至圖2F來詳細介紹線路板200的製造方法。由於 線路板200的製造方法與前述線路板100的製造方法皆包 括相同的流程,因此以下主要介紹線路板1〇〇、200二者在 製造方法上的差異。 ' φ 請參閱圖2A,在形成貫孔H1之後,將高密度内連線 板140固定在基板10上。高密度内連線板140可以利用黏 合的方式固定在基板10上。舉例而言,在基板上塗佈 或貼合一層黏合層232,而其中塗佈黏合層232的方法可 以相同於塗佈黏合層132的方法。黏合層232全面性覆蓋 基板10的平面12,所以這些貫孔H1皆會被黏合層232所 遮蓋。接著,將高密度内連線板140黏合在黏合層232上, Φ 以使高密度内連線板14〇得以固定在基板10上。 請參閱圖2B與圖2C,之後,在基板10上以及在高密 度内連線板140上形成覆蓋高密度内連線板140的絕緣層 236,並且在絕緣層236與基板10之間配置基材234,其 中開口 H4的形成方法可以與開口 H2相同。此外,在基材 234與基板1〇之間配置半固化膠片238,其中半固化膠片 238可配置在黏合層232與基材234之間。 絕緣層236的形成方法可相同於絕緣層136的形成方i SI 15 201204209 In addition, after performing the above-described laser ablation, the through holes HI may be desmear to clean the through holes HI. Thereafter, the through holes H1 are subjected to through-hole plating, that is, the through holes H1 are sequentially subjected to electroless plating and electroplating. Thus, the first conductive pillars 150 are formed in the through holes H1, and the substrate 10 and the high-density interconnecting wiring board 140 are connected. When the through holes H1 are subjected to through hole plating, the through holes H1 may be filled with holes to make the first conductive posts 150 become solid conductive pillars. When the first conductive pillar 150 is formed, a flow of forming the second conductive pillar 160 may be performed so that the first conductive pillar 150 and the second conductive pillar 160 can be simultaneously formed, and the second conductive pillar 160 is formed as follows. First, one or more openings H3 are formed on the metal layer 122, wherein the openings H3 are formed through the metal layer 122 and the insulating layer 136, and the method of forming the opening H3 may be laser drilling or lithography. . Further, after performing the above-described φ laser drilling, the openings H3 may be subjected to desmearing. After the opening H3 is formed, the opening H3 is subjected to through-hole plating, that is, the holes H3 are sequentially subjected to electroless plating and electroplating, and the through holes H1 and the openings H3 are simultaneously subjected to through-hole plating. In this way, the second conductive pillars 160 can be respectively formed in the openings H3 and connect the high-density interconnecting board 140 and the metal layer 122, and the first conductive pillars 150 and the second conductive pillars 160 can be in the same pass. The hole plating process is formed. Further, when the openings H3 are subjected to through-hole plating, it is also possible to fill the holes of the 201204209 openings H3 to make the second conductive pillars i6 实 a solid conductive pillar structure. Referring to FIG. 1F and FIG. 1G, the substrate 1 and the metal layer 122 are patterned to form an outer layer wiring layer 11 and a wiring layer 12, respectively. The method of patterning the substrate 10 and the metal layer 122 may be micro-picture rhyme. engraved. So far, the circuit board 100 has been substantially completed. In addition, after the circuit board 1 is completed, one or more wiring layers may be additionally formed on the insulating layer 136 or the outer wiring layer 110 by the build-up method or the stacking method, so that the outer wiring layer 110 or the wiring layer 120 Become the inner layer of the multilayer circuit board. Referring to FIG. II, it is worth mentioning that 'because the first conductive pillar 15〇 can extend to the inside of the south density inner wiring board 140, the first conductive pillar 15 is also formed in the process of forming the first conductive pillar 150. An inner wiring layer 144 may be attached to the high density interconnecting board 140, as shown in FIG. π, wherein the inner wiring layer 144 is, for example, the wiring layer 144a or 144b (please refer to FIG. 1H). Φ Fig. 2A to Fig. 2F are schematic cross-sectional views showing the flow of a method of manufacturing a wiring board according to another embodiment of the present invention. Referring to FIG. 2D, the circuit board 200 of the present embodiment is similar in structure to the circuit board 1 of the foregoing embodiment, and the difference in structural characteristics between the circuit boards 100 and 200 will be mainly described below. The circuit board 200 can be provided for at least one electronic component 300 (see FIG. 1G), and the circuit board 200 includes components similar to those of the circuit board 100. For example, the circuit board 200 also includes an outer circuit layer 11 The circuit layer 120, a high-density interconnecting board 14〇, and a plurality of first conductive pillars 201204209 150. However, the body layer 230 included in the wiring board 200 is different from the body layer 130 of the aforementioned circuit board 100. In detail, the body layer 230 includes an adhesive layer 232, a substrate 234, an insulating layer 236, and a half cured film 238. The pre-cured film 238 is disposed between the substrate 234 and the outer wiring layer 110, and the adhesive layer 232 is bonded between the high-density interconnecting board 140 and the outer wiring layer 110, and comprehensively covers the outer wiring layer 110, wherein the adhesive layer The 232 and insulating layer 236 may include a resin material. Since the adhesive layer 232 comprehensively covers the outer wiring layer 110, the insulating layer 236, the substrate 234 and the prepreg 238 are substantially not in contact with the outer wiring layer 110. Further, in the present embodiment, the substrate 234 has an opening H4, and the high-density interconnecting board 140 is positioned in the opening H4, so that the substrate 234 surrounds the high-density inner wiring board 140. The substrate 234 is a wiring substrate, so the substrate 234 can be substantially regarded as a wiring board. Taking Fig. 2D as an example, the substrate 234 example can be regarded as a multilayer wiring board having four wiring layers. In addition, the average wiring density of the high-density interconnecting board 140 may be greater than or equal to the average wiring density of the circuit substrate (ie, the substrate 234), and the number of layers of the high-density interconnecting board 140 may also be greater than or equal to the substrate 234. The number of layers. For example, the number of layers of the high-density interconnecting board 140 shown in FIG. 1H may be four layers, and the substrate 234 shown in FIG. 2D may have four layers of wiring layers, so from FIG. 1H and FIG. 2D, The number of layers of the high density interconnector plate 140 can be equal to the number of layers of the substrate 234. Of course, in other embodiments, the number of layers of the high density 201204209 interconnecting board 140 may also be greater than the number of layers of the substrate 234, so the number of layers of the high density interconnecting board 140 shown in FIG. 1H, and FIG. 2D The number of layers of substrate 234 is shown as an example and is not intended to limit the invention. When the substrate 234 is a circuit substrate, the thickness T2 of the substrate 234 may be greater than or equal to the thickness T1 of the high-density interconnecting board 140, such that the distance D1 between the high-density interconnecting board 140 and the outer wiring layer 110 is less than The distance D2 between the high-density interconnecting board 140 and the wiring layer 120 is such that the high-density interconnecting φ strip 140 is closer to the outer wiring layer 110 and farther from the wiring layer 120. Therefore, the electronic component 300 can be mounted close to the high-density interconnecting board 140, and electrically connected to the high-density interconnecting board 140 via the outer wiring layer 110 and the first conductive post 150. In addition, since the average wiring density of the high-density interconnecting board 140 is greater than the average wiring density of the substrate 234, and the average wiring density of both the high-density interconnecting board 140 and the substrate 234, the average wiring density of the electronic component 300 The average wiring density of the high-density interconnecting board φ 140 is relatively close, thereby facilitating mounting of the electronic component 300 near the high-density interconnecting board 140, as shown in Fig. 2D. In addition, although the circuit board 200 may further include at least one second conductive pillar 260, and the shape and material of the second conductive pillar 260 are substantially the same as those of the second conductive pillar 160, different from the foregoing embodiment, the embodiment The second conductive pillar 260 passes through the insulating layer 236 and is connected between the wiring substrate (ie, the substrate 234) and the wiring layer 120. As such, the substrate 234 can be electrically connected to the wiring layer 120 via the second conductive pillars 160. However, in his embodiment of 201204209, at least one second conductive pillar 160 may also be connected between the high density interconnecting board 140 and the wiring layer 120 through the insulating layer 236. The above mainly describes the structural features of the circuit board 200. Next, a method of manufacturing the wiring board 200 will be described in detail with reference to Figs. 2A to 2F. Since the manufacturing method of the circuit board 200 and the manufacturing method of the circuit board 100 described above all include the same flow, the following mainly describes the difference in manufacturing methods of the circuit boards 1 and 200. 'φ Referring to Fig. 2A, the high-density interconnecting board 140 is fixed on the substrate 10 after the through holes H1 are formed. The high-density interconnecting board 140 can be fixed to the substrate 10 by means of bonding. For example, an adhesive layer 232 is applied or laminated on the substrate, and the method of applying the adhesive layer 232 therein may be the same as the method of applying the adhesive layer 132. The adhesive layer 232 covers the plane 12 of the substrate 10 in a comprehensive manner, so that the through holes H1 are covered by the adhesive layer 232. Next, the high-density interconnecting board 140 is bonded to the adhesive layer 232 so as to fix the high-density interconnecting board 14 on the substrate 10. Referring to FIG. 2B and FIG. 2C, an insulating layer 236 covering the high-density interconnecting board 140 is formed on the substrate 10 and on the high-density interconnecting board 140, and a base is disposed between the insulating layer 236 and the substrate 10. The material 234, wherein the opening H4 is formed in the same manner as the opening H2. Further, a prepreg 238 is disposed between the substrate 234 and the substrate 1 , wherein the prepreg 238 is disposed between the adhesive layer 232 and the substrate 234. The method of forming the insulating layer 236 can be the same as the formation of the insulating layer 136.
[SI 20 201204209 法’例如形成絕緣層236的方法可以是將樹脂合在基 材234上。當配置半固化膠片⑽時,可將半固化膠片· 壓合在基板H)與基材234之間。此外,在進行上述壓合的 過程中,可加紐脂層與半固化膠片238,以使樹脂層與 半固化膠片238二者的膠材能流動,進而將開口 H4填滿。 如此,主體層230得以形成。[SI 20 201204209 Method] For example, the method of forming the insulating layer 236 may be to bond the resin to the substrate 234. When the prepreg film (10) is disposed, the prepreg film can be laminated between the substrate H) and the substrate 234. Further, in the above-described press-bonding process, a linole layer and a prepreg film 238 may be applied so that the glue material of both the resin layer and the prepreg film 238 can flow, thereby filling the opening H4. As such, the body layer 230 is formed.
值得-提的是,由於黏合層232全面性覆蓋基板1〇的 平面12,所以即使沒有半固化膠片238,黏合層232也可 乂黏5在基材234與基板1〇之間。可見,半固化膠片g 僅為本發明的選擇性元件而非必要元件,所以圖2b至圖 2D所不的半固化膠片238僅為舉例說明,並非限定本發明。 請參閱圖2C,在形成主體層230之後,可以形成至少 —根連接於基材234與金屬層122之間的第二導電柱260, 以及形成至少一根第一導電柱15〇。第二導電柱26〇的形 成方法與前述實施例中的第二導電柱160的形成方法相 同’因此以下不再重複介紹第二導電柱260的形成方法。 請參閱圖2C與圖2D,接著,圖案化基板10以及金屬 層122’以分別形成外層線路層11()以及線路層120。至此’ 線路板200基本上已製造完成。此外,上述圖案化的方法 與前述實施例相同,即圖案化基板1〇與金屬層122的方法 可以是微影蝕刻。另外,在線路板200製造完成之後,可 以利用增層法或疊合法,在絕緣層236或外層線路層110 21 201204209 .上額外製作出一層或多層線路層,使得外層線路層110或 線路層120成為多層線路板的内層線路層。 圖2E為一種包括多個圖2d中高密度内連線板的第一 線路母板的俯視示意圖,而圖2F為一種包括多個圖2D中 線路基板的第二線路母板的俯視示意圖 。請參閱圖2E與圖 2F,在本實施例中,高密度内連線板140可以是切割一第 一線路母板40而形成,而線路基板(即基材234)可以是 • 切割一第二線路母板34而形成。 第一線路母板40包括多個高密度内連線板140,而第 二線路母板34包括多個基材234。當第一線路母板40與 第二線路母板34製造完成之後,對第一線路母板40與第 二線路母板34進行切割,以得到多個高密度内連線板140 與多個基材234。因此,利用第一線硌母板40與第二線路 母板34’有利於大量製造高密度内連線板14〇與基材234。 • 基於高密度内連線板140的平均佈線密度大於基材 234的平均佈線密度,以及高密度内連線板14〇的層數大 於基材234的層數,因此製造高密度内連線板140的所需 時間會多於製造基材234的所需時間,所以高密度内連線 板140需要花費很多時間來製造。 然而,高密度内連線板140與基材234二者可以從不 同的線路母板(即第一線路母板40與第二線路母板34) 切割而成,而且第一線路母板40與第二線路母板34二者It is worth mentioning that since the adhesive layer 232 covers the plane 12 of the substrate 1 holly, the adhesive layer 232 can be adhered between the substrate 234 and the substrate 1 即使 even without the semi-cured film 238. It can be seen that the pre-cured film g is only a selective element of the present invention and is not an essential element, so the prepreg film 238 shown in Figures 2b to 2D is merely illustrative and not limiting. Referring to FIG. 2C, after the body layer 230 is formed, at least one second conductive pillar 260 connected between the substrate 234 and the metal layer 122 may be formed, and at least one first conductive pillar 15A may be formed. The second conductive pillar 26 is formed in the same manner as the second conductive pillar 160 in the foregoing embodiment. Therefore, the method of forming the second conductive pillar 260 will not be repeatedly described below. Referring to Figures 2C and 2D, the substrate 10 and the metal layer 122' are patterned to form the outer wiring layer 11 () and the wiring layer 120, respectively. At this point, the circuit board 200 has basically been manufactured. Further, the above-described patterning method is the same as the foregoing embodiment, that is, the method of patterning the substrate 1 and the metal layer 122 may be lithography etching. In addition, after the circuit board 200 is manufactured, one or more wiring layers may be additionally formed on the insulating layer 236 or the outer wiring layer 110 21 201204209 by the build-up method or the stacking method, so that the outer wiring layer 110 or the wiring layer 120 Become the inner layer of the multilayer circuit board. 2E is a top plan view of a first line mother board including a plurality of high density interconnect boards of FIG. 2d, and FIG. 2F is a top plan view of a second line mother board including a plurality of circuit boards of FIG. 2D. Referring to FIG. 2E and FIG. 2F, in the embodiment, the high-density interconnecting board 140 may be formed by cutting a first line mother board 40, and the circuit substrate (ie, the substrate 234) may be: • cutting a second The line mother board 34 is formed. The first line mother board 40 includes a plurality of high density interconnect boards 140, and the second line mother board 34 includes a plurality of substrates 234. After the first circuit mother board 40 and the second line mother board 34 are manufactured, the first line mother board 40 and the second line mother board 34 are cut to obtain a plurality of high-density interconnect boards 140 and a plurality of bases. Material 234. Therefore, the use of the first wire mother board 40 and the second line mother board 34' facilitates mass production of the high density interconnecting board 14 and the substrate 234. • The high-density interconnecting board 140 has an average wiring density greater than the average wiring density of the substrate 234, and the number of layers of the high-density interconnecting board 14〇 is larger than the number of layers of the substrate 234, thereby fabricating a high-density interconnecting board The time required for 140 may be more than the time required to manufacture the substrate 234, so the high density interconnector board 140 takes a lot of time to manufacture. However, both the high-density interconnector board 140 and the substrate 234 can be cut from different line mother boards (ie, the first line mother board 40 and the second line mother board 34), and the first line mother board 40 and Second line mother board 34
i SI 22 201204209 可以在同一段時間内同時製造。如此,可以減少製造線路 板200的所需時間,使得線路板200可以很快地製造完成。 综上所述,本發明的線路板所包括的外層線路層能電 性連接多種電子元件,其例如是晶片、被動元件、主動元 件或微機電系統元件,因此本發明的線路板可以供至少一 個電子元件所裝設,以使電流可以傳輸至電子元件,進而 讓電子裝置(例如手機、電腦或數位相機)以及家電用品 φ (例如電視、洗衣機或冰箱)運作。 其次,在本發明的線路板中,主體層内埋高密度内連 線板,而且高密度内連線板的平均佈線密度與層數皆玎大 於主體層中的線路基板(即基材234)的平均佈線密度與 層數’因而能在線路板的某一區域中形成分布較為密集直 層數較多的佈線;在線路板的另一區域中形成分布較為稀 疏且層數較少的佈線。如此,可以減少線路板的整體層數 • 以及整體厚度,並且能簡化線路板的佈線設計。 雖然本發明以前述實施例揭露如上,然其並非用以限 定本發明,任何熟習相像技藝者,在不脫離本發明之精神 和範圍内,所作更動與潤飾之等效替換,仍為本發明之專 利保護範圍内。i SI 22 201204209 can be manufactured at the same time. Thus, the time required to manufacture the wiring board 200 can be reduced, so that the wiring board 200 can be manufactured quickly. In summary, the outer circuit layer included in the circuit board of the present invention can electrically connect a plurality of electronic components, such as a wafer, a passive component, an active component, or a microelectromechanical system component, so that the circuit board of the present invention can provide at least one circuit board. The electronic components are mounted so that current can be transmitted to the electronic components, thereby allowing electronic devices (such as cell phones, computers or digital cameras) and home appliances φ (such as televisions, washing machines or refrigerators) to operate. Next, in the circuit board of the present invention, the high-density interconnecting board is buried in the main body layer, and the average wiring density and the number of layers of the high-density interconnecting board are larger than the wiring substrate (ie, the substrate 234) in the main body layer. The average wiring density and the number of layers 'is thus able to form a densely distributed straight layer in a certain area of the wiring board; in another area of the wiring board, a wiring having a relatively thin distribution and a small number of layers is formed. In this way, the overall number of layers of the board can be reduced, as well as the overall thickness, and the layout of the board can be simplified. While the present invention has been described above in the foregoing embodiments, it is not intended to limit the invention, and the equivalents of the modifications and retouchings are still in the present invention without departing from the spirit and scope of the invention. Within the scope of patent protection.
23 201204209 【圖式簡單說明】 圖1A至圖II為本發明一實施例之線路板的製造方法的流 程剖面示意圖。 圖2A至圖2F為本發明另一實施例之線路板的製造方法的 流程剖面示意圖。 【主要元件符號說明】23 201204209 [Brief Description of the Drawings] Figs. 1A to 1 are schematic cross-sectional views showing a process of manufacturing a wiring board according to an embodiment of the present invention. 2A to 2F are schematic cross-sectional views showing a process of manufacturing a wiring board according to another embodiment of the present invention. [Main component symbol description]
10 基板 12 平面 34 第二線路母板 40 第一線路母板 100 、 200 線路板 110 外層線路層 112、142a、142b 接墊 114 走線 120、144、144a、144b 線路層 122 金屬層 130 、 230 主體層 132 ' 232 黏合層 134 、 234 基材 136 、 236 絕緣層 140 高密度内連線板 146、148a、148b 導電柱 150 第一導電柱 24 201204209 160 、 260 第二導電柱 180 高密度内連線子板 238 半固化膠片 300 電子元件 D1 > D2 距離 HI 貫孔 H2、H4 開口 H3 開孔 SI 焊料塊 ΤΙ、T2 厚度 [si 2510 substrate 12 plane 34 second line mother board 40 first line mother board 100, 200 circuit board 110 outer circuit layer 112, 142a, 142b pads 114 traces 120, 144, 144a, 144b circuit layer 122 metal layers 130, 230 Body layer 132' 232 adhesive layer 134, 234 substrate 136, 236 insulation layer 140 high density interconnect plate 146, 148a, 148b conductive column 150 first conductive column 24 201204209 160, 260 second conductive column 180 high density interconnect Line board 238 Pre-cured film 300 Electronic components D1 > D2 Distance HI Through-hole H2, H4 Opening H3 Opening SI Solder block T, T2 thickness [si 25
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