TW201131829A - Thermally-enhanced hybrid LED package components - Google Patents
Thermally-enhanced hybrid LED package components Download PDFInfo
- Publication number
- TW201131829A TW201131829A TW099124277A TW99124277A TW201131829A TW 201131829 A TW201131829 A TW 201131829A TW 099124277 A TW099124277 A TW 099124277A TW 99124277 A TW99124277 A TW 99124277A TW 201131829 A TW201131829 A TW 201131829A
- Authority
- TW
- Taiwan
- Prior art keywords
- connection pad
- wafer
- light
- carrier
- illuminating device
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
- H01L33/647—Heat extraction or cooling elements the elements conducting electric current to or from the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00012—Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
Description
201131829 六、發明說明: 【發明所屬之技術領域】 本發明係有關於發光裝置(LED)封裝元件,且特 別是有關於一種含基材通孔(though-substrate via ; TS V ) 之LED封裝結構。 【先前技術】 近年來,如發光二極體(light-emitting diodes ; LED)、雷射二極體及紫外光光學偵測器等光學裝置已 被廣泛使用。ΙΠ族之氮化物,例如氮化鎵(GaN)及其 相關合金,已證實適用於形成上述光學裝置。III族之氮 化物具有尚能帶間隙及南電子飽和速率,亦使其成為高 溫與高速之功率電子裝置應用中之極佳選擇。 由於一般成長溫度下之氮的高平衡壓力,因此不容 易得到氮化鎵之塊狀結晶。因此,氮化鎵膜層與各別之 發光二極體通常形成於能符合氮化鎵特性之其他基材 上。藍寶石(sapphire ;八丨2〇3)為常用之基材材料。第i 圖顯示發光裝置(LED )封裴元件之剖面圖。發光裝置2 包含多層形成於藍寶石基材4上之以氮化鎵為主 (GaN-based)的膜層。藍寶石基材4更裝設於導線架 (lead frame ) 6上。電極8、1〇透過金線12使發光裝置 2電性連接至導線架6。 然而’經觀察’藍寶石具有低的熱傳導率(therrnal conductivity)。因此,由發光裝置2所產生的熱能無法 有效地透過藍寶石基板4逸散。反而,熱能需要透過發 0503-A34765TWF/jeff 4 201131829 光裝置2的頂端及金線12散出。然而,既然金線以必 需延伸至導線架6而長度較長,透過金線12的散熱效率 亦不佳。此外,電極U)佔據了晶片區域,而導致發光裝 置的光輸出區域未能最佳化。 、 【發明内容】 本發明提供一種發光裝置封裝元件,包括:一發光 裝置晶片;以及一承載晶片,包含:一第一
第二連接墊,位於此承載晶片之—表面上且以覆晶接合 方式與此發光裝置晶片接合;—第三連接墊及—第四連 接墊,位於此承載晶片之此表面上且各自與此第一連接 塾及此第二連接墊電性連接;及至少—基材通孔(tsv), 連接至此第一及此第二連接墊。 本發明更提供一種發光裝置封裝元件,包括:一散 熱器;—導線架,位於此散熱器上,且熱輕接(th_ally ⑶upled)此散熱器;一承載晶片,位於此導線架上,其 中此承載晶片包含複數個虛置基材通孔於其中;一第一 熱界面材料,位於此承載晶片及此導線架之間,其中此 第-熱界面材料使此導線架電性絕緣於此承載晶片中所 有的虛置基材通孔;—第—連接墊及—第二連接塾,位 於此承載晶片之-表面上,其中此第一連接墊及此第二 連接墊打線連接至此導線架;以及—發光裝置晶片,以 覆晶接合方式接合於此承載3上,其中此發光裝置晶 片之兩電㈣性連接至此第一連接墊及&第二連接墊。 為讓本發明 < 上述和其他目#、特徵、和優點能更 0503-A34765TWF/jeff 5 201131829 明顯易懂,下文特舉出較佳實施例,並配合所附圖式, 作詳細說明如下: 【實施方式】 本發明接下來將會提供許多不同的實施例以說明本 發明中不同的特徵。各特定實施例中的構成及配置將會 在以下作詳細說明以闡述本發明之精神,但這些實施例 並非用於限定本發明。 本發明在此揭示一種新穎的發光裝置(light-emitting device ; LED)封裝元件及其製造方法,並將舉例本發明 實施例之製造中間過程,也將討論這些實施例之變化。 在本發明各種舉例之圖示及實施例中,相似元件符號表 示為相似元件。 第2圖顯示為晶圓100,其包含形成於基材20上之 發光裝置22。在一實施例中,基材20由藍寶石(透明的 Al2〇3)形成,或者,亦可由其他性質與發光裝置22所 使用之膜層(包含III族、V族元素或亦稱為III_V化合 物半導體材料)相近的材料形成。基材20亦可為碳化梦 基材、覆有碳化矽層之矽基材、矽鍺基材或其他可適用 之半導體基材。 在本實施例中,未摻雜之氮化鎵(u-GaN ; un-doped GaN)層24形成於基材20上,且可能與其接觸。在一實 施例中,未摻雜之氮化鎵層24實質上無氮及鎵以外的其 他元素存在。發光裝置22形成於未摻雜之氮化鎵層24 上,且可能與其接觸。在本實施例中,每個發光裝置22 0503-A34765TWF/jefF 6 201131829 皆包含η型氮化鎵層(摻雜n型雜質之氮化鎵)26、多 重量子井(multiple quantum well ; MQW) 28、ρ 型氮化 鎵層(掺雜p型雜質之氮化鎵)、反射板(reflector) 30 及頂部電極(亦為連接墊)34。反射板32可由例如金屬 形成。多重量子井28可由例如氮化銦鎵(InGaN)形成, 並用以作為發光之主動層。上述膜層26、28、30、32、 34之形成乃習知技術,故在此不重複贅述。在本實施例 中,膜層26、28、30之形成方法包含磊晶成長。可以理 _ 解的是,發光裝置22可具有多種設計型態,第2圖僅顯 示所有可得之變化例中之其中一種示範例。例如,膜層 26、28及30的材料皆可不同於前述的材料,且可包含三 元的(ternary) III-V化合物半導體材料,例如GaAsP、 GaPN、AlInGaAs、GaAsPN、AlGaAs 或其類似物。並且, η型氮化鎵層26及ρ型氮化鎵層28的位置可作替換。 每個發光裝置22皆更包含連接墊(bond pads) 38, 用以連接η型氮化鎵層26。因此,連接墊34及38用於 φ 施予電壓至各別的發光裝置22,使各別的發光裝置22激 發放光。在一實施例中,在發光裝置22運作(發光)時, 每個發光裝置22中至少一電極34有電流流經,但亦有 一或多個電極34為虛置電極,其在施予電壓時不會有電 流流經。 焊料凸塊36 (包含主動焊料凸塊36Β及虛置焊料凸 塊36Α)、40形成於發光裝置22上。焊料凸塊36及40 可使用常用之焊料,例如無鉛焊料、共晶焊料(eutectic solders)或其類似物。在形成焊料凸塊36及40後,將 0503-A34765TWF/jeff 7 201131829 晶圓100分割成複數個發光裝置晶片(led chip) 44, 其中每個發光裝置晶片44皆含有一或多個發光裝置22。 在此實施例中,每個發光裝置晶片44含有多個設置於同 一基材20上之發光裝置,這些在同一發光裝置晶片中的 發光裝置22稱為LED顯示單元(LED tiles)。自晶圓 100分割出發光裝置晶片44後,可在發光裝置晶片44的 邊緣形成切割斜角(bevel cuts )(未顯示於第2圖中, 請參見第4圖)’以使邊緣與其所相對之基材2〇表面形 成斜角(slant angle ’不等於90。)。切割斜角42可減少 所形成之封裝結構的應力。 參見第3圖,提供承載基材6〇。承載基材6〇包含基 材62,其可為半導體基材,例如矽基材或介電基材。基 材通孔(through-substrate via; TSV) 64 形成於基材 62 中,且電性連接位於基材62相反側之元件。基材通孔64 可由銅或其他金屬形成,例如鶴或前述之合金。連接塾 66 (包含66A、66B及66C)形成在承載基材6〇之一側 上並與基材通孔64相連。 雖然可對基材通孔64施予電壓,基材通孔64為虛 置基材通孔,非用以導電。在本說明書中,既然虛置基 材通孔制於散熱,則虛置基材通孔64亦可料熱基材 通孔(thermal TSVs)。同樣地,各別之發光裝置晶片 44發光時(在發光裝置晶片44接合該承載晶片上後), 有電流流經之連接墊66稱為主動連接墊66B或66(:,無 電流流經之連接墊稱為虛置連接墊66A。歐姆線68可視 需要埋設在承載晶圓60中。歐姆線68可相互連接各個 0503-A34765TWF/jeff 8 201131829 連接塾’以使連接塾可用於調整(regualte)電流流經將 要接合在承載晶圓60上之發光裝置晶片44。或者,不形 成歐姆線,以電阻極小的金屬線取代之。 參見第4圖,自晶圓100分割出來之多個發光裝置 晶片44以覆晶接合方式接合至承載晶圓上。在接合 製程中,回銲焊料凸塊36及4〇以連接(j〇in)連接墊34 及38。可視需要填充底部填膠72至發光裝置晶片44及 承載晶圓60之間的空隙中。切割斜角42可減少填入底 φ 部填膠72之困難度。 在發光裝置晶片44接合至承載晶圓6〇之後,發光 晶片裝置44可覆蓋(垂直重疊)主動連接墊66B。然而, 發光裝置晶片44未覆蓋連接墊66C。換句話說,連接墊 66C位在發光裝置晶片44垂直延伸的邊界之外,且未被 底部填膠所覆蓋(如有填充)。 參見第5圖,將石夕膠透鏡(siiic〇ne ienses )塑模() 於發光裝置晶片44上。矽膠透鏡74的塑模為習知技術, • 故在此不重複贅述。每個矽膠透鏡74皆可覆蓋所對應之 發光裝置晶片44。在未填充底部填膠72之實施例中,亦 可將矽膠(silicone)填充至發光裝置晶片44及承載晶圓 60之間的空隙中’發揮與底部填膠相同的功能。連接墊 66C係為暴露的’未被矽膠透鏡74所覆蓋。 接著’可沿著切割道63 ( scribe line )分割承載晶圓 60,以使發光裝置封裝元件分離成多個獨立的封裝體。 因此,承載晶圓60分離成多個承載晶片60,,且每個承 載晶片60’與至少一發光裝置晶片44接合。 0503-A34765TWF/jeff 9 201131829 如第5圖所示,此封裝體結構包含可用於打線連接 的連接墊66C。第6圖顯示已進行打線連接後之封裝體 之實施例,其中如第5圖所示之封裝元件更可裝設於導 線架上。連接墊66C可透過導線80連接至導線架78。 因此,發光裝置晶片44透過導線80電性連接至導線架 78。導線80可為金線,或由其他金屬材料形成,例如銀、 铭及其類似物。 承載晶片60’可藉由熱界面材料(thermal interface material ; TIM)層79與導線架78黏接。熱界面材料層 79可有具有良好導熱能力之介電材料形成。在本實施 中,熱界面材料層79之熱傳導係數可大於33 W/mK,且 可介於33W/mK至318 W/mK之間。在一實施例中,熱 界面材料79係由有機膏體(organic paste )或純的合金 或金屬形成,其可填入至導線架78中,並在承載晶片60’ 設置於導線架78後,加熱回銲及固化。 第6圖更顯示將封裝元件裝設至散熱器(heat sink) 82上。在一實施例中,熱界面材料86連接散熱器82及 導線架78,熱界面材料86可使用近似於熱界面材料層 79之材料。散熱器82可包含内部空氣通道(internal air ducts) 84以增加散熱器82之散熱面積。再者,散熱器 82可用於支撐設置於其上之封裝元件,並可電性絕緣於 電流輸入/輸出單元(current I/Os)。因此,由發光裝置 晶片44所產生的熱可發散至承載晶片60’,及發散至散 熱器82。可以看出的是,發光裝置晶片44至散熱器82 的通道中,無導熱能力不佳的材料存在。因此,在發光 0503-A34765TWF/jeflf 10 201131829 ==散熱器82之間的熱阻(-一e-— 低,使传第6圖所示之封裝元件具 封裝元件因而適於應用於高功率發光裝置:其=敎= 對於裝置發揮最佳效果極為重要。 -1、效果 經發現,當電壓施予至線80及連接塾66C時,虛置
無任何電流流經。然而,虛置焊料凸塊36A 可幫助傳導發光裝置晶片44所產生的熱通過承載 6〇’至散熱器82。 如第6圖所示之封裝元件可稱為混合式封裝元件。 Τ然發光裝置晶片44首先以覆晶接合方式接合在承載晶 60上所形成之結構更接合至其他電路元件上,例 如以導線連接至導線架。此縣設計可使光僅朝一方向 發出(如第6圖之頂部),而熱由相反方向逸散(如第6 圖之底部)。因此’如本發明各種實施例所述之發光裝 置封裝兀件具有良好的發光效率及散熱效率,且優於傳 統發光裝置封裝體,該傳統發光裝置封裝體的散熱器中 為導熱性差的材料。例如,由發光裝置晶片44所產生的 熱可由多個虛置焊料凸塊36A及熱基材通孔64發散至承 載晶片60’中。因此,如第6圖所示之發光裝置封裝元件 散熱能力得以改善。此外,由發光裝置晶片44所發出的 光自基材2G發出(本實施例中基材2G係為透明的), 且不會被任何線或連接墊所阻擋。因此,相較於部分的 光會被封裝體元件所阻擋之傳統發光裝置封裝體,光輸 出效率传以改善。 雖然本發明已以較佳實施例揭露如上,然其並非用 〇503-A34765TWF/jefT π 201131829 以限疋本發明,任何所屬技術領域中具有通常知識者, 在不脫離本發明之精神和範圍内,當可作更動、替代與 再者本發明之保護範圍並未侷限於說明書内所 述特定實施例中的製程、機器、製造、物質組成、裝置、 f法及步驟’任何所屬技術領域巾具有通常知識者可從 =發1月揭示内容中理解現行或未來所發展出的製程、機 =製造、物質組成、裝置、方法及步驟,只要可以在 =所述錢财實施大體相同功能或獲得大體相同結 、Ι、Γ使用於本發明中。因此’本發明之保護範圍包括 程、機器、製造、物f組成、裝置、方法及步驟。 另外’每一申請專㈣圍構成個別的實_,且本發明 之保護範圍也包括各個巾請專利範圍及實施例的組合。 〇503-A34765TWF/jeff 12 201131829 【圖式簡單說明】 第1圖顯示形成於藍寶石基材上之傳統發光裝置之 剖面圖。 第2至6圖顯示依照本發明之一實施例之含發光裝 置之封裝元件於各種中間製造階段之剖面圖。
【主要元件符號說明】 2〜發光裝置; 6〜導線架; 12〜金線; 22〜發光裝置; 26〜η型氮化鎵層; 3〇〜ρ型氮化鎵層; 34〜頂部電極; 36Α〜虛置焊料凸塊; 38〜連接墊; 44〜發光裝置晶片; 62〜基材; 64〜基材通孔; 66Α〜虛置連接墊; 68〜歐姆線; 74〜矽膠透鏡; 79〜熱界面材料層; 82〜散熱器; 86〜熱界面材料; 4〜藍寶石基材, 8、10〜電極; 20〜基材; 24〜未摻雜之氣化鎵層; 28〜多重量子井; 32〜反射板; 36、40〜焊料凸塊; 3 6Β〜主動焊料凸塊; 42〜切割斜角; 60、60’〜承載晶圓; 63〜切割道; 66〜連接塾; 66Β、66C〜主動連接墊; 72〜底部填膠; 78〜導線架; 80〜導線; 84〜内部空氣通道; 100〜晶圓。 0503-A34765TWF/jeff 13
Claims (1)
- 201131829 七、申請專利範圍: 1. 一種發光裝置封裝元件,包括: 一發光裝置晶片;以及 一承載晶片,包含: 一第一連接墊及一第二連接墊,位於該承載晶片之 一表面上且以覆晶接合方式與該發光裝置晶片接合; 一第二連接墊及一第四連接墊,位於該承載晶片之 該表面上且各自與該第一連接墊及該第二連接墊電性連 接;及 至少一基材通孔(TSV),連接至該第一及該第二連 接墊。 2. 如申請專利範圍第1項所述之發光裝置封裝元 件,更包含一透鏡,覆蓋該發光裝置晶片及一部份的該 承載基材,且未覆蓋該第三連接墊及該第四連接墊。 3. 如申凊專利範圍第1項所述之發光裝置封裝元 件,更包含一第一連接線及一第二連接線,各自打線連 接該第一連接墊及第二連接墊至該第三連接墊及該第四 連接墊。 4. 如申凊專利範圍第3項所述之發光裝置封裝元 件’更包含: 一導線架,連接至該第一連接線及該第二連接線; 及 一熱界面材料(TIM ),位於該承載晶片及該導線架 之間並將其連接,其中該熱界面材料使該導線架電性絕 緣於該承載晶片中所有的基材通孔。 〇503-A34765TWF/jefF 14 201131829 5_如申請專利範圍第1項所述之發光裝置封裝元 2,更包含一散熱器連接至該承載晶片上,其中該散熱 器及該發光裝置晶片位於該承載晶片之相反側。 6.如申請專利範圍第1項所述之發光裝置封裝元 件,更包含: 一虛置基材通孔,位於該承載晶片中;及 虛置焊料凸塊’電性連接該虛置基材通孔及該發 光裝置晶片; 其中該虛置基材通孔包含一連接至該虛置焊料凸塊 之第一終端,及一電性絕緣之第二終端。 7. 如申請專利範11帛1項所述之發光裝置封裝元 件’其中該承载晶片包含—歐姆線,電性純該第 接墊及該第三連接墊。 8. —種發光裝置封裝元件,包括: 一散熱器; -導線架,位於該散熱器上,且熱麵接〇herm coupled)該散熱器; 一承載晶片,位於該導線架上,其中該承 含複數個虛置基材通孔於其中; 匕 -第-熱界面材料,位於該承载晶片及該 ::其二 =一熱界面材料使該導線架電性絕緣於該 載日日片中所有的虛置基材通孔; 承 -第-連接墊及一第二連接墊,位於該承 :該=架其:及該第一連接墊及該第二連接塾打綠連接 0503-A34765TWF/jefF 15 201131829 一發光裝置晶片,以覆晶接合方式接合於該承載晶 片上,其中該發光裝置晶片之兩電極電性連接至該第一 連接墊及該第二連接墊。 9. 申請專利範圍第8項所述之發光裝置封裝元件,其 中該散熱器内部包含空氣通道。 10. 申請專利範圍第8項所述之發光裝置封裝元件, 其中在發光裝置晶片激發發放光時,該承載晶片中之複 數個虛置通孔未有電流流經,且其中該複數個虛置基材 通孔透過虛置焊料凸塊與該發光裝置晶片上的電極接 合0 0503-A34765TWF/jefF 16
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/715,872 US8183580B2 (en) | 2010-03-02 | 2010-03-02 | Thermally-enhanced hybrid LED package components |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201131829A true TW201131829A (en) | 2011-09-16 |
TWI458140B TWI458140B (zh) | 2014-10-21 |
Family
ID=44530543
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW099124277A TWI458140B (zh) | 2010-03-02 | 2010-07-23 | 發光裝置封裝元件 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8183580B2 (zh) |
CN (1) | CN102194972B (zh) |
TW (1) | TWI458140B (zh) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101630152B1 (ko) * | 2010-02-24 | 2016-06-14 | 엘지디스플레이 주식회사 | 하이브리드 발광다이오드 칩과 이를 포함하는 발광다이오드 소자 및 이의 제조방법 |
TW201225246A (en) * | 2010-12-06 | 2012-06-16 | Ind Tech Res Inst | Multi-chip stack structure |
CN102800798B (zh) * | 2011-10-26 | 2016-06-08 | 清华大学 | 一种led封装结构及其封装方法 |
CA2854771A1 (en) * | 2013-06-21 | 2014-12-21 | J2 Light Inc. | Lighting system and method to control a lighting system |
US9496297B2 (en) * | 2013-12-05 | 2016-11-15 | Optiz, Inc. | Sensor package with cooling feature and method of making same |
CN108091721A (zh) * | 2017-12-11 | 2018-05-29 | 阜阳师范学院 | 一种用于硅基光电集成电路芯片中的光电探测器及制备方法 |
US11978839B2 (en) * | 2019-02-03 | 2024-05-07 | Quanzhou Sanan Semiconductor Technology Co., Ltd. | Light-emitting device |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4044265B2 (ja) * | 2000-05-16 | 2008-02-06 | 三菱電機株式会社 | パワーモジュール |
US20040188696A1 (en) * | 2003-03-28 | 2004-09-30 | Gelcore, Llc | LED power package |
WO2006005062A2 (en) * | 2004-06-30 | 2006-01-12 | Cree, Inc. | Chip-scale methods for packaging light emitting devices and chip-scale packaged light emitting devices |
TWI294694B (en) | 2005-06-14 | 2008-03-11 | Ind Tech Res Inst | Led wafer-level chip scale packaging |
US7539022B2 (en) * | 2005-10-04 | 2009-05-26 | Phoenix Precision Technology Corporation | Chip embedded packaging structure |
US20090273002A1 (en) | 2008-05-05 | 2009-11-05 | Wen-Chih Chiou | LED Package Structure and Fabrication Method |
US7989270B2 (en) * | 2009-03-13 | 2011-08-02 | Stats Chippac, Ltd. | Semiconductor device and method of forming three-dimensional vertically oriented integrated capacitors |
-
2010
- 2010-03-02 US US12/715,872 patent/US8183580B2/en active Active
- 2010-07-23 TW TW099124277A patent/TWI458140B/zh active
- 2010-07-29 CN CN2010102415561A patent/CN102194972B/zh active Active
Also Published As
Publication number | Publication date |
---|---|
TWI458140B (zh) | 2014-10-21 |
CN102194972B (zh) | 2013-06-19 |
US20110215361A1 (en) | 2011-09-08 |
CN102194972A (zh) | 2011-09-21 |
US8183580B2 (en) | 2012-05-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI430483B (zh) | 發光裝置封裝元件及其製造方法 | |
US8183578B2 (en) | Double flip-chip LED package components | |
US7683396B2 (en) | High power light emitting device assembly utilizing ESD protective means sandwiched between dual sub-mounts | |
US9362474B2 (en) | Vertical LED chip package on TSV carrier | |
TWI433358B (zh) | 發光二極體晶片結構 | |
US9583681B2 (en) | Light emitter device packages, modules and methods | |
US9443903B2 (en) | Low temperature high strength metal stack for die attachment | |
TW200814350A (en) | A light emitting device and the manufacture method thereof | |
TWI458140B (zh) | 發光裝置封裝元件 | |
US20100224890A1 (en) | Light emitting diode chip with electrical insulation element | |
JP7100980B2 (ja) | Ledパッケージ | |
TWI720970B (zh) | 發光裝置冷卻 | |
TWI335114B (en) | Optimized contact design for thermosonic bonding of flip-chip devices | |
CN102104037B (zh) | 一种具有集成电路的发光器件及其制造方法 | |
KR20150035113A (ko) | 발광 소자 및 그 제조 방법 | |
CN201904337U (zh) | 一种具有集成电路的发光器件 | |
TW201006000A (en) | Light emitting diode and method of making the same | |
GB2551154B (en) | Light-emitting diode package and method of manufacture | |
TW202407998A (zh) | 用於多晶片發光裝置的晶圓級製造 | |
EP2810307A1 (en) | Low temperature high strength metal stack for die attachment | |
TW201210096A (en) | Package structure of LED | |
TW201225361A (en) | Light-emitting diode lamp with low thermal resistance |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GD4A | Issue of patent certificate for granted invention patent |