TW201128707A - Active device array substrate and fabricating method thereof - Google Patents

Active device array substrate and fabricating method thereof Download PDF

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Publication number
TW201128707A
TW201128707A TW99103500A TW99103500A TW201128707A TW 201128707 A TW201128707 A TW 201128707A TW 99103500 A TW99103500 A TW 99103500A TW 99103500 A TW99103500 A TW 99103500A TW 201128707 A TW201128707 A TW 201128707A
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Taiwan
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metal layer
layer
array substrate
active device
device array
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TW99103500A
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Chinese (zh)
Inventor
Po-Lin Chen
Yu-Min Lin
Chih-Yuan Lin
Hui-Chun Chen
Chun-Nan Lin
Wen-Ching Tsai
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Au Optronics Corp
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Priority to TW99103500A priority Critical patent/TW201128707A/en
Publication of TW201128707A publication Critical patent/TW201128707A/en

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Abstract

An active device array substrate includes a substrate and at least one patterned multiple metal layer. The patterned multiple metal layer is disposed on the substrate, wherein the patterned multiple metal layer at least includes a copper layer. The patterned multiple metal layer is formed by etching with an etchant, wherein the etchant includes an oxidant, a pH value adjuster and a metal ion chelating agent. A cross-section of the patterned multiple metal layer which is perpendicular to the substrate is a trapezoid, and a base angle of the trapezoid is less than 60 DEG C.

Description

201128707 AU0910118 33470twf.doc/n 六、發明說明: 【發明所屬之技術領域】 本發明是有關於一種主動元件陣列基板,且特別是有 關於一種具有銅金屬層的主動元件陣列基板。 【先前技術】 隨著薄膜電晶體液晶顯示器(TFT_LCD)面板尺寸愈做 愈大,伴隨的是金屬導線阻值不夠低所產生的電阻電容 (RC)延遲效應,因而,導致訊號在傳輸的過程中產生扭曲 失真,而影響面板晝質的呈現。利用阻值低的銅金屬來形 成金屬導線,可以有效降低Rc延遲效應。同時,銅層與 基板之間還需要一鉬層以避免銅離子擴散至基板中。然 而,銅層與鉬層的雙層結構在蝕刻後,常存在傾斜角(taper angle)過高’即大於6〇度、關鍵尺寸誤差(criticd (CD) bias)過大與鉬層底切等問題。 【發明内容】 本發明提供一種主動元件陣列基板,其具有較佳的電 性效能。 本發明提供一種主動元件陣列基板的製作方法,其可 避免後績製程薄膜之缺陷或斷路等問題。 本發明提出一種主動元件陣列基板’其包括基材及至 少一圖案化多層金屬層。圖案化多層金屬層配置於基材 上,其中圖案化多層金屬層至少包括銅層。圖案化多層金 201128707 lulls 33470twf.doc/n 2 刻賴刻而成,烟液 屬離子養合劑。圖案化 二= 剖面是梯形’且梯形的底角小於6〇。。 «直基材之 下列ίΠί —種主動板的製作方法,包括 卜幻步驟。首先,提供基材 花 案化多層全;!_ mu * 触祕刻形成圖 刻化多層金屬層是以钮刻液㈣而成,韻 ::。層金屬層在垂直基材之剖面是梯形,且梯形的底= 包括ί本ΓΓ之—實施例中,上述之圖案化多層金屬層更 G括第-金屬層與第二金屬層,銅層位料—金屬層盘第 =金1層之間,第-金屬層與第二金屬層例如是^為 、鈦、紹、氮化鉬、氮化鈦、氮化紹、钥合金、鈦合金 或銘合金。 、在本發明之一實施例中,上述之銅層的厚度例如是介 ==00埃至6000埃,第一金屬層與第二金屬層的厚度例 如是介於100埃至500埃。 在本發明之一實施例中,上述之梯形的底角例如是介 於 25。至 45。。 在本發明之一實施例中,上述之氧化劑例如是雙氧 火、過硫酸钾(KHS05)、氯化銅(CuCl2)或氯化鐵(peci3)。 在本發明之一實施例中’上述之金屬離子螯合劑例如 疋才了檬酉夂、草酸、乙二胺四乙酸(ethylenediaminetetraacetic 201128707 AU0910118 33470twf.doc/n acid, EDTA ) 或反-環己烯二胺四酸 (cyclohexanedinitrilotetraacetic acid, CDTA)。 在本發明之一實施例中,上述之蝕刻液的酸鹼值例如 是小於6。 基於上述,在本發明所提出之主動元件陣列基板中, 由於圖案化多層金屬層在垂直基材之剖面是梯形,且梯形 的底角小於60。,因此可使得主動元件陣列基板具有較佳 的電性效能。 、此外,藉由本發明所提出之主動元件陣列基板的製作 方法,能製作出在垂直基材之梯形剖_底角小於6〇。的 圖案化多層金屬層,進而可避免後續製程薄膜之缺 路等問題。 為讓本發明之上述特徵和優點能更明顯易懂, 舉實施例,並配合_目式作詳細說明如下。 L貫施万式】 圖匕至圖1E是依照本發明之一實施例之主動元 列基板的製造流程剖面圖。圖2 全屬声“ 為圖1c中的圖案化多層 方向與圖lc的剖面方向互相垂直。I、中圖2的剖面 首先’請先參照圖1A,提 =透明材料、不透明材料、可“== 接著,於基材_上形成閉極。雜的形成方法例如 5 201128707 Λυυ>ιυΐι8 33470twf.doc/n 疋以蝕刻液蝕刻形成作為閘極的圖案化多層金屬層1〇2。 ,中,圖案化多層金屬層1〇2至少包括銅層腿。在本實 施例中’圖案化多層金屬層1〇2,除了包括銅層忉孔之外, 更可包括金屬層咖、ι〇2。’金屬層丨似位於基材⑽ 且銅層102b位於金屬層1〇2a與金屬層1〇几之間。金 简層102a、lG2e例如是分別為鉑、鈦、铭、氮化銦、氮化201128707 AU0910118 33470twf.doc/n VI. Description of the Invention: [Technical Field] The present invention relates to an active device array substrate, and more particularly to an active device array substrate having a copper metal layer. [Prior Art] As the size of the thin film transistor liquid crystal display (TFT_LCD) panel becomes larger and larger, the resistance of the metal wire is not sufficiently low, and the resistance of the resistor (RC) is delayed, thereby causing the signal to be transmitted. Distortion distortion is generated, which affects the appearance of panel enamel. The use of copper metal with low resistance to form metal wires can effectively reduce the Rc delay effect. At the same time, a molybdenum layer is required between the copper layer and the substrate to prevent copper ions from diffusing into the substrate. However, after the two-layer structure of the copper layer and the molybdenum layer, there is often a problem that the taper angle is too high, that is, greater than 6 〇, the critical dimension error (criticd (CD) bias) is too large, and the molybdenum layer is undercut. . SUMMARY OF THE INVENTION The present invention provides an active device array substrate having better electrical performance. The present invention provides a method of fabricating an active device array substrate, which can avoid problems such as defects or open circuits of a post-process film. The present invention provides an active device array substrate 'which includes a substrate and at least one patterned multilayer metal layer. The patterned multilayer metal layer is disposed on the substrate, wherein the patterned multilayer metal layer comprises at least a copper layer. Patterned multi-layer gold 201128707 lulls 33470twf.doc/n 2 Engraved, the smoke liquid is an ion-raising agent. Patterning 2 = The profile is trapezoidal and the base angle of the trapezoid is less than 6〇. . «Straight substrate The following Π Π — - the production method of the active board, including the psychedelic steps. First, provide the substrate with a multi-layered pattern; _ mu * Touching the secret to form a picture The engraved multi-layer metal layer is made of button engraving (four), rhyme ::. The metal layer of the layer is trapezoidal in the cross section of the vertical substrate, and the bottom of the trapezoid is included. In the embodiment, the patterned multi-layer metal layer further includes the first metal layer and the second metal layer, and the copper layer Between the metal layer and the first metal layer, the first metal layer and the second metal layer are, for example, titanium, titanium, molybdenum nitride, titanium nitride, nitrided, key alloy, titanium alloy or alloy. In one embodiment of the invention, the thickness of the copper layer is, for example, =1 00 Å to 6,000 Å, and the thickness of the first metal layer and the second metal layer is, for example, 100 Å to 500 Å. In an embodiment of the invention, the base angle of the trapezoid is, for example, 25 . To 45. . In one embodiment of the invention, the oxidizing agent is, for example, hydrogen peroxide, potassium persulfate (KHS05), copper chloride (CuCl2) or ferric chloride (peci3). In one embodiment of the present invention, the above-mentioned metal ion chelating agent such as lanthanum, oxalic acid, ethylenediaminetetraacetic acid (ethylenediaminetetraacetic 201128707 AU0910118 33470twf.doc/n acid, EDTA) or trans-cyclohexene Cyclohexanedinitrilotetraacetic acid (CDTA). In an embodiment of the invention, the etchant has a pH of, for example, less than 6. Based on the above, in the active device array substrate proposed by the present invention, since the patterned multilayer metal layer is trapezoidal in the cross section of the vertical substrate, the trapezoid has a bottom angle of less than 60. Therefore, the active device array substrate can have better electrical performance. Further, by the method for fabricating the active device array substrate proposed by the present invention, it is possible to produce a trapezoidal cross-sectional angle of less than 6 Å in the vertical substrate. The patterned multi-layer metal layer can avoid problems such as the lack of subsequent process films. The above features and advantages of the present invention will become more apparent from the description of the embodiments. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1E is a cross-sectional view showing the manufacturing process of an active cell substrate in accordance with an embodiment of the present invention. Figure 2 is all sound "The patterning multilayer direction in Figure 1c is perpendicular to the cross-sectional direction of Figure lc. I, the section of Figure 2 is first, please refer to Figure 1A first, mention = transparent material, opaque material, can be "= = Next, a closed pole is formed on the substrate_. The impurity formation method is, for example, 5 201128707 Λυυ>ιυΐι8 33470twf.doc/n 疋 etching to form a patterned multilayer metal layer 1〇2 as a gate electrode. , the patterned multi-layer metal layer 1〇2 includes at least a copper layer leg. In the present embodiment, the patterned multilayer metal layer 1〇2 may include a metal layer, ι 2, in addition to the copper layer pupil. The metal layer is located on the substrate (10) and the copper layer 102b is located between the metal layer 1〇2a and the metal layer. The gold layer 102a, lG2e are, for example, platinum, titanium, indium, indium nitride, nitride

f、氮化銘、銦合金、鈦合金或紹合金。銅層102b的厚产 利如是介於1000埃至6〇〇〇埃,金屬層·、職的厚^ 例如是分別介於100埃至5〇〇埃。 X b ,外,圖案化多層金屬層1〇2在垂直基材ι〇〇之剖面 ΐ介;^且梯形的底角0 1小於6〇。。梯形的底角0 1例如 Β /至45。需注意的是,在此實施例中所謂的梯形 ^上、斤f上(SUbStantially)」為梯形的情況,亦即只要是 施例中即屬於本朗狀獅。此外,在此實 angle)」。的底角即為習知所稱之「傾斜角(_er 的二:包==案:多層金屬層102的過程中所使用 其中,翁# 氧化4、馱鹼值調整劑與金屬離子螯合劑。 金屬離子例如是魏水、過硫酸鉀、氯灿或氣化鐵。 環劑例如是摔檬酸、草酸、乙二胺四乙酸或反- 如是小於t四酸。此外,_液為酸性溶液,其酸驗值例 以覆於基材1〇0上形成介電層ι〇4, 案化多層金屬層撤。介電層刚的形成方法例 201128707 AU0910118 33470hvf.d〇c/n 如疋藉由化予氣相沈積法(chemica〗 ⑽, CVD)或其他合適的薄膜沈積技術,但不限於此。介電層 104可為單層結構或多層結構,且其材料例如是無機^ 料、其他介電材料、或上述之組合。本實關之介電層⑽ 的材料是以氧切、氮_或氮氧切料電材料為例進 行說明。f, nitride, indium alloy, titanium alloy or Shao alloy. The thickness of the copper layer 102b is, for example, between 1000 Å and 6 Å, and the thickness of the metal layer is, for example, between 100 Å and 5 Å, respectively. X b , outside, the patterned multilayer metal layer 1 〇 2 is perpendicular to the cross section of the substrate 〇〇 ; ; ^ and the base angle 0 1 of the trapezoid is less than 6 〇. . The base angle 0 1 of the trapezoid is, for example, Β / to 45. It should be noted that in the embodiment, the so-called trapezoidal sum (SUbStantially) is trapezoidal, that is, as long as it is in the embodiment, it belongs to the lion. In addition, here is the actual angle). The bottom angle is what is known as the "tilt angle (_er 2: package == case: used in the process of the multilayer metal layer 102, Weng #4, 驮 alkalinity modifier and metal ion chelating agent. The metal ion is, for example, Wei water, potassium persulfate, chloro can or iron oxide. The ring agent is, for example, citric acid, oxalic acid, ethylenediaminetetraacetic acid or reverse - such as less than t tetraacid. Further, the _ liquid is an acidic solution, The acid value is exemplified to form a dielectric layer ι 4 on the substrate 1 〇 0, and the multilayer metal layer is removed. The dielectric layer forming method is an example of the method 201128707 AU0910118 33470hvf.d〇c/n The vapor deposition method (chemica) (10), CVD, or other suitable thin film deposition techniques, but is not limited thereto. The dielectric layer 104 may be a single layer structure or a multilayer structure, and the materials thereof are, for example, inorganic materials, other materials. The electrical material, or a combination thereof, is described by taking the oxygen-cut, nitrogen- or oxynitride electrical material as an example.

接下來,於圖案化多層金屬層1〇2上方的介電層川4 上形成堆叠設置的通道層1G6以及_接觸層⑽。θ通道 層106與歐姆接觸層應例如是摻雜滚度不同的半導體 層。通道層1G6與歐姆接觸層⑽的形成方法例如是使用 合適的沈積法及圖案化方法所形成,於此不再贅述。 之後,請參照圖ic,於圖案化多層金屬層1〇2兩側 的通道層106上方分別形成作為源極與汲極的圖荦化多層 金屬層110,且在形成圖案化多層金屬層11〇之後可移^ 部份歐姆接觸層雨,以形成歐姆接觸層驗。源極與没 極的形成方法例如是以抛m侧形成作為祕與没極的 圖案化多層金屬層110。其巾,醜化彡層金屬層ιι〇至 少包括銅層ii〇b。在本實施例中,圖案化多層金屬層11〇, 除了包括銅層11Gb之外’更可包括金屬層n()a、u〇c, 金屬層110a位於歐姆接觸層108a,且銅層丨丨㈨位於金屬 層ll〇a與金屬層110c之間。金屬層u〇a、u〇c例如是分 別為鉬、鈦、鋁、氮化鉬、氮化鈦、氮化鋁、鉬合金、鈦 合金或铭合金。銅層U〇b的厚度例如是介於丨_埃至 6_埃,金屬層110a、110c的厚度例如是分別介於_ 201128707 -…w v 118 33470twf.d〇c/n 埃至500埃。 此外’請—併參照圖2,圖案化多層金屬層11〇的邊 緣在垂直基材之剖面是梯形,且梯形的底角Θ2小於60。。 梯幵> 的底角0 2例如是介於25。至45。。 此外 隹形成圖案化多層金屬層n〇的過程中所使用 的姓刻液包括氧化劑、酸驗值調整劑與金屬離子整合漸1。 ίΐ缺氧化劑例如技氧水、過硫酸鉀、氣化銅或氯化鐵。 ΐ屬離子螯合咖如是擰檬酸、草酸、乙二胺四乙酸或反_ 酸。此外’ _液為酸性溶液,其酸驗值例 體⑴包括二電晶 接觸層職與圖案化多層金屬層:(作=:; 二上形成保護 案化錢金屬層110中作為没極的部份。其中,^出圖 可為早層結構❹層結構,且其 曰 材料、其它介電材質、或上述之二機材枓、有機 料為如氛峨氧化卿的材 在基材則上形成保復材^;^2乳相沈積法全面㈣ 料層進行《 外錢觸保· 之後,請參照圖1Ε,於保護層m上形成晝_ 201128707 AU0910118 33470twf.doc/n US’且晝素錄118藉由開口 116與薄膜電 案化多層金屬層110中作為汲極的部 的圖 極118可為單層結構或多層結構,且| i ς素電 料、非透明材料、或上述之組合。本:透明材 物及/或銦辞氧化物的透明材質為例進行說明,= 此。晝素電極118的形成方法例如是籍由崎法 ^Next, a channel layer 1G6 and a contact layer (10) which are stacked are formed on the dielectric layer 4 above the patterned multilayer metal layer 1〇2. The θ channel layer 106 and the ohmic contact layer should be, for example, semiconductor layers having different doping unequalities. The formation method of the channel layer 1G6 and the ohmic contact layer (10) is formed, for example, by a suitable deposition method and patterning method, and will not be described herein. Thereafter, referring to FIG. ic, a patterned multilayer metal layer 110 as a source and a drain is formed over the channel layer 106 on both sides of the patterned multilayer metal layer 1〇2, and a patterned multilayer metal layer 11 is formed. A portion of the ohmic contact layer rain can then be moved to form an ohmic contact layer inspection. The source and the dies are formed, for example, by patterning the multilayer metal layer 110 as a secret and a finite electrode. Its towel, ugly metal layer ιι〇 to include copper layer ii〇b. In the present embodiment, the patterned multi-layer metal layer 11〇, in addition to the copper layer 11Gb, may further include metal layers n()a, u〇c, the metal layer 110a is located in the ohmic contact layer 108a, and the copper layer is (9) Located between the metal layer 11a and the metal layer 110c. The metal layers u〇a, u〇c are, for example, molybdenum, titanium, aluminum, molybdenum nitride, titanium nitride, aluminum nitride, molybdenum alloy, titanium alloy or alloy. The thickness of the copper layer U〇b is, for example, 丨_Å to 6 Å, and the thickness of the metal layers 110a, 110c is, for example, _201128707 -...w v 118 33470 twf.d〇c/n Å to 500 Å, respectively. Further, please - and referring to Fig. 2, the edge of the patterned multilayer metal layer 11 turns is trapezoidal in the cross section of the vertical substrate, and the bottom angle Θ 2 of the trapezoid is less than 60. . The base angle 0 2 of the ladder > is, for example, 25. To 45. . In addition, the surname used in the process of forming the patterned multi-layer metal layer n〇 includes an oxidizing agent, an acidity adjusting agent and a metal ion. Oxidizing agents such as technical oxygen water, potassium persulfate, vaporized copper or ferric chloride. The genus ion chelating coffee is citric acid, oxalic acid, ethylenediaminetetraacetic acid or trans-acid. In addition, the liquid solution is an acidic solution, and the acid value of the sample body (1) includes a two-electrode contact layer and a patterned multi-layer metal layer: (for =:; two forms a protection case in the metal layer 110 as a non-polar portion In the above, the drawing may be an early layer structure, and the enamel material, other dielectric materials, or the above-mentioned two materials 枓, organic materials, such as 峨 峨 峨 卿 在 在 在 在 在 在 在Composite material ^; ^ 2 emulsion phase deposition method comprehensive (four) material layer for "external money touch protection · After, please refer to Figure 1 Ε, formed on the protective layer m 2011 _ 201128707 AU0910118 33470twf.doc / n US 'and 昼 素 118 The pattern electrode 118, which is a portion of the multi-layer metal layer 110 in the multi-layer metal layer 110 by the opening 116 and the thin film, may be a single-layer structure or a multi-layer structure, and may be a semiconductor material, a non-transparent material, or a combination thereof. The transparent material of the transparent material and/or the indium oxide is described as an example, and the method of forming the halogen electrode 118 is, for example, by the method of

m上形成於晝素電極層(未繪示),再對晝素電極層進$ 案化製程而形成之。 · 由上述實施例可知’藉由主動元件_基板 法可製作出在垂直基材_之梯形剖面的底角 別小於60°的圖案化多層金屬層1〇2、u〇,因此能防止二 案化多層金屬層lG2、ll〇產生傾斜角過高、關鍵尺寸 過大及底诚㈣㈣’進_免制製程_之缺陷 斷路等問題。 以下’藉由圖案化多層金屬層1〇2的製作,以詳 說明使圖案化多層金屬層在垂直基材丨⑼之梯形剖 角小於60°的機制。 & 圖3A至圖3C為說明使圖案化多層金屬層1〇2的梯形 剖面的底角小於00。的作用機制的流程剖面圖。 乂 請同時參關3A至圖30在經由彻,j形成圖案化多 層金屬層102的過程中,位於光阻層12〇下方的銅層沘 與金屬層102c會同時接觸姓刻液122,由於銅層^與 金屬層102c具有不同的氧化還原電位,因此會產生電池效 應(galvanic effect)。舉例來說,當金屬層1〇2c的材料為鉬 201128707 r\\j\jy ιό 118 33470twf.doc/n 的情況下,由於銅與鉬的標準還原電位分別為+〇34V與 -0.20V,因此在蝕刻的過程t銅層1〇沈會形成陰極且金屬 層102c會形成陽極,進而加速蝕刻速率。尤其是在圖 所示的蝕刻初期,銅層1〇25對金屬層1〇2c的高面積比產 生面積效應,更加促進電池效應的反應。金屬 池效應的作用下,關鍵尺寸快速賴,因4_層^ 的底角01。 值得注意的是,雖然在上述實施例中,上述圖案化多 層金屬層的形成方法是以分別用於形成主動元件陣列基板 中的閘極、源極與汲極為例進行說明,但並不以此限。亦 即,只要主動元件陣列基板中之閘極、掃描線、源極、没 極:資料線、其他金屬導線、及其他金屬電極中的任何一 者疋使用上述圖案化多層金屬層的形成方法所製造,均屬 於本發明之主動元件陣列基板的製造方法所涵蓋的範圍。 以下,藉由圖1E來說明本發明之一實施例的主動元 件陣列基板。此主動元件陣列基本可應用於液晶顯示器 (I’d crystal display,LCD)、有機發光二極體(〇rganic 喻 emitting diode ’ OLED)、電子紙(eiec打onic paper)、其它合 適的產品、或上述之組合。 π參照圖1E’主動元件陣列基板包括基材1〇〇及至少 一圖案化多層金屬層。基材1〇〇的材料例如是透明材料、 不透明材料、可撓性材料、或上述材料之組合。 主動元件陣列基板中的圖案化多層金屬層例如是用 以作為閘極的圖案化多層金屬層1〇2及用以作為源極與没 201128707 ru-;u7iwll8 33470twf.doc/n 極的圖案化多層金屬層110。圖案化多層金屬層102、110 至少分別包括銅層102b、110b。在本實施例中,圖案化多 層金屬層102、110,除了分別包括銅層1〇2b、ll〇b之外, 更可分別包括金屬層l〇2a、102c及金屬層ll〇a、ll〇c,The m is formed on the halogen electrode layer (not shown), and then formed on the halogen electrode layer. It can be seen from the above embodiments that the patterned multilayer metal layers 1〇2 and u〇 having a bottom angle of a trapezoidal cross section of a vertical substrate can be made by the active device_substrate method, thereby preventing the second case. The multi-layer metal layer lG2, ll 〇 produces problems such as excessive tilt angle, excessive critical dimension, and bottom-open (four) (four) 'into-free process _ defect open circuit. The following is a detailed description of the mechanism for patterning the multilayer metal layer to have a trapezoidal angle of less than 60° in the vertical substrate 丨 (9) by patterning the multilayer metal layer 1〇2. & Figs. 3A to 3C are views for explaining that the base angle of the trapezoidal cross section of the patterned multilayered metal layer 1〇2 is less than 00. A cross-sectional view of the mechanism of action.同时In the process of forming the patterned multilayer metal layer 102 through the squeegee 3A to FIG. 30, the copper layer 沘 and the metal layer 102c under the photoresist layer 12 同时 simultaneously contact the surname liquid 122, due to copper The layer has a different oxidation-reduction potential from the metal layer 102c, and thus a galvanic effect is generated. For example, when the material of the metal layer 1〇2c is molybdenum 201128707 r\\j\jy ιό 118 33470twf.doc/n, since the standard reduction potentials of copper and molybdenum are +〇34V and -0.20V, respectively. Therefore, during the etching process, the copper layer 1 sinks to form a cathode and the metal layer 102c forms an anode, thereby accelerating the etching rate. In particular, in the initial stage of etching shown in the figure, the high area ratio of the copper layer 1 〇 25 to the metal layer 1 〇 2c produces an area effect, which further promotes the reaction of the battery effect. Under the effect of the metal pool effect, the critical dimension is fast, due to the base angle of the 4_ layer ^. It should be noted that, in the above embodiments, the method for forming the patterned multilayer metal layer is described by using a gate, a source, and a cathode in the active device array substrate, respectively. limit. That is, as long as the gate, scan line, source, and immersion in the active device array substrate: data line, other metal wires, and other metal electrodes, the method of forming the patterned multilayer metal layer is used. The manufacturing is in the range covered by the manufacturing method of the active device array substrate of the present invention. Hereinafter, an active element array substrate according to an embodiment of the present invention will be described with reference to Fig. 1E. The active device array can be basically applied to an LCD (I'd crystal display, LCD), an organic light emitting diode (OLED), an electronic paper (eiec), other suitable products, or Combination of the above. π Referring to Figure 1E', the active device array substrate includes a substrate 1 and at least one patterned multilayer metal layer. The material of the substrate 1 is, for example, a transparent material, an opaque material, a flexible material, or a combination of the above. The patterned multilayer metal layer in the active device array substrate is, for example, a patterned multilayer metal layer 1 〇 2 used as a gate and a patterned multilayer used as a source and without a 201128707 ru-;u7iwll8 33470 twf.doc/n pole Metal layer 110. The patterned multilayer metal layers 102, 110 include at least copper layers 102b, 110b, respectively. In this embodiment, the patterned multi-layer metal layers 102, 110, in addition to the copper layers 1〇2b and 11b, respectively, may further include metal layers l2a, 102c and metal layers 11a, 11〇, respectively. c,

且銅層102b位於金屬層102a與金屬層102c之間,銅層 ll〇b位於金屬層i10a與金屬層11〇c之間。金屬層1〇2&、 l〇2c、ll〇a、ii〇c例如是分別為鉬、鈦、鋁、氮化鉬、氮 化鈦、氮化鋁、鉬合金、鈦合金或鋁合金。銅層1〇2b、n〇b 的厚度例如是分別介於1〇〇〇埃至6〇〇〇埃,金屬層1〇2a、 l〇2c、ll〇a、ll〇c的厚度例如是分別介於1〇〇埃至5〇〇埃。 其中,圖案化多層金屬層102、110在垂直基材之剖 面是梯形,且梯形的底角Θ1、02分別小於60。。梯形的 底角θ1、Θ2例如是分別介於25。至45。。 此外,在形成圖案化多層金屬層1〇2、11〇的過程中 ^用的侧液包純化劑、祕值調整劑與金屬離子螯 口^]、,其中,對於蝕刻液的組成成分已於前文的實施例中 進行詳盡地描述,故於此不再贅述。 動70件陣列基板更包括介電層104、通道層 杜以姆,觸層108a、保護層114及晝素電極118等構 然而泛些構件的配置方式、材料及形成方法已於前文 、貫施例中進行詳盡地說明,故於此不再贅述。 由&’在本發明所提出之主動元件陣列基板中, =化多層金屬層1〇2、110在垂直基材購之梯 U面的底角01及Θ2分別小於60。,因此能防止圖案化 11The copper layer 102b is located between the metal layer 102a and the metal layer 102c, and the copper layer 11b is located between the metal layer i10a and the metal layer 11〇c. The metal layers 1〇2&, l〇2c, ll〇a, ii〇c are, for example, molybdenum, titanium, aluminum, molybdenum nitride, titanium nitride, aluminum nitride, molybdenum alloy, titanium alloy or aluminum alloy, respectively. The thicknesses of the copper layers 1〇2b and n〇b are, for example, 1 〇〇〇 to 6 Å, respectively, and the thicknesses of the metal layers 1〇2a, l〇2c, ll〇a, ll〇c are, for example, respectively. Between 1 〇〇 and 5 〇〇. Wherein, the patterned multilayer metal layers 102, 110 are trapezoidal in the cross section of the vertical substrate, and the bottom corners Θ1 and 02 of the trapezoid are respectively less than 60. . The base angles θ1 and Θ2 of the trapezoid are, for example, 25 each. To 45. . In addition, in the process of forming the patterned multilayer metal layer 1〇2, 11〇, the side liquid package purifying agent, the secret value adjusting agent and the metal ion chelate port ^], wherein the composition of the etching liquid is already The foregoing embodiments are described in detail, and thus will not be described again. The 70-piece array substrate further includes a dielectric layer 104, a channel layer Duim, a contact layer 108a, a protective layer 114, and a halogen electrode 118. However, the arrangement, materials, and formation methods of the components are described above. The examples are described in detail, and therefore will not be described again. In the active device array substrate proposed by the present invention, the bottom corners 01 and Θ2 of the U-layers 2, 110 of the vertical substrate are less than 60, respectively. , thus preventing patterning 11

201128707 R -------118 33470twfdoc/i 多層金屬層1G2、11G產生結構缺陷,而具有較佳的電性效 能0 雖然’本實施例中的圖案化多層金屬層是以作為主動 ,列基板中的閘極、源極與錄為例進行說明,然而只要 疋主動陣列基板中之閘極、掃描線、源極、没極、資料線、 八他金屬導線、及其他金屬電極中的任何—者為在垂直基 材之梯形剖面的底角小於6〇。的圖案化多層金屬層,則均 屬於本發明所涵蓋的範圍。201128707 R -------118 33470twfdoc/i Multi-layer metal layers 1G2, 11G produce structural defects, and have better electrical performance 0 although 'the patterned multi-layer metal layer in this embodiment is taken as active, column The gate and source in the substrate are described as an example, but any of the gate, scan line, source, immersion, data line, octa metal wire, and other metal electrodes in the active array substrate - The bottom angle of the trapezoidal section of the vertical substrate is less than 6 〇. The patterned multilayer metal layer is within the scope of the present invention.

綜上所述,上述實施例至少具有下列優點: L上述主動元件陣列基板的製作方法 薄膜之缺陷或斷路等問題。 2.上述主動元件陣列基板具有較佳的電性效能。 雖然本發明已以實施例揭露如上’然其並非用以限定 本毛月任何所屬技術領域中具有通常知識者,在不脫離 本發明之精神和範圍内,當可作些許之更動與㈣,故本 發明之保護範圍當視後附之巾料利範@所界定者為準。In summary, the above embodiment has at least the following advantages: L. Manufacturing method of the above-mentioned active device array substrate. Problems such as defects or disconnection of the film. 2. The above active device array substrate has better electrical performance. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the scope of the present invention, and it is possible to make some changes and (4) without departing from the spirit and scope of the present invention. The scope of protection of the present invention is subject to the definition of the accompanying towel material.

【圖式簡單說明】 圖1A至圖1E是依照本發明之一實施例之主動元件陣 列基板的製造流程剖面圖。 圖2為圖ic沿著另一剖面方向的剖面圖,其中圖2 的剖面方向與圖1C的剖面方向互相垂直。 圖从至圖3C為說明使圖案化多層金屬層1〇2的梯形 剖面的底角小於60。的作用機制的流程剖面圖。 乂 12 201128707 ιυ i 18 33470twf.doc/n 【主要元件符號說明】 100 :基材 102、110 :圖案化多層金屬層 102a、102c、110a、110c :金屬層 110b、102b :銅層 104 :介電層 106 :通道層 108、108a :歐姆接觸層 112 :薄膜電晶體 114 :保護層 116 :開口 118 :晝素電極 120 :光阻層 122 :蝕刻液 13BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A to FIG. 1E are cross-sectional views showing a manufacturing process of an active device array substrate according to an embodiment of the present invention. Figure 2 is a cross-sectional view of the Figure ic along the other cross-sectional direction, wherein the cross-sectional direction of Figure 2 is perpendicular to the cross-sectional direction of Figure 1C. From Fig. 3C, the bottom angle of the trapezoidal cross section of the patterned multilayer metal layer 1〇2 is described as being less than 60. A cross-sectional view of the mechanism of action.乂12 201128707 ιυ i 18 33470twf.doc/n [Description of main component symbols] 100: Substrate 102, 110: patterned multilayer metal layers 102a, 102c, 110a, 110c: metal layers 110b, 102b: copper layer 104: dielectric Layer 106: channel layer 108, 108a: ohmic contact layer 112: thin film transistor 114: protective layer 116: opening 118: halogen electrode 120: photoresist layer 122: etching liquid 13

Claims (1)

201128707 -------118 33470twf_doc/n 七 申請專利範圍 L —種主動元件陣列基板,包括: —基材;以及 料案化多層金屬層配置於該基材上,其,該圖 二二,屬層至少包括—銅層,該圖案化多層金屬層是 劑盥全屬Hill 括氧㈣ '酸驗值調整 二屬離子®合劑,麟圖S化多層金屬層在垂直該基 材之—剖面是—梯形,該梯形的底角小於60。。 2.如申請專利範圍第i項所述之主動元件陣列基板, 遥、中該圖案化多層金屬層更包括—第—金屬層與—第二金 f層’該銅層位於該第一金屬層與該第二金屬層之間,該 \金屬層與該第一金屬層分別為翻、鈦、銘、氮化鉬、 氮化鈦、氮化紹、翻合金、鈦合金或銘合金。 f如申請專利範圍第2項所述之絲元件陣列基板, 其中,銅層的厚度介於1000埃至6000埃,該第一金屬層 與該第二金屬層的厚度介於100埃至500埃。 4.如申請專利範圍第1項所述之主動元件陣列基板, 其中該梯形的底角介於25。至45。。 5‘如申凊專利範圍第1項所述之主動元件陣列基板, 其中該氧化劑為雙氧水、過硫酸鉀(KHS05)、氣化銅(CuCl2) 或氣化鐵(FeCl3)。 6.如申請專利範圍第1項所述之主動元件陣列基板, 其中該金屬離子螯合劑為檸檬酸、草酸、乙二胺四乙酸 (ethylenediaminetetraacetic acid,EDTA)或反-環己烯二胺 14 201128707 Αυυ^ιυΐΐδ 33470twf.doc/n 四酸(cyclohexanedinitrilotetraacetic acid, CDTA)。 7·如申請專利範圍第1項所述之主動元件陣列基板, 其中該银刻液的酸驗值小於6。 8. —種主動元件陣列基板的製作方法,包括: 提供一基材;以及 以一蝕刻液蝕刻形成一圖案化多層金屬層配置於該 基材上’其中該圖案化多層金屬層至少包括一銅層,該圖 案化多層金屬層是以一钱刻液姓刻而成,該姓刻液包括氧 化劑、酸鹼值調整劑與金屬離子螯合劑,且該圖案化多層 金屬層在垂直該基材之一剖面是一梯形,該梯形的底角小 於 60。。 9. 如申請專利範圍第8項所述之主動元件陣列基板的 製作方法,其中該氧化劑為雙氧水、過硫酸鉀(KHS〇5)、 氯化銅(CuCl2)或氯化鐵(Feci3)。 10. 如申請專利範圍第8項所述之主動元件陣列基板 的製作方法,其中該金屬離子螯合劑為檸檬酸、草酸、乙 二胺四乙酸(ethylenediaminetetraacetic add,EDTA)或反- 環己烯二胺四酸(CyCl〇hexanedinitrilotetraacetic acid, CDTA)。 11·如申請專利範圍苐8項所述之主動元件陣列基板 的製作方法’其中該蝕刻液的酸鹼值小於6。 12.如申請專利範圍第8項所述之主動元件陣列基板 的製作方法,其中該梯形的底角介於25。至45。。 15201128707 -------118 33470twf_doc/n Seven patent application scope L - an active device array substrate, comprising: - a substrate; and a materialized multilayer metal layer disposed on the substrate, which is shown in Figure 2 The genus layer includes at least a copper layer, and the patterned multi-layer metal layer is a sputum genus of the genus of the genus (4), which is an acid-value-adjusted genus ion-based mixture, and the s-shaped S-layered metal layer is perpendicular to the substrate. Yes - trapezoid, the base angle of the trapezoid is less than 60. . 2. The active device array substrate according to claim i, wherein the patterned multilayer metal layer further comprises a first metal layer and a second gold metal layer, wherein the copper layer is located in the first metal layer Between the second metal layer and the first metal layer, the first metal layer and the first metal layer are respectively turned over, titanium, indium, molybdenum nitride, titanium nitride, nitrided, turned alloy, titanium alloy or alloy. The wire element array substrate according to claim 2, wherein the copper layer has a thickness of 1000 angstroms to 6000 angstroms, and the first metal layer and the second metal layer have a thickness of 100 angstroms to 500 angstroms. . 4. The active device array substrate according to claim 1, wherein the trapezoid has a bottom angle of 25. To 45. . The active device array substrate according to claim 1, wherein the oxidant is hydrogen peroxide, potassium persulfate (KHS05), vaporized copper (CuCl2) or iron oxide (FeCl3). 6. The active device array substrate according to claim 1, wherein the metal ion chelating agent is citric acid, oxalic acid, ethylenediaminetetraacetic acid (EDTA) or trans-cyclohexenediamine 14 201128707 Αυυ^ιυΐΐδ 33470twf.doc/n tetrahexanedinitrilotetraacetic acid (CDTA). 7. The active device array substrate according to claim 1, wherein the silver inscription has an acidity value of less than 6. 8. The method of fabricating an active device array substrate, comprising: providing a substrate; and etching an etchant to form a patterned multilayer metal layer disposed on the substrate, wherein the patterned multilayer metal layer comprises at least one copper a layered layer of the patterned multi-layer metal layer, the etchant comprising an oxidizing agent, a pH adjusting agent and a metal ion chelating agent, and the patterned multilayer metal layer is perpendicular to the substrate A section is a trapezoid having a base angle of less than 60. . 9. The method of fabricating an active device array substrate according to claim 8, wherein the oxidizing agent is hydrogen peroxide, potassium persulfate (KHS® 5), copper chloride (CuCl 2 ) or ferric chloride (Feci 3 ). 10. The method according to claim 8, wherein the metal ion chelating agent is citric acid, oxalic acid, ethylenediaminetetraacetic add (EDTA) or trans-cyclohexene. CyCl〇hexanedinitrilotetraacetic acid (CDTA). 11. The method of fabricating an active device array substrate as described in claim 8 wherein the etchant has a pH of less than 6. 12. The method of fabricating an active device array substrate according to claim 8, wherein the trapezoid has a bottom angle of 25. To 45. . 15
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI467724B (en) * 2012-05-30 2015-01-01 Innocom Tech Shenzhen Co Ltd Conductive pattern for panel and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI467724B (en) * 2012-05-30 2015-01-01 Innocom Tech Shenzhen Co Ltd Conductive pattern for panel and manufacturing method thereof

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