201117298 六、發明說明： 【發明所屬之技術領域】 本發明係關於-種半導體裝置之製造方法及半導體裝置之製 造裝置，尤其是關於-觀用只對所膽之位£選擇性地形成 鶴膜的選擇性化學氣相沉積(Chemical Vap〇r抑娜⑽，cw) 法來製造半導體裝置之方法及其半導财置之製造震置。 【先前技術】 半導體裝置係具備岭等轉體觀所構成的基板。在半導 體裝置中，主動元件及被動元件等構成元件係於被絕緣膜包夹 的狀態下疊層於基板上。為了要彼此f性連接此等的構成要 素，而在該絕緣膜形成有多數個貫通孔以連結上述構成要素。 具體而言，在設置於基板崎謂電晶體或記，隨單元的主動元 件與疊層於該基板上的多層配線之間，係形成有㈣電性連接 主動元件與多層配線的接觸孔(contacth〇le)。又，在多層配線構 造的配線間之絕緣層’係形成有用以彼此電性連接配線的通孔 (viahole^在該通孔内，大多在被要求成本製造的dram中埋 設有銘(A1)。又，在被要求邏輯動作等高速性能的裝置中大多將 銅(Cu)埋設於通㈣。該驗設的金屬體猶揮作為謀求上 述主動兀件與配線之間、或是多層配線構造的配線間之電性連 接的配線功能。-般而言’由於鶴具有較高的熱穩定性，所以 可被採用作為埋設配線材料。 作為此種配線的形成方法，習知以來就已廣泛使用覆蓋性 (blanket)CVD法。該覆蓋性CVD法係包含下列步驟：在形成有 201117298 上升 ;觸孔或疋通孔的絕緣層全表面场成有氮化糾ΏΝ)膜 4為用以使配線材料成長的黏著層(咖6 l_r) ·在該黏著層之全 表面上形絲線材料例如㈣_成的_，·錢去除不需要 部位的配線材料。如此在覆蓋性CVD法中，由於是在絕緣層之 全表面上形成械之_，所财在上述接觸孔及通孔之開口 周緣成長_。藉此，就會發生使上述接·或通孔之開口面 積變窄之所謂_突現象(崎hang)。由於關突現象之發生使 可，入於接觸孔或通孔之内部的鶴量受到限制，所以有時接觸 ，或通^之埋設作齡㈣不紐。接軌或通孔之埋設不 ^ ’係备接觸孔或通孔之直徑越小，尤其是4〇咖以下時，就 會^得越_。此外’在上賴蓋性CVD法巾，需要成膜後的 之去除步驟，且此部分會增加半導體裝置之製造步驟 數。，此外，該半導體裝置之製造費用會隨著該被去除的材料而 日’有實施—種選擇性cvd法(例如專利文獻1 ·· 接觸孔·229054號公報）。選擇性CVD法，係在如上述 2疋孔’僅對需要形成由配線材料所構成的薄膜之Λρ :形，的技術。該部位係指導電性比其二= 【發明内容】 ι 201117298 依此種選擇性CVI^ 被搬運至肋形纽的妓。處理之 =的基板，係 Ϊ基用以形成孔的她運至執行上述成膜 出，所以該基^的板會暫_大氣中搬 孔底面的半導體表面會/種氧化源。因此’ 认片匕、広Ά τ路出於大軋中。該導體表面會被大齑Φ 果、導ΐ表化物會成長於孔底面。結 ，擇性⑽法係指在縣成為成膜對象之基射=電= :二位還高的部位選擇性地形成薄膜的技術。因此2對如 =毁拍導電性的孔絲使用具有此婦㈣選紐C奶法· ^進打獅性的顧時，__孔絲實現充分的選擇性^ 一 去除形成導體表面之氧化物本身的方法，已知有 體表面浸潰於氣酸(HP)等之藥液中的方法。然而在使 ^體表面单純浸潰於氟酸中的此種方法中，會有在形成於導體 面之氧化物被去除_時，鑛於該基板上的其他導體$ /、藥液中之水分起反應而被腐姓之虞。 、 本發明之目的係在於提供一種半導體裝置之製. 體裝置之製造方法’其在依選雜CVD _賴之雜時，可 以良好的選擇性只在所期望之區域形成薄膜。 =根據本發明之一具體實施例為一種半導體裝置之製造方法。 該製造方法包含頂_ ••執行細處理的步驟，該^膜處理 係藉由將以導電層從設置於絕緣層之貫通孔·的形式由該絕 緣膜所覆蓋的基板，暴露於六氟化鎢氣體與單矽烷氣體中，"以 201117298 在通過該貫通孔而露出的該導 的薄膜；哪咖峨 部的該導電層之表面施予前處理的步驟。 氮化物。施予該前處理的步驟=成個金屬 行银刻物 _撕嘯彻之表面進 本發明之另—具體實施·— 製造方法包含下列牛L a ^方法該 導電片從Ϊ仃膜處理，該成膜處理係將以 Α板曰晨二。巴緣曰之貫通孔露出的形式由絕緣層所覆蓋的 基^暴路於六氟化聽體與單魏氣财，財通過貫通孔 =出^電層上選擇性地形成鶴薄膜；以及在進行成膜處理 之别’先在作為貫通孔之底部的導電層之表 二導電層為選自由鶴、鈦„、鈦化鶴、_^里3 化物、鹤魏物、鈕魏物、_化物及射化物所構成之 組中之f —種金屬。施予前處理的步驟係包含：將基板暴露於 使用由氟氣與氬氣所構狀侧氣體的電財，以對導電 表面進行钱刻的步驟。 s ，本發明之另-具體實闕係—種半導體裝置之製造裝置，該 製^裝置包含：成膜部，其係藉由將以導電層從設置於絕緣層X ，貫通？露出的形式由絕緣層所覆蓋的基板，暴露於六氟化‘ 氣體與單矽烷氣體中，以在通過貫通孔而露出的導電層上選擇 性^形成n薄膜；以及前處理部，其係在成膜部執行成膜處理 之則在作為貫通孔之底部的導電層之表面施予前處理。導電屌 為選自由氮化鈦、氮化鈕、氮化鈀及氮化鎢所構成之群組中: -A. · 7 201117298 4 ft ^個金屬氮化物。處理部係藉由將基板暴露於使用由氣氣與 虱亂所構成之姓刻氣體的電漿中以對導電層之表面進行钱刻。、 本發明之另—频實施娜—種半導财置之製造裝置 包含：成獏部’其係藉由將以導電層從設置於絕緣； 氣的形式由絕緣膜所覆蓋的基板，暴露於六氟化i :早魏氣體中，以在通過貫通孔而露出的導電層上選 膜;以及前處理部’其係在成膜部執行成膜處理 底部的導電層之表面施予前處理。導電層 =自由鹤、鈦、纽、把、鈦倾、錄、銘、鈦魏物、鶴石夕 '-矽化物、姑矽化物及鎳矽化物所構成之群組中之任一 2 j剛處卿係絲板暴露於朗由氟氣與氬氣所構成之 侧乳體的電漿巾崎導€層之表面進行钱刻。 【實施方式】 [第1實施例] 、下係參照圖1至圖3說明將本發明之一實 裝置之製造綠及轉«置之製錄置。 ⑼牛導體 =先，參闕1朗本實施例辭導體裝置之製造方法及製 造裝置之概要。 ^ 1係顯7F/、在半導職置之基板上的預定區域形成作為配 線材料的鶴薄膜之製妓置全體。如圖i所示，半導體裝置之 製造裝置包含··作為真空搬運腔室的轉移腔室㈣伽 Chamber)15 ; —對搬入/搬出口山、仙；作為前處理部的一對 則處理腔室12a、12b ;作為細部的—對細難13&、说； S' 201117298 以及熱處雜室14。轉移腔室15係設置於製造裝置之中央。 一對搬入/搬出口 11a、lib、一對前處理腔室12a、12b、一對成 膜腔室13a、13b及熱處理腔室14，係以轉移腔冑15為中心配 置成環狀，且從圖1之下方朝向上方依序配置。 搬入/搬出口 1 la、1 lb係彼此相鄰設置，用於將供鎮薄膜之形 成處理使㈣基板導人於該製造裝置内、或是將倾行過嫣薄 膜之形成處理的基板從製钱置取出。作為前處理部的前處理 腔室12a、12b ’係分別與搬入/搬出口 lla、nb鄰接而設置， 且當作在基板形成鶴薄膜之前的處理，進行基板表面之潔淨化。 各前處理腔f 12a、12b設置有：對雜㈣供給侧氣體之 未圖示的氣體供給部；以及使用該侧氣體而在腔室内產生電 漿之未圖示的電漿產生源。各前處理腔室12a、12b係以供進行 基板表面之料化時所執行賴顧之侧氣_氣體種類按 照鎢薄膜之底層而進行切換的方式驅動氣體供給部。又，各前 處理腔室12a、12b係在此種蝕刻氣體被供給的狀態下驅動上述 電漿產生源。然後，各前處理腔室12a、12b係使與鎢薄膜之底 層相應的電漿產生於該腔室内以對鎢薄膜之底層執行上述的潔 淨化。另外，上述電漿產生源可以是電容耦合電漿源、感應耦 合電漿源、微波電漿源等將蝕刻氣體電漿化的電漿源即可利用 各種的電漿源。 又’成膜腔室13a、13b係分別與前處理腔室na、i2b鄰接 而設置，用以執行在基板形成上述鎢薄膜的成膜處理。熱處理 腔室14係設置於成膜腔室13a、13b之間，用以執行對前處理 結束後的基板施加預定之熱處理。 201117298 又’轉移腔室15係用以作為基板在二個搬入/搬出口 Ua 及五個腔室12a、12b、13a、13b、14間移動時之通路的功能。 在使用如此構成的製造裝置來製造半導體裝置時，首 成膜處理之對象的基板係從搬入/搬出口 lla、11b導入、= 裝置内。該基板，係包含：例如在設置於形成有主動=之面 上的絕緣膜，設置有用以形成配線的接觸孔之基板、或是設 有構成多層配線的通孔之基板。如此，基板，係於表面= 電性的部位(接觸孔或通孔之底部)與導電性比該部位較低 位(絕緣膜）。由於此等二個搬入/搬出口 lla、llb，係相對於被 導入的基板具有姻的魏，所以町針雌鱗巾之搬入/搬 出口 lla導入基板的情況加以說明。 被導入於搬入/搬出口 lla之基板，首先係透過轉移腔室Μ 而朝前處理腔室12a搬運。作為在該前處理腔室以内進行的 前處理之-例，係可解對與設置於絕緣層的接觸孔之底部抵 ，金，矽化物層、或是作為通孔之底部的配線層，去除與大 耽中之氧起反絲形成的氧化鬚之處理。在該前處理腔室❿ 中經施予前處理後的基板，係再次透過轉移腔室15 3 Η搬運。在該熱處理腔室14中，為了要謀求由鶴觸成 的厚膜與其連接處的底層之界面的低電隱，*對藉由上述前 处理12a所執行的如處理而露出之底層執行熱處理。然後，每 該熱處理完成時，齡過__基板，係再錢過轉移腔^ =朝成膜腔室13a搬運。在成膜腔室13a内所執行的成膜處 宁，係可採用在設置於基板的上述接觸孔或通孔、即導電性 比基板之其他部位高的部位上選擇性地形成鶴薄膜之選擇性 法备該成膜處理結束時，基板係透過轉移腔室15被搬 201117298 運至搬入/搬出口 lla，並從該搬入/搬出口 lla朝半導體裝置之 製造裝置外搬出。 另外，從搬入/搬出口 lib搬入至該半導體裝置之製造裝置的 基板也與從上遠搬入/搬出口 lla搬入的基板一樣，在依順序施 行前處理腔室12b之前處理、熱處理腔室14之熱處理、以及成 膜腔室13b之成膜處理之後’從搬入/搬出口 lib搬出。此期間， 在移動於此等搬入/搬出口 lib及各種腔室12b、13b、14間時， 也與從搬入/搬出口 lla搬出的基板一樣，係透過轉移腔室15 而搬運。亦即，該半導體裝置之製造裝置係構成：在被搬入於 該裝置的基板被搬運至上述前處理腔室12a、12b、熱處理腔室 14、以及成膜腔室i3a、13b之各腔室時，該基板必然會透過轉 移腔室I5。因此，一旦被搬入於該半導體裝置之製造裝置的基 板，係在從該裝置搬出為止之期間並不會暴露於大氣中。 其次，請參照圖2說明此種半導體裝置之製造裝置所包含的 成膜腔室13a、13b之構成、以及藉由各成膜腔室13a、13b而 執行的成膜處理之詳細情形。 圖一2係顯示上述各成膜腔室13a、13b之局部剖面構造。如圖 2所不’各成膜腔室13a、13b具有真空槽2卜而在直空槽 f史置置作為成膜處理對象之基板S的基板載物台22。真 工β又置有在成膜處理時供給至真空槽2ι之作為原料氣體 化鶴(聊6)氣體及單魏(SiH4)氣體之作為供給口的原料 氣1在真二槽21内，於原料氣體埠P1之下方設置有用 j從原料氣體埠P1供給的氣體均勻地擴散於真空槽21内的 淋7谷頭23。 201117298 在原料氣體槔P1之上側係連結有共通配管4〇。 係將單魏氣體導入於真空槽21的第⑽4i 4〇 21的第3配管43所匯流的配管::此等 體 ==;:=用:r?r 配 μ 部：—執行流量控制，則;;照::= 的潔淨處理係絲由料料㈣魏 附著於真空槽2i之内壁及真空_ 2 于依成膜處理而 ㈣的_膜之處理。 内之構件、例如基板載物 在上述的第1配管41之途中，係以供 氣體導入於第!配管41用的第2·配管42從上二之= ^FCff游分歧的方式辆。又，在上述的第3的二 中1也疋以供作為惰性氣體之氬氣導人於第3配管43用的第^ =之下游分歧的方式連結。t 配S 42及第4配管44係設置有調整流通於各配管之氬氣 的流量控制部MFC2、MPC4。然後，藉由此等流量控制部 MFC2、_執行流量控制，則可按照成膜處理及潔淨處理之 各種步驟將雜氣體通過與之對應的配管而導人於真空样Μ 内0 曰 又’上述基板載物台22係概連接有高_源24。高頻電 源24係將使透過上述的各種流量控制部顺^、娜Q傭㈡、 MFC4而導人的氣體電漿化之高_場施加於真空槽a内 空槽21係設置有在進行與使用上述原料氣體的成膜處理交互 地重複執行的潔淨處_導人潔淨氣體的潔淨氣體埠p2。潔淨 4 12 201117298 1 1 氣體埠P2係具備流量控制部mfC5，並連結有用以將潔淨氣體 之氟(F2)氣體與惰性氣體之氬氣同時地供給至真空槽2ι'的第$ 配管45。 此外，真空槽係透過排氣琿P3連結有渦輪果㈣b〇 pump)25。藉由渴輪泵25之驅動，與成膜處理或潔淨處理之各 種步驟相應的壓力會形成於真空槽21内。另外，真^| 21、 上述各種氣體所流通的配管40〜45以及載置有基板s的^板載 物台22係分別設置有用以將真空槽21之内壁、配管4〇〜45以 及基板S之溫度維持在預定溫度之溫調機構(未圖示）。 如前面所述，基板s，係在從各搬入/搬出口 lla、llb(圖u 搬入於半導體裝置之製造裝置之後，在前處理腔室12&、i2b(圖 1)施行成膜處理之前處理。基板s係在熱處理腔室14(圖υ接受 熱處理後，被搬入至成膜腔室13a、13b。然後，基板s係被載 置於成膜腔室13a、13b内之基板載物台22，且藉由設置於基板 載物台22的溫調機構加熱至預定溫度。之後，執行選擇性 法之成膜。亦即，以流量控制部MFC1、碰^分別控制流量 的六氟化鎢氣體及單矽烷氣體會從淋浴頭23均勻地擴散至真 工槽21。依以下反應式所示的六氟化鶴之單石夕烧的還原反應， 係在基板S上導電性相對高的部位上進行。 • 2WF6+3SiH4-^2W+3SiF4+3H2，或 • WF6+2SiH4^W+2SiF3+3H2。 另外，在上述基板S中導電性相對高的部位係指依利用選擇 性CVD法的製造步驟而異者。例如在上述的選擇性cvd法利 用於接觸孔配線之形成步驟時，成為其成膜對象的基板表面係 13 201117298 由具有接觸孔的絕緣膜所覆蓋。當作主動元件而形成於基板表 面之例如用以覆蓋MOS電晶體等之雜質擴散區域的金屬石夕化 物層會從接麻露丨。在對此種構成的顧縣執行上述選擇 性CVD法之成膜時，作為接觸孔底部的金屬石夕化物會碰到基板 S中之高導電性部位’並^高導電性部位選擇性地形成鶴薄膜。 二他在上述的選擇性CVD法利用於通孔配線之形成步驟時， 成為其成賴㈣紐表面係由具有通孔的_朗覆蓋。下 層配線之部分會從通孔露$。在對此種構成的成麟象執行 上述選擇性CVD法之細處辦，作紐孔底部的配線會碰到 基板S中之高導電性雜，並於在高導電性部位形成鶴薄膜。 如上所述’當多次執行此種賴處理，脚對複數片基板s 執行成膜處辦，可執行使用料氣體的潔淨處理。亦即，從 第5配管45供給潔淨氣體之氟氣與惰性氣體之氬氣於真空槽 2卜且從此狀態在真空槽21内產生依高頻電源μ所生成之高 頻電場:此時，附著於真空槽21之内·構件之鶴薄膜會藉由 與使用氣氣之魏反應而生成氟化物，例如六氟化鶴、三氣石夕 烷卿F3)、四氟魏卿)鎮贼(HF)等。此魏化物會藉由 與氟氣同時供給的氬氣而從真空槽21内被去除。 然而，成壯述_性CVD狀細處輯象的基板s係被 搬運至形成接麻或通孔之製造裝置。顧製造裝置内，接觸 孔或通孔形絲絲S。織，基板s做執行雜接觸孔或 通孔=形成處理的製造裝置餘行上述成膜處理的製造裝置搬 運。藉由成膜處理在接觸孔或通孔内形成鎢薄膜。當基板s被 搬運於維持在真空環境的製造裝置之間時，會暫時ϋ出至大 氣中。因此，基板S之表面會暴露於大氣中所存在之氧化源， 201117298 電層之表面 物而受損 CVD 術 另一方面，如上所述， 電一曰表面之心性會因成長於導表面之具有絕緣性的氧化 在成膜處理中所用的選擇性 因去係指f基板中之高導紐部位選擇性地形成薄 電性受損的導電層進行選擇性朗，也很難充分擔^ 、处王之選擇性。結果，在所期望之部位以外的部位也會 薄膜而無法避免選擇性之裂痕。 成長 因此，本實_料導财置讀造方法及製妓置中 由以在成膜處理前錄行的前處理來絲成長於上述導電9 面之氧化，即可恢復導電層表面之導電性。 曰、 以下參照圖3⑻至圖3(f)說明以本實施例之半導體裝置所且 備的别處理腔至12a、12b執行的前處理。前處理係指透過通孔 所露出之構成導電層的材料，為選自由氮化鈦(TiN)、氮化組 (TaN)、氮化把(γΝ)及氮化鶴所構成之群組中之任一種時所執行 的處理。又，也參照圖3(a)至圖3(f)說明作為前處理之前後處】 的上述接觸孔或通孔之形成處理及成臈處理。 如圖3⑻所示，利用於通孔之形成處理的基材31，係在其表 面具有底粒_絲板。導電祕形成於底層配線之= 上。導電層係由選自由氮化鈦、敗化纽、氮化把及氮化鎢所構 成之群組中之任一種所構成的金屬氮化物。在通孔之形成處理 中，首先對此種基材31之表面，疊層有例如由氧化矽膜或氮化 矽膜所構成的絕緣層32，並藉此形成有構成依序疊層有導電層 15 201117298 與絕緣層32之财的基板s。 入於對絲板S之賴喊行在絕緣層 掛二I二=、理的半導體裝置之製造裝置中。在該裝置内 其才1 s係從二ΐ貫通孔之通孔33的形成處理(圖3(b))。之後， 二丰婁㈣：^裝置搬出。然後’基板s被搬運至本實施例 、、之製造裝置内。該製造裝置在通孔33内選擇性地 形成鎢薄膜。 、此時由於基板s係搬運至大氣中，所以基板s之導電層會 透，通孔33而露出於大氣中。換句話說，上述導電層之表面會 暴露於存在大氣巾_如氧等之各種氧倾巾。，在導電 層之表面上’係藉由成長此魏化源與導電層之構成元素經反 應所生成之作献應生成物的氧化物，祕成有氧化物層34(圖 3(c))。然後’具有氧化物層34讀態的基板s係透過各搬入/ 搬出口 11a、lib(圖1)而搬入於本實施例的半導體裝置之製造裝 置，之後，透過轉移腔室15而搬運至各前處理腔室12a、i2b。 接著，在各前處理腔室12a、12b中，選擇氫氣(H2)及氮氣(N2) 作為#刻氣體，並使用此種姓刻氣體的電漿35生成於腔室 12a、12b内。然後藉由上述基板s暴露於此種電漿35中，以 去除成長於基板S之導電層上的氧化物層34(圖3(d))。此時， 對由上述構成材料(TiN、TaN、w、WN)所構成的底層配線之 表面可應用由氫氣及氮氣所構成的電槳35。藉此，當然可進行 氫氣之化學蝕刻作用，惟也可進行氮氣之物理蝕刻作用。又， 也可維持底層配線之表面的組成。故可抑制上述導電層之腐蝕 並抑制底層配線之電性及化學性的機能劣化之形式，有效地去 除形成於該底層配線之表面的氧化物。 16 201117298 作為該前處理的蝕刻處理之條件，係設定如下。氫氣之流量 設定於 50〜20〇sccm(84.5xl〇-3〜338xlO_3Pa · m3/s)、氮氣之流量同 樣？定於 50〜20〇sccm(84.5xl〇-3〜338xl〇-3pa · m3/s)、此等氮氣之 抓量與氮氣之流量的比設定於〇 5〜2、前處理腔室内 之塵力。又疋於〇·5〜l〇〇Pa，同樣地，前處理腔室i2a、i2b之内 壁的溫度設定於70〜12(TC、基板S之溫度設定於15G〜4〇(rc、 以及高頻功率(功率密度)設定於20〜5OOW/02OOmm之範圍 内。該功率密度’縣示每—單位面積之轉。該情況，係指 對直徑200mm之圓的面積供給2〇〜500w的功率之意。又此等 條件3 ’較佳為，氫氣與氮氣之流量均設定於1〇〇扣啤編〇_3pa • m3/s)、前處理腔室12a、12b内之壓力設定於此、前處理腔 室12 a、之溫度設定於8〇ΐ、基板s之溫度設定於35〇 c、以及高頻神(功率密度)設定於5_^2〇〇麵。然後，在 此條件下’ ^處理按照上述氧化物層34之厚度執行^〜秒左 右。 /如此，成長於導電層表面的氧化物層％經去除後之基板s， 係透過轉移腔室15(圖1}被搬運至熱處理腔室14。在熱處理腔 室Η内對基板S施予熱處理。之後，基板s係再次透過轉移腔 室I5#搬運至成膜腔室l3a、13b之後，對基板s供給包含六氟 化鎮氣體及單魏氣體的顯氣體3 之導電性比其他部位高的部位上、即從通 選擇性地形成有鎢薄膜37(圖3(f))。 如此，在本實施例之利用選擇性CVD法進行成膜處理之前步 驟的前處理中，藉由侧氣體之電漿35去除成長於基板s之導 電層表面的魏_ 34。因此，可恢縣半導魏置 201117298 置間進行搬運時所受損的導電層表面之導紐，甚至可提高成 膜處理之選雜。而且，藉由上赖職體之輕35去除氧化 物層34時可維持基板s之溫度於35〇。〇。因此，當然可使依此 種侧處理所生成的反應生成物氣化，且可縣侧速度，惟 也可將導電層表面轉於不受反應生成物污染的潔淨狀態。此 外、，在執行此種前處理時’可維持前處理腔室以、⑶之内壁 ^皿度於80 C。因此’可抑制上述反應生成物附騎前處理腔 室12a、12b之内壁。故而，可抑制此種殘留生成物因某種要因 而從前處理腔室12a、⑶之内侧_著於經潔淨化的導電 層、以及可抑制前處理腔室12a、12b内之電性的阻抗產生變化 而發生阻抗匹配之不良。 如以上說明’依據本實施_半導體裝置之製造方法及製造 裝置，可達成以下所列舉的效果。 ⑴，基板S中，從設置於絕緣膜之通孔％露出選自由氮化 鈦:氮化姐、氮化把及氮化鶴中之任一種所構成的導電層。在 進行成膜處理之前’對基板S絲行由氫氣及氮氣所構成 的侧氣體之《 35來侧導電層表_前處理。藉此，可去 除已成長於導電層之表面的氧化物層34，且可恢復導電層表面 之導電性。因而L藉由在此種前處理之後才進行成膜處理，即 可對基板S巾之高導電性部位的導電層選擇性地形成鶴薄膜。 亦即可選擇性地X騎期望之位置形賴薄膜。 (2)半導體裝置之製造裝置包含一對成膜腔室n既、一對 前處理腔室12a、12b、-對成膜腔室以、说以及轉移腔室 15。各成膜腔室13a、13b係用以進行成膜處理。各前處理腔室 12a、12b係用以進行前處理。成膜腔室以、既係連結於^膜 18 201117298 = 13a、13b與前處理腔室12a、12b。轉移腔室㈣將在各 别處理腔至12a、12b施予前處理過的基板s搬 膜腔室13a、13b。藉此，於上技义+ w _成 主 稽C力上迷則處理腔室12a、12b經過前處 理過的基板S不必«於大齡即可被搬運至細腔室: 13b。亦即’可避免經前處理而暫時去除氧化膜的導電層表面， 在成膜處理之前再次被氧化。 、⑶在對導電層表面進行钱刻處理之前處理時，基板s之溫度 被維持於350C。藉此’可使在進行姓刻處理時導電層表面上 之氧化物與磁彳氣體之錢起反應而產生的反應生成物氣化。 因而’可抑制在導電絲社附著此_反應生成物，且也可 抑制因該反應生成物而使侧處理速度降低、以及抑舰刻過 的導電層表面受到污染。 (4)前處理腔室12a、12b之内壁的溫度被維持於8(rc。藉此， 可抑制在前處理腔室12a、12b之内壁附著上述反應生成物，甚 至可抑制導電層表面之污染、或因阻抗匹配不良所引起的高頻 電場之產生不良。 [第2實施例] 於上述第1實施例中，導電層係由氮化鈦、氮化鈕、氮化把 及氣化鶴中之任一種所形成。 至於在第2實施例中，上述導電層則係由選自由鎢、鈦 (Ti)、叙(Ta)、鈀(V)、鎳(Ni)、鈷(Co)、鈦矽化物(TiSix)、鎢石夕 化物(WSix)、组；ε夕化物(TaSix)、銘碎化物(CoSix)及錄;e夕化物(NiSix) 所構成之群組中之任一種金屬所形成。有關此情況所執行的前 處理也請參照圖3而說明如下。但是，此圖3所示的處理之中， 19 201117298 由於只有® 3⑻所示的處理是在本實施例巾所财者，所以僅 就圖3(d)之處理、即前處理加以說明。另外，本實施例中之前 處理並不限_於第1實施例帽賴通孔，也可_於接觸 孔。 如圖3(d)所不，上述在導電層之表面成長有氧化物層％的基 板s係被搬運至前處理腔室12a、12b。在各前處理腔室I%、 12b内’係選擇氟⑸氣體及氬(Ar)氣體作為侧氣體，以讓使 用此種爛氣體的電聚％生成於腔室12a、12b内。然後上述 基板s會暴露於此種電漿35中，藉此可去除成長於基板s之導 電層上的氧化物層34。此時，可對由上述構成材料(w、Ή、Tiw、BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of fabricating a semiconductor device and a device for fabricating a semiconductor device, and more particularly to selectively forming a film of a crucible The method of selective chemical vapor deposition (Chemical Vap〇r (10), cw) to fabricate a semiconductor device and its fabrication of a semiconductor package. [Prior Art] A semiconductor device is provided with a substrate composed of a rotating body such as a ridge. In the semiconductor device, constituent elements such as an active element and a passive element are laminated on a substrate in a state of being sandwiched by an insulating film. In order to connect these constituent elements to each other, a plurality of through holes are formed in the insulating film to connect the above constituent elements. Specifically, a contact hole is formed between the active element of the unit and the multilayer wiring laminated on the substrate, and is formed with a contact hole of the (4) electrically connecting the active element and the multilayer wiring. 〇le). Further, in the insulating layer between the wirings of the multilayer wiring structure, through holes are formed which are electrically connected to each other (via holes), and in most of the through holes manufactured by the required cost, the inscription (A1) is buried. In a device requiring high-speed performance such as logic operation, copper (Cu) is often buried in the fourth (four). The metal body of the inspection is used as a wiring room between the active element and the wiring or the multilayer wiring structure. Wiring function of electrical connection. Generally speaking, since crane has high thermal stability, it can be used as a buried wiring material. As a method of forming such a wiring, coverage has been widely used since the prior art ( The blanket CVD method comprises the following steps: forming a semiconductor surface with a 201117298 rise; a full surface of the insulating layer of the contact hole or the through hole is formed with a nitridation correction film 4 for growing the wiring material. Adhesive layer (coffee 6 l_r) - On the entire surface of the adhesive layer, a wire material such as (4) _, _, money to remove the wiring material of the unnecessary portion. Thus, in the cover CVD method, since the mechanical surface is formed on the entire surface of the insulating layer, the growth of the contact hole and the opening of the through hole is increased by _. As a result, a so-called swell phenomenon is formed in which the opening area of the above-mentioned connection or through hole is narrowed. Due to the occurrence of the abrupt phenomenon, the amount of the crane entering the inside of the contact hole or the through hole is limited, so it is sometimes contacted or buried for age (four). The buried or through hole is not buried. The smaller the diameter of the contact hole or the through hole, especially when it is less than 4 〇, the more _. Further, in the case of a capping CVD method, a removal step after film formation is required, and this portion increases the number of manufacturing steps of the semiconductor device. In addition, the manufacturing cost of the semiconductor device is carried out in accordance with the material to be removed, and the selective cvd method is implemented (for example, Patent Document 1: Contact Hole No. 229054). The selective CVD method is a technique in which only the 疋ρ: shape of a thin film formed of a wiring material is required as described above. This part is the guiding electrical property than the second = [invention] ι 201117298 According to this selective CVI^ is transported to the rib-shaped 妓. The substrate to be processed, which is used to form the holes, is transported to perform the above-mentioned film formation, so that the substrate of the substrate temporarily occupies the semiconductor surface of the bottom of the hole in the atmosphere. Therefore, it is recognized that the film and the road are in the big rolling. The surface of the conductor will be larger than the surface of the hole. The method of selective (10) refers to a technique in which a film is selectively formed in a portion where the film becomes a film formation target in the county. Therefore, 2 pairs of holes, such as = ruined conductive, use this woman (four) to choose the New Zealand C milk method ^ into the lion's time, __ hole wire to achieve sufficient selectivity ^ a removal of oxides forming the surface of the conductor As a method of its own, a method in which a body surface is immersed in a chemical liquid such as a gas acid (HP) is known. However, in such a method of simply immersing the surface of the body in the hydrofluoric acid, there may be other conductors deposited on the substrate in the case where the oxide formed on the conductor surface is removed. The water reacts and is smashed by the surname. SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device of a semiconductor device which can form a thin film only in a desired region with good selectivity in the case of selective CVD. A method of fabricating a semiconductor device in accordance with an embodiment of the present invention. The manufacturing method includes a step of performing a fine processing by exposing the substrate covered with the insulating film to the hexafluoride by a conductive layer from a through hole provided in the insulating layer. In the tungsten gas and the monodecane gas, the film is exposed by the through hole at 201117298; the surface of the conductive layer is applied to the surface of the conductive layer. nitride. The step of applying the pretreatment = forming a metal row of silver engravings - tearing the surface into another aspect of the invention - the specific implementation - the manufacturing method comprises the following bovine L a ^ method, the conductive sheet is processed from the enamel film, The film forming process will be based on the second board. The through hole of the Bayuan 露出 is exposed in the form of a layer covered by an insulating layer, and the hexafluoride listener and the wei qi qi, the money through the through hole = the electric layer selectively forms a crane film; The membrane treatment is different from the conductive layer of the conductive layer at the bottom of the through hole. The conductive layer is selected from the group consisting of crane, titanium, titanium, _^, 3, wei, wei, wei, and The f-type metal in the group consisting of the compounds. The pre-treatment step comprises the steps of exposing the substrate to electricity using a side gas composed of fluorine gas and argon gas to carry out the engraving of the conductive surface. The manufacturing device of the semiconductor device of the present invention further comprises: a film forming portion which is formed by penetrating the conductive layer from the insulating layer X a substrate covered with an insulating layer exposed to a hexafluoride gas and a monodecane gas to selectively form an n film on a conductive layer exposed through the through hole; and a pretreatment portion which is formed in the film forming portion The film forming process is performed as a guide at the bottom of the through hole. The surface of the layer is pretreated. The conductive crucible is selected from the group consisting of titanium nitride, nitride button, palladium nitride and tungsten nitride: -A. · 7 201117298 4 ft ^ metal nitride. The fascia is used to expose the surface of the conductive layer by exposing the substrate to a plasma using a gas of a surname formed by gas and gas. The manufacturing apparatus includes: a crucible portion which is exposed to a hexafluoride i: early Wei gas by passing a conductive layer from a substrate covered with an insulating film; And exposing the film on the exposed conductive layer; and pre-treating the portion of the conductive layer on the bottom of the film forming portion to perform the film forming process. Conductive layer = free crane, titanium, neon, handle, titanium tilt, Any of the groups consisting of Lu, Ming, Titanium, Heshixi's phlegm, scorpion and nickel bismuth are exposed to the fluorine and argon The surface of the plasma smear layer of the side emulsion constituting the side body is engraved. [Embodiment] [First Embodiment] Referring to Fig. 1 to Fig. 3, the manufacturing process of the green device of the actual device of the present invention will be described. (9) Cattle conductor = first, the first method, the manufacturing method and the manufacturing device of the exemplified conductor device (1) The system of the semiconductor device is formed as a wiring material in a predetermined area on the substrate of the semiconductor device. As shown in Fig. 1, the manufacturing device of the semiconductor device includes vacuum transfer. The transfer chamber of the chamber (four) gamma Chamber 15; - the loading/unloading of the mountain, the fairy; the pair of processing chambers 12a, 12b as the pre-processing part; as the detail - the fine 13 &said; '201117298 and the heat chamber 14. The transfer chamber 15 is disposed at the center of the manufacturing apparatus. A pair of loading/unloading ports 11a, lib, a pair of pretreatment chambers 12a, 12b, and a pair of film forming chambers 13a, 13b The heat treatment chamber 14 is arranged in a ring shape around the transfer chamber 15 and is arranged in order from the lower side toward the upper side in FIG. The loading/unloading ports 1 la and 1 lb are disposed adjacent to each other, and are used for forming a film for supplying a film, and (4) guiding the substrate into the manufacturing device or forming a substrate for forming the film by pouring the film. The money is taken out. The pretreatment chambers 12a and 12b' as the pretreatment unit are provided adjacent to the loading/unloading ports 11a and 11b, respectively, and are treated as a process before the substrate is formed into a film to clean the surface of the substrate. Each of the pretreatment chambers f 12a and 12b is provided with a gas supply unit (not shown) for the supply side gas, and a plasma generation source (not shown) for generating plasma in the chamber using the side gas. Each of the pretreatment chambers 12a and 12b drives the gas supply unit so as to switch between the side gas and the gas type to be performed when the substrate surface is materialized, in accordance with the bottom layer of the tungsten thin film. Further, each of the pretreatment chambers 12a and 12b drives the plasma generation source in a state where the etching gas is supplied. Then, each of the pre-treatment chambers 12a, 12b is caused to generate plasma corresponding to the underlayer of the tungsten thin film in the chamber to perform the above-described cleaning purification on the underlayer of the tungsten thin film. In addition, the plasma generating source may be a capacitively coupled plasma source, an inductively coupled plasma source, a microwave plasma source, or the like, and the plasma source for plasmaizing the etching gas may utilize various plasma sources. Further, the film forming chambers 13a and 13b are provided adjacent to the pretreatment chambers na and i2b, respectively, for performing a film forming process for forming the tungsten thin film on the substrate. The heat treatment chamber 14 is disposed between the film forming chambers 13a, 13b for performing a predetermined heat treatment on the substrate after the pretreatment is completed. 201117298 Further, the transfer chamber 15 functions as a passage for the substrate to move between the two loading/unloading ports Ua and the five chambers 12a, 12b, 13a, 13b, and 14. When the semiconductor device is manufactured by using the manufacturing apparatus having such a configuration, the substrate to be subjected to the first film formation process is introduced into the device from the loading/unloading ports 11a and 11b. The substrate includes, for example, a substrate provided on the surface on which the active surface is formed, a substrate on which a contact hole for forming a wiring is formed, or a substrate on which a through hole constituting the multilayer wiring is provided. Thus, the substrate is attached to the surface = electrical portion (the bottom of the contact hole or the via hole) and the conductivity is lower than the portion (insulating film). In the case where the two loading/unloading ports lla and llb have a marriage with respect to the substrate to be introduced, the case where the loading/unloading port 11a of the smocked female scale towel is introduced into the substrate will be described. The substrate introduced into the loading/unloading port 11a is first conveyed toward the pretreatment chamber 12a through the transfer chamber Μ. As an example of pre-treatment performed within the pre-treatment chamber, the contact with the bottom of the contact hole provided in the insulating layer, the gold, the germanide layer, or the wiring layer as the bottom of the via hole may be removed. Treatment with an oxidizing whisker formed by a counter-filament with oxygen in the sorghum. The substrate subjected to the pretreatment in the pretreatment chamber 再次 is again transported through the transfer chamber 15 3 . In the heat treatment chamber 14, in order to achieve low electric concealment at the interface between the thick film touched by the crane and the bottom layer at the junction thereof, * the heat treatment is performed on the underlayer exposed by the above-described pretreatment 12a as processed. Then, each time the heat treatment is completed, the aging substrate is transported through the transfer chamber ^ = toward the film forming chamber 13a. In the film formation chamber 13a, the film formation can be selectively formed on the contact hole or the through hole provided in the substrate, that is, the portion where the conductivity is higher than other portions of the substrate. When the film forming process is completed, the substrate is transported to the loading/unloading port 11a through the transfer chamber 15 and transported to the loading/unloading port 11a, and is carried out from the loading/unloading port 11a to the outside of the manufacturing apparatus of the semiconductor device. In addition, the substrate which is carried into the manufacturing apparatus of the semiconductor device from the loading/unloading port lib is processed in the same manner as the substrate carried in from the upper loading/unloading port 11a, and the processing chamber 14 is processed before the pretreatment chamber 12b is sequentially performed. After the heat treatment and the film formation process of the film formation chamber 13b, 'the operation is carried out from the loading/unloading port lib. In the meantime, when moving between the loading/unloading port lib and the various chambers 12b, 13b, and 14, the substrate is transported through the transfer chamber 15 in the same manner as the substrate carried out from the loading/unloading port 11a. That is, the manufacturing apparatus of the semiconductor device is configured such that when the substrate loaded into the device is transported to the chambers of the pre-processing chambers 12a, 12b, the heat treatment chamber 14, and the film forming chambers i3a, 13b The substrate necessarily passes through the transfer chamber I5. Therefore, once it is carried into the substrate of the manufacturing apparatus of the semiconductor device, it is not exposed to the atmosphere during the period of being carried out from the apparatus. Next, the configuration of the film forming chambers 13a and 13b included in the manufacturing apparatus of the semiconductor device and the details of the film forming process performed by the film forming chambers 13a and 13b will be described with reference to Fig. 2 . Fig. 1 shows a partial cross-sectional structure of each of the film forming chambers 13a and 13b. As shown in Fig. 2, each of the film forming chambers 13a and 13b has a vacuum chamber 2, and a substrate stage 22 as a substrate S to be subjected to film formation processing is placed in the straight space. The raw material β is placed in the true two tank 21 as a raw material gas 1 as a supply port for the raw material gasification crane (Talk 6) gas and the single Wei (SiH 4 ) gas which is supplied to the vacuum chamber 2 1 during the film formation process. Below the source gas 埠P1, a leaching head 23 in which the gas supplied from the material gas 埠P1 is uniformly diffused in the vacuum chamber 21 is provided. 201117298 A common pipe 4〇 is connected to the upper side of the material gas 槔P1. The piping in which the single Wei gas is introduced into the third pipe 43 of the (10) 4i 4〇21 of the vacuum chamber 21:: These bodies ==;:=Use: r?r with μ:: Perform flow control, then ;; The clean treatment of the wire::= is treated by the material (4) Wei attached to the inner wall of the vacuum tank 2i and the vacuum _ 2 is processed according to the film formation (4). In the middle of the above-mentioned first pipe 41, the second pipe 42 for introducing the gas into the first pipe 41 is branched from the top two = ^FCff. Further, in the third and second of the above, the argon gas as the inert gas is connected so as to be branched downstream of the first side of the third pipe 43. The distribution S 42 and the fourth pipe 44 are provided with flow rate control units MFC2 and MPC4 for adjusting the argon gas flowing through the respective pipes. Then, by performing the flow rate control by the flow rate control units MFC2 and _, the gas can be introduced into the vacuum sample by the piping corresponding to the various steps of the film formation process and the clean process. The substrate stage 22 is connected to the high_source 24. The high-frequency power source 24 is configured such that the high-frequency field of the gas plasma which is guided by the various flow control units described above, and the MFC4 is applied to the vacuum chamber a. The clean room 导p2, which is a clean gas of the clean gas, is repeatedly and repeatedly performed using the film forming process of the above-mentioned raw material gas. Clean 4 12 201117298 1 1 The gas crucible P2 is provided with a flow rate control unit mfC5, and is connected to a first pipe 45 for supplying the fluorine (F2) gas of the clean gas and the argon gas of the inert gas to the vacuum tank 2'. Further, the vacuum chamber is connected to a turbine pump 25 via an exhaust port P3. By the driving of the thirsty wheel pump 25, a pressure corresponding to various steps of the film forming process or the cleaning process is formed in the vacuum chamber 21. In addition, the pipes 40 to 45 through which the various gases are distributed, and the plate stage 22 on which the substrate s is placed are provided to provide the inner wall of the vacuum chamber 21, the pipes 4 to 45, and the substrate S, respectively. The temperature adjustment mechanism (not shown) is maintained at a predetermined temperature. As described above, the substrate s is processed before the film forming process is performed in the pretreatment chambers 12 &, i2b (Fig. 1) from the respective loading/unloading ports 11a and 11b (Fig. u is carried into the manufacturing device of the semiconductor device). The substrate s is in the heat treatment chamber 14 (after receiving heat treatment, it is carried into the film forming chambers 13a, 13b. Then, the substrate s is placed on the substrate stage 22 in the film forming chambers 13a, 13b. And heating to a predetermined temperature by a temperature adjustment mechanism provided on the substrate stage 22. Thereafter, a film formation by a selective method is performed. That is, the flow rate control unit MFC1 and the contact gas are respectively controlled to control the flow rate of the tungsten hexafluoride gas. And the monodecane gas is uniformly diffused from the shower head 23 to the real tank 21. The reduction reaction of the hexafluoride crane according to the following reaction formula is performed on the substrate S having a relatively high conductivity. • 2WF6+3SiH4-^2W+3SiF4+3H2, or • WF6+2SiH4^W+2SiF3+3H2. Further, the portion of the substrate S having a relatively high conductivity refers to a manufacturing step by a selective CVD method. For example, the selective cvd method described above is used for the formation of contact hole wiring. At the time of the film formation, the surface of the substrate to be formed is 13 201117298 covered with an insulating film having a contact hole, and is formed as an active element on the surface of the substrate, for example, to cover the impurity diffusion region of the MOS transistor or the like. When the film formation by the above selective CVD method is performed in Guxian County having such a configuration, the metal lithium as the bottom of the contact hole may hit the highly conductive portion in the substrate S. ^The high-conductivity portion selectively forms a crane film. Second, when the selective CVD method described above is used in the formation step of the via wiring, the surface is formed by the _ 朗 with the through hole. The part will be exposed from the through hole. In the case of the above-mentioned selective CVD method, the wiring of the bottom of the button hole will encounter the high conductivity miscellaneous in the substrate S, and The high-conductivity portion forms a crane film. As described above, when the above-described processing is performed a plurality of times, the foot performs a film formation on the plurality of substrates s, and the cleaning process using the material gas can be performed. That is, from the fifth pipe 45. Supply clean gas The argon gas of the fluorine gas and the inert gas is in the vacuum chamber 2, and from this state, a high-frequency electric field generated by the high-frequency power source μ is generated in the vacuum chamber 21: at this time, the crane film attached to the inside of the vacuum chamber 21 Fluoride is formed by reacting with the gas using gas, such as hexafluoride, trigas sulphate F3), tetrafluoroweiqing thief (HF), and the like. This derivative is removed from the vacuum chamber 21 by argon gas supplied simultaneously with the fluorine gas. However, the substrate s which is a feature of the CVD-like fine-grained image is transported to a manufacturing apparatus for forming a hemp or a through-hole. In the manufacturing device, the contact hole or the through-hole shaped wire S. The substrate s is transported by a manufacturing apparatus that performs the above-described film forming process in a manufacturing apparatus that performs a miscellaneous contact hole or a through hole = forming process. A tungsten thin film is formed in the contact hole or the via hole by a film formation process. When the substrate s is transported between the manufacturing apparatuses maintained in a vacuum environment, it is temporarily discharged into the atmosphere. Therefore, the surface of the substrate S is exposed to the oxidizing source existing in the atmosphere, and the surface of the electrical layer of 201117298 is damaged by CVD. On the other hand, as described above, the heart of the surface of the electric raft has a tendency to grow on the guiding surface. The selectivity of the insulating oxidation in the film formation process is selectively controlled by the high-conductivity portion of the f-substrate to selectively form a conductive layer having a thin electrical property, and it is difficult to fully support the Wang's selectivity. As a result, the film is also in a portion other than the desired portion, and selective cracking cannot be avoided. Therefore, in the present invention, the conductivity of the surface of the conductive layer can be restored by the oxidation of the conductive surface of the conductive surface by the pre-treatment before the film formation process. . Next, the pre-processing performed by the other processing chambers 12a, 12b provided in the semiconductor device of the present embodiment will be described below with reference to Figs. 3(8) to 3(f). The pretreatment refers to a material constituting the conductive layer exposed through the through hole, and is selected from the group consisting of titanium nitride (TiN), nitrided group (TaN), nitrided (γΝ), and nitrided crane. The processing performed at any time. Further, the formation process and the entanglement process of the above-mentioned contact hole or via hole as the front side before the pre-treatment are also described with reference to FIGS. 3(a) to 3(f). As shown in Fig. 3 (8), the substrate 31 used for the formation of the through holes has a ruthenium-silk plate on its surface. Conductive secrets are formed on the underlying wiring. The conductive layer is a metal nitride composed of any one selected from the group consisting of titanium nitride, ruthenium, nitride, and tungsten nitride. In the formation process of the via hole, first, an insulating layer 32 composed of, for example, a hafnium oxide film or a tantalum nitride film is laminated on the surface of the substrate 31, and a layered conductive layer is formed in this order. Layer 15 201117298 The substrate s with the insulating layer 32. It is placed in the manufacturing device of the semiconductor device in which the insulating layer is mounted on the insulating layer. In the apparatus, it is only 1 s from the formation of the through holes 33 of the through holes (Fig. 3(b)). After that, Wong Fung (four): ^ device moved out. Then, the substrate s is transported to the manufacturing apparatus of this embodiment. This manufacturing apparatus selectively forms a tungsten thin film in the through hole 33. At this time, since the substrate s is transported to the atmosphere, the conductive layer of the substrate s penetrates and the through holes 33 are exposed to the atmosphere. In other words, the surface of the above conductive layer is exposed to various oxygen impregnable towels in the presence of an air towel such as oxygen. On the surface of the conductive layer, an oxide of the donor product is formed by the reaction of the constituent elements of the Weihua source and the conductive layer, and an oxide layer 34 is formed (Fig. 3(c)). Then, the substrate s having the read state of the oxide layer 34 is carried into the manufacturing apparatus of the semiconductor device of the present embodiment through the respective loading/unloading ports 11a and 11b, and is loaded into the manufacturing apparatus of the semiconductor device of the present embodiment, and then transported to each of the transfer chambers 15 through the transfer chamber 15 Pretreatment chambers 12a, i2b. Next, in each of the pretreatment chambers 12a and 12b, hydrogen gas (H2) and nitrogen gas (N2) are selected as the #刻气, and the plasma 35 of the surname gas is used in the chambers 12a and 12b. Then, the substrate s is exposed to the plasma 35 to remove the oxide layer 34 grown on the conductive layer of the substrate S (Fig. 3(d)). At this time, an electric paddle 35 made of hydrogen gas and nitrogen gas can be applied to the surface of the underlayer wiring composed of the above-mentioned constituent materials (TiN, TaN, w, WN). Thereby, it is of course possible to perform a chemical etching action of hydrogen gas, but it is also possible to perform a physical etching action of nitrogen gas. Moreover, the composition of the surface of the underlying wiring can also be maintained. Therefore, it is possible to suppress the corrosion of the above-mentioned conductive layer and suppress the deterioration of the electrical and chemical properties of the underlying wiring, and effectively remove the oxide formed on the surface of the underlying wiring. 16 201117298 The conditions for the etching treatment of this pretreatment are as follows. The flow rate of hydrogen is set at 50~20〇sccm (84.5xl〇-3~338xlO_3Pa · m3/s), and the flow rate of nitrogen is the same? Set at 50~20〇sccm (84.5xl〇-3~338xl〇-3pa · m3/s), the ratio of the nitrogen capture to the flow rate of nitrogen is set in 〇5~2, the dust force in the pretreatment chamber . In the same manner, the temperature of the inner wall of the pretreatment chambers i2a and i2b is set to 70 to 12 (TC, the temperature of the substrate S is set to 15 G to 4 〇 (rc, and high frequency). The power (power density) is set in the range of 20~5OOW/02OOmm. The power density 'counter indicates the turn per unit area. This case means the power of 2〇~500w for the area of a circle with a diameter of 200mm. Further, the condition 3' is preferably that the flow rates of hydrogen and nitrogen are set at 1 〇〇 啤 〇 〇 3 3 〇 〇 〇 〇 〇 3 3 3 3 3 3 3 3 3 3 3 3 3 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 The temperature of the chamber 12a is set at 8 〇ΐ, the temperature of the substrate s is set at 35 〇 c, and the high frequency god (power density) is set at 5 ^ 2 〇〇. Then, under this condition, ' ^ is processed according to The thickness of the oxide layer 34 is performed for about 〜2 seconds. / Thus, the substrate s after the removal of the oxide layer on the surface of the conductive layer is transported to the heat treatment chamber 14 through the transfer chamber 15 (Fig. 1). The substrate S is subjected to heat treatment in the heat treatment chamber chamber. Thereafter, the substrate s is again transported through the transfer chamber I5# to the film formation. After the chambers l3a and 13b, a tungsten thin film 37 is selectively formed on the substrate s by supplying a gas containing hexafluorinated gas and a single Wei gas to a portion higher than the other portions, that is, a tungsten film 37 is selectively formed. f)) Thus, in the pre-treatment of the step before the film formation process by the selective CVD method of the present embodiment, the surface of the conductive layer grown on the substrate s is removed by the plasma 35 of the side gas. , Kehui County semi-conducting Wei set 201117298 The guide layer of the conductive layer damaged during transportation, and even the selection of film formation treatment. Moreover, the oxide layer is removed by the light 35 of the upper body. At 34 o'clock, the temperature of the substrate s can be maintained at 35 〇. Therefore, it is of course possible to vaporize the reaction product generated by such side treatment, and to increase the surface speed of the conductive layer. In addition, when performing such pretreatment, 'the front treatment chamber can be maintained, and the inner wall of (3) can be maintained at 80 C. Therefore, the above reaction product can be suppressed from attaching to the pretreatment chamber. The inner walls of the chambers 12a, 12b. Therefore, such residues can be suppressed The residual product is impedance-matched due to a change in the inner side of the pre-treatment chambers 12a, (3), the cleaned conductive layer, and the electrical impedance in the pre-treatment chambers 12a, 12b. According to the above description, the manufacturing method and manufacturing apparatus of the semiconductor device can achieve the following effects. (1) The substrate S is exposed from the through hole % provided in the insulating film to be selected from titanium nitride: nitrogen. A conductive layer composed of any one of a chemist, a nitriding tube, and a nitriding crane. Before the film forming process, the surface of the substrate S is composed of a side gas composed of hydrogen gas and nitrogen gas. Pre-processing. Thereby, the oxide layer 34 which has grown on the surface of the conductive layer can be removed, and the conductivity of the surface of the conductive layer can be restored. Therefore, L can be selectively formed into a conductive film of a highly conductive portion of the substrate S by performing a film forming process after such pretreatment. It is also possible to selectively ride the desired shape on the film. (2) The manufacturing apparatus of the semiconductor device includes a pair of film forming chambers n, a pair of pretreatment chambers 12a, 12b, a pair of film forming chambers, and a transfer chamber 15. Each of the film forming chambers 13a and 13b is used to perform a film forming process. Each of the pretreatment chambers 12a, 12b is used for pretreatment. The film forming chamber is connected to the film 18 201117298 = 13a, 13b and the pretreatment chambers 12a, 12b. The transfer chamber (4) will apply the previously treated substrate s transfer chambers 13a, 13b to the respective processing chambers 12a, 12b. Therefore, in the upper technical sense + w _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ That is, the surface of the conductive layer which can temporarily remove the oxide film by the pretreatment can be oxidized again before the film formation process. (3) The temperature of the substrate s was maintained at 350 C before the surface of the conductive layer was subjected to the etching process. Thereby, it is possible to vaporize the reaction product generated by the reaction of the oxide on the surface of the electroconductive layer with the magnetic paralysis gas at the time of the surname treatment. Therefore, it is possible to suppress the adhesion of the reaction product to the conductive wire, and it is also possible to suppress the side treatment speed from being lowered by the reaction product and to contaminate the surface of the conductive layer which has been suppressed. (4) The temperature of the inner wall of the pretreatment chambers 12a, 12b is maintained at 8 (rc. Thereby, the above reaction product can be suppressed from adhering to the inner wall of the pretreatment chambers 12a, 12b, and even contamination of the surface of the conductive layer can be suppressed. Or the generation of a high-frequency electric field due to poor impedance matching. [Second embodiment] In the first embodiment, the conductive layer is made of titanium nitride, a nitride button, a nitrided gas, and a gasification crane. In any of the second embodiments, the conductive layer is selected from the group consisting of tungsten, titanium (Ti), Ta (Ta), palladium (V), nickel (Ni), cobalt (Co), and titanium. Formation of any one of a group consisting of a telluride (TiSix), a tungsten cation (WSix), a group, a Tasix, a CoSix, and a NiSix group; The pre-processing performed in this case is also described below with reference to Fig. 3. However, among the processes shown in Fig. 3, 19 201117298, since only the processing shown by ® 3 (8) is the one in the embodiment, Therefore, only the processing of FIG. 3(d), that is, the pre-processing, will be described. In addition, the previous processing in this embodiment is not limited to the first embodiment. The hole may be a contact hole. As shown in Fig. 3(d), the substrate s having the oxide layer % grown on the surface of the conductive layer is transported to the pretreatment chambers 12a and 12b. In the chambers I%, 12b, a fluorine (5) gas and an argon (Ar) gas are selected as side gases, so that electropolymerization using such a rotten gas is generated in the chambers 12a, 12b. Then the substrate s is exposed thereto. In the plasma 35, the oxide layer 34 grown on the conductive layer of the substrate s can be removed. In this case, the constituent materials (w, Ή, Tiw,
Ta、V、NiCo、TiSix、WSi、TaSi、CoSix、NiSix)所構成的底層 配線之表面應用由氟氣及氬氣所構成的電漿35。因此，當然可 發揮氟氣之化學蝕刻作用，惟也可發揮氬氣之物理蝕刻作用。 故而能以可抑制上述導電層之腐蝕並抑制底層配線之電性及化 學性的機能劣化之形式，有效地去除形成於該底層配線之表面 的氧化物。 作為該前處理的蝕刻處理之條件，係設定如下：上述蝕刻氣 體35之氟氣含有率設定於5〜20%、蝕刻氣體之流量設定於 50〜20〇sccm(84.5xl0·3〜338xl〇-3Pa · m3/s)、各前處理腔室 12a、 12b内之壓力設定於〇 5〜l〇〇Pa，同樣地，各前處理腔室i2a、 12b之内壁的溫度設定於7〇〜120〇C、基板S之溫度設定於 150〜4G〇°c、以及高頻功率(功率密度)設定於2〇〜5QQW/ 0 200mm 之範圍内。又此等條件係將餘刻氣體之氟氣含有率設定於5%、 將钱刻氣體之流量設定於l〇〇sccm(169xl(T3Pa · m3/s)、將各前 處理腔室l2a、l2b内之壓力設定於IPa、將各前處理腔室12a、 20 201117298 12b之溫度設定於80°C、將基板S之溫度設定於35〇°c以及將 高頻功率設定於5OW/02OOmm。在此條件下執行前處理2〇秒 為較佳。另外，以此種條件蚀刻例如由鎢所構成的導電層時之 蝕刻率，係約為0，lnm/sec，相對於此，形成於導電層上的氧化 物層34之餘刻率約為〇.i5nm/sec。換句話說，上述條件也指對 氧化物層34比對導電層還更容易進行儀刻之條件。 以上所說明的第2實施例中，可獲得相當於上述第1實施例 所得之(2)〜⑶的縣，並且可獲得如下效果，取代⑴之效果。 (1’)在基板S中’從設置於絕緣層32㈣孔％或接觸孔等之 貫通孔露出導電層。導電層，係由鶴、鈦、组、把、鈦化鶴、 鎳、钻、鈦狐物、財化物、M魏物、卿化物及錄石夕化 物中之任-種所構成。在執行細處理之前，對基板s先執行 利用由氟氣及氬氣所構成的_氣體之電漿35來钕刻導電層 表面的前處理。藉此，可去除已成長於導電層表面之氧化物i 34 :且可恢復導電層表面之導電性。因而，藉由在此種前處理 ^才進行成膜處理，即可對基板s中之高導電性部位的導電 二擇性卿成簡膜。脚可選擇性只在所贼之位置形成 竭涛膜。 [其他實施例] 另外，上述各實施例亦可變更如下： 即在’係在執行複數次的成膜處理之後，亦 13= 1 執行同成膜處理之後，執行將成膜腔室 膜詹理日# 的潔轉理。不限於此，也可在每次執行成 、"理時，亦即母讀1片基板S執行細處辦，執行上述 201117298 潔淨處理。 •於上述各實施例中，可使用氟氣作為潔淨氣體。不限於此， 也可使用六氟化矽(SiF0)、三氟化氮(nf3)氣體、三氟化氯(cl]p3)， 作為潔淨氣體。 •於上述各實施例中，前處理時的前處理腔室12a、12b之内 壁的溫度係被維持於70〜120X：，尤其是維持於8(rc。不限於 此，同處理時的前處理腔室12a、ub之内壁的溫度也可為7〇 °C以下。此情況下，也可獲得相當於上述項目⑴或(丨，）、（2)、 3)之效果。 •於六述各實施例中，前處理時的基板s之溫度係被維持於 150 400 C，尤其疋維持於350 C。不限於此，同處理時的基板 之溫度也可為1MTC以下。此航下，也可獲得相#於上述項 目⑴或(1，）、(2)、(4)之效果。 •本實施例的半導體裝置之製造裝置係將前處理腔室12a、 12b與成膜腔室13a、13b連結於所共通的轉移腔室15，以構成 所共通的真空系統。不限於此，例如為前處理腔室12a、l2b與 成膜腔室13a、13b透過由惰性氣體所構成之環境而不同的真介 系統，醉導體躲之製钱置也可為在轉之騎搬運的基 板透過惰性氣體之環境而搬運的構成。換句話說，只要是基板 從前處理腔室12a、12b朝成膜腔室i3a、13b搬運時，氧化膜 很難在基板的導電層之表面成長的構成，就可藉由此種半導體 裝置之製造裝置獲得上述項目⑴或(1，）、（2)〜(5)之效果。 •本實施例的半導體裝1：之製造裝置，係為分別具備有二個 一組的搬入/搬出口 11a、lib、前處理腔室12a、m、以及^膜 22 201117298 腔至13a、13b之構成，但不以此為限，搬入/搬出口 腔室、成膜腔室亦可為各-個。又，成半導 $ 置的各種腔室及搬入/搬出口的數量也可 罝之裏 【圖式簡單說明】 圖1係繪示根據本發明之—實施例的半導體袭置之製造穿置 的上視圖。 哀直 圖2係繪示設置於圖1之製造裝置的成膜腔室之部分剖視圖。 圖3(粗_繪示使關丨之製造裝置所製 之製造步驟的局部示意圖。 卞守瓶衷罝 【主要元件符號說明】 11a' lib :搬入/搬出口 13a、13b :成膜腔室 15 :轉移腔室 22 ·基板戴物台 24 :高頻電源 31 :矽基材 33 :通孔 35 :電漿 37 :鎢薄膜 41 :第1配管 43 :第3配管 45 :第5配管 12a、12b :前處理腔室 MFC1〜MFC5 :流量控制部 14 熱處理腔室 21 真空槽 23 淋浴頭 25 渴輪栗 32 絕緣層 34 氧化物層 36 原料氣體 40 共通配管 42 第2配管 44 第4配管 23 201117298 pi :原料氣體埠 P3 :排氣埠 SiH4 ··單矽烷 Ar :氬氣 P2 :潔淨氣體埠 S :基板 WF6 :六氟化鎢 F2/Ar :氟氣/氬氣 4 24A plasma 35 composed of fluorine gas and argon gas is applied to the surface of the underlayer wiring composed of Ta, V, NiCo, TiSix, WSi, TaSi, CoSix, and NiSix. Therefore, it is of course possible to exert a chemical etching action of fluorine gas, but it is also possible to exert a physical etching action of argon gas. Therefore, it is possible to effectively remove the oxide formed on the surface of the underlying wiring in such a manner as to suppress the corrosion of the above-mentioned conductive layer and suppress the deterioration of the electrical and chemical properties of the underlying wiring. The conditions of the etching treatment of the pretreatment are set as follows: the fluorine gas content rate of the etching gas 35 is set to 5 to 20%, and the flow rate of the etching gas is set to 50 to 20 〇sccm (84.5 x 10 3 to 338 x 1 〇 - 3Pa · m3 / s), the pressure in each of the pre-treatment chambers 12a, 12b is set at 〇 5 ~ l 〇〇 Pa, similarly, the temperature of the inner wall of each of the pre-treatment chambers i2a, 12b is set at 7 〇 ~ 120 〇 C. The temperature of the substrate S is set to 150 to 4 G 〇 ° c, and the high frequency power (power density) is set in the range of 2 〇 to 5 QQ W / 0 200 mm. In addition, the conditions are such that the fluorine gas content rate of the residual gas is set to 5%, and the flow rate of the money engraved gas is set to 1 〇〇sccm (169×1 (T3Pa · m3/s), and each pretreatment chamber l2a, l2b is used. The internal pressure is set to IPa, the temperature of each of the pre-treatment chambers 12a, 20 201117298 12b is set to 80 ° C, the temperature of the substrate S is set to 35 ° C, and the high-frequency power is set to 5 OW/02OO mm. It is preferable to perform pre-treatment for 2 sec seconds under conditions, and the etching rate when etching a conductive layer made of, for example, tungsten under such conditions is about 0, 1 nm/sec, and is formed on the conductive layer. The residual ratio of the oxide layer 34 is about i.i5 nm/sec. In other words, the above conditions also refer to conditions in which the oxide layer 34 is more easily etched than the conductive layer. The second embodiment described above In the example, the counties corresponding to the above (2) to (3) obtained in the first embodiment can be obtained, and the following effects can be obtained instead of the effect of (1). (1') In the substrate S, 'from the insulating layer 32 (four) hole % Or a through hole of a contact hole or the like exposes a conductive layer. The conductive layer is made of crane, titanium, group, handle, titanium crane, nickel It consists of any of the drill, titanium fox, chemical, M-property, sulphur, and lithograph. Before performing the fine treatment, the substrate s is firstly constructed using fluorine gas and argon gas. The plasma of the gas 35 is used to etch the surface of the surface of the conductive layer. Thereby, the oxide i 34 which has grown on the surface of the conductive layer can be removed: and the conductivity of the surface of the conductive layer can be restored. Thus, by this The film formation process can be performed to form a thin film on the conductive portion of the highly conductive portion of the substrate s. The foot can selectively form a drain film only at the position of the thief. [Other Embodiments] The above embodiments may also be modified as follows: that is, after performing a plurality of film forming processes, 13 = 1 is performed after the film forming process, and the film forming chamber film Zhan Liri # is cleaned. It is not limited to this, and it is also possible to perform the above-mentioned 201117298 clean processing in each execution, and the mother reads one substrate S. In the above embodiments, fluorine gas can be used as the cleaning process. Clean gas. Not limited to this, bismuth hexafluoride (SiF0), trifluorobenzene can also be used. Nitrogen (nf3) gas and chlorine trifluoride (cl)p3) are used as clean gas. • In the above embodiments, the temperature of the inner wall of the pretreatment chambers 12a and 12b during the pretreatment is maintained at 70~. 120X: in particular, it is maintained at 8 (rc. Not limited thereto, the temperature of the inner wall of the pretreatment chamber 12a and the ub at the time of the same treatment may be 7 〇 ° C or less. In this case, the same item as above can be obtained. Effect of (1) or (丨,), (2), 3) • In each of the six embodiments, the temperature of the substrate s during the pretreatment was maintained at 150 400 C, especially at 350 C. The temperature of the substrate at the time of the same treatment may be not more than 1 MTC. Under this voyage, the effect of phase #(1) or (1,), (2), (4) can also be obtained. The manufacturing apparatus of the semiconductor device of the present embodiment connects the pre-processing chambers 12a and 12b and the film forming chambers 13a and 13b to the common transfer chamber 15 to constitute a common vacuum system. The present invention is not limited thereto, and for example, the pre-processing chambers 12a and 12b and the film forming chambers 13a and 13b are different in the environment formed by the inert gas, and the drunk conductor can also be used for transportation. The substrate is transported through an inert gas atmosphere. In other words, as long as the substrate is transported from the pretreatment chambers 12a, 12b toward the film forming chambers i3a, 13b, the oxide film is difficult to grow on the surface of the conductive layer of the substrate, and the semiconductor device can be manufactured. The device obtains the effects of the above items (1) or (1,), (2) to (5). The manufacturing apparatus of the semiconductor package 1 of the present embodiment includes two sets of loading/unloading ports 11a and lib, pre-processing chambers 12a and m, and film 22 201117298 chambers 13a and 13b. The configuration is not limited thereto, and the loading/unloading of the oral chamber and the film forming chamber may be one each. Moreover, the number of various chambers and the number of loading/unloading ports that are placed in a semi-conducting manner can also be used. [FIG. 1 illustrates the manufacture of a semiconductor device according to an embodiment of the present invention. Top view. Fig. 2 is a partial cross-sectional view showing the film forming chamber of the manufacturing apparatus of Fig. 1. Fig. 3 is a partial schematic view showing the manufacturing steps of the manufacturing apparatus of the apparatus. 卞守瓶心罝 [Main component symbol description] 11a' lib: loading/unloading port 13a, 13b: film forming chamber 15 : Transfer chamber 22 · Substrate stage 24 : High-frequency power supply 31 : 矽 base material 33 : Through hole 35 : Plasma 37 : Tungsten film 41 : First pipe 43 : Third pipe 45 : Fifth pipe 12 a , 12b : pretreatment chambers MFC1 to MFC5 : flow rate control unit 14 heat treatment chamber 21 vacuum chamber 23 shower head 25 thirsty wheel 32 insulation layer 34 oxide layer 36 source gas 40 common pipe 42 second pipe 44 fourth pipe 23 201117298 pi : Raw material gas 埠 P3 : Exhaust gas 埠 SiH4 · · Monodecane Ar : Argon gas P2 : Clean gas 埠 S : Substrate WF6 : Tungsten hexafluoride F2 / Ar : Fluorine gas / Argon gas 4 24