JPH04370928A - Semiconductor manufacturing device - Google Patents

Semiconductor manufacturing device

Info

Publication number
JPH04370928A
JPH04370928A JP14843291A JP14843291A JPH04370928A JP H04370928 A JPH04370928 A JP H04370928A JP 14843291 A JP14843291 A JP 14843291A JP 14843291 A JP14843291 A JP 14843291A JP H04370928 A JPH04370928 A JP H04370928A
Authority
JP
Japan
Prior art keywords
semiconductor manufacturing
reaction products
wall
product
manufacturing apparatus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14843291A
Other languages
Japanese (ja)
Inventor
Yoshio Tate
舘 良男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Original Assignee
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Semiconductor Manufacturing Co Ltd, Kansai Nippon Electric Co Ltd filed Critical Renesas Semiconductor Manufacturing Co Ltd
Priority to JP14843291A priority Critical patent/JPH04370928A/en
Publication of JPH04370928A publication Critical patent/JPH04370928A/en
Pending legal-status Critical Current

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  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To reduce particles in a dry etching device. CONSTITUTION:As an example of the measures for preventing deposition of reaction product on the inner wall of an etching chamber 5, the product is volatilized by heating using a film heater 8, whereby the product can be prevented from being deposited. As another example, the flow of ions is directed toward a stage electrode 2 by setting the inner wall at the highest positive potential, whereby the product can be prevented from flying.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】この発明は、半導体製造において、ウェー
ハのドライエッチング工程に用いる半導体製造装置に関
するものである。
The present invention relates to a semiconductor manufacturing apparatus used in a wafer dry etching process in semiconductor manufacturing.

【0002】0002

【従来の技術】ドライエッチングをおこなう半導体製造
装置の一つに、図3に断面図で示す平行平板装置がある
。かかる装置は、フッ素系エッチングガスや、塩素系エ
ッチングガスを始めとするエッチングガスの減圧雰囲気
1中にウェーハXを載置するステージ電極2と、このス
テージ電極2に対向する円板状の対向電極3を設け、こ
れらステージ電極2と対向電極3間に電源4により高周
波電圧を印加してウェーハXにエッチングを施すように
なっている。
2. Description of the Related Art One type of semiconductor manufacturing apparatus that performs dry etching is a parallel plate apparatus shown in cross section in FIG. This device includes a stage electrode 2 on which a wafer X is placed in a reduced pressure atmosphere 1 of an etching gas such as a fluorine-based etching gas or a chlorine-based etching gas, and a disc-shaped counter electrode facing the stage electrode 2. 3 are provided, and a high frequency voltage is applied between the stage electrode 2 and the counter electrode 3 by a power source 4, so that the wafer X is etched.

【0003】このエッチングは、高周波電圧のエネルギ
ーによりイオン化したエッチングガス6による物理的な
反応および活性化したハロゲン原子による化学的な反応
により進行する。
This etching progresses through a physical reaction by the etching gas 6 ionized by the energy of the high frequency voltage and a chemical reaction by activated halogen atoms.

【0004】0004

【発明が解決しようとする課題】しかしながら、上記の
ような従来の平行平板型の半導体製造装置では、エッチ
ングを施すウェーハの処理枚数が増加するにしたがって
、エッチングチャンバー5の内壁にウェーハXと、エッ
チングガスの反応によって生じた反応生成物7が徐々に
堆積する。この堆積した反応生成物の一部は減圧雰囲気
1中にパーティクルとして再び現れて、ウェーハX上に
付着し、本来エッチングされなければならない部分を覆
って半導体チップを不良に至らしめることになりいわゆ
る歩留の低下をひきおこすという欠点があった。
However, in the conventional parallel plate type semiconductor manufacturing apparatus as described above, as the number of wafers to be etched increases, the wafer Reaction products 7 generated by the gas reaction gradually accumulate. A part of the deposited reaction products reappears as particles in the reduced pressure atmosphere 1, adheres to the wafer This had the disadvantage of causing a decrease in retention.

【0005】[0005]

【課題を解決するための手段】本発明には、エッチング
チャンバー5の内壁に反応生成物を付着させない手段を
付加して目的を達成するものである。
[Means for Solving the Problems] The object of the present invention is achieved by adding means for preventing reaction products from adhering to the inner wall of the etching chamber 5.

【0006】上記の反応生成物を付着させない手段は、
高温に加熱する手段やエッチングチャンバ5の内側にさ
らに電極を付加して対向電極より正電位に保持する等の
手段を用いうる。
[0006] Means for preventing the above reaction products from adhering are as follows:
Means such as heating to a high temperature or adding an electrode inside the etching chamber 5 to maintain a more positive potential than the opposing electrode may be used.

【0007】[0007]

【作用】上記構成によると、反応生成物の堆積が少なく
なり、従って粒子としての再発塵を抑えることができる
[Operation] According to the above structure, the accumulation of reaction products is reduced, and therefore, re-dusting as particles can be suppressed.

【0008】加熱方式の場合は、仮に反応生成物が付着
しても揮発してガス化するために堆積がおこらない。ま
た正電位に保持した場合は、イオン化したエッチングガ
スの飛来が少なくなることにより反応生成物の堆積も少
なくなる。しがたって、粒子としての再発塵を抑えるこ
とができる。
In the case of the heating method, even if reaction products adhere, they are volatilized and gasified, so that no deposition occurs. Further, when the potential is maintained at a positive potential, the amount of ionized etching gas flying around is reduced, so that the deposition of reaction products is also reduced. Therefore, re-dusting as particles can be suppressed.

【0009】[0009]

【実施例】以下、この発明について図面を参照して説明
する。図1は、この発明の一実施例の加熱方式を付加し
た半導体製造装置の概略断面図である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be explained below with reference to the drawings. FIG. 1 is a schematic cross-sectional view of a semiconductor manufacturing apparatus to which a heating method according to an embodiment of the present invention is added.

【0010】この場合、エッチングチャンバ5の内壁に
フィルムヒーター8を設けたこと以外は前述の従来の半
導体製造装置と実質的に同様の構成とされている。
In this case, the structure is substantially the same as that of the conventional semiconductor manufacturing apparatus described above, except that a film heater 8 is provided on the inner wall of the etching chamber 5.

【0011】この実施例の場合、チャンバ内壁を100
℃程度に加熱することにより、反応生成物が付着しても
揮発して、堆積が生じないという利点がある。
In this embodiment, the inner wall of the chamber is 100
By heating to about 0.degree. C., there is an advantage that even if the reaction product adheres, it evaporates and no deposition occurs.

【0012】0012

【実施例2】図2はこの発明の第二実施例の断面図であ
る。この実施例は、前記第1実施例のフィルムヒーター
8に代えて、付加電極9を用いて対向電極3より数十〜
数百ボルト正電位に保持する電源10を設けた点を除い
ては第1の実施例と同様であるため、同一部分には、同
一参照符号を付して、その説明を省略する。
Embodiment 2 FIG. 2 is a sectional view of a second embodiment of the present invention. In this embodiment, an additional electrode 9 is used in place of the film heater 8 of the first embodiment, and several tens to more than the counter electrode 3 are used.
Since this embodiment is the same as the first embodiment except that a power supply 10 that maintains a positive potential of several hundred volts is provided, the same reference numerals are given to the same parts and the explanation thereof will be omitted.

【0013】この実施例では、付加電極9がチャンバ内
で正電位が最も高くなっているため、イオン化したエッ
チングガスが、ステージ電極側に向かう。このため、反
応生成物も、その流れにしたがうため、内壁への付着が
防止できるという利点が出る。
In this embodiment, since the additional electrode 9 has the highest positive potential in the chamber, the ionized etching gas flows toward the stage electrode. Therefore, since the reaction products also follow the flow, there is an advantage that adhesion to the inner wall can be prevented.

【0014】[0014]

【発明の効果】以上説明したように、本発明の半導体製
造装置では、チャンバ内壁への反応生成物付着を防止す
ることにより、エッチングを施すウェーハの枚数によら
ずパーティクルの発生がなくなり、半導体チップの歩留
を向上することができるという効果がある。
As explained above, in the semiconductor manufacturing apparatus of the present invention, by preventing reaction products from adhering to the inner wall of the chamber, particle generation is eliminated regardless of the number of wafers to be etched, and semiconductor chips This has the effect that the yield can be improved.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】  この発明の第一実施例に係る半導体製造装
置の概略断面図である。
FIG. 1 is a schematic cross-sectional view of a semiconductor manufacturing apparatus according to a first embodiment of the present invention.

【図2】  この発明の第二実施例の概略断面図である
FIG. 2 is a schematic cross-sectional view of a second embodiment of the invention.

【図3】  従来の半導体製造装置の概略断面図である
FIG. 3 is a schematic cross-sectional view of a conventional semiconductor manufacturing apparatus.

【符号の説明】[Explanation of symbols]

1  エッチングガスの減圧雰囲気 2  ステージ電極 3  対向電極 4  電源 5  エッチングチャンバー 6  イオン化したエッチングガス 7  反応生成物 8  フィルムヒーター 9  付加電極 X  ウェーハ 1 Etching gas reduced pressure atmosphere 2 Stage electrode 3 Counter electrode 4 Power supply 5 Etching chamber 6 Ionized etching gas 7 Reaction product 8 Film heater 9 Additional electrode X wafer

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】エッチングガスの減圧雰囲気中に、相対す
る2枚の電極間に高周波電圧を印加してウェーハにエッ
チングを施すようにした半導体製造装置において、減圧
雰囲気を形成するチャンバ内壁に反応生成物を付着しに
くくする手段を取り付けたことを特徴とする半導体製造
装置。
Claim 1: In a semiconductor manufacturing equipment in which a wafer is etched by applying a high frequency voltage between two opposing electrodes in a reduced pressure atmosphere of etching gas, a reaction is generated on the inner wall of a chamber forming a reduced pressure atmosphere. A semiconductor manufacturing device characterized by being equipped with a means to prevent objects from adhering to the device.
【請求項2】前記反応生成物を付着しにくくする手段が
、加熱手段であることを特徴とする請求項1の半導体製
造装置。
2. The semiconductor manufacturing apparatus according to claim 1, wherein the means for making it difficult for the reaction products to adhere is a heating means.
【請求項3】前記反応生成物を付着しにくくする手段が
電極であることを特徴とする請求項1の半導体製造装置
3. The semiconductor manufacturing apparatus according to claim 1, wherein the means for making it difficult for the reaction products to adhere is an electrode.
JP14843291A 1991-06-20 1991-06-20 Semiconductor manufacturing device Pending JPH04370928A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14843291A JPH04370928A (en) 1991-06-20 1991-06-20 Semiconductor manufacturing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14843291A JPH04370928A (en) 1991-06-20 1991-06-20 Semiconductor manufacturing device

Publications (1)

Publication Number Publication Date
JPH04370928A true JPH04370928A (en) 1992-12-24

Family

ID=15452664

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14843291A Pending JPH04370928A (en) 1991-06-20 1991-06-20 Semiconductor manufacturing device

Country Status (1)

Country Link
JP (1) JPH04370928A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011016512A1 (en) * 2009-08-06 2011-02-10 株式会社 アルバック Process for production of semiconductor device, and apparatus for production of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011016512A1 (en) * 2009-08-06 2011-02-10 株式会社 アルバック Process for production of semiconductor device, and apparatus for production of semiconductor device
JP5518866B2 (en) * 2009-08-06 2014-06-11 株式会社アルバック Manufacturing method of semiconductor device

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