JPH104085A - Dry etching and apparatus therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To avoid the electrostatic breakdown of an insulation film beneath gates due to charge up at dry etching of a semiconductor substrate with a plasma. SOLUTION: The etching comprises a process of generating a plasma 8 between a grounded chamber and substrate holder 2 disposed therein, feeding a high frequency ac current from an RF power source 6 to the substrate holder in a dry etching apparatus for emitting the plasma 8 on a semiconductor substrate 5 laid on the holder 2, thereby causing a dc self bias to charge up the holder 2 in the negative polarity for a first specified time, and a process of feeding a dc current from a dc power source 7 to the substrate holder to charge up it in the positive polarity for a second specified time.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dry etching method and apparatus, and more particularly, to a method of generating plasma between a grounded housing and a substrate support provided inside the housing, and generating the generated plasma on a substrate. The present invention relates to a dry etching method and apparatus for irradiating a semiconductor substrate on a support table.

[0002]

2. Description of the Related Art In a so-called pre-etching step for removing a surface oxide film of a wiring metal film provided on a semiconductor substrate, a dry etching apparatus is used.

FIG. 5 is a configuration diagram of a conventional dry etching apparatus. In the figure, a chamber 101 forms a sealed space, an inert gas is introduced into the space (for example, Ar gas, 100 sccm), and the inside is adjusted to a low gas pressure by connecting a vacuum exhaust system (for example, 0.13P
a). Further, the chamber 101 is made of a conductive material and is grounded. A substrate support table 102 is provided in the chamber 101.
Are provided in a state of being electrically insulated from the chamber 101. The substrate support 102 is made of a conductive material and is connected to a blocking capacitor C via a conductive support bar 103. The blocking capacitor C is an RF AC power supply (RF).
104. A semiconductor substrate 105 is mounted on the substrate support 102 during etching. The blocking capacitor C is for blocking DC current. RF
The AC power supply 104 supplies a high-frequency AC current having a frequency of 13.56 MHz and an AC voltage of 1000 V to the substrate support 102 via the blocking capacitor C and the conductive support bar 103.
To supply.

The supply of a high-frequency AC current from the RF AC power supply 104 generates a plasma 106 between the chamber 101 and the substrate support 102. In the plasma 106, the same number of positive and negative ionized particles (electrons, cations, etc.) and neutral particles are present. An electron has a small mass and can move in response to a change in the electric field, whereas a cation has a large mass and can hardly move in response to a change in the electric field. The amplitude of the electrons when the electric field in the ion sheath makes a single oscillation is about 2 m, whereas the amplitude of the cations is about 30 μm. Thus, while electrons can move in response to high frequency fluctuations in the electric field, cations cannot move in response to high frequency fluctuations in the electric field, but only move in response to the DC electric field.

[0005] As described above, in the high-frequency fluctuating electric field, the response speed of electrons and cations is different, and the area of the chamber 101 is larger than that of the substrate support 102, and the entire chamber 101 is at the ground potential. For this reason, when a high-frequency AC current is supplied to the substrate support 102, only electrons in the plasma 106
Gather in 02. That is, cations hardly move in the high-frequency fluctuating electric field, and only electrons respond to the high-frequency fluctuating electric field. However, since the potential of the plasma 106 surrounded by the chamber 101 becomes very close to the ground potential, the plasma 10
The environment in which the electrons in 6 are difficult to move in the direction of the chamber 101 is provided. As a result, a phenomenon occurs in which electrons collect on the substrate support 102.

The electrons collected on the substrate support 102 are accumulated on the substrate support 102 by the action of the blocking capacitor C, and as a result, the substrate support 102 is negatively biased. Usually, it is biased to about several hundred volts, and this is called DC self-bias. When this negative DC self-bias occurs, the electrons in the plasma 106 are repelled and are less likely to flow into the substrate support 102, while the cations in the plasma 106 are accelerated and move toward the substrate support 102. Become. An equilibrium state is established where the amount of electrons and cations flowing into the substrate support 102 during one cycle of the electric field fluctuation is balanced, and the discharge is continued.

FIG. 6 is a diagram showing the potential and the inflow current of the substrate support 102 at the initial stage and at the equilibrium stage.
(A) shows the output voltage of the RF AC power supply 104 at the initial stage,
(B) shows the potential of the substrate support 102 at the initial stage, (C) shows the current flowing into the substrate support 102 at the initial stage, and (D)
Shows the output voltage of the RF AC power supply 104 at the time of equilibrium, (E) shows the potential of the substrate support 102 at the time of equilibrium, and (F) shows the current flowing into the substrate support 102 at the time of equilibrium. (B), (E)
The dashed line at indicates DC self-bias, (C),
In (F), the graphs G11 and G13 above the center lines L11 and L12 show the inflow of electrons and the graph G below the center lines L11 and L12.
12, G14 indicates the inflow amount of the cation.

That is, from the RF AC power supply 104, FIG.
When an output voltage as shown in FIG. 2A is supplied to the substrate support 102, initially, only electrons gather at the substrate support 102 and are accumulated in the substrate support 102 as described above. As a result, the average value of the potential of the substrate support 102 becomes
It decreases as shown by the broken line in FIG. Therefore, the flow of electrons into the substrate support 102 gradually decreases as shown by a graph G11 in FIG.
The flow of cations into the substrate support 102 as shown by the graph G12 in FIG. Thereafter, the amount of electrons flowing into the substrate support 102 during one cycle of the electric field fluctuation [FIG.
When the G graph 13 in (F) balances the amount of cations (graph G14 in FIG. 6F), as shown in FIG. 6E, the average value of the potential of the substrate support 102 (broken line). Is reduced, and an equilibrium state is reached. This substrate support 102
Is the DC self-bias value.

Returning to FIG. 5, when cations are accelerated and move to the substrate support 102, if the semiconductor substrate 105 is mounted on the substrate support 102, the cations collide with the semiconductor substrate 105, Anisotropic etching is performed on the surface oxide film of the wiring metal film provided on the semiconductor substrate 105. At this time, since the wiring metal film is formed on the insulating film of the semiconductor substrate 105, positive charges are stored in the wiring metal film. This accumulation of charges is called charge-up.

[0010]

The integration of silicon semiconductor integrated circuits has been increasing. In order to improve the uniformity, film formation, and processing speed on the surface of a silicon semiconductor wafer used for such an integrated circuit, the power of plasma used for dry etching is increasing, and as a result, charge-up tends to occur. . In addition, M
Since the gate electrode of the OS transistor is connected, the gate electrode is easily charged up. In particular, the design of the circuit pattern becomes more complicated, and the number of wirings drawn from one gate electrode of the transistor and the area of the contact hole tend to increase, which causes a larger charge-up of the gate electrode.

As a result of such charge-up of the gate electrode, the possibility that electrostatic breakdown 111 occurs in the insulating film under the gate electrode of the semiconductor substrate 105 is increasing. FIG. 7 is a diagram showing a cross section of the semiconductor substrate 105. In FIG. 7, an insulating film layer 107 and a metal wiring layer 10 are provided on a semiconductor substrate 105.
8, the gate electrode 110 exists on the insulating film layer 107, and the gate electrode 110 and the metal wiring layer 108 are connected. When the metal wiring layer 108 is covered with an etching mask 109 and exposed to cations in the direction of the arrow, the metal wiring layer 108 is etched. At the same time, the metal wiring layer 108 receives cations, and the gate electrode 110 connected to the metal wiring layer 108 is charged up with positive charges. On the other hand, at this time, since the substrate support 102 on which the semiconductor substrate 105 is mounted is negatively charged by the DC self-bias, there is a possibility that the electrostatic breakdown 111 occurs in the insulating film below the gate electrode 110. .

In particular, as silicon semiconductor integrated circuits become more highly integrated, the thickness of the insulating film layer 107 below the gate electrode 110 of the MOS transistor tends to become thinner. For this reason, such an electrostatic breakdown 111 is very likely to occur.

The failure of the integrated circuit induced in such a manufacturing process is called PID (Process Induced Damage), and this PID has become an important problem in the yield of the integrated circuit.

The present invention has been made in view of the above points, and an object of the present invention is to provide a dry etching method and apparatus which prevent electrostatic breakdown of an insulating layer below a gate electrode due to charge-up. Aim.

[0015]

According to the present invention, in order to achieve the above object, plasma is generated between a grounded housing and a substrate support provided inside the housing, and the generated plasma is applied to a substrate. A high frequency alternating current is supplied to a substrate support in a dry etching apparatus that irradiates a semiconductor substrate on the support to generate a DC self-bias, and the substrate support is negatively charged for a first predetermined time. And supplying a DC current to the substrate support to cause the substrate support to move to the second position.
And a step of positively charging for a predetermined period of time.

In the above steps, a high-frequency AC current is supplied from the high-frequency AC power supply to the substrate support for a first predetermined time, whereby a DC self-bias is generated in the substrate support, and Is negatively charged. Therefore, the semiconductor substrate mounted on the substrate support is irradiated with cations, and the semiconductor substrate is etched. At the same time, positive charges are accumulated on the semiconductor substrate. Thereafter, a positive voltage is supplied from the DC power supply to the substrate support for a second predetermined time in place of the high-frequency AC power supply. Thus, the substrate support is positively charged. Therefore, instead of cations, electrons in the plasma reach the semiconductor substrate,
Positive charges accumulated on the semiconductor substrate during the first predetermined time are neutralized by the delivered electrons during the second predetermined time.

In this way, charge-up of the semiconductor substrate is eliminated, and electrostatic breakdown of the insulating layer below the gate electrode is prevented.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a configuration diagram of a dry etching apparatus according to a first embodiment of the present invention. In the figure,
The chamber 1 forms a sealed space, an inert gas is introduced into the space (for example, Ar gas, 100 sccm), and the inside is adjusted to a low gas pressure by connecting a vacuum exhaust system (for example, 0.13 Pa). ). Further, the chamber 1 is made of a conductive material and is grounded. A substrate support 2 is provided in the chamber 1 in a state of being electrically insulated from the chamber 1. The substrate support 2 is made of a conductive material, and is connected to a switch (SW) 4 via a conductive support bar 3.
A semiconductor substrate 5 is mounted on the substrate support 2 at the time of etching. The changeover switch 4 includes a blocking capacitor C
b, an RF AC power supply (RF) 6 is connected, and a DC power supply (DC) 7 is connected. RF AC power supply 6
Outputs a high-frequency AC current having a frequency of 13.56 MHz and an AC voltage of 1000 V.
Output 00V. The changeover switch 4 performs switching at a cycle of 10 Hz, and outputs the output of the RF AC power supply 6 and the DC power supply 7
Are alternately supplied to the substrate support 2.

First, when a high-frequency AC current is supplied from the RF AC power supply 6 to the substrate support 2, the chamber 1
Electrons in the plasma 8 generated between the substrate support 2 and the plasma 8 collect on the substrate support 2 and are accumulated in the substrate support 2 by the DC current blocking action of the blocking capacitor Cb.
Therefore, the substrate support 2 is negatively DC self-biased. When a DC self-bias is generated, positive ions in the plasma 8 are accelerated and move toward the substrate support 2. As a result, the cations collide with the semiconductor substrate 5 mounted on the substrate support 2 and anisotropically etch the surface oxide film of the wiring metal film provided on the semiconductor substrate 5. At this time, positive charges are stored in the wiring metal film because the wiring metal film is formed on the insulating film of the semiconductor substrate 5.

Here, when the changeover switch 4 is switched to connect the DC power supply 7 to the substrate support 2 in place of the RF AC power supply 6, the substrate support 2 is positively charged. Therefore, the cations are accelerated in the opposite direction, and the etching stops. In addition, the electrons in the plasma 8 reach the wiring metal film of the semiconductor substrate 2, and the positive charges previously accumulated in the wiring metal film of the semiconductor substrate 5 are neutralized.

FIG. 2 is a diagram showing the potential of the substrate support 2 and the inflow current accompanying the switching between the RF AC power supply 6 and the DC power supply 7. FIG. 2A shows the power supply voltage supplied to the substrate support 2. (B) shows the potential of the substrate support 2, and (C) shows the current flowing into the substrate support 2. The broken line in (B) indicates a DC self-bias, and in (C), the graph G1 above the center line L1 indicates the inflow of electrons, and the graph G2 below the center line L1 indicates the inflow of cations.

That is, during the period T1 shown in FIG. 2A, when a high-frequency AC current is supplied from the RF AC power supply 6 to the substrate support 2, a DC self-bias as shown by a broken line in FIG. Are generated on the substrate support 2. When this DC self-bias occurs, the plasma 8
The cations therein flow into the substrate support 2 as shown in a graph G2 in FIG. 2C, and as a result, etching is performed. At this time, positive charges are stored in the wiring metal film because the wiring metal film is formed on the insulating film of the semiconductor substrate 5.

Here, in the period T2 shown in FIG.
When the DC power supply 7 is connected to the substrate support 2 in place of
The substrate support 2 is positively charged as shown in FIG. Therefore, as shown in a graph G1 in FIG.
The electrons in the plasma 8 reach the substrate support 2, and at this time, the positive charges previously stored in the wiring metal film of the semiconductor substrate 5 are neutralized by the electrons.

In this manner, the charge-up of the wiring metal film of the semiconductor substrate 5 is eliminated for each cycle.
Electrostatic breakdown of the insulating layer under the gate electrode of the semiconductor substrate 2 is easily prevented.

Although the changeover switch 4 is switched at a cycle of 10 Hz, this switching cycle is generally set as follows. That is, when the RF AC power supply 6 is connected to the substrate support 2 for a first predetermined time and the DC power supply 7 is connected for a second predetermined time, the first
If the length of the predetermined time is too long, electrostatic breakdown occurs in the semiconductor substrate 2. Therefore, the predetermined time is set to at least a value shorter than a limit value at which the electrostatic breakdown occurs. If the length of the second predetermined time is too long, the generation of the plasma 8 is stopped. Therefore, the second predetermined time is set to at least a value shorter than a limit value at which the generation of the plasma 8 is stopped. That is, if the DC power supply 7 is connected to the substrate support 2 for a long time, the metal film for wiring of the semiconductor substrate 5 passes through neutralization and becomes negatively charged, and the discharge is stopped. The second predetermined time needs to end before being stopped.

In the changeover switch 4, the first predetermined time and the second predetermined time are the same length of 50 ms [= (1
0 Hz) ⁻¹ / 2)], but a changeover switch that can set both of them at different times may be used in place of the changeover switch 4, and these times are set to the changeover switch. A function that can be arbitrarily set from outside may be provided.

Further, without using the changeover switch 4, the RF
The AC power source 6 is directly connected to the conductive support bar 3 via the blocking capacitor Cb, and the DC power source 7 is directly connected to the conductive support bar 3.
Alternatively, the power supply current supplied to the DC power supply 7 may be alternately turned on and off. Alternatively, similarly, the RF AC power source 6 is connected directly to the conductive support bar 3 via the blocking capacitor Cb, and the DC power source 7 is directly connected to the conductive support bar 3. Oscillation circuits provided in the power supply 7 may be controlled so that the outputs of the RF AC power supply 6 and the DC power supply 7 are alternately performed.

Next, a second embodiment will be described. FIG. 3 is a configuration diagram of a second embodiment of the dry etching apparatus according to the present invention. The configuration of the second embodiment is basically the same as the configuration of the first embodiment. Therefore, in the description of the second embodiment, the same portions as those of the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted.

The second embodiment differs from the first embodiment only in the power supply portion supplied to the substrate support 2. That is, in the second embodiment, the pulse power source 9 is connected to the substrate support 2 via the conductive support bar 3. The pulse power supply 9 supplies a positive 1000 V DC voltage to 50
After that, the negative DC voltage is outputted for 50 ms immediately after that, and such output is repeated.

In a dry etching apparatus to which no high-frequency alternating current is supplied, the insulating film formed on the semiconductor substrate 5 plays the role of a capacitor, and the capacitor 8
While the current is flowing from the substrate support 2 side, discharge is performed and plasma 8 is generated. The current that flows in
When the capacity of the capacitor is satisfied, the discharge stops. Therefore, if the DC voltage supplied to the substrate support 2 is alternately switched between positive and negative at a timing before the discharge is stopped, the discharge can be maintained. The duration of each supply of the positive and negative DC voltages at which the discharge can be maintained is, for example, 50 ms.

First, when a negative DC voltage is supplied to the substrate support 2, a plasma 8 is generated between the chamber 1 and the substrate support 2, and cations in the plasma 8 are directed toward the substrate support 2. It is accelerated to move. This allows the cations to
The semiconductor wafer 5 collides with the semiconductor substrate 5 mounted on the substrate support 2, and an anisotropic etching is performed on the surface oxide film of the wiring metal film provided on the semiconductor substrate 5. At this time, positive charges are stored in the wiring metal film because the wiring metal film is formed on the insulating film of the semiconductor substrate 5.

Next, when a positive DC voltage is supplied to the substrate support 2, the cations are accelerated in the opposite direction, and
Etching stops. Then, the electrons in the plasma 8 reach the wiring metal film of the semiconductor substrate 2, and the positive charges previously accumulated in the wiring metal film of the semiconductor substrate 5 are neutralized.

FIG. 4 is a diagram showing the potential and the inflow current of the substrate support 2 in the second embodiment.
(A) shows the output voltage of the pulse power supply 9, (B) shows the potential of the substrate support 2, and (C) shows the current flowing into the substrate support 2. In (C), the graph G above the center line L2
3 shows the inflow of electrons, and the lower graph G4 shows the inflow of cations.

That is, when a negative DC voltage is supplied to the substrate support 2 during the period T3 shown in FIG. 4A, the substrate support 2 is negatively charged as shown in FIG. Positive ions in the plasma 8 flow into the substrate support 2 as shown by a graph G4 in FIG. At this time, the cations collide with the wiring metal film of the semiconductor substrate 5 to perform etching, and a positive charge is applied to the wiring metal film because the wiring metal film is formed on the insulating film of the semiconductor substrate 5. Stored in metal film.

Next, when a positive DC voltage is supplied to the substrate support 2 during a period T4 shown in FIG.
4B, the substrate support 2 is positively charged, and the electrons in the plasma 8 flow into the substrate support 2 as indicated by a graph G3 in FIG. 4C. At this time, the electrons neutralize the positive charges previously stored in the wiring metal film of the semiconductor substrate 5.

As described above, also in the second embodiment,
The charge-up of the wiring metal film of the semiconductor substrate 5 is eliminated every cycle, and the electrostatic breakdown of the insulating layer under the gate electrode of the semiconductor substrate 2 is easily prevented.

In the pulse power supply 9 according to the second embodiment, the duration of the positive and negative DC voltages is set to 50 ms, but is not limited thereto. Generally, these durations are set in consideration of prevention of electrostatic breakdown of the semiconductor substrate 2 and prevention of discharge stop. Also,
The pulse power supply 9 may be provided with a function that can set these durations arbitrarily from outside.

[0038]

As described above, in the present invention, a switch and a DC power supply are provided in addition to a high-frequency AC power supply in a dry etching apparatus. Thereby, the positive charges accumulated on the semiconductor substrate during the etching with the cations are neutralized each time the DC power supply is connected by the changeover switch. Thus, charge-up of the semiconductor substrate is eliminated, and electrostatic breakdown occurring in an insulating layer below a gate electrode of a transistor provided on the semiconductor substrate can be easily prevented.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing a first embodiment of the present invention.

FIG. 2 is a diagram showing a potential of a substrate support and an inflow current when switching between an RF AC power supply and a DC power supply.

FIG. 3 is a configuration diagram showing a second embodiment of the present invention.

FIG. 4 is a diagram showing a potential and an inflow current of a substrate support in the second embodiment.

FIG. 5 is a configuration diagram showing a conventional dry etching apparatus.

FIG. 6 is a diagram showing a potential of a substrate support and an inflow current in a conventional dry etching apparatus.

FIG. 7 is a diagram illustrating electrostatic breakdown of a semiconductor substrate generated by a conventional dry etching apparatus.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Chamber, 2 ... Substrate support, 3 ... Conductive support rod, 4 ...
Changeover switch, 5: semiconductor substrate, 6: RF AC power supply, 7
... DC power supply, 8 ... Plasma

Claims (6)

[Claims] 1. Dry etching for generating plasma between a grounded housing and a substrate support provided inside the housing, and irradiating the generated plasma to a semiconductor substrate on the substrate support. Supplying a high frequency alternating current to the substrate support to generate a DC self-bias to negatively charge the substrate support for a first predetermined time; and applying a DC current to the substrate support. Supplying and positively charging the substrate support for a second predetermined time. 2. The dry etching method according to claim 1, wherein the value of the first predetermined time is set at least to a value smaller than a limit value at which electrostatic breakdown of the semiconductor substrate occurs. 3. The dry etching method according to claim 1, wherein the value of the second predetermined time is set to a value at least smaller than a limit value at which generation of plasma stops. 4. A metal thin film formed on a surface of a semiconductor substrate on the substrate support, wherein plasma is generated between a grounded housing and a substrate support provided inside the housing. In the dry etching method of irradiating the substrate support, the substrate support is negatively charged by a DC self-bias, and the metal thin film is etched by positively charged ions. Charging the metal thin film to inject negative electrons to neutralize the positive charge stored in the metal thin film. 5. A dry etching apparatus using plasma, comprising: a housing grounded and adapted to generate plasma therein; and a substrate provided inside the housing and on which a semiconductor substrate is mounted. A support, a high-frequency AC power supply for supplying a high-frequency AC current to the substrate support, and a high-frequency AC power supply for negatively charging the substrate support with a DC self-bias; supplying a DC current to the substrate support, A DC power supply for positively charging a base; and switching means for alternately supplying a high-frequency AC current from the high-frequency AC power supply and a DC current from the DC power supply to the substrate support base. Etching equipment. 6. A dry etching apparatus using plasma, comprising: a housing grounded and adapted to generate plasma therein; and a substrate provided inside the housing and on which a semiconductor substrate is mounted. A dry etching apparatus comprising: a support base; and a supply unit connected to the substrate support base and configured to alternately supply positive and negative DC voltages to the substrate support base.