TW201116058A - Mixed format media transmission systems and methods - Google Patents

Abstract

Systems and methods for operating cameras are described. An image signal received from an image sensor can be processed as a plurality of video signals representative of the image signal. An encoder may combine baseband and digital video signals in an output signal for transmission over a cable. The video signals may include substantially isochronous baseband and digital video signals. The baseband video signal can comprise a standard definition analog video signal and the digital video signal may be modulated before combining with the baseband video signal and/or transmitting wirelessly. The digital video signal may be a compressed high definition digital video signal. A decoder demodulates an upstream signal to obtain a control signal for controlling the position and orientation of the camera and content of the baseband and digital video signals.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates generally to multimedia transmission systems and, more particularly, to systems and methods for transmitting high quality digital video and standard picture quality analog video over a single cable. The present invention claims priority from US Patent Application Serial No. 12/363,669, entitled "Mixed Format Media Transmission Systems and Methods", issued on January 30, 2009, and claims the name of the application "SLOC Analog Equalizer For" on June 17, 2009. Baseband Video Signal, US Provisional Patent Application No. 61/187,970, and claims US Provisional Patent Application entitled "A Method For Constellation Detection In A Multi-Mode QAM Communications System" on June 17, 2009 Priority to 61/187,977, and claims priority to US Provisional Patent Application No. 61/187,980, entitled "Novel Carrier Phase Offset Correction For A QAM System", June 17, 2009, and claims June 2009曰 优先权 曰 No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No No Priority is made to 187,996, the entire disclosure of which is incorporated herein by reference. [Prior Art] With the advent of digital broadcast TV and streaming video technology, various video cameras, monitors, and video recordings with high resolution and advanced functions are available: 201116058 becomes available. Today's closed circuit television (CCTV) systems can provide high quality video output and compressed digital video signals for applications such as business location monitoring, access control and remote monitoring of facilities. However, legacy systems are still in use, and standard picture quality analog video signals have been widely used and continue to be used during the transition to full digital and high quality systems. In particular, a coaxial electronic mirror (coax) has been deployed to carry signals from a CCTV camera to a monitoring station. Some deployed CCTV cameras transmit compressed video signals over a regional network (or wide area network), and such cameras can use the Internet Protocol (IP) as a communication method to transmit compressed video signals. Figure 1 illustrates a conventional system that uses coax to carry standard enamel analog video. A basic analog camera 10 typically produces a composite video baseband signal (CVBS) that can be transmitted up to 3 nanometers using coax n. A CVBS signal is typically provided to a video recording system that typically includes a digital video recorder (DVR) 12 that records CVBs in digital format. A conventional monitor 14 can be coupled to the DVR 12 to simultaneously display a standard picture f-type video having a resolution of one of 720 x 480 pixels. The digital camera 16 can replace the analog camera H) in some applications. The digital camera supports the Serial Digital Interface (SDI), which is used to transmit uncompressed standard quality digital video to the DVR12 via C°aXl7. Figure 2 illustrates a conventional method of transmitting high quality in the current development system; (192 〇 X_pixels). First, the digital camera 20 supports a high-quality tandem digital interface (10) side, which can transmit uncompressed high-quality digital video to the DVRU through the c〇ax 21 at a rate of 201116058 1.5 Gbps. The cable distance supported at this high transmission rate is up to 1 。. Second, an IP-based, high-quality (HD) camera 24 can generate a compressed digital HD video signal over a 100 Mbps Ethernet network using a standard Category 5 (CAT5) twisted pair cable 25 to a distance of 100 meters. The signal is received and recorded by a DVR 22 for non-immediate playback. The existing c〇ax 26 can be used to transmit video from camera 24 to a DVR 22 using CAT5 to coax bridging modems 27 and 29 or other conversion devices. The use of the network to cause the camera to transmit digital video allows these systems to add some upstream communications, typically control and audio signals 28. SUMMARY OF THE INVENTION Certain embodiments of the present invention provide cameras and methods of operating the cameras. A processor can receive an image signal from an image sensor to generate a plurality of video signals representative of the image signal. A decoder uses a combined baseband video signal and a digital video signal to be an output signal for transmission over a cable. The video signal can include a number and a digital video signal and is substantially equal to a closed high-definition television camera. . The camera is operable to, according to some aspects of the present invention, the baseband video signal may include a standard::: than the video signal and the digital video signal may be in the baseband video: the digital video signal may include - compress the high quality digital bit ; number. The frame rate of a digital video signal may be less than the frame rate of the image signal, especially when the video recorder provides a modulated digital signal. In some embodiments, a decoder is configured to demodulate a transmission cable that is used to carry downlink video or an uplink signal that is received from a wireless communication network. The demodulated uplink signal may include a control signal including a signal for controlling the position and orientation of the camera to control the generation of the baseband video signal and the digital video signal by the processor and select a portion of the image signal for encoding as a fundamental frequency. Video signal. The control signals may also include a signal to select a portion of the image signal encoded as a digital video signal and an audio signal for driving the audio output of a camera such as a speaker. Certain embodiments of the present invention provide methods of transmitting video images. The method may include dividing a video signal from a high-definition imaging device into a frequency division multiplexing process to obtain a modulated digital signal, and combining the modulated digital signal with a fundamental frequency analog signal representing the video signal to generate An output k number is simultaneously transmitted to a monitor and a digital video storage device. In some such embodiments, the monitor displays a baseband analog representation representing the video signal and/or the digital video memory uses a digital video recorder to record a high quality frame sequence captured from the modulated digital signal. . The digital video signal can be compressed. In some embodiments, transmitting the output signal includes providing an output signal to a coaxial cable and/or to a wireless transmitter. One of the input signals received from the coaxial cable or a wireless network can be demodulated to obtain a control signal. The baseband analog signal can be generated by encoding a portion of the video signal in a composite video signal, and the portion of the video signal to be encoded in the composite video signal can be controlled using a control signal. This control signal controls the position of the camera. Demodulating the input signal can additionally generate an audio signal from the input signal. Certain embodiments of the present invention provide a system and method for operating a camera - a processor can receive an image signal from an image sensor and generate a plurality of video signals - control logic can be configured in response to A control signal received by the camera and a modulator can be configured to modulate the digital video signal to obtain a modulated signal. The complex video signal can include a baseband video signal and a digital video signal. Each of the plurality of video signals represents at least a portion of the field of view of the camera and the control signal controls the content of the baseband and digital video signals. The modulated signal and the baseband video signal are typically transmitted simultaneously by the camera. The fundamental and digital video signals can be substantially synchronized. An encoder can combine the baseband video signal and the modulated signal as an output signal for transmission over a cable. The control signals can be received, for example, wirelessly from a wireless network. The modulated signal can be transmitted at least partially wirelessly. The digital video signal can be a high quality digital video signal and can be a portion of the field of view represented by one of the video signals for a compressed digital video signal control signal. [Embodiment]

The present invention will be described in detail with reference to the accompanying drawings, in which It should be noted that the following figures and examples are not intended to limit the scope of the invention to a single embodiment, but that other embodiments are possible by exchanging T 201116058 some or all of the described or illustrated elements and that the beta port is 8f, The same reference numerals will be used to refer to the same or similar parts. Some of the elements of the specific embodiments of the drawings may be used in the description of the known components, or only those that are necessary to understand the present invention, and other parts of such known components will be omitted. Detailed description. So as not to affect the invention. In the present specification, the specific embodiment of the display-specific component should not be considered as limiting; rather, unless explicitly stated herein, the invention is intended to include other specific embodiments including the plural components and vice versa. Moreover, the Applicant does not intend to attribute the terms in the specification or the scope of the claims to the non-constant or special meanings unless explicitly stated. Further, the present invention includes equivalents to the present and future aspects of the components referred to herein. Some embodiments of the present invention provide a system and method for enabling a camera to simultaneously transmit high-quality digital video and standard picture quality analog video through coax. The south picture quality camera is adapted to generate a compressed digital video signal and an analog base frequency signal. The digital signal is modulated and transmitted in a frequency band separated from the upper frequency of the fundamental video signal. The analog signal can be encoded according to any desired standard, including APL, SEC AM, and NTSC standards and variants thereof. For the purposes of this description, an example of a system using a security link (SLOC) through Coax will be described. In addition, SL〇c will generally be considered to have uplink and downlink signals for a camera: the camera system is on the upstream. In the description, an example of a SLOC system provides a downlink high-quality (HD) video signal in a first passband, an uplink audio and control signal in a second passband, and a downlink composite video baseband signal.巍201116058 (CVBS). It should be understood that other passband signals and bandwidth assignments can be used. For example, the system can use two-bit video signals of standard or high quality resolution. Figure 3 depicts a specific embodiment of the invention illustrating certain operational principles of the invention. This example describes the deployment of HD camera 30 in a system where it is necessary to view the live video generated by camera 30 while simultaneously recording a high quality copy of the video on DVR 32. An example of such a system is a security or surveillance system. The functionality of HD camera 30 can be remotely controlled' as described in more detail below. The HD camera 30 is adaptable to simultaneously generate a high quality signal 332 and an analog CVBS signal 330. In some embodiments, the 'high quality signal 332' and the analog CVBS signal 330 are equal, but may be substantially isochronous if, for example, the delays in processing different signals are not equal. In an example, the 'CVBS signal 330 may be delayed due to the digital to analog conversion load. In another example, the high quality signal 332 can be compressed based on a compression ratio or the like and subjected to a variable delay. In some embodiments, CVBS 330 and high quality signal 332 may be synchronized or maintained in a constant time relationship with a common audio signal produced by camera 3.

Camera 30 can be adapted by adding external components or by integrating hardware and software into camera 30. In the example, the security is connected through (3) (10). The data machine (SLOC-T) 31 is provided in the camera 3〇. The SL〇c_T 31 can be constructed as a component that is integrated as one of the cameras 3 or is integrated into the camera. Sl〇c_t3 1 causes a multi-S 201116058 media feed to be transmitted to the downlink through a communication channel: as illustrated, the SLOC-T31 is consistently enabled to transmit a plurality of signals representing different resolution signals of the video generated by the camera 3 through a coaxial The device that the cable 33 transmits. For the sake of clarity, a SLOC deployed in a transmission device such as a camera 3 is referred to as "SLOC_T", and a SL 〇c provided in a receiving device such as a DVR, a network switch, etc. will It is called a "SLOC-R". A description of the SLOC-T and SLOC-R devices will be provided in more detail below.

The SLOC-T 31 can cooperate with other components of the camera 30 and/or can increase the enhanced functionality that causes the camera 30 to operate in various modalities. In one example, camera 30 can generate an uncompressed ^!!) digital video output and a few 〇 (: _ 31 can be known to supply lis HD digital video signals. Therefore, sloc-T 3 1 can be used as needed Provides capabilities beyond modulation and demodulation to enhance the functionality of the main camera. Therefore, several SLOC-T devices can operate in various modalities, some of which are provided by examples. In a modality, Sl〇c_T3 1 Receiving a compressed HD video signal from the camera 30 and a standard enamel analog version of the signal and transmitting the two signals through the coax 33. In another mode, the SL0C-T31 receives an uncompressed hd video signal from the camera 30 and the A standard image quality analog version of the signal and a compressed HD digital version of the signal transmitted by coax 33 along with a standard image quality analog signal. SL〇CT3 1 can transmit an HD digital signal and a hd received from the camera 3〇 A standard picture quality analog signal derived from the signal. [S 201116058 In some embodiments, the SLOC-T31 uses frequency division multiplexing processing to generate one of the output signals transmitted on the coax 33. The example illustrated in Figure 5 Medium and downlink digital signals The frequency band 52 is provided in a single frequency band 52 concentrated on one of the frequency/cd carriers 53. The frequency band 52 starts at the highest frequency / 〇 of the fundamental frequency analog signal 5 。. This different frequency band 52 can be referred to as a channel. Based on the capabilities of SLOC-T3 1, available bandwidth, signal bandwidth, and other reasons, in some embodiments, channel 52 can be selected for compatibility with the receiving device. In one example, the signal can be provided directly to A standard enamel television and channel 52 can be selected to ensure proper separation from the baseband signal. When using the standard definition of the signal, the frequency band in channel 52 can also be based on a standard selection of digital video transmissions. A single digital signal is envisioned. A portion of the digital signal that can be transmitted by two or more different channels. A transmittable version of the digital signal can be generated using any suitable modulation scheme. For example, different types of wired and wireless connections can be used in conjunction with a modulation scheme, such as a phase shift key. Control (PSK), Frequency Shift Keying (FSK) 'Quadrature Amplitude Modulation (QAM), Orthogonal Frequency Division Multiplexing (OFDM), etc. Modulation schemes are typically based on The characteristics of the transmitted media, the frame rate of the desired video signal, and other factors affecting the different factors of the available bandwidth in channel 52. A SLOC-R modem 35 can be in a video such as a DVR; The SLOC-R data machine 35 can receive and process digital video and CVBS signals. Typically, the CVBS signal is captured and directly transmitted to the 丄12 201116058 Display System 3 3 for on-site inspection by the camera 3 0 The captured video image. Display system 33 can be a standard quality monitor, although the display system can also receive a digital version of the received analog signal. In one example, the SLOC-R modem 35 can generate a digital version of the analog signal for use with a digital monitor or a suitably equipped computer. The capture of the baseband signal can typically be performed separately using a low pass filter implemented using analog components or by digital signal processing techniques. The digital HD signal can be separately captured and provided to the recording section of the DVR3 2. In some embodiments, the digital HD video signal can be compressed in the DVR prior to recording. In many embodiments, the digital HD video signal is received as a compressed digital signal. In some embodiments, the 'SLOC-T 31 and SLOC-R 35 are configured to support bidirectional transmission of signals. In an example of a security installation (and as described in detail below with reference to Figure 6), the camera 3A can include a microphone 614, a speaker 612, a sensor 616, and a control interface 618 for controlling the electromechanical actuator. And other features (see Figure 6). In this example, sl〇ct3i and SLOC-R3 5 are typically configured to "transfer control, audio, and other data to camera 30. Referring again to Figure 5, in one embodiment, the upstream data may be The one or more channels 54 located at the upper end of the available bandwidth are transmitted to the camera. The selection of channels for transmitting the digital multimedia signal 52, control and audio signals 54 and other data may be detected based on the available bandwidth, channels 52 and 54. ^ 13 201116058 Signal-to-noise ratio, signalling standard and/or application specific requirements. In some embodiments, the channel configuration, bandwidth and signal-to-noise ratio are connected to SLOC-T 31 using a training sequence and The SLOC-R35 is determined. Typically, the training sequence is used to determine the signaling capability of the predetermined or coordinated channel to select a channel 52 for the transmission of the digital video and to determine the available bandwidth in the selected channel 52. The selected channel 52 The characteristics can be used to set the degree of compression for the digital video signal. In some embodiments, the upstream signal 54 includes signals that control the content of the downstream 52 and base frequency 50 signals. For example, camera optics Element 6A can provide a fisheye view of the location monitored by camera 60 and can control the camera processor to select a portion of the image for transmission as a baseband signal 5. Typically, downlink digital signal 52 provides a full image for use in Recorded on a dvr or used for additional processing. The baseband signal 5〇 can receive the baseband signal 5〇 for on-site monitoring of the area under surveillance. The baseband signal 5〇 can include an adjusted image for generation by the fisheye lens Correction of the visual effect. One of the baseband signals 50 can cause the field of view to move within the field of view of the fisheye lens by selecting a new portion of the captured image for viewing. For example, the viewer can request Pan-right (to pan right) to move the field of view to the right. The data transmitted in the upstream signal 54 then causes the camera processor to capture and process the desired portion of the field of view. In some embodiments, the request to move into the field of view in the fundamental frequency code 50 can cause physical motion of the camera 6〇. Therefore, the control data in the upstream signal 54 can affect the content of both the fundamental frequency 50 and the 201116058 line digit 52 signal. In some embodiments, the downstream audio can be transmitted as part of the HD digital video signal and/or as part of the CVBS signal. Certain downstream signals can be carried in a separate dedicated channel (not shown). In some embodiments, upstream communication to camera 30 may be processed using an out-of-band communication method, including, for example, using a wired or wireless network. It is envisioned that certain embodiments may (as an alternative or as an additional option) wirelessly transmit the downstream digital signal 52. Thus, baseband signal 50 can be transmitted through c〇ax, while certain combinations of upstream 54 and downstream 52 are transmitted wirelessly. Typically, the upstream data 54 includes control signals for the downlink 52 and baseband 50 signals regardless of the method of transmission. In some embodiments, cable 33 can be provided directly to display system 33 for analog display of standard picture quality video. A standard enamel monitor or display 33 typically includes a filter circuit that is selectable between a baseband signal and a standard tuned television channel. Thus, the monitor 33 can discard the high frequency digitally encoded carrier signal. "If the digital video signal is transmitted in a standard picture quality channel and encoded using standard picture quality, the DVR 32 can also receive digital video signals without additional processing. The SLOC-R35 decodes the signals generated by the SLOC-T31 and provides decoded HD digital video and other signals for the DVR32. The SLOC-R 35 can also encode control, audio and other information for transmission to the camera 30. Referring now to Figure 4, there is shown a particular embodiment of the present invention to illustrate certain operational principles of the invention of 15 201116058. Figure 4 depicts an example based on a system in which live video generated by camera 40 needs to be viewed while simultaneously providing a high quality copy of the video over a network via network switch 44 in the example 'HD video The feed is captured and streamed using an internal or external ip video feeder. The HD camera 40 is typically adapted to simultaneously generate an inter-picture quality signal and a analog-like baseband video signal. The camera 4 can be adapted by adding external components or by integrating hardware and software (such as the SLOC-T 400) into the camera. The SLOC-T 400 can be operated in the same manner as the features of the SLOC-T 31 of Figure 3. However, the SLOC-T 400 can be configured to encode a digital video signal in a manner that facilitates the transfer of digital video signals over a network. For example, the 'SLOC-T 400 can be programmed or configured to provide digital video signals in accordance with a streaming format supported by an IP video feeder. The multiplexed video signal transmitted by the digital camera 40 can be received by a network switch 44, optionally with SL〇c_r 44〇. The fundamental frequency standard image analog signal can be captured and provided to the display 43. In some embodiments, the SLOC-R 440 can capture digital high-definition video signals and forward them to a video server or other network using a suitable network with sufficient bandwidth to carry digital HD video signals. Road device. The digital HD video signal can include a compressed HD video signal. In some embodiments, the digital high quality signal captured by the SLOC-R 440 is dusted or further collapsed for transmission to a video server or other network device. SLOC-R 440

Γ C may include hardware and software for re-encoding and/or re-modulating digital high-quality signals for transmission on the Internet; for example, SLOC-R 440 may generate codes for transmission over Ethernet. An H-2 64 signal. Referring now to Figure 6, certain embodiments of the present invention provide for lifting capabilities that can be applied to a security system. In the depicted example, camera 60 includes a modem SLOC-T 606 and a processor' configured and adapted to provide digitally encoded multimedia signals in accordance with certain aspects of the present invention. The sequence of images can be combined using one of optical element 600 and an image sensor 602' including a combination of lens systems and CCD sensors known to those skilled in the art. Processor 604 typically receives a scan signal 603 from an image sensor 602 that provides a sequence of images captured at a desired or predefined frame rate. In some embodiments, image sensor 602 can include hardware and logic to convert one of the images captured by one or more sensors to scan the analog k number and to generate a digital video signal. For example, image sensor 6 〇 2 may include RGB (red, green, blue) sensors and image sensor 〇 2 may internally process RGB sensor output to generate a digitally encoded color video signal as its output 603. In other embodiments, processor 〇4 may preprocess signal 603 from image sensor 602 to obtain an original digital video signal. The raw digital video (whether internally received or received from image sensor 〇2) can be further processed by processor 〇4 to obtain an initial HD digital video signal. A class of standard picture quality signals can be obtained by processing the raw digital video signal, the output 603 of the sensor 602, or the initial HD number depending on the lit 17 201116058 signal. Processor 604 can then format the initial HD digital video signal to obtain one or more digital video signals that conform to broadcast and other standards. For example, processor 604 can generate a signal that conforms to broadcast video standards such as the ATSC and DVB standards. Processor 604 can additionally compress the digital video signal. Camera processor 604 can include a combination of commercially available components and custom hardware and software. In one example, the processor can include one of a microprocessor, a digital nickname processor, a microcontroller, a sequencer, and other programmable devices or a combination of the memory and the support logic to perform a sequence of steps, instructions And / or program. The memory 61 可用 can be used to store computer readable instructions that, when executed, perform some or all of the functions described in this application. Camera processor 6.04 may include some built-in or "hard-coded" programs that may be used in the construction of certain embodiments of the present invention. The memory 610 can also be used as a program temporary memory and/or to maintain configuration information. In a certain embodiment, the memory 61 can be used to store a record of the video captured by the camera 6. Therefore, the memory 61 can be implemented using volatile and non-volatile A memory, optical discs and disks, removable erasable memory, usb » crypto-driver and other semiconductor, electromagnetic and optical storage devices. .

The nickname 605 includes the video signal provided by the processor 604 to the SLOC-T 606 and the uplink control, audio and other uplink information transmitted from the SL 〇 C_T6 〇 6 to the processor 〇4 from the line 62. The upstream audio information can be decoded, processed and/or formatted by the iS 18 201116058 604 before being passed to the audio, converter or other audio output system 612 in the audio. The processor can amplify the audio signal or can use a separate amplifier in the audio output component 612. Uplink control may include optical component control 601 and control signals for external devices 'typically provided through control interface 618. The external device can include a motor or actuator for translating, rotating or orienting the camera 60. Optical component control signal 601 and external control signal 618 can be generated by a remote control system in response to predefined commands. For example, the remote user can manipulate a joystick that produces a sequence of encoded instructions that are interpreted by the camera processor 604 to mean "rotate the camera 90 degrees clockwise in the horizontal plane" and the processor 6〇4 can borrow The pulse of the sequence is transmitted to the stepper motor mounted axially relative to the camera 60 in response to 'the pulse of the sequence causing the desired rotation of the camera 6 about its vertical axis. Similar commands adjust the focus, zoom, and aperture of the optics_. In another example, instructions and data may be provided in uplink control information that may be used to control the functionality of processor 〇4 and/or 602. The command and data can be used to select within the field of view of the camera 60 - the area is used to encode in the - or majority of the next name video signal. In some embodiments, the processor and the sensing ϋ cooperate to provide a portion of the damage that can be manipulated to be encoded, or a majority of the virtual phase, by which the portion is optically directed by the camera 60 The component determines the virtual panning, zooming, and tilting functions of the actual field of view. In some embodiments, the (4) 604 can additionally cause physical movement of the camera, thereby extending the panning, "201116058 and zoom functions. Scope It is envisioned that in at least some embodiments, the CVBS and digital signals can each carry a portion of the image captured by image sensor 602. The image portions can overlap or can be from different regions within the field of view provided by lens 600. In some embodiments, an additional camera 60 and/or additional image sensor 602 can be used to expand the available field of view. For example, a complex camera may need to be configured to obtain a panoramic (3 60°) field of view for an area. One or more processors 604 can provide analog and digital signals representative of the field of view, or a portion of the field of view. In one example, the full panoramic field of view can be recorded on a DVR Provided in a digital signal, the CVBS signal provides a selectable field of view within the panorama. The selectable field of view can be controlled using zoom, pan and other controls. In another example, the CVBS and digital signals provide panoramic view A common or different portion and the portions can be independently controlled by a remote viewer. Figure 7 depicts the use of one of 81*0 (:-11 700 in a secured digital video recording system 70 (similar to that described in Figure 3). An example of 81^00:-113 5) System 70 includes a SLOC-R 700, a DVR processor 702 coupled to peripheral devices 710, 712, and 714, an analog video decoder 704, and a digital video decoder 708. And the HD digital display processor 706. As described above, the SLOC-R 700 receives and decodes signals from the coax 72, which typically includes an analog standard video signal and an HD digital video signal. SL0C-R 700 Γ *: The coax 72 transmits the uplink audio and control signals. The SLOC-R model 20 201116058 separates the analog video signal from the CVBS signal and the HD digital video signal to provide the digital video signal 703 to the processor 702 and the CVBS signal 701 to a standard. The quality monitor 74 acts as a field feed from the camera 60 shown in Fig. 6. The SLOC-R 700 can optionally provide an analog baseband video signal 701 to an analog video decoder 704 that processes the signal to produce a digital standard enamel video. Signal 705. The display processor 706 multiplexes and/or selects between the digital standard quality signal 705 and a signal 707 derived from the playback of the stored HD digital video. The display processor can be enabled by an HD television or monitor 76. The format displayed provides the selected signal. The DVR processor 702 receives the digital HD video signal 703 and optionally stores at least a portion of the signal as one of the video captured by the camera 60. The record may be in a local hard drive 714, on a network storage (not shown) connected via a network interface 710 and/or USB/Firewire or other local bus 712, or other optical, electromagnetic or semiconductor Stored in the storage. Recorded video can be further compressed to save storage space. The DVR processor can retrieve the recorded video and provide a playback signal 707 using the digital video decoder 708. Figure 8 depicts an example of a SLOC-R 800 (similar to the SLOC-R 35 described in Figure 3) used in a networked security device 80. The device 80 includes a SLOC-R 800 and a network switch processor 802, which is typically connected to the IP video server 86 by a network. As mentioned above, the SLOC-R 800 receives Γ «; and decodes signals from the coax 82, which typically includes an analog 昼 21 201116058 video signal and an HD digital video signal. The SLOC-R 800 transmits upstream audio and control signals via coax 82 as needed. The SL0C-R typically separates the analog CVBS signal from the HD digital video signal in the round signal 82, provides the digital video signal 803 to the processor 802 and the CVBS signal 801 to a standard quality monitor 84 as a picture from FIG. The live feed of the camera 60 shown. In some embodiments, SL0C-R 80 may include components 8〇4, 806 or the like 'to digitize CVBS signal 8〇1 for use with a digital display (such as high-quality display 85), also as A live feed from the camera 60 shown in Fig. 6. However, it should be understood that a suitably equipped display device or computing device can receive the CVBS signal 801 and digitize the execution signal. The network switch processor 802 receives the digital HD video signal 803 and, if desired, transmits the signal to a network video server 86 that maintains a record of the video picked up by the camera 6. The digital HD video signal 803 can be further compressed before being transmitted to the video server 86. Referring again to Figures 5 and 6, certain embodiments of the present invention permit selection of the contents of the baseband analog signal 50 and the downlink signal 52 as desired. In an example, both the fundamental signal 50 and the downstream signal 52 contain the same image, the former being analogous and the latter being digitally encoded. Digital images can be compressed and uncompressed, with standard enamel and high quality, and transmitted at full frame rate or frame rate as needed. In another example, the baseband signal 50 provides a portion of the full image captured by the image sensor, while the downstream signal f'#52 carries the full image. In another example, the baseband signal 5〇 provides a full image provided by a Qin 22 201116058 image sensor, and the downstream contains a portion of the full image. Thus, it is envisioned that a user of a digital camera can select a highly configurable system for displaying, recording, and transmitting video images from a wide variety of options. Analogy · l··. Certain embodiments of the present invention include systems and methods for improving the effects of high frequency ramp roll in a cable. This effect causes more south when the cable length is increased. Frequency attenuation. This tilt introduced by the cable degrades the fundamental frequency analog video and the passband digital video signal' as the cable length increases, the degradation deteriorates. However, some embodiments of the present invention provide an equalizer (typically in a digital receiver) that removes skew on the digital passband signal so that the transmitted symbol (symb〇1) can be reliably decoded. 0 Certain embodiments of the present invention improve the performance of systems and devices, including the above-described systems, wherein the baseband video signal can be combined with a digital representation of the baseband video signal and with a control signal to enable transmission through, for example, a coaxial cable. Single cable transmission (coax). Figures 3 and 4 show an example of a specific embodiment providing a sl〇c system and Figure 5 shows one possible modulation scheme for the SLOC system. Taking the example of Figure 3, the HD camera 3 provides an output of one of the compressed digital HD video 332 and an auxiliary camera output 330 containing an analog standard quality image (SD) CVBS. The compressed HD video signal 332 is modulated to a passband 52 by a SLOC camera side modem 31. The modem 23 201116058 includes a QAM modulator that provides a modulated signal that can be combined with the baseband analog CVBS signal 330. The combined signal is transmitted through the coaxial cable 33 and is typically 'extendable to a distance of 300 meters or more. On the monitor side, a SLOC monitor side modem 35 separates a signal representative of the baseband CVBS signal 330 from a signal of the passband down video signal 332. A signal feed representing an CVBS, an SD display 34, is used for no-delay on-site inspection. The Qualcomm downlink signal is demodulated with a QAM demodulator, and its output is fed to a host processor and DVR3 2 'which supports the scene on the monitor 34 (although it may be delayed) for HD viewing and non-instant Hd playback. For subsequent review. In this example, upstream communication is provided by, for example, an Ip protocol when needed. The upstream communication can additionally transmit audio and camera control signals 334 from the monitor side to camera 30. Typically, the bit rate of the upstream signal and thus the desired bandwidth is typically much lower than that required for the downlink passband signal. The monitor side SLOC modem 35 includes a QAM modulator that modulates the ip signal to the upstream passband 54. As described in Figure 5, the upstream passband 54 and the downstream passband 52 are located at different spectral locations. At the camera side, the SL 〇c modem 31 includes a QAM demodulator for receiving an upstream 彳g number. This approach provides several advantages over previous systems and methods, including: (1) Increased operating range - increased distance. (2) The system can use existing infrastructure and deploy it with coaxial cable. (3) Low latency, instant (on-site) video availability.

(4) On-site CVBS video and HD video can be viewed in different locations. K 24 201116058 Figure 2 is a simplified schematic diagram showing additional detail of the SLOC camera side modem 49 of Figure 4. The IP connection for the HD camera 21 00 is established through the media independent interface (]\411) module 210 to () the interface of the modulator 212 and the demodulator 214. In an example, The MII 2 10 conforms to the IEEE 802.3 standard. The QAM modulator 212 operates using well known principles to convert the baseband IP data stream 2100 into a passband QAM symbol 2120. These symbols are added to the baseband CVBS signal 2160 at 216 and then fed. To duplexer 218. Duplexer 218 can be a 2-way analog device that passes the combined baseband and lowpassband downlink signal 2162 to coax and the high passband uplink signal 2140 received from coax and feeds it to QAM. Demodulator 214. QAM demodulator 214 typically operates using well known principles to demodulate high frequency pass upstream signal 2140 received from the monitor side and output baseband data to MII interface 210. Figure 22 shows Figure 4 A simplified schematic of one of the additional details of the SLOC monitor side data machine 45. The duplexer 220 receives the downlink combined baseband CVBS and low passband IP signal 2200 from a coaxial cable, and with low pass (LP) and high pass (HP) Filtering divides the signal into component elements 2201 through 2203. The CVBS signal 2201 is directly transmitted to a standard picture quality monitor or other display device. The low pass band signal 2202 can be fed to the QAM demodulator 222, which feeds the MII interface module 226. The duplexer can also be self-QAM modulator The 224 accepts a high pass signal 2203 and can transmit the upstream signal to the coaxial cable. The QAM modulator 222 typically connects to the MII interface 226 of the master/DVR supporting the IP protocol to obtain its input '25 201116058 coaxial The cable typically exhibits a distinct high frequency ramp attenuation characteristic that causes more high frequency attenuation as the electrical winding length increases. This "tilt" may be significant in the band of the passband signal and it can create considerable inter-interference (ISI). It may be desirable to digitize the bits so that the QAM demodulator 222 can properly recover the transmitted data. The baseband to passband 镅鍈 Figure 23 shows the camera side fundamental frequency to the passband qam modulator 212 in more detail (Fig. 21). The data from MII 210 is received by FEC encoder/mapper 2300's use of, for example, cascading Reed_s〇l〇m〇n encoding, byte interleaving and/or fence encoding to add error protection data to Received from Μπ 210 In the stream, the mapper/encoder 2300 demultiplexes the data into streams 2300 and 2302 'where the tuples of each data stream—the given size group represents one of the QAM amplitude levels in the real and imaginary directions, respectively. An isolated transmission QAM pulse is given as: = dR,mq(t)cos{l7rfct) - dImq{t)sm{27tfct) = KQ[dmq{t)en^ } The independent message flow determines and represents respectively - the complex and imaginary parts of the complex QAM, where w = indicates the base number - 2, the dimensional QAM cluster, where the system is modulated by the carrier frequency, and g(t) is a raised cosine pulse function. A continuous series of transmitted QAM pulses < ί) is a random multipath path with &1/7^. Therefore, the signal received by the wheel in the Q AM receiver is rushed by = rush) * c (〇 + v (〇 given, where * indicates the cyclotron [ί 26 201116058 c〇) is the channel impulse response, and ν(ί) is an additive white Gaussian noise. Therefore: r(i) = Rep2K>+e.5 [4«W(')]c(b+ 呛), where ί/[«] is a complex transmission ' Α and % are the phase and frequency offsets of the transmitter passband of the transmitter to the local oscillator of the baseband demodulator, respectively, such that /iO=/c-/〇. Baseband to passband demodulation Figure 24A shows the monitor side passband to the baseband qam demodulator 222 (Fig. 22) in more detail. A signal r(i) can be received from a coaxial cable, for example at a rate higher than this rate. Sampling (see 240) results in a sampled signal. After sampling: K«LP) = R+7(/』^'^4m]*(>77;a)np)]c(/i7;amp-m7; )} + v(«7;—). Then, after down-conversion, the rate is 1/7; resampling and matching filtering are obtained: x(W;) = ^]=e; w, +e-g+Hit-m]+4t] /Π=- 〇0 where ν'μ] is a sample complex filtering noise, since pulse shaping and matched filtering β are combined with perfect rate sampling timing, it is assumed that any isi is only due to channel impulse response C. The equalizer and the trim phase/reciprocal rate i return. The digital equalizer and carrier phase/frequency loop of Figure 24A are discussed in more detail in Figure 25. A signal pair enters an adaptive digital equalizer 250, which may be included to compensate for the tilt caused by the channel impulse response. 27 201116058 Linear digital filter. The order weight adjustment can be achieved using one or more known methods, including the LMS algorithm. The equalizer determines its output y [magic and one-phase rotated version of the two-dimensional (2D) splitter, compares to produce an error t number, which is used to calculate an updated set of filter order weights. The LMS algorithm can operate as follows: If the illusion represents a #long equalizer input vector, and less [sentence represents the equalizer output vector /μμμ], where 〆[幻系#长等器级重重 Vector and 孖The indicator indicates a conjugate shift term (Hermitian). e\k] = d\k\-y[k] 咖+ 1] = ^]-2/4ψ*[4 where # is a small difference size parameter and * superscript indicates complex conjugate. In order to remove the influence of the tilt of the passband cable, the 1^^§ equalizer step can approximate the inversion of the channel impulse response ^ after convergence. A 2D segmentation benefit 252 separates the real and imaginary parts of ζ[Α:] and turn-out coffee], which is an estimate of the initial transmission. The phase error detector module 258 receives and forms a phase error signal 4]=Ιηι{ψ刚. Low pass (LP) filter 256 can be an integral proportional filter that allows the loop to correct both phase and frequency offsets. The output of low pass filter 256 is fed a complex discrete voltage controlled oscillator (VCO) 254 which outputs a complex phase/frequency correction factor ^Mk] corrected for both heart and / /. The vc〇 254 also provides an output of the “uncorrected” splitter output 2 [moxibustion] (e+Mk), which allows ‘- 28 201116058 to be used to derive an error signal for the equalizer order update. This paradigm is required because the equalizer operates on the opposite sentence. Referring also to Fig. 24A, the equalizer outputs z [the phantom feed to the transform detects that the real and imaginary bits become a demapper of the group of bits. The FEC decoder then performs Viterbi decoding, byte demodulation, and/or Reed-Solomon decoding to correct the received bit error and pass the resulting data to the MII interface. The influence of the length of the electric gauge

The received video signal can undergo attenuation as a function of the frequency attributable to certain characteristics of the cable. For the purposes of this discussion, an example of a coaxial cable is described. The severity of the attenuation (often referred to as tilt) typically depends on the cable type and length. Figures 26 and 263 show attenuation as a function of the frequency of the various lengths of cable types RG6 and RG59. It can show that the tilt is equivalent to multipath distortion, where the extra path and the main path have a very small delay spread. As the tilt increases, the number of non-important multipath components (and their respective gains) also increases. Multipath distortion causes ISI in the received signal and can therefore severely degrade transmission reliability. In a digital signal, an equalizer can be used in the receiver to remove this damage. Figures 27A and 27B show the power spectral density (PSD) of the equalizer input and the amplitude response of the convergence equalizer stage, respectively. Specifically, Figure 27 shows the PSD input from the equalizer after transmission through the 2000 ft RG-6 cable. It has a carrier frequency of 15.98 MHz (both show passband and associated fundamental frequency) and Figure 27B Display the amplitude of the convergence digitizer equalizer stage ^ S 29 201116058 should be. Some embodiments of the present invention include a digital equalizer that cancels the tilt introduced by the cable, removes the ISI in the passband signal and enables reliable decoding of the transmitted data. As the cable length increases, the digital passband signal on the monitor side can be reliably used using digital equalizers for digital data and well-known forward error protection methods such as Reed-S〇l〇mon decoding and fence coding. receive. However, the tilt of the electron microscope also negatively affects the frequency of the fundamental frequency analog cvbs signal, which reduces image sharpness and chroma when viewed on the monitor side. Accordingly, some embodiments provide an adaptable filter (e.g., an analog equalizer) that can be applied to the CVByf number at the monitor side to compensate for cable tilt at the fundamental frequency. Some embodiments utilize a passband digital equalizer to estimate the amount of tilt at the fundamental frequency for subsequent selection of one of a set of fundamental frequency analog filters to apply to receive the Cvbs signal. The efficiency of the passband tilt is important. When estimating the tilt in the signal band, a frequency band can be selected, wherein the tilt in the PSD of the input signal will be approximately linear when decimation is performed in decibels. Therefore, the frequency of the baseband digital equalizer input _2 67 MHz to 2 67 MHz (which will therefore correspond to 13 31 MHz & 18.65 MHz in the passband input signal) provides a suitable range. As shown in Figure 26A, the tilt from 13.31MHz to 18.65MHz is large for the 2,000-foot RG-6 system.

About 3. 7 decibels. In order to estimate the tilt in decibel self-converging digital equalizer filter order, the following calculation can be performed: [J 201116058 (Equation 1) where (7 [the illusion time domain convergence equalizer filter step DFT, and the magic and h corresponding In the specific frequency band of the DFT, since the digitization equalization in Fig. 25 can be performed by a time domain cyclotron, an FFT is typically required for the purpose of estimating the slope of a given magic and h (or possibly a complex multiplication of two points). And addition). ie pool]=(7Λ [M] + team]=zhangg[n]ew2—A, (Equation 2) where gW^W+bW « = 0,1·..ΛΓ-Ι# Domain equalizer order (dependency on the bin time index). It should be noted that 1/# scalar is not necessary in this calculation. A similar calculation will be performed for G(A:2). However, this calculation can be performed by By carefully selecting the frequency band, it is significantly reduced. By making h=iv/4 (corresponding to a frequency of 2.67MHz), the complex index in equation (2) is dramatically simplified: 1 fornH.N-4. 々(杂 =卜· F〇rn = l5”, .N-3·,丄-1 /〇/·« = 2,6,...#-2. (Equation 3) .if〇m = 3,7,...N ~l. , · (Equation 3) Addition can be used to calculate the filter frequency The real and imaginary parts: η = 0

6[士|^]-|^+1]-|丨,/[4„+2]+ (Equation 5) Finally, the power system at this frequency band: 丨咏]丨2=颂]+啡] 31 201116058 The power calculation system is significantly simplified by allowing moxibustion i=iW4. Similarly, if there is no 1=3#/4 (corresponding to a frequency of -2.67 river 112), the complex index will be significantly simplified again.

(Equation 7) forn = 0,4,...N-4. forn = l,5,...N-3· forn = lfi,...N_2· forn = 3J,."N _\· The real and imaginary parts are calculated as: GA]=名客g/[4« + l]-name gj4» + 2]+ guest g, [4„ + 3] (equation 8). 刺=^[4»] +&[4« + 1]--[4« + 2]-[4« + 3] (Equation 9) and the power system is as above. In Figure 2b, the amplitude response of the convergence filter step ( The upward tilt in decibels is approximately linear even with a moderate SNR for a 64-QAM. Furthermore, when calculated in this way, k«4.〇dB, which is very close to the actual tilt on this band of 3.7 dB Using passband tilt estimation for baseband CVBS tilt correction After estimating the passband tilt of the digital video signal, an appropriate baseband analog filter can be selected from one of the different filters. This can display the digital video t-band. It is estimated that the passband tilt will indicate a severe spike in the fundamental frequency CVBs signal, which can then be roughly corrected with an analog filter. It is not used in RG-6, RG-ll, rg-59, and RG-174 in Figure 28A. The tilt in the digital video signal band from 13'31MHZ to 18.65MHz and the Electrical · see the available laying length. 28A, FIG display "relative to the RG-6, RG-U, RG-59 and RG-174 cable type of the pass band of the digital visual information signal in inclined 3 loss MHz at 32201116058. Figure 28B shows the loss at 6 MHz. It can be observed that the losses at 3.5 8 MHz and 6 MHz are roughly the same for all four cable types for a given tilt. Figure 29A shows the loss of tilt in the passband digital video signal at 3.58 MHz relative to the RG-6, RG-n, RG-59, and RG-174 cable types. Figure 29B shows the loss at 6 MHz. It will be observed that losses at 3.58 MHz and 6 MHz are roughly the same for all four cable types for a given tilt. Since the estimated passband tilt is the only information available on the cable frequency response, the ideal situation is where the frequency response of the cable at the fundamental frequency (CVBS signal band) is associated with the tilt of the passband digital signal in a known manner, regardless of the cable. Type or length. Figures 28B, 29A and 29B confirm this in the frequency response at DC, 3.58 MHz and 6 MHz. For example, for all four cables, at a slope of 15 dB in the passband digital video signal, the loss at DC, the loss at the color carrier (3.5 8 MHz)' and the loss at 6 MHz are about 0.68 dB, 4.1. Decibels and 5.3 decibels. So 'whether the 1.5-dB passband tilt is caused by 275-foot RG-174, 750-foot rg-59, 825-foot RG-6, or 1825-foot RG-11, the same analog filter will cancel cvbs The fundamental frequency of the signal is tilted. An example of an algorithm for selecting an appropriate analog filter from a set of Λ/filters is shown below: ^ - 33 201116058

Iiiputs: |<?fA:i]|2,|C?lA:2]|2

Rn = anlGIfe!]!2, for 71 = 〇, 1,... f M. = == 0,1,____, M — 1. ^ |GNI2e^then Select aaalog filter L. end if should be thinking about CK Q - 1 ' Q: The other values of n are < 1 and are selected such that the bit offset addition is sufficient to calculate 杬. Thus, the monitor side QAM demodulator of Figure 24A is typically modified such that the digital equalizer of the passband QAM demodulator provides a signal that selects one of the analogy CVBS filtered responses. Figure 24B shows a modified portion of the monitor side Q AM demodulator, wherein the analog filter selects the output from the digital equalizer that operates according to the above algorithm. The third diagram shows the entire monitor side data machine, in which a digital equalizer in the QAM demodulator 3〇4 provides a filter selection signal 3〇5 to (:¥38 analog equalizer 302. Figure 31 shows an analogy for an equalized fundamental frequency CVBS signal with an active M = 3, so there is an example of four possible filter filters. Wave selection in this example. The required filter response is from the switch module 31. 〇 Turn off one of the shot 1 switches to select,

More than two in the FFT of the passenger [«]

A digital communication system for the calibration method. Familiar with this b to use the passband digital equalizer step weight to select a class filter for CVBS 34 201116058 ^ ' and other types of digital equalizers can be used for passband signals, including frequency domain, etc. The chemist, where [the value of the magical value will have been calculated as part of the equalization procedure. In addition, a conventional equalizer order weight calculation method other than LMs, such as RLS, can be used. In some embodiments, one of the CVBS analog filters having a selectable response may take a form other than the above. In addition, the equalizer of the CVbs signal can take the form of a digital filter, in which case the cvBS is sampled and digitized prior to equalization. In this case, the order weights of the digital filters are selected from a set of predetermined order weight vectors according to the same algorithm described to select one of the Μ analog filter responses. The data stream in a digital signal system typically has a box structure such that the data is organized into groups of uniform sizes of bits or bytes. Any system that uses block-based forward error correction (FEC) will have frames organized into approximately error correction code character sizes. In addition, if the system uses interleaving to combat the pulsed noise, the frame structure will be configured in consideration of the interleaver parameters. If the system uses data randomization to achieve a flat spectrum, the pseudo-random sequence used can be synchronized to the frame structure 'restart at the beginning of each frame. For an RF digital communication system, a receiver typically must first achieve carrier-to-sense synchronization and equalization. It can recover the transmission data. However, in order to understand this incoming data stream, the receiver must also synchronize to the frame structure. In other words, the receiver must know that the error correction code character begins and ends at ^ 35 201116058. It must also be able to synchronize the receiver module such as the deinterleaver to match the interleaver operation of the transmitter 'so that the resulting decipher is in the bit 兀, and the bit m is in the (four) order' and the random generator is used to match the transmission state. The starting point of the pseudo-random sequence used is used to flatten the spectrum. Conventional systems often provide receiver signal stepping by appending a known pattern of fixed length symbols at the beginning or end of the frame. Each frame repeats this same 槿#, B 甘, and 八.. sit; consists of a two-bit pseudo-random (ie, binary) pseudo-random sequence with favorable autocorrelation properties. This means that the sequence has a large value at zero offset from its own autocorrelation, and the correlation value (side lGbe) is minimal if the offset is non-zero. In addition, the correlation of this frame synchronization sequence with eight random characters s will result in a small value. Therefore, the right receiver performs the correlation of the incoming symbol with the stored version of one of the frame sync modes. It should expect to obtain a large value only at the exact beginning of each frame. The receiver can then easily determine the starting point of each frame. Example of frame structure Refer to Figure 9 for the ATSC digital television (DTV) terrestrial transmission standard used in 1996 for data transmission in the frame. Each frame has 90 packets of 3 pieces and each segment contains 832 symbols, and each frame has a total of 260,416 symbols. The first four symbols in each fragment contain the sequence [+5,

Fragment sync symbol 92 of '_5 ' + 5]. The first segment of each frame is a frame sync segment 94 having 312 data segments 96,98. Referring now to Figure 1, the frame sync segment 94 has a segment sync 100, a 511 symbol kT 36 201116058 pseudo random noise (PN511) sequence 101, a 63 symbol pseudo random noise (PN63) sequence 102, a first Two PN63 sequences 203 and one: PN63 sequence 104. This is followed by the 24-modal symbol 1〇5 indicating the modal system 8VSB. The precoding symbol 107 and the reserved symbol 1〇6 complete the frame synchronization segment 94»fragment synchronization 100 and PN5 11 101 symbols are known to the receiver beforehand and can be used to obtain frame synchronization by the related method. All of the preceding symbols come from the set { + 5,-5}. The last 12 symbols of this fragment are from the set {-7_5-3-1 + 1+3 + 5 + 7} and are the copy of the last 12 symbols of the pre-block. These are referred to as pre-encoded symbols (not discussed here). Referring also to FIG. 11 ' for each of the subsequent 312 segments of the block (referred to as a data segment), the 828 symbol 32 following the four segment sync symbol 30 is from a single 207 bit by taking 2 bits at a time. The tuple (1656 bits) Reed-Solomon (RS) code character is generated, its fence is encoded into 3 bits, and then the units of 3 bits are mapped to from the set {-7-5-3-1 + 1+ 3 + 5 + 7} One of the 8-bit quasi-symbols. Another example of a sub-frame in a digital communication system is seen in the ISDB-T system. Unlike single-carrier ATSC systems, ISDB-Τ utilizes a multi-carrier system that encodes orthogonal frequency division multiplexing (COFDM). For example, Mode 1 of ISDB-Τ uses 1404 carrier. A frame consists of 204 COFDM symbols and each COFDM symbol can be considered to be a combination of 1404 independent QAM symbols, one for each of the carriers. Therefore, the frame consists of a combination of 204x1404=286416 QAM symbols. In this case, 254592 37 201116058 is the data, and 3 1824 contains the pilot information (which can be used for frame synchronization) and modal information, which spreads the frame in a known pattern. Figure 12 shows a simplified diagram of this frame configuration. It can be seen that the map and modal information are scattered in the frame according to a known pattern. This system has a modality that utilizes three different QAM clusters - QPSK, 16QAM and 64QAM. It also supports five different fence coding rates (1/2, 2/3, 3/4, 5/6, 7/8) based on a single punctured mother code. This well-known technology makes it extremely economical to construct a single Viterbi decoder in the receiver that can be easily adjusted to decode all five specific codes. Before the transmission, the data was formed into a long RS block of 2 0 4 bytes (1632 bits). When the number of COFDM symbols per frame is always constant, the number of RS blocks per frame varies with the selection modality, but most importantly, the number is always an integer. Once the frame synchronization has been established and the fence rate is known, this allows the RS block to be easily synchronized in the receiver. In order for this to be true, the number of data bits per frame before the fence encoding must be exactly divisible by 1 632 for all modes. Table 1 shows the number of data bits per frame for all modalities (a combination of QAM cluster and fence rate). In each case, the number of data bits per frame is exactly divisible by 1632 (the data bit means the bit before the fence code).

Modal data bit/frame (before fence coding) Fence-coded bit/frame 1/2 2/3 3/4 5/6 7/8 L 38 201116058 QPSK 254592 339456 381888 424320 445536 509184 16QAM 509184 678912 763776 848640 891372 1318368 64 QAM 763776 1318368 1145664 1272960 1336608 1527552 Table 1: Data Bits for Each Frame of ISDB-Τ Some embodiments of the present invention provide one of the modulation systems used in digital communication systems Sub-frame structure. In particular, signaling systems and methods are provided for use in security systems (including those described above). A whirling byte interleaver interleaves the frames of the data, wherein the interleaver is synchronized to a frame structure and a random generator is configurable to generate a random data frame from the interleaved data frame. In one example, a punctured fence code modulator operates at a selectable code rate to generate a fence-encoded data frame from the randomized data frame. A QAM mapper maps the group of bits in the fence-encoded data frame to the modulation symbols to provide a mapping frame and a synchronizer adds a synchronization packet to the mapping frame. The punctured fence modulator can be bypassed as needed to achieve an optimized net bit rate under various white noise conditions, thereby allowing system performance to be optimized. In some embodiments, a novel frame structure is provided in a single carrier communication system. The autocorrelation of one of the fixed-length symbols at the beginning or end of a frame obtains a large value at the zero offset. If the offset is non-zero, the correlation value (side lobe) is extremely small. However, the correlation between this frame synchronization sequence and random symbols will result in a small value. Therefore, a receiver can perform the correlation of the incoming symbol with the stored version of one of the frame sync modes to obtain a large value at the exact beginning of each frame so that the receiver can determine the starting point of each frame. The communication system can operate in any modal mode of the complex modality and can use various combinations of symbol clustering, fence coding, and interleaving modes. The receiver must recognize and understand the modality to successfully recover the transmission data. For this purpose, additional modal symbols can be added to the frame sync mode. These modal symbols can be reliably received using correlation methods because they are repeatedly transmitted at each frame. It can be encoded to be even more robust by using a block code. A frame structure in accordance with certain aspects of the present invention utilizes a cluster combination of punctured fence coding and QAM (similar to 1! 5 〇 8_). The number of symbols per frame can be a variable integer according to the modality and the number of RS packets per frame is a constant integer regardless of the modality. This configuration simplifies the design of the receiver of the processing block (e.g., de-randomizer and de-interleaver) because the number of RS packets per frame is always fixed. In a conventional system such as ISdb_t, the number of symbols per frame is constant and the number of RS packets per frame is a variable integer according to the modality. The frame will be described with reference to an example of a transmitter structure in accordance with certain aspects of the present invention as described in FIG. An RS encoder 1300 accepts the externally generated frame synchronization signal of the start of each of the group data 13〇1 and a group of 3 15Reed-Solomon packets 1322. As shown in FIG. 14, each packet contains 207 bytes, of which 20 bytes are parity bytes 丨42. This 3丨5 Reed_s〇i〇mon seal

The ΓC packet forms a forward error correction (Fec) data message containing 65205 bytes. 201116058 1322 ° A convolutional byte interleaver 1302 is as follows. Figure 15 illustrates a modality of operation of the interleaver 1302 against pulse noise affecting the transmitted signal. The parameter 路 in paths 156, 158 is set to 207, and the parameter Μ in paths 152, 154, 156, and 158 is set to 1. The frame sync signal 13〇3 forces the input and output commutators 150 and 151 to the top position 1500 to synchronize the interleaving of the frame structure. The input and output commutators i 50 and i 5 are shifted downward by a position 1502 when a tuple enters the interleaver and a different byte leaves the interleaver. When the commutators 150 and 151 reach the bottom 1508, they move back to the top 1500. Each of the B parallel paths 1506, 1508 includes a shift register 156 and 158 having the length shown in Figure 15 (path 1506 has a length (5-2) and path 1508 has a length (5-7). )From). The random generator 1306 shortens a PN (pseudo-random noise) sequence of one length 219-1 by resetting the pn sequence generator at each frame synchronization time on the 65205x8 = 8521640 bits of the FEC data frame 1324. An operation (by performing a mutual exclusion or operation on the bits) produces a randomized FEC data frame 1328. A selectable code rate punctured fence coding modulation (PTCM) module 13 08 - an example is shown in more detail in FIG. PTCM 1308 uses a method known to those skilled in the art. The method begins with a 64 state 1/2 rate encoder and performs puncturing to achieve any of 5 different code rates. In some embodiments, the PTCM 1308 can also be completely bypassed (code rate = 1). This Rongyi ‘ 201116058 seems to be an alternative to the class between the net bit rate of the system and the white noise performance.

Lift, discard. The QAM mapper 1313 obtains bits of the group 2, * or 6 from the encoder output 1332 and maps them to QpsK, i6qam or 64QAM symbols, respectively. Examples of such mappings are provided in Figure 7. Module 13 12 adds a frame sync/modal symbol packet (all symbol QP S K) to the beginning of each FEC frame 1334. Referring to Figure 18, the first portion 180 of the packet contains 127 symbols and contains both the same binary PN sequence for both the real and imaginary parts of the symbol. Other pN sequences may also be of the length b ′ and the imaginary and imaginary parts may have opposite signs. The second part of this packet is contains information indicating the transmission mode - the selected QAM cluster and the selected fence rate. This modal information can be encoded for increased reliability at the receiver using a block error correction code. The methods that can be used include BCH coding and other block codes. In one example, it is possible to include six possible fence codes around the line. In addition, three clusters may result in 18 modalities. Therefore, 5 bits are required to represent each of the possible modal choices. The 5-bit element can be encoded into a 16-bit code character using an extended BCH code. Since each QPSK symbol contains 2 bits, an 8 modal symbol is required. Figure 19 illustrates a frame structure 1336 (see Figure 13) provided to passband modulation (PB Mod) 1314. The bearer 190 includes 315 RS packets (52164^42 201116058 bits). The number of QAM symbols mapped by the 3 1 5RS packet varies with modal selection. The PB Mod module 1 3 14 then modulates the baseband QAM symbols to the passband using any suitable method known to those skilled in the art. The frame structure according to some aspects of the present invention advantageously overcomes some of the shortcomings and drawbacks of conventional frames. In particular, the frame structure provides for all modes: - a constant integer RS for each frame of the modality Packets, and • For all modalities, the QAM symbol number of each frame is a variable integer _ for all modalities, one of each frame is an integer puncturing mode loop. Please note that it is not unimportant to provide an integer QAM symbol for each frame, because the FEC data frame must contain exactly 2Ιχ7 data bits, where I selects an integer so that each frame has a fixed integer. RS packet. Therefore, the number of data bits of each frame before the fence encoding must not only be an integer, but the number must be exactly divisible by 2〇7Χ8=1656 for all modes. In addition, the number of output elements of the fence encoder per QAM symbol is 2, 4, and 6 bits for Qpsk, 16QAM, and 6 respectively (see Table 2, which shows one for the fence code bypass). Rate = 1). In addition, the fence coding adds bits. The number of data bits per symbol before the fence coding is obvious. It is not in Table 2. The calculation rate of each item is 43 201116058. The cluster fence is 1/2 2/3. 3/4 5/6 7/8 1 QPSK 1.00 4/3 1.50 5/3 1.75 2.00 16QAM 2.00 8/3 3.00 13/3 3.50 4.00 64 QAM 3.00 4.00 4.50 5.00 5.25 6.00 Table 2 - Each symbol data bit (Each mapping QAM symbol to the input bit of the fence encoder) The fact that the number of data bits per symbol can be a fraction requires precise selection of the RS packet size and the number of RS packets per frame. The RS packet size of each frame 207 and 3 15 packets can be used to reach one of the integer symbols of each frame. As shown in Table 3, each item can be calculated as: Number of data bits per frame = 521640 The number of data bits per symbol comes from the item cluster fence coding rate of Table 2 1/2 2/3 3/ 4 5/6 7/8 1 QPSK 521640 391230 347760 312984 298080 260820 16 QAM 260820 195615 173880 156492 149040 130410 64 QAM 173880 130410 115920 104328 99360 86940 Table 3 - Symbols for each frame This frame provides additional advantages for all The modality has a puncturing mode loop (pp/frame) for each frame of an integer. In order to correctly decode the punctured fence encoded data, the decoder in the receiver must know how the puncturing pattern is aligned with the data. The ubiquitous puncturing mode applied at the output of the mother code fence encoder is indicated in the second column of the table of Figure 16. The number of 1 in each puncturing mode is the puncturing mode length. In the proposed system, delete

The L residual mode is always consistent with the beginning of the FEC data frame. Frame interleaving is used in this permissive receiver 44 201116058 to align the de-puncturing device in the receiver Viterbi decoder with the bit stream. The required alignment is indicated in Table 4, which shows a pp/frame for one of the integers of all modalities. The pp/symbol project for each symbol can be calculated as: _ long shield _ the output of each fence element encoder # The pp/frame item can be calculated as: The symbol of the box pp/symbol

Ma rate PP length QPSK (2 bits/sym) 16 QAM (4 bits/sym) 64 QAM (6 bits/sym) pp/symbol pp/frame pp/symbol pp/frame pp/symbol pp/frame 1/2 2 1 521640 2 521640 3 521640 2/3 3 2/3 260820 4/3 260820 2 260820 3/4 4 1/2 173880 1 173880 3/2 173880 5/6 5 1/3 134328 2/3 134328 1 134328 7/8 8 1/4 74520 1/2 74520 3/4 74520 1 NA ΝΑ ΝΑ NA NA NA NA Table 4 - The puncturing mode of each frame should be aware of other combinations of RS packet size and number of packets per frame. Get the same desired results. The numbers provided herein are for illustrative purposes only. As shown in Fig. 20, some embodiments of the present invention provide a receiver that is constructed to handle a frame of certain aspects of construction in accordance with the present invention. Module 2000 receives the data transmitted in the passband signal and converts it into a baseband QAM symbol. The operations performed by module 2000 may include symbol synchronization, equalization (to remove inter-symbol interference), and carrier recovery, which employs sub-modules. Thus, module 2000 can include an equalizer whose output restores the fundamental frequency QAM symbol 2001. The baseband QAM signal 2〇〇1 is provided to the two-bit quasi-splitter 2018 for contention in both the real and imaginary directions, thereby forming a sequence (4)] and ~We[_1+1]2〇丨9, which are provided To the frame synchronization module 2020. The frame synchronization module 2〇2 uses a binary frame to synchronize a stored copy of the PN sequence, and performs a continuous cross-correlation operation on the divided QAM symbol 2019 for the real and imaginary parts. Each member of the stored copy has a value of -1 or +1, and the operation is given as follows: 126 ~ and taste her [„]], π=0 (Equation 10) where ^ is a long 127 frame with the #ΡΝ sequence The stored copy. The maximum value of h or ~ indicates the start of the FEC data frame. Once the frame sync start position is found, the position of the code character containing the modal bit (cluster and fence rate) is known. The codeword can be reliably decoded by (for example) a BCH decoder or by a codeword that will receive the Margin associated with all possible codewords and select the highest resulting value. Additional reliability is obtained by accepting the same result multiple times before. The derived frame synchronization signal 2021 is used to indicate which symbols are to be "removed frame synchronization" before the symbols are fed to the soft demapper 2_. The Modal Symbol is removed in Module 2004. In one example, the 127 frame sync symbol and the 8 modal symbol are removed from the stream so that the disc guarantee corresponds only to the RS packet. 46 201116058 Fu Fan is passed to the soft dismap 2006. The soft demapper 2006 calculates the soft comparison amount using the algorithm J known in the art, as described by Akay and Tosato. For proper operation, the soft demapper detail 6 must know which puncturing mode (which is off-grid rate) is used for transmission 15 and the alignment of the mode with the received bit. This information is provided by the frame and d, and 2020, which decodes the modal information and also provides - repeating the frame synchronization signal to the puncturing mode regardless of the current mode. These soft bit comparison quantities are fed to a Viterbi decoding request 8 operating in a manner known in the art to achieve an estimate of the bits of the PTCM encoder that are input to the transmitter. The random generator Μ is synchronized by the frame synchronization signal 2〇21. The byte deinterleaver (4) (4) decoder 2 〇 16 respectively decompose the byte data and deinterlace the code to obtain the data of the rs encoder in the original input transmitter. i wave phase 儋 , , , , , , 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波 载波An equalization signal of the amplitude modulation signal is exchanged, and a phase correction signal is derived from the equalization signal; the two-bit quasi-splitter 'divides the equalization signal to obtain a real and virtual sequence; and the frame synchronizer uses one Corresponding part of the stored frame synchronization pseudo-random sequence and a phase correction symbol provided by the frame synchronizer to the phase offset corrector, y 47 201116058 A correlation between the hit and the virtual sequence. The phase correction signal is based on the correlation between the maximum real and imaginary values. The frame synchronizer performs continuous cross-correlation on the incoming split quadrature amplitude modulation symbols. The continuous cross-correlation is performed by one of the binary pseudo-random noise sequences stored in the pseudo-random noise sequence separately for the real and virtual sequences. Baseband to passband modulation Some wireless digital communication systems, including broadcast, wireless Lan and wide area mobile systems, use some form of QAM. QAM is also used in both North American and European digital cable television standards, and its use causes the two-side band-suppressed carrier modulated wave to occupy the same channel bandwidth of orthogonal carrier multiplexing, where each wave is modulated by a separate message. As discussed above, Fig. 23 depicts a simple qam modulator which can be used as PB mod 13 14 in the example of Fig. 13. An isolated transmission pulse QAM is given as follows: sm (0 = dRjnq{t) cos(2^c〇- dImq(t) sin(2^c〇= Re{dmq{t)eJ2^} where and heart, m The system is determined by two independent message streams and represents the real and imaginary parts of a complex QAM symbol (see, for example, Figure 17), where the factory indicates the cardinality of a 2-dimensional QAM cluster, where M is the modulation carrier frequency 'and g (i) is a raised cosine pulse function. A continuous series of transmitted QAM pulses ί(1) (at a Fi=1/Ts rate) through a noisy multipath channel. Therefore, reception at the wheel to the QAM receiver The signal to the signal is given by r(〇=>s(i)*c(i)+v(i), where * means the cyclotron 'c(i) is the channel impulse response, and ν(ί) is added to the white Gaussian noise. 48 201116058 This, r(i) = Rej^2 also +/X g[φ]*柳]c(卜"7;)} + v(〇

V «=-00 J where "" is a complex transmission symbol, and the heart and phase are respectively related to the transmitter passband of the transmitter to the frequency and phase offset of the local oscillator of the baseband demodulator. 'So /^ =/>/0. Passband to Baseband Demodulator Figure 35 shows an example of the ΡΒ to ΒΒ, sym clock synchronization, equalizer/carrier recovery module 2〇〇〇 of Figure 2 in more detail. The received signal is sampled 350 at a rate higher than the symbol rate, resulting in a sampled signal. After sampling: vm*-〇〇J y then 'after demodulation' is obtained by the symbol rate 丨/eight resampling and matched filtering: ms) = x[k] = £d[mHk - m]+ v'[ k] W=*-o〇 where V' 〇] is a sample complex filtering noise. This assumption is due to the combination of pulse shaping and matched filtering 9 'with perfect symbol rate sampling timing, any ISI is only due to the channel impulse response after demodulation' hypothesis perfect equalization, near the fundamental frequency complex sequence at the output of the equalizer z [The phantom is given as follows: Thus the 'recovered near-base frequency sequence represents a transport cluster with a phase offset heart that is rotated by a frequency/〇. In order to recover the transmission (4) using, for example, a two-dimensional splitter, the equal phase shifter (combined with a phase and frequency offset recovery loop) must (4) besides causing the cluster (4) partial M, and receive The device must be removed or the cluster will remain in the static rotation position. In order to understand the phase/frequency recovery, it is necessary to understand that the fundamental frequency is called the set. In the simple example of Figure 33A, 4Qam modulation (also known as For the bamboo QPSK) 'The cluster consists of four symbols. In the example, the sacred and imaginary parts can each take 2 different values (eg ±3). The effect of the phase offset ~ on the recovered _ is shown in In Figure 33B, it shows one of the rotations in the complex plane. The effect of octave is understood by taking note of the rotation in the -circle (counterclockwise or clockwise depending on the sign of Λ). Equalizer and carrier phase In Fig. 34, a signal pair is received by a digital equalizer and carrier phase/frequency loop 248 (see, for example, Fig. 24). The equalizer 341 component typically includes a linear digital filter. And use, for example, minimum A proprietary or well-known method of the square (LMS) algorithm, the equalizer ^ "comparing its output with a phase-rotated version of the splitter decision ?: 343" to generate a one used to calculate the filter order weight Update one of the errors in the group k. This chopper removes the real and imaginary parts of the 2D splitter 342 resulting from the channel impulse response, which are independent of the original transmission, which is an estimate of the original transmission. Both the illusion and the ambiguity] enter the phase error traverse module 346 and form a phase error 50 201116058 given by (d). An integral ratio (IP) filter 345 can include the data filter of Figure 35 or any equivalent known to those skilled in the art. The IP filter 345 allows the loop to correct both phase and frequency offsets. An output of the IP filter 345 feeds a complex voltage controlled oscillator (VCO) 344 which outputs a complex phase/frequency correction factor y network of both the correction center and the eight. Vc: 〇 344 also outputs e+ lake to divide the output class by "uncorrected" so that it can be used to derive an error signal for the equalizer order update. This method is indicated because the equalizer operates on both ~ and Λ. In some embodiments, efficiency can be obtained by implementing VC0344 in a discrete form as a delay to feed an integrator of a complex index lookup table (LUT). However, the final correction for ~ may have a ambiguity of /2, which means that the recovery phase can be corrected (〇 ffset = 〇) or can have an offset of 7 Γ /2, one of π Shift, or an offset of 3ττ/4. These results are illustrated in Figures 36 and 37: an actual transmission symbol is shown in Figure 36 and the possible recovery symbols with respective offsets are shown in Figures 37-8D. Typically, the receiver cannot know which of the four possible symbols is actually transmitted because the 2D splitter 342 performs a closest neighbor operation. Figure 38 illustrates an example in which a transmission symbol is received at the input of the equalizer as having a heart. Therefore, the phase recovery loop can rotate the signal to compensate for the heart so that it is aligned with ^. However, the decision of the 2D splitter 162 will be the correct symbol system 6, as it is closer to 〆. This allows the phase recovery loop to be clustered by rotation so that it is aligned with & 1^: 51 201116058. In this case, the final phase is offset by _π/2 from its original position. Certain embodiments of the present invention provide methods for minimizing and/or eliminating such problems in a green peach coding system, including for some of the populations of the pruning fence codes of the presently described embodiments. As described above, the output of the equalizer is divided into real and imaginary directions by a 2D level divider 342 to form a sequence _]+1, +1] and Λ/Μεμ, +1] 'which is fed to a frame synchronization mode. Group 2〇2〇 (see Figure 20). The frame synchronization module 2〇2 stores the replica by one of the binary frame synchronization sequences, and performs a continuous cross correlation operation on the divided qam symbols for the real and imaginary parts respectively. Each member of the stored copy has a value of -1 or +1. The characteristics of this operation are therefore: 126 126 W = Σ s- moxibustion] and ~ W = art ί [η» - it], π=0 "=〇 where ί is a stored copy of the 127 long frame sync ρν sequence. Or the maximum value of ~ indicates the beginning of the FEC data frame. Wax \ symbol max b, the symbol ^ required phase correction + + 0 - + + π/2 - - + π + : π/2 Table 5 For the frame synchronization symbol, the real and imaginary parts have the same symbol and the The graph shows its cluster. Therefore, it can be understood that the maximum magnitude or the sign of 沁 is positive for both zero rotations. One _ π/2 rotation obtains a negative maximum magnitude, and a positive maximum 1 ′ for; Z· A rotation, and 沁 are both negative, and for one of the 1/1 2011 20115858 rotations, the maximum magnitude is positive and the maximum magnitude is negative. This is summarized in Table 5 above. Therefore, the largest of the combinations The respective values of the magnitude and the sign indicate the quadrant of the complex plane in which the final phase offset has converged. Q Gu Xu applies an additional phase correction to the signal, as shown in Figure 2. Maximum & The related main frame synchronization module transmits the phase offset correction to the pirate. The operation of a phase offset corrector module is shown in the fourth diagram. The LUT operation 404 is illustrated in the example. Given a 4 (9) + /Z/[A:], can be simply executed as: 1. For the case of 0: 2. For the case of ψ = +π/2: 3. For The case of 0=-7Γ/2: /!>] = +々 [The magic 4th figure represents a search by using a symbol index of a related maximum true and imaginary value according to some aspects of the present invention. The table derives a block diagram of a phase offset corrector for a phase correction signal. i Modal OAM Groups Certain embodiments provide systems and methods for determining an unknown QAM cluster from a set of possible QAM clusters. The inter-symbol interference (isi) has been corrected by a modified constant modulus algorithm (CMA) equalizer, but the power of the signal before the carrier frequency and phase have been fully recovered. Unknown cluster followed by histogram The equalization procedure is then restarted with the standard CAM based on the currently known cluster to minimize isi. The equalized H output can be scaled correctly, and then reduced to reduce the stage of the cluster carrier recovery (RCCR). Determining the associated carrier recovery results in recovering the carrier frequency and phase by combining the equalizer carrier frequency/phase loop. In another method for determining an unknown QAM cluster, the equalizer initially uses modified CMA operations to make the ISI Minimize. Although the equalizer output may not scale proportionally at this point in the order, the equalizer carrier frequency/phase loop can recover the carrier frequency and phase with the RCCR without knowing the cluster. The recovered phase can be noisy. The receiver can read the information in the embedded signal frame indicating which QAM cluster was transmitted. Then restart the equalizer operation with a standard CMA based on the known cluster, then determine the correlation for the RCCR. Carrier Recovery. Certain embodiments of the present invention use a punctured fence coding and a qAM cluster combination, similar to that used for ISDB-T and the above, as used herein, a cluster is understood to mean within a modulation scheme. It is possible to map one of the complex planes of the symbol. The number of symbols per frame depends on one of the modal variables and the number of RS packets per frame is a constant integer regardless of the modality. This configuration is described in more detail above and simplifies the design of a receiver. Referring again to FIG. 20, the frame synchronization module 2〇2 uses one of the binary frame synchronization N sequences to store the replica, and on the segmentation qAM symbol 1219, the execution is performed for the real and imaginary parts—continuous intersection and correlation Operation. Each member of the stored copy has a value of -丨 or +丨. This operation is given by Equation 1〇 (above) and is repeated here: 54 201116058 126 126 ~W=Σ No Ι/Φ/? [w - moxibustion] and 6/ [moxibustion]=art [" - jt] , n=〇(4)' (Equation 10) where the stored replica in the PN sequence is synchronized by the 127 frame. The maximum magnitude of the signal indicates the beginning of the FEC data frame. As will be explained in more detail below, the carrier is recovered. There is a redundancy /2 uncertainty in the phase. & causes zero, 4/2 or redundant "arbitrary extra recovery phase offset. For frame sync symbols, the real and imaginary parts are the same symbol and the 39th figure * Its transmission group #. Because &, it can be understood that for zero phase offset, the maximum magnitude h or the sign is positive. As outlined in Table 4〇4 of Figure 4, a /2 offset will Will get a negative maximum magnitude, and a positive maximum magnitude ~; for one of the 7Γ offsets, both heart and ~ will be negative 'and for redundancy/2 offset' maximum magnitude ~ will be positive and maximum The magnitude ~ will be negative. Therefore the 'maximum magnitude h of the combination order and the respective symbols of the illusion may indicate the quadrant of the complex plane to which the final phase offset converges. This allows an additional phase to be applied. The signal is corrected to the phase offset corrector module 2〇〇2, and the maximum and 6/symbol autocorrelation is transmitted to the phase offset corrector 2002 by the main frame synchronization module 2〇2〇. 40 Figure' can be more aware of the operation of certain aspects of the phase offset corrector 2002 in the example of Figure 2. The LUT 4〇〇 produces an output based on the maximum magnitude h and the sign of the heart (see Figure 4). The component 4〇4). Given the lining==[幻勺·巧(4), the operation 4〇2 can be executed as follows:

In the case of 0 + 10,000: 2, [Yes -: and (4) - such as [moxibustion] [I 55 201116058 2 · For 0 = +? r / 2: z For the case of 0 π / 2: ζ Once Finding the frame sync start position and correcting the m 7Γ /2 phase offset will inform the location of the code character containing the modal bit (cluster and fence rate). The codeword can be reliably decoded by, for example, a BCH decoder or by correlating the received codewords with all possible codewords and selecting the codeword that produces the highest resulting value. Because this information is transmitted repeatedly, additional reliability can be obtained by requiring the same result to occur multiple times before the interface. Figure 41 shows an example of such a procedure that can be performed by the frame synchronization module 2020. In response to the frame sync signal 2〇21, at step 41〇〇, the received cluster code character is cross-correlated with all valid code characters. The intersection and correlation generation can be used to select one of the most likely matches. In an example, at step 4102, a valid code character that produces the largest correlation value is selected. This selected code character can then be used to identify a current cluster. At step 41〇4, the identification of the current cluster is compared to the recorded or stored identification of a previously identified cluster. At step 4104, if the current cluster and the previously identified cluster are the same cluster, a trust count can be added. If it is determined in step 41〇4 that the previously identified cluster system is different from the target cluster, then the current cluster is recorded as a previously identified cluster in step 4丨〇7 and the trust count is decremented in step 41〇7 and another synchronization frame is at step 4109. wait. After step 41〇6 trusts the increment of the count, the trust count is checked at step 4108, and if it is determined at step 41〇8 that a predetermined or configured threshold is exceeded, then a letter can be made at step 4丨丨〇. ^] 56 201116058 Cluster's decision. This procedure can be repeated until the confidence count exceeds the predetermined or configured threshold. Equalizer and Carrier Phase/Frequency Circuit Referring to Figure 42, some aspects of the equalizer and carrier phase/frequency loop 248 of Figure 24A will be described. A signal pair phantom enters the digital equalizer and carrier phase/frequency loop 248, which may include an equalizer 42 (which includes a linear digital filter, waver). An error calculator module 4 2 2 calculates an error signal saying e[&]' which can be used to calculate an updated set of filter step weights using any suitable method known to those skilled in the art. In one example, the LMS/Bell method can be used. The filter removes π! resulting from the channel impulse response e. One of the equalizers 420 outputs less [moxibustion] followed by a phase rotation at 421 to reduce any remaining carrier phase and frequency offset. Phase rotation output 2 [Yes] is then processed by a divider and phase error detector module 42 7 which computes a phase error value ~ 馈送 fed to an integral ratio (IP) filter 426. The IP chopper 426 outputs an integrator and complex index lookup table (LlJT) 424 that is used for loops to correct the complex index values of the carrier phase and frequency offset. The splitter and phase error detector module 427 also outputs a two-dimensional split symbol decision closest to the neighbor, the phase of which is multiplied by 425 and "uncorrected" and then used in the error calculator module 422. The error calculator module 422 uses the input and calculates an error signal. As described, the internal operations of the error calculator module 422 and the splitter and phase error detector module 427 depend on a current phase 57 201116058 (1, 2 or 3) as determined by the phase manager 423. In some embodiments, a Least Mean Square (LMS) algorithm is used to calculate the equalizer wave weight and operation as follows: If the illusion represents an L long equalizer output vector, less [magic representation, etc. The chemist output vector, which is less, where γ [the illusion z long equalizer order weight vector and the Η superscript indicates the conjugate shift term (Hermitian). Next, the update e[k] in the error calculator module 422 is calculated using, for example, the method described below: g[k +1] = ^[A:]-2μχ^Υ[k], (Equation 11) where μ A small step size parameter and a * superscript indicates a complex conjugate. In an example, the stage manager 423 employs an equalizer and carrier phase/frequency loop 428 throughout the three phases of operation, whereby the switching from phase i to phase 2 to step #3 is based on the input data sample X [ & ] Simple count threshold execution. It should be noted that complex phase switching based on an estimate of the error at the output of the equalizer is also possible. The three stages are summarized in Table 6. Phase eefk] Visiting Method W Calculation Method Frequency/Phase Recovery State 1 CMA But Zero Cluster Rotation 2 CMA Based Reduced Cluster (RCCR) Phase/Frequency Recovery 3 DD Based on Complete Cluster Phase Noise Reduction Table 6: Equalization The carrier and carrier phase/frequency loop phase splitter and phase error detector module 427 are shown in more detail in FIG. Switch 430 is set according to one of the three stages of operation 434. During phase 1, switch 430 is in the highest position, so that [幻 = 〇. This effectively turns off the carrier loop so there is no carrier phase correction during this phase: 58 201116058 During phase 2, switch 43 is in the middle position and the loop uses a reduced cluster carrier recovery (RCCR) algorithm operation. If the power of the symbol illusion given by |2 leisure 2 exceeds a threshold p, then it assumes 2 [one of the corners of the phantom cluster and the RCCR is set by the second switch 432 described above. Positioning and energizing produces ejA] = Imb [ψ[t[(3) otherwise, if 〗 2], the second switch 432 deactivates the carrier loop below the described position. During phase 2 only A subset of the symbols can be applied to carrier recovery. The threshold g can be reduced to include more symbols in the area near the corner of the cluster, but the resulting phase correction term ~闵 will be more noisy. During phase 3, the switch 430 generates ' at the lowest description position, where the nearest two-dimensional split symbol determines the complex number of ^[α:]. During phase 3, it is assumed that sufficient time has elapsed, so the equalizer order has converged And the carrier phase has been substantially corrected so that the split symbol decision is reliable. In particular, the relationship ~Μ=ΐΓη{ΦΗ_(male))]} and % operate effectively in a single quadrant of the complex plane. Uncertainty of w π /2 in carrier phase. IP filter 426 (see section 42) An example is shown in more detail in Figure 35. The IP filter 426 allows the loop to correct both phase and frequency offsets. The output of the IP filter 426 feeds the integrator and the complex exponential LUT module 424, which is more detailed in Figure 45. The input of the integrator/LUT 424 is added to the modulus 2ττ at 440 (Fig. 44) to the input portion of the delay one step 442 to form a feed.

Γ C sends a phase error signal 0 to a look-up table (LUT) 444, LUT444 loses 59 201116058 out of correction 00 and / / phase correction factor 445 〇 - lake). The LUT 444 also provides an output 4 release, which has an "uncorrected" splitter output so that it can be used to derive an error signal for the equalizer order update. This is because the equalizer is required to operate on both the heart and the heart. Error Calculator Module and Stage Operation Overview The error beta calculator 422 can be calculated using different methods depending on the stage. For steps 1 and 2, a program calculation based on a constant modulus algorithm (cma) is typically used: Φ]=water|water]2 -/?), where the enthalpy is a predetermined constant, which is given by : ipif}' (Equation 12) and five of them are pre-expected operands and the illusion is a symbol (see Figure 17). Note that the order update derived from Equation 11 above is independent of the symbol decision and the phase of the read and depends only on the statistics of the equalizer output, the equalizer input, and the cluster. It can be shown during phases 1 and 2 that the use of CMA error for driving equation 11 is equivalent to minimizing ISI even if the cluster is rotated due to carrier frequency and phase offset. Therefore, during Phase 1, the phase/frequency recovery loop is deactivated and the equalizer uses the CMA error function to minimize ISI. After the ISI has been minimized, Phase 2 begins and the loop is turned on for the RCCR; carrier phase/frequency recovery begins using only the corner symbols of the cluster as previously described with respect to Section 43 diagram r 60 201116058. At the end of phase 2, the carrier phase and frequency have been fully recovered so that the 2-dimensional splitter 436 of Fig. 43 begins to output a reliable symbol decision. The correlation (DD) error can be used in Phase 3. The dd error can be calculated as a brush-spur. For the purposes of this description, it is assumed here that the receiver has decided which of the clusters in Figure 17 of the three clusters to transmit because it is different for each of these clusters. In addition, RCCR requires knowledge of the cluster, and in particular the power of the corner symbols of the cluster.

CMA with an Unknown Cluster In the example described herein, one of three different QAM clusters can be transmitted and the above-described equalization and phase/frequency recovery requires knowledge of the transmitted cluster. When the cluster selection is encoded in the modal symbol, the equalization and phase/frequency recovery precedes the frame synchronization (see Figure 20), where this information can be decoded directly as described above (see Figures 18, 20 and 41). Thus, in some embodiments the cluster is determined within the equalizer and carrier recovery algorithm itself. Note that this (as provided in Equation 12) is cluster dependent. In some embodiments, and with continued reference to Figure 17, the real and household units of the 64-QAM symbol are selected from the set of ±{1 '3,5,7} '16-QAM symbols. The ministry is selected from the set ±{2, 6}, and the real and imaginary parts of the symbol of QPSK are selected from the set ±4. According to Equation 12, the value of R will be:

58 for 64-QAM 52.8 for 16-QAM 32 for QPSK (Equation 13) For any of the three clusters in Figure 17, it can be displayed as a comparison to ^ 61 201116058 scaling value 〇 /? for CMA The error calculation causes the equalizer filter order to converge to the same set of values by the scaler' where the equalizer output is scaled as such. However, it can show the least ISI. In one instance of the cluster unknown, and can be set to 58, and regardless of the cluster being transmitted, ISI will be minimized during phase i. For the example, any threshold value ranging from 32 to 58 will be used. However, the selection of the maximum (i.e., 58) prevents compression of the densest cluster (here 64-QAM) at the output of the equalizer and reduces the burden on the equalizer performance. The result of using the scaling parameter results in the ratio of the equalized output of the convergence filter step up' so the statistics of the equalizer output will be: £{丨刺4}/五{|刹2}=58 'The assumption is perfect isi Remove and regardless of cluster. Therefore, for QpSK, the equalizer output will have the ISI minimized and scaled during Phase 1. y[k] = ej2^kTs+ea 浓 (±4±/4) = eJ2^Ts^ (± 5.385 ± > 5.385) Figure 45A illustrates the case where <90=/〇=〇 is used qPSK2 The real part of the equalization output of a system. It can be seen that the output is scaled by V58/32 due to the value of Λ = 58 because the equalizer converges to remove one of the isi solutions. Figure 45 illustrates the real part of the equalized output of one of the 16_qam systems for its center = eight = 〇. Because it is relatively close to i, the intersection of the equalizer output appears to be only slightly scaled. Therefore the actual scaling is evident during the convergence of the equalizer. 62 201116058 Cluster Detection Method In some embodiments, the histogram method can be used to determine the cluster before entering phase 2. The cluster can be determined even if the carrier phase and frequency have not been recovered. Consider the histograms of the powers of the coffee makers (9) for the equalizers of the qPSK, 16-QAM, and 64-QAM clusters, respectively, in Figures 46A, 46B, and 46. The histogram shows the power after the equalizer has been used and converged. Since the power of the equalizer output is independent of the phase and the histograms of the clusters are substantially different, the cluster of transmitted power can be determined by the equalizer output power histogram in the receiver. For no QPSK clusters, there is no additive or order noise, and the equalizer outputs the power of the sample; 7 reads = 58. For a 16-QAM cluster, the probability mass function for the equalizer output power:

Pr{/7[yt]== j1/4 f〇r ξ = 8-58/52.8, 72 · 58/52.8 \l/2 /or ^ = 40-58/52.8 (Equation 14) Similarly, for 64 -QAM cluster, the probability mass function system for equalizer output power:

PrfcW=^}= 1/161/8 3/16 /or ^=2,18,98 /or Bu 10,26,34,58,74 for ξ =50 (Equation 15) Due to the step update on the wheel signal The noise and the added noise ν, 'even if for example 30 decibels - there is some expansion in the histogram around this value. The noise on the output of the analog equalizer is added and independent of the symbols' and the output is assumed to be ISI-free: 63 201116058 Ι*]|2 =|φ]+φ]|2 =|Φ]+ Φ]|2 =|φ]|2+hWI2+2Re{4^*W} (^16 Adjusting the change of 2Re{4A:]«*[A:]} on a given symbol In the graph of the histogram, this phenomenon appears as an expansion (ie, change) 'which increases by a given cluster power with increasing symbol power. In the case of 16_qAM, about the symbol ± 21 The expansion of the cluster power of ±) 2.1 is less than the expansion of the cluster power with respect to the symbol ± 6.3 ± 7·6·3. Some other relationships can be observed from the histogram of the output power of the equalizer: • In the QPSK histogram, the area ^ falls roughly in the first and second regions of the 16-QAM histogram (foot 2 and r3, respectively) between. Therefore, for QPSK and Ιό-QAM clusters, the areas in which symbols are transmitted are not overlapped. • The QPSK histogram shows a comparison of one of the 64-QAM histograms [Cay 7;} for M-QAM. Therefore, for a comparison of π idle pairs Τι, ;/[A:] is more likely to be outside the region. * When there is no noise in the 64-QAM instance, the value from the set {2, 18, 26, 34, 58, 98} is taken at a probability of 9/16. Therefore, when the cluster below is 64-QAM, the noise is ignored:

Pr{{v[k]e Λ,)U{v[k]e i?2)U foWe i?3)} < 1/2, (10,000 program 1 7) where U indicates an OR. Therefore, if the transport clusters are 64-QAM and 7 [magic and the regions Ri, R_2 and R_3 are compared, 7 [magic is more likely to be outside of these regions. Some embodiments use an algorithm based on such observations: 201116058 fc = 0, λ4[-1] = 〇> 1] = ο while k < Ν do Φ] ^

If τ/[ ί:| € Τχ then , 阆=λιΡ - 1] + 1; else = max{A4[& -1] ~ 1,0}; end if

If ((i7[A?] G Ri) U (n[k] € R2) u (r?[fc] G Rd)) then A16[fe] = Ai6[A: - 1H1; else

Ai6[A] = max{Ai6[fe - 1] - 1,0}; end if fc = fe+ I; end while algorithm can be initialized after the equalizer converges, and incremental QPSK counter in the first part; U Read, if the equalizer output power is output in the area A through the iV equalizer output sample. If the equalizer output power is not in zone K, the counter is decremented. Similarly, if #:] is in the regions Ri, R2, and R3, the 16-QAM counter ΜΑ:] is incremented, otherwise it is decremented. After the # equalizer output samples, it can assume that the histogram has been correctly described. If the cluster below is 64-QAM, the QPSK and 16-QAM counters will be extremely small, as the power estimate 7 will be more likely to fall outside the QPSK and 16-QAM areas. If the transport cluster is QPSK or 16-QAM, the counter of the transport cluster will be significantly larger. Therefore, 65 201116058 jf (~[JV] < Λί) Π (λ16[ΛΠ < M) then 64-QAM C!onsteUation Transmitted, else

If X4N] > Ms[N] QPSK Cousbellaliion Transmitted, else 16-QAM Constellation Transmitted* end if * e nd if threshold M can be determined empirically, but should be smaller than #. The algorithm is extremely robust, and when transmitting QPSK, 16-QAM or 64-QAM, the correct cluster is reliably selected for low signal-to-noise ratio (SNR). After the cluster has been reliably determined, the value of Equation 13 can be set and corrected and Phase 1 can be executed to completion. The equalizer output will be scaled appropriately and Phase 2 can begin with the knowledge of the threshold f required by the RCCR. Another method of determining the cluster before the equalizer enters phase 3 will now be described. In this method, phase 1 execution and permissibility are completed with =68. Thus, and as already explained, all three clusters will have been scaled at the equalizer output resulting in: seeing the three clusters as shown in Figure 47, although such clusters will likely rotate. As discussed in relation to Figure 43, for a critical phase of the Phase II RCCR, only the symbols whose powers as given by |4 Magic I 2 exceed a threshold value are considered. It then assumes that z[A:] is one of the corner symbols of the cluster. Similarly,

Bu can indicate a corner symbol. It is relatively easy to choose a value of f when the cluster is known, as illustrated in Figure 48(A) for a 64-QAM cluster. Figure 48 shows all three clusters at the input of the equalizer and the input of the carrier phase/frequency recovery loop module S 66 201116058. It can be seen that for the corner point Α[Α] I = 9.90. For example, a threshold _^ = 9.3 indicated by the dotted circle 484 ensures that only the angular point is selected. Similarly, the '7^= 7.48 circle 482 and one #= 7.0 circle 480 can be used for the 16-QAM and QPSK. Figure 49 shows an overlay of the upper right quadrant of all three clusters. It can be seen that if V? = 7·34 ’ is only used for the corner points of QPSK and 16-QAM (falling outside the circle), it will be used by the RCCR. However, if 64-QAM is received, the five cluster points (four non-corners) fall outside the circle and will be utilized by the RCCR. Because the recovery phase is less noisy, the RCCR typically works better if only corner cluster points are used. However, even with some extra points, the RCCR can successfully recover the phase, although phase noise increases. Therefore, Phase 2 can initially operate with V? = 7.34, allowing proper initial carrier recovery for all three clusters while the cluster remains unknown to the receiver. As described above with respect to Fig. 20, the equalizer 2 〇〇〇 feeds a 2-bit order divider 201 8 ' which in turn feeds the frame sync 2020. The frame synchronization module 2020 can perform a continuous cross-correlation operation on the symbols of the incoming split QAM symbols using a stored copy of the binary frame PN sequence as described in Equation 10. Continuous cross-correlation operations can be performed separately for real and imaginary parts. Each member of the stored copy has a value of "丨 or +丨". The maximum value of h and Bu indicates the beginning of the FEC data frame. The only difference is that for a 64-QAM cluster, the 2-bit quasi-divider 2〇18 operates on a 彳5 with some extra phase noise. However, this extra phase noise is synchronized between the two-point accredited ε 67 201116058 and its subsequent parent-fork-related §fl box, and there are few negative effects on the §, 么, even if there is phase noise. Very stable. As described in Spring, the decoding of cluster code characters is also robust to phase noise. This can be used to determine the operation of this alternative method for the cluster, as follows: =58 Completion Phase 1, followed by (1) Equalizer and Phase/Frequency Circuit and Phase 2. (7) Waiting for phase 3, during phase 2, the relevant master frame synchronization 2020 accepts input data, finds frame synchronization, and decodes the cluster codeword 0 (3) to transfer the cluster information 202 to the equalizer 2 〇〇〇 and phase/frequency loops, which are used appropriately, should determine the value of one of the clusters back to phase 1. (4) Then complete stages 1, 2 and 3 as before. It will be appreciated that the primary differences between the systems depicted in Figures 50 and 20 are the additional connections from the frame synchronization 2020 to the equalizer/carrier recovery 2000 carrying the cluster information. SPOT monitoring in a weekly axis secure link improves the performance of the system and device in certain embodiments of the present invention, including the above description, and wherein the baseband video signal can be combined with the digital representation of the baseband video signal and control signal, thereby A single cable transmission through, for example, a coax cable is achieved. Referring again to Figure 4, the present invention 68 201116058 A specific embodiment provides a system through a Coax Secure Link (SLOC). Figure 5 shows one of the possible modulation schemes for the SLOC system. In this example, HD camera 30 provides an IP output 41 comprising one of compressed digital HD video images 332 and an auxiliary camera signal including analog SD CVBS 330. The compressed HD video IP signal 3 32 is modulated to the pass band 52 by a SLOC camera side data unit 49, and the SLOC camera side data unit 49 includes a QAM modulator (see the modulator 21 in the data unit 32 of Fig. 21). 2). Modulator 21 2 provides a modulated signal that can be combined with a baseband analog CVBS signal 330. The combined signal transmits "down" through coaxial cable 41, typically extending to a distance of 300 meters or more. On the monitor side, a SLOC monitor side modem 45 separates the baseband CVBS signal 330 from the passband downstream IP signal 332. The separated CVBS signal 33 0 is fed into an SD display 43 for on-site, no-delay viewing. The passband downstream IP signal 332 is demodulated with a QAM demodulator (see demodulator 222 in FIG. 22), which outputs a signal to the main network switch 44 or a processor/DVR (not shown in FIG. 4). ). In this example, uplink communication is provided in accordance with IP requirements. The upstream communication 334 can additionally transmit audio and camera control signals 42 from the monitor side to the camera 40. Typically, the bit rate of the upstream signal and the corresponding required bandwidth will be much lower than required for the downlink passband signal. The monitor side SLOC modem 45 includes a QAM modulator (see modulator 224 in Fig. 22) that modulates the IP signal to the upstream passband 44. As depicted in Figure 5, the upstream passband 54 and the downstream passband passband 52 are located at different spectral locations. On the camera side, the SLOC modem package 69 201116058 A QAM demodulator 49 (see demodulator 214 in the data machine of Figure 21) is used to receive the upstream signal. This approach offers several advantages over previous systems and methods' including increased operating range, ease of use of existing (3) infrastructure deployments, and low latency, instant video. The simplified diagrams of Figures 21 and 22 show additional details of the SLOC camera side data machine of Figure 4 and the SLOC monitoring side data machine 45 of Figure 4. Figure 5A shows a SLOC system based on the system illustrated in Figure 4, wherein a filter stage 519 is provided between coaxial cable segments 512 and 514 to operate the step 5 13 and cable segments 512 and 5 14 to connect the camera side. Equipment and monitoring side components. The filtered step 5 13 is typically used to capture at least a portion of the baseband CVBS signal 5 100 to the camera side SD display 5130. A display 5130 can be provided near the camera 51A for testing, setting, and/or local monitoring. The filter stage 5 13 typically includes a low pass filter that blocks unwanted signals, such as modulation digits, and/or control signals, that may interfere with the display function 5130. Stage 513 can also include a filter or switch that blocks signal transmission between data machines 511 and 515. For example, 'a test data machine 5丨3丨 can be connected through the stage 5 i 3 to enable fault diagnosis or to initially set the camera side data unit 5 丨丨 and the display side data machine 5 15 can be disconnected to avoid signal interference and/or degradation. . As shown in FIG. 5, the SLOC camera side data unit 5A typically outputs a low pass band qAM signal and a base frequency CVBS signal MOO based on the portion of the signal 5102 generated by the camera, and the SLOC monitoring side data machine 5丨5 is based on The control signal in signal 517A outputs a high pass QAM signal. One or more filters may be used by the step 513 Tis 70 201116058 to avoid undesirable interferences that can be seen on the SD display 513 and/or 516 and to block IP and control signals. It should be appreciated that some displays and monitors lack the filtering required to block higher frequency signals in the passband signal (relative to the baseband CVBS signal 5100). FIG. 51B shows a system based on the third embodiment of the system SL〇c system in which the environment between the camera side and the monitoring side is temporarily disconnected on the camera side, and an SD display device or The monitor 513 is directly connected to the SLOC camera side data unit 5 11 via the cable segment 519. A test data machine 5131 can be connected for testing/setting purposes as needed. The sd display device 5130 displays the baseband CVBS signal and provides a capability to monitor video from the camera 51 in the vicinity of the physical location of the camera 51A and may require reconfiguration of the connection to the 'low pass QAM signal'.

Facilitate setting and troubleshooting. The 51B 5102 can cause an undesirable undesirable interference on the display 513 that lacks high frequency filtering. In the example shown in Figures 51A and 51B, the data machine 5 11 may occur.

The test data machine 5131 temporarily replaces the display data. The model 71 201116058 includes a program including disconnection between the data machines 511 and 515, establishing a connection between the data machines 511 and 5131, disconnecting between the data machines 511 and 5131, and A connection is established between the data machines 511 and 515. The disconnection of the QAM signal can be detected using various functional components of the modem 5 11. Therefore, the operation of the SLOC system is described in detail below. QAM Modulator Structure for a SLOC System A frame structure 1336 provided to the passband modulation (pb) module 1314 is illustrated as described above in Figure 19 (see Figure 13). The fence code of Figure 16 increases the number of data bits per map q-symbol before the fence is encoded (as shown in Table 2). Figure 14 of 3 The number of QAM symbols mapped by the 15RS packet (521640 bits) varies with modal selection. Use the RS packet size of each frame 2〇7 and 315 packets to obtain an integer number of symbols for each frame, as shown in Table 3. The PB Mod module 13 14 then modulates the baseband QAM symbol to the passband using any suitable method known to those skilled in the art (see, e.g., the description above with respect to Figure 24). As described above, with reference to Fig. 20, the Q AM demodulator of Figs. 21 and 22 will be further described. Module 2000 receives the transmitted data in a passband signal and converts it into a baseband QAM symbol. The operations performed by module 2 may include symbol clock synchronization, equalization (to remove inter-symbol interference), and carrier recovery 'which typically uses sub-modules. Therefore, the module 2A can include an equalizer whose output restores the fundamental frequency QAM symbol 2001. The baseband QAM signal 2〇〇1 is provided to the two-bit quasi-splitter 2018 for segmentation in the real and imaginary directions 72 201116058 to form a sequence % [士[_1+1] and α, (9) e[_1+1 ] 2〇19, which is provided to the frame synchronization module 2〇2〇. The frame synchronization module 2020 synchronizes a stored replica of the pn sequence with the binary frame and performs a continuous cross-correlation operation on the divided singular QAM symbols 2〇19 for the real and imaginary parts separately. Each member of the stored copy has a value of -1 or +1. This operation is given by Equation 1, repeated below: 126 W = [[- moxibustion] and taste] = [« - no], "=° ^ (Equation 10) where S is 127 long frame sync sequence A copy of the deposit in the middle. “The maximum value of the indicator indicates the beginning of the FEC data frame. When the start of the FEC data frame is detected in the stream, a frame sync pulse or other synchronization */ Lu number is transmitted to the receiver module. One or more. Sections 52 and 52 show the components of a program that can reliably generate a frame sync pulse when a noise signal is received. Figure 52A shows a portion of the procedure for determining the frame length. According to the selected transmission modal change (Table 3), a program starting at step 52 is repeatedly executed when the symbol is received, and a symbol counter tracks some symbols during execution, which results in a predetermined threshold A value on the value. At step 5 〇1, cross-correlation is performed for each arriving symbol and the symbol counter is incremented until it is determined at step 5202 that the predetermined threshold has been exceeded. The symbol counter is incremented for each symbol 5203. Until the threshold is exceeded. When the threshold is exceeded in step 52〇2, the symbol counter 5204 is cleared and the cross-correlation 5205, the halo 73 201116058 7G counter 5207, and the reception of a new symbol 5208 are repeated until it is The threshold is exceeded at step 5206. The intermediate symbol count is recorded at step 52 〇 8 and the symbol counter is reset at step 5209. The correlation 5210, the incremental symbol counter 5212, and the receipt of a new symbol are received. The step of element 5213 is repeated until it determines that the threshold value is exceeded at step 5211. If the symbol counter is the same as the intermediate symbol count recorded at step 52〇8 at step 5214, then the frame length is at 5215. Returning to the value of the symbol counter. It should be understood that in the above example, the frame length can be determined after two consecutive coincidence counts. However, the number of consecutive identical counts required can be selected as needed. Figure 52B illustrates even when a signal is received. The extremely noisy frame sync module 2020 can also generate a program for correctly timing the frame sync pulse. The program is also provided for when a temporary interruption of the signal occurs, or the transmitter transmits a modal change. A new frame sync position is acquired after the change is made. A free running symbol counter receives the symbol using the modulo arithmetic count, wherein a size has been determined by the steps described in relation to FIG. It has been expected that the symbol counter value will always have the same value when Equation 10 cross-correlation results exceed the selected threshold. When the values are consistent, a trust counter is incremented until a selected maximum value (such as the maximum value) 1 6 ); otherwise the counter is decremented to a minimum of zero. Therefore 'when receiving a symbol at 5250', the intersection is performed at 5251[: 74 201116058 correlation, and if the result at 5252 exceeds The threshold value, the current maximum value is set to the threshold value at 5253 and a maximum point is set to the current value of the symbol counter. In the example, if the trust counter is set to at least 4 (5254) and currently When the symbol count indicates the frame synchronization point (5255), the frame synchronization signal is output at 5256. Second, the symbol counter is incremented at 5257 'modulo 4 addition is used here. The next symbol waits at step 5 2 77 'unless it is determined at step 5270 that the symbol counter is zero if the symbol counter is zero' then the current maximum is reset at 5271. Next, at 5272, if the current maximum point is equal to the frame sync point, then the trust counter is incremented at 5273 and the next symbol is waited at step 5277; otherwise, the trust counter is decremented at 5274. In the presently illustrated example, if it is determined at step 5275 that the trust has fallen below 2, the frame sync point is set to the current maximum point at step 5276. In either case, the next symbol waits at step 5277. In summary, according to the above procedure, it is determined that frame synchronization has been reliably obtained when the trust counter exceeds a predetermined value (4 in this example). The frame sync module can then be cleared to provide a __ frame sync pulse at the time of the ball. If the L 彳 超过 超过 exceeds 4 ′, the frame sync pulse will be output at the correct time (, , also corresponds to the beginning of the frame), even if the noise occasionally causes Equation 10 to produce a low value. The right transfer mode changes and the trust counter eventually counts back to zero. This can be used to trigger the length of the frame that determines the length of the new frame - recalculation ^ 75 201116058 (eg, using the procedure in Figure 52A). As will be described below with respect to carrier recovery, there may be an uncertainty of 7 Γ /2 in the recovered carrier phase, an arbitrary additional recovery phase offset of the basin, first zero, ±7 Γ /2 or 7 。. For frame sync symbols, the real and imaginary parts are the same symbol and the transport cluster is shown in the figure. Therefore, it should be understood that for zero phase offset, both the maximum magnitude and the illusion are positive. As summarized in Table 5, the -κ/2 offset will result in a _ negative maximum magnitude, and a positive maximum magnitude for π one offset, 6/? and ~ will both be negative, and for 7Γ/2 One offset, the largest value. Will be positive and the maximum value will be negative. Therefore, the maximum magnitude in the combination, and the respective symbols of the heart, can indicate the quadrant of the complex plane in which the final phase offset has converged, thus allowing an additional phase correction to be applied to the phase offset corrector module 2 〇〇 2 The signal (the largest and the symbolic autocorrelation in Fig. 20 is transmitted to the phase offset corrector 2002 by the main frame synchronization module 2020. Referring to Fig. 4, the phase offset in the example of Fig. 20 can be further understood. Some aspects of the shift corrector 2002. The LUT 4 产生 generates an output based on the maximum magnitude and the phantom symbol (see Table 5). The given 'operation 402 can be performed as follows: (1) For 0=+7Γ The situation: [magic (2) For the case of 0=+7r/2: W[幻=-Z/[幻+/αμ] (3) For the case of 0 =_;τ/2: +; [Free » and [After finding the frame sync start position and correcting w redundant / 2 phase offset, get it" 76 201116058 Know the position of the code character containing the modal bit (cluster and fence rate). The code character may then be associated with, for example, a -BCH decoder or by receiving the received code character with all possible code characters and selecting the highest resulting value The code character is reliably decoded. Because this information is repeatedly transmitted, it is required to generate multiple phase (four) results before receiving to obtain additional reliability. Figure 41 shows one of the programs that can be executed by the frame synchronization module 2020. Example: Continuing with the system of Figure 20, the frame synchronization signal 2〇21 of the frame synchronization module 2〇2〇 can be used to indicate which symbols are to be in the mode before the symbol is fed to the soft demapper. Removed from group 2004. In an example, the frame sync symbol and the 8-modal symbol are removed from (4) to ensure that only symbols corresponding to the RS packet are passed to the soft demapper 2〇〇6 Soft Demapper 2006 uses this technique algorithm to calculate soft bit metrics, for example, algorithms described by Gossip # and Tosato. For proper operation, soft demapper 2 〇〇 6 must know which puncturing The mode (which is the gate rate) is used for the transmitter and the alignment of the mode with the received bit. This information is provided by the frame synchronization module 2020, which decodes the modal information and also provides a repeat message. The frame sync signal is aligned to the puncturing mode, regardless of the current mode The soft bit comparison quantities are fed to a Viterb! decoder 2008 operating in a manner known in the art to achieve an estimate of the bits input to the pTCM encoder in the transmitter. The frame synchronization signal 2〇21 synchronization solution random generator 2013, the byte deinterleaver 2〇14&RS decoder 2016 respectively decompose, deinterleave and decode the byte data to obtain the original input. Information on the RS encoder in the transmitter. Stage Switching Some embodiments use stage switching based on an estimate of the mean square error at the output of the equalizer. An accurate estimate of the mean square error at the output of the equalizer can be obtained from a series of errors e[A:] calculated by the error calculator module 422 of Fig. 42. For example, an estimate can be obtained by using: MSE[k] = (1-J3)e2[A:] + pMSE[k-1]. (Equation 18) where cold <1 is a forgetting factor. Other methods for averaging e[illusion are known and available for use. Equation 18 produces a result that can be compared to a predetermined threshold and is used by stage controller module 423 of Fig. 42 to switch from phase 1 to phase 2 when [the phantom falls below the threshold. It can be compared to a second predetermined threshold to switch from phase 2 to phase 3 when five [phantom down to the second threshold. Detecting Disconnection and Reconnection Some specific embodiments provide systems and methods for extracting disconnection and reconnection events on the camera side of a communication link. Referring again to Figures 51A and 5B, partial or complete disconnection of the signal between data units 5 11 and 5 15 can occur during normal operation. Some disconnection affects the QAM signal between the camera side modem 511 and the monitoring side SLOC modem 515. In particular, the signals carrying the images captured by the HD camera 510 are encoded and/or modulated by the data engine 511 for transmission to the display side data unit 515 via the cable 514. The camera side SLOC modem 511 can perform a plurality of methods for detecting the opening and reconnecting events of the coaxial 514, and the data machine 511 can pause, start or re-send in response to a disconnect or reconnect event. Initiating Downlink Bandpass QAM Transmission In some embodiments, a "coaxial connection" signal transmitted from a QAM demodulator to a qaM modulator can be used to control the transmission for connection related events. Referring to FIG. 5, for example, a camera side qAm demodulator 5 3 can be configured to transmit a line pass signal only when a coaxial connection signal 53 is confirmed by a camera side QAM modulator 532. 533. Camera side QAM demodulator 532 can use various methods to determine the presence of input signal 534 transmitted by a monitor side QAm modulator (not shown). Typically, the coaxial connection signal 531 is verified by the camera side qAM demodulator 532 when the cluster identification is confirmed and/or when verification of a frame synchronization has been obtained, and when the reception of the input signal 534 is reliably confirmed. One method of detecting the presence of an input signal 534 includes a method based on an automatic gain control (AGC) loop. AGCs are commonly found in communication receivers (including demodulators) to control the js level at various levels and points in the receiver. An example is shown in Figure 27 which shows the AGC loop 540 applied to the front end of the receiver of Figure 24. In AGC loop 540, the magnitude of a complex signal is determined at 541 and subtracted from a predetermined reference level 543 at 542. The result is chopped by a low pass filter (LPF) 544 to suppress noise and short range variations. The LPF 5 44 provides an output feed to an accumulator including an adder 545 and a delay element 546. The accumulator output is used as 79 201116058

Gain Control Signal 547 <> Feeded to Gain Block 548 at System Input 549 In an example, gain control signal 547 is used as a gain factor or multiplier that determines the gain provided by gain block 548 such that when gain control 547 When added, the benefit provided by gain block 548 increases within predetermined limits. When input 549 is off (e.g., the coaxial is off), the output of magnitude block 541 tends to be extremely low. Typically, the coaxially coupled signal 531 can be asserted only when the equivalent value block output is at a predetermined threshold. Moreover, when input 549 is off, gain control signal 547 is typically extremely high. Thus the coaxial connection signal 53 can be asserted only when the gain control signal is below a predetermined threshold. Even if the loop is found elsewhere in the qAM demodulator 532, the agc loop 540 can be used to monitor the connection status of the input 549. Another method of detecting the presence of input signal 534 is based on the equalizer and carrier phase/frequency loop stages shown in Figure 43, (see also Equation 18). In particular, when the QAM modulator stage controller 434 of the QAM demodulator 532 (initially in phase 1) switches to phase 2 based on the result of equation 18, the coaxial connection signal 531 can be confirmed. The phase occurs only during the coaxial connection. The 1 to 13⁄4 #2 transition and the QAM demodulator 532 actively receives an upstream signal from the monitor side QAM modem. Any subsequent disconnection of the coaxial will result in a loss of signal, the fiber calculated by Equation 18 - The increase will result in a reversal to phase 1. When the QAM demodulator 532 is in phase (d), the coaxial connection signal 531 can be reset or de-asserted. In some embodiments, the camera-side QAM demodulator 532 can be required. Before confirming the coaxial connection signal (3), y;] 201116058 to stage 3. Another method for detecting the presence of the input signal 534 is based on the demodulator frame synchronization trust counter discussed in relation to Figure 52B. The coaxial connection signal 531 can be confirmed by the camera side QAM demodulator 532 only when the trust counter display is greater than a predetermined threshold. In an example, the threshold can be 4. Therefore, only when coaxially connected and monitored Side-side data machine transmits SL to camera The coaxial connection signal 5 3 1 will be confirmed when the OC frame is sent to the camera. If the frame synchronization program continues to run freely even if no symbols are received, the disconnection will cause the trust counter to count backward and eventually fall below 4 and the The coaxial connection signal 531 will be de-confirmed. Another method for the presence of the 4-input input § § 534 is based on a higher layer protocol. Referring again to the 51A circle, the HD camera 30 and the monitor side main system 38 can use a network. Road protocol communication. For the purposes of discussion, the ubiquitous Internet Protocol (IP) is used as an example of a network protocol. Some modalities of Ip are inherently bidirectional and cause data to be transmitted both upstream and downstream. The magic disconnect, a network controller or processor in the HD camera 30 and/or the data processor 32 recognizes that no return IP packet arrives from the monitor side and can notify the camera side SLOC modem 32 to stop the passband transmission. The notification may include transmitting, from the HD camera 30, a particular predetermined data packet to the data processor 32 via, for example, the interface 536 shown in Figure 53. Additional Description of Certain Aspects of the Invention The foregoing description of the present invention is intended to be Illustrative rather than limiting. For example, 81 201116058 It will be appreciated by those skilled in the art that the present invention can be practiced with various combinations of the above-described functions and capabilities and can include fewer or additional components than those described above. The aspects and features are further set forth below, and may be obtained using the functions and components described in more detail above, as will be appreciated by those skilled in the art in light of this disclosure. Certain embodiments of the present invention provide a Systems and methods. Some such embodiments include a processor that receives an image signal from an image sensor and generates a plurality of video signals representing the image signal, and an encoder that combines the baseband video signals And the digital video signal is output as one of transmission through a cable. In some such embodiments, the video signal includes a baseband video signal and a digital video signal. In some such embodiments, the combined baseband and digital video signals are substantially synchronized. In some such embodiments, the camera is a closed-circuit, high-quality television camera. In some such embodiments, the baseband video signal includes a standard picture quality analog video signal. In some such embodiments, the digital video signal is modulated prior to combining with the baseband video signal. In some such embodiments, the digital video burst 5 contains a dust video signal. In some such embodiments, the digital video signal is a high quality digital video signal. In some such embodiments, the frame rate of the digital video signal is less than the frame rate of the image 彳5. In some of these specific embodiments, the modulated digital bit signal is provided to the ___ video recorder. 82 201116058 Some such embodiments include a decoder that is configured to receive from a cable reception. In some such embodiments, the demodulated uplink signal includes a control signal. In some specific embodiments, the control signals include a position and an orientation number for controlling the camera. In some embodiments, the control signals include control of the baseband video signal by the processor. And the signal generated by the digital video signal. In some such embodiments, the control signals include a signal for selecting a video signal as the baseband video signal. In the case of a specific example, the control L number includes a method for selecting a part of the shirt to be encoded as a digital video signal. In some such embodiments, the demodulated uplink signal includes an audio signal for driving the audio output of one of the cameras. A specific embodiment of the month of the month provides (4) a method for transmitting a video image, and a specific embodiment includes receiving a video signal from a high-quality video device to divide the video signal to obtain a message. A variable-bit signal is generated by combining the modulated digital signal with a fundamental analog signal representative of the video signal to generate an output signal and simultaneously transmitting the output signal to a display system and a digital video couch and/or Storage device. In some such embodiments, the display device has a display, and the digital video memory is recorded by a digital video recorder using a digital video recorder. Export one of the images. In some such embodiments, the 83 201116058 modulated digital signal sequence captured by the digital signal. Some such embodiments include compressing the video signal. In some such embodiments, the step of frequency division multiplexing processing the digital video signal includes compressing the video signal prior to modulation. In some such embodiments, transmitting the output signal includes providing the output signal to a coaxial cable. Some such embodiments include demodulating one of the input k numbers from the coaxial cable to obtain a control signal. Some such embodiments include generating the fundamental analog signal by encoding a portion of the video signal in a composite video signal. Some such embodiments include using the S-Hui control signal to select the portion of the video signal to be encoded in the composite video signal. Some such embodiments include using the control signal to control a position of the camera. In some such embodiments, demodulating the input k number includes extracting an audio signal from the input signal. Certain embodiments of the present invention provide systems and methods for operating a camera. Some such embodiments include a processor that receives an image signal from an image sensor and generates a plurality of video signals; control logic configured to respond to a control signal received by the camera; The modulator 'is configured to modulate the digital video signal as a modulation k number. In some such embodiments, the complex video signal includes a baseband video signal and a digital video signal. In some such embodiments, each of the plurality of video signals represents at least a portion of a field of view of the camera. In some such embodiments, the control signal wins s 84 201116058 to control the content of the baseband and digital video signals. In some such embodiments, the modulated signal and the baseband video signal are simultaneously transmitted by the camera. In some such embodiments, the baseband and digital video signals are substantially synchronized. Some such embodiments include an encoder that combines the baseband video signal and the modulated signal as an output signal for transmission through a galvanic transmission. In some such embodiments, the control signal is received as a wireless signal. In some such embodiments, the modulated signal is transmitted wirelessly. In some such embodiments, the digital video signal is a high quality digital video signal. In some such embodiments, the digital video signal includes compressed digital video. In some such embodiments, the control signal moves a portion of the field of view represented by one of the video signals. Some embodiments of the present invention provide an equalizer for cooperating with a frequency separation and carrying a digital signal and a fundamental analog signal from a cable. Some such embodiments include a digital equalizer that removes distortion from the digital signal received at the receiver. Some such embodiments include an analog equalizer that compensates for the attenuation of the analog signal due to the cable. In some such embodiments, the analog equalizer applies one of a set of fundamental frequency analog filters to compensate for the attenuation. In some such embodiments, the baseband analog filter of the selected selection application is based on an estimate calculated from the difference in the attenuation of the different frequencies. [ 85 201116058 In these embodiments, the digital signal and the analog signal are transmitted between a transmitter and a receiver embodied in a camera, and wherein the receiver provides an equalization signal representative of the analog signal To a monitor. In a specific embodiment, such as #, the electrical sign includes a coaxial electrical winding. In these particular embodiments, the distortion increases with the length of the electrical iron. In some such embodiments, the distortion includes multipath distortion. In some such embodiments, the attenuation is estimated from a frequency band having a power spectral density in which the tilt is approximately linear. In some such embodiments, the tilt is calculated for a complex filter stage using a fast Fourier transform. In some such embodiments, the frequency band in the frequency band is selected to allow the frequency response of one of the digital equalizers to be calculated using the following addition: rt = 0 Λ = 〇

Gp] is a discrete Fourier transform of the time domain convergence equalizer filter stage, and is known to correspond to a particular frequency band of the DFT. In some such embodiments, the digital signal comprises a high quality representation of the video signal captured by a camera and wherein the analog signal comprises a standard picture quality representation of the video signals. Certain embodiments of the present invention provide a method for equalizing an analog signal. The analog signal is also in a cable that also carries a digital signal from the analog signal ▲ S6 201116058. In some such embodiments, the method is performed by a data machine that receives the analog and digital signals and outputs a baseband video signal. Some such embodiments include calculating the tilt in the digital signal. In some such embodiments, the tilt describes the attenuation as a function of the frequency attributable to the cable. Some such embodiments include equalizing the digital signal based on the calculated tilt. Some such embodiments include configuring an analog equalizer by using the computational tilt to select one of a set of fundamental frequency analog filters. Some such embodiments include equalizing the analog signal using the selected fundamental frequency analogizer. In some embodiments, the analog signal includes a baseband video signal and the digital signal includes the baseband video signal One of the high quality versions. In some such embodiments, the electrical winding comprises a coaxial electron microscope and wherein the skew varies with the length of the cable. In some & and the like, the tilt is derived from multipath distortion. In some such embodiments, calculating the tilt includes estimating the attenuation in a frequency band having a power spectral density in which the tilt is approximately linear. In some such embodiments, estimating the attenuation includes using a fast Fourier transform for the complex (four) wave order. In some of these specific implementations, the estimated attenuation includes the selected frequency band in the frequency band. In some of these specific embodiments, the selected frequency & optimizes the efficiency of the step of calculating the tilt. Certain embodiments of the present invention provide for the use of a novel sub-frame structure 丄s 87 201116058 digital communication system. Some such embodiments include a whirling byte interleaver of the interleaving-data frame, wherein the interleaver is synchronized to a frame structure. Some such embodiments include a random generator configured to generate a randomized data frame from the interleaved data frame. Some such embodiments include a punctured fence code modulator that operates a selectable bit rate operation of a fence-encoded data frame from the randomized data frame. Some such embodiments include a qam mapping piano. It maps the bits in the fence encoded data frame into groups of modulated symbols to provide a mapping frame. Some such embodiments include a synchronizer 'which adds a sync packet to the map frame. In some specific embodiments, the punctured fence code modulator bypasses to obtain an optimized net bit rate based on measuring white noise performance of one of the systems. In some such embodiments, the same synchronization packet is added to each of a subsequent sequence of mapping frames. In some such embodiments, the same synchronous packet is added to each mapping frame. In some such embodiments, one portion of the synchronization packet contains 127 symbols. In one such embodiment, a portion of the synchronization packet includes different bin sequences for the real and imaginary parts of the modulation symbols. In some such embodiments, one portion of the synchronization packet contains an identical binary sequence for the real and imaginary parts of the modulation symbols. In some such embodiments, the synchronization packet contains information indicating a transmission mode of the mapping frame. In some such embodiments, the indication of the transmission modality 88 201116058 includes a selected QAM cluster and a selected fence rate. In some such embodiments, the system generates a quirky integer Reed-S〇丨〇mon packet for each frame of the data, regardless of the transmission modality. In a particular embodiment, regardless of the transmission modality, the system generates a variable integer modulation symbol for each frame of the data. In some such embodiments, the system generates an integer puncturing mode loop for each frame of data regardless of the transmission modality. Some embodiments of the present invention provide a framing method for a variable net bit rate digital overnight system. Some such embodiments include providing a set of different quadrature amplitude modulation (qAM) clusters. Some such embodiments include frames for generating data packets using a combination of punctured fence codes, each combination corresponding to a correlated modality. Some such embodiments include providing a frame with a variable integer of one of the QAM symbols. In some such embodiments, the number of QAM symbols corresponds to a selected modality. In some of these specific embodiments, the 'bytes' and each frame are edited. • One of the related numbers of the packets is a constant. In some of these specific embodiments, regardless of the mode, the frame for generating a data packet using the punctured fence code combination includes generating a puncturing pattern loop for each frame of the data. In some such embodiments, the number of data bits per - QAM symbol for - or most modalities is a fraction. In some such embodiments, for each modality, the number of fenced encoder puncturing mode loops per frame is an integer. [s 89 201116058 Certain embodiments of the present invention provide systems for correcting phase offsets. Some such embodiments include a phase offset corrector that receives an equalized signal representative of the quadrature amplitude modulation signal and derives a phase correction signal from the equalized signal. Some such embodiments include a two-bit quasi-splitter that divides the equalization signal to obtain real and imaginary sequences. Some such embodiments include a frame synchronizer that synchronizes a pseudo-random sequence with a stored frame. The corresponding portion performs a correlation of the real and imaginary sequences. Some such embodiments include a phase correction signal provided by the frame synchronizer to the phase offset corrector. In some such embodiments, the phase correction signal is based on the maximum real and imaginary values of the correlation. In some such embodiments, the frame synchronizer performs continuous intersection and correlation on the segmented quadrature amplitude modulation symbols. In some such embodiments, the continuous cross-correlation is performed separately for the real and imaginary sequences by a stored copy of the binary frame pseudo-random noise sequence. In some such embodiments, the quadrature amplitude modulation signal is modulated using a punctured fence code. In some such embodiments, the positive amplitude phase shift keying is modulated using positive father phase shift keying modulation. In some such embodiments, the quadrature amplitude modulation (qaM) apostrophe uses 16-QAM modulation. In some such embodiments, the quadrature amplitude modulated (QAM) signal is modulated using 64-QAM. In some such embodiments, the frame sync symbol of the quadrature amplitude modulation signal has the same sign and the symbol of the maximum true and imaginary value of the correlation indicates the phase in the jtT·90 201116058 fs Rotate. In a specific embodiment of the temple, the phase provided by the frame synchronizer; the symbol of the maximum real and imaginary value of the correlation. In a specific embodiment, the phase offset corrector determines a phase correction value by using a symbol index of the associated maximum real and imaginary value - a lookup table. To derive the phase correction signal. Certain embodiments of the present invention provide methods for correcting a carrier phase offset in a quadrature amplitude modulated signal in a receiver. Some such embodiments include equalizing the signal. Some such embodiments include segmenting the equalized signal' to obtain real and imaginary sequences from the equalized signal. Some such embodiments include identifying a frame synchronization sequence in the real and imaginary sequences. In some such embodiments, identifying the frame synchronization sequence includes correlating a stored pseudo-random sequence with the real and imaginary sequences. In some such embodiments, 'identifying the frame synchronization sequence includes determining the beginning of a frame by correlating the maximum correlation values of the true and imaginary sequences. Some such embodiments include correcting one of the phased errors in the equalized signal based on the maximum correlation values. In some such embodiments, the correlating step includes performing a continuous cross-correlation on a series of split orthogonal amplitude modulation symbols using a stored copy of a binary frame synchronized pseudo-random noise sequence. In some such embodiments, the correlating step includes separately performing a continuous intersection and correlation on the frame synchronization sequence of a stored replica using the real and imaginary sequences separately. in

In some of these specific embodiments, the frame synchronization of the frame synchronization sequence is performed; [S 20111058 疋 has the same symbol. In some such embodiments, correcting a phase error includes determining a phase rotation in the equalized signal based on the symbols of the maximum correlation values. In some of these specific embodiments, correcting a phase error in the equalized signal includes using the symbol of the imaginary real and the virtual maximum correlation value. A lookup table. Certain embodiments of the present invention provide methods for correcting carrier phase offset in a quadrature amplitude modulation signal. In some of these specific embodiments, the method can be implemented in a system including - or a plurality of processors configured to execute instructions. Some such embodiments include executing instructions configured to equalize the (four) number on one or more processors. Some such embodiments include performing on a processor or a plurality of processors to perform segmentation of the equalized signal to obtain real and imaginary sequences from the equalized signal. The specific embodiments include one or more processing A finger 7 configured to identify the frame synchronization sequence in the material and virtual sequences is executed on the device. In some such embodiments, identifying the frame synchronization sequence includes performing a continuous intersection and correlation on the frame synchronization sequence of the stored replicas using the real and imaginary sequences. In some of these specific embodiments, identifying the frame synchronization sequence packet begins with the associated correlation and the maximum correlation value of the virtual sequence. - These such concrete (4) include instructions executed on - or a plurality of processors configured to correct the phase error in the equalized signal based on the maximum correlation values. In some such embodiments, the frame synchronization symbols of the pivot synchronization sequence have the same symbol 92. 201116058. In some such embodiments, the correction-phase error includes determining the such values based on the symbols of the maximum correlation values. The phase rotation in the signal. Certain embodiments of the present month provide a method for identifying a cluster of one of the symbols. In one such embodiment, the method is performed by one or a plurality of processors of a multi-modal quadrature amplitude modulation communication system. Some of these eight-body s examples include instructions that cause - or most processors to describe the power distribution in the - signal. In some such embodiments, the power distribution statistically tracks the occurrence of detected power levels in the signal. Some such embodiments include performing instructions that cause - or a majority of the processor to determine the power level within the power distribution - or a majority of the instructions - some of these embodiments include execution - or a majority of processors based on the spikes The distribution determines the instructions of the cluster. In some of these specific embodiments, one or more processors also determine the set based on the expansion of one or more spikes. In some such embodiments, the signal is an equalization signal and one or more of the processors determine the cluster by examining the complex segments in a histogram of the power distribution. Each of these specific embodiments corresponds to a range of power levels - but not all of the power level associated complex cluster candidates. In some such embodiments, the complex cluster candidate includes a quadrature phase shift keying cluster and a quadrature amplitude modulation (QAM) cluster. In some such embodiments, the plurality of cluster candidates include 16-QAM and 64-QAM clusters. In some of these specific examples, the complex cluster candidate includes a _ 群集 cluster. Some such embodiments include the execution of an instruction that causes one or more processors to perform a determination for each of the series of cluster decisions to establish an identification of the reliability of the cluster. In some of these specific embodiments, when a subsequent decision is made: <the identification of the cluster, the steps include increments and counts. In some such embodiments, when a subsequent decision identifies a different cluster, the steps include a decrement-counter. In some such embodiments, the steps include providing a measure of reliability based on the value of the counter. In some of these specific embodiments, the cluster is identified when the even state exceeds a threshold. In some such embodiments, the counter is provided for each of the plurality of cluster candidates and wherein the set § its corresponding counter exceeds the threshold. In some such embodiments, the power level spike occurs corresponding to the cluster. In some such embodiments, the cluster is identified prior to the signal equalization. Embodiments provide a multi-modal quadrature amplitude modulation (four) system (four) different symbol-group (four) method, in such specific implementation examples, the method is performed by a processor in the communication system - the data processor Some such embodiments include performing a detection that causes the processor port to be received at the data machine - the frame of the data: an instruction to retrieve modal information from the frame of the data. Some of these specific implementations include execution of the processor by means of a self-complexing number of possible clusters4. 94 201116058 Select one of the most closely matched codes for one of these modal bits to determine the current cluster instruction. Some such embodiments include executing an instruction to cause the processor to increase association with one of the previously identified clusters if the current cluster matches a previously determined cluster. Some such embodiments include performing if the current cluster is different from the Identifying the cluster previously causes the processor to reduce the trust metering and record the current cluster as an instruction to identify the cluster previously. Some such embodiments include the steps of repeatedly causing the processor to retrieve modal information, selecting a current cluster and adjusting the trusted metering for subsequent frames of the data until the trusted metering exceeds a predetermined threshold. In some such embodiments, the cluster is identified when the confidence measure exceeds the predetermined threshold.

In some such embodiments, selecting a cluster code includes causing the processor to cross-correlate each of the plurality of possible cluster codes having corresponding code bits. In some such embodiments, the cluster is identified in an unequalized signal of a frame carrying the data and subsequent frames of the data. In some such embodiments, the cluster is identified and the processor recovers a carrier from the signal. Some such embodiments include executing instructions that cause the processor to use a constant modulus algorithm (CMA) to calculate an error signal to converge the equalizer filter stage to allow equalization of the signal. In some such embodiments, the error signal is calculated using a scaled CMA parameter to improve equalization performance. In some such embodiments, performing the equalization of the signal includes analyzing the histograms of the power of the equalization S 95 201116058. Analyzing these histograms in some of these specific embodiments involves the use of a probability mass function. In some such embodiments, 'equalizing the signal includes performing an instruction to cause the processor to calculate the power of the complex symbol in the associated signal, in some of the specific implementations, performing the signal, etc. The instruction includes executing instructions that cause the processor to identify the corner symbols of the cluster by using a - threshold power level. In some such embodiments, the threshold power level indicates the identification of the cluster. Certain embodiments of the present invention provide a system for transmitting a video signal, the system including a camera side data machine configured to receive two signals from a video camera, each signal representing an image captured by the camera The sequence is further configured to transmit one of the two signals as a composite baseband video signal and to modulate and transmit the other signal as a passband video signal 'which does not overlap the baseband signal. In some such embodiments, the camera-side data unit includes a -mixer' that combines the baseband and passbands to view the signal of the particular embodiment to provide a transmission signal. In the camera side data machine, a duplexer is provided which is configured to transmit the transmission signal through a transmission line and to receive a passband signal from the transmission line. In some such embodiments, the camera side data unit includes a detector that monitors the camera side data unit and generates a consistent energy signal when the received passband signal is recognized. In some such embodiments, the enable signal controls transmission of the baseband video signal and the passband video signal to one of the cameras. In some such embodiments, the passband video signal is transmitted only when the enable signal is generated. Force, and in some of these specific embodiments, the received passband signal is spectrally fine-tuned. In some such embodiments, 'the detector monitors the estimate of the mean squared error in a quadrature amplitude modulation demodulator' and the wiper generates the enable signal when the score exceeds the value of the value. In the embodiment, in the specific embodiment, the enabling signal is generated based on a measurement provided by the cluster detector. In some of these specific embodiments The reliability measurement is based on a 1-box synchronization sequence. In some such embodiments, the detector monitors the mean squared and poor estimates in the equalizer. In some such embodiments, the enable signal is generated when the estimate exceeds a threshold. In some such embodiments, the detector monitors an automatic gain control mode of the camera side data unit, and one of the gain factors. In some such embodiments, the enable signal is generated when the gain has a value less than a threshold. In a specific embodiment, such as one, the detector monitors a magnitude of the received passband signal. In some such embodiments, the enable signal is generated when the magnitude has a value above one of the thresholds. In some of these specific package cases, the received passband signal contains data encoded in accordance with the Internet Protocol. Certain embodiments of the present invention provide a method for controlling the number of S in a security system 97 201116058. Some such embodiments include the determination of the presence of a top QAM signal in a composite signal transmitted on a coaxial power grid at an upstream computer. Some such embodiments include causing the uplink data unit to transmit a composite baseband video signal and a passband video signal over the coaxial cable when the uplink QAM signal is determined to be present. In some such embodiments, the composite baseband video signal and the passband video signal are represented in parallel by an image sequence captured by a video camera. Some such specific embodiments include when the uplink QAM signal is determined to be absent, causing the uplink data unit to transmit the composite baseband video signal on the coaxial cable and prevent the transmission of the passband video signal. In some such embodiments, when a gain value in an automatic gain control signal exceeds a threshold, determining that the uplink QAM signal is present. In some such embodiments, when the uplink signal magnitude is When a measurement is less than a threshold, it is determined that the uplink QAM signal exists. In some such embodiments, when an estimate of the mean square error in the equalizer exceeds a threshold, it is determined that the uplink QAM signal does not exist. In some such embodiments, 'when an internet protocol data packet is identified in the uplink QAM signal, 'determines that the uplink QAM signal does not exist.' Some embodiments of the present invention provide an automatic reconfiguration system Used to transmit video signals. Some such embodiments include an upstream data machine configured to receive two signals from a video camera. In some of these applications, the signals are representative of the sequence of images captured by the camera. In some such embodiments, the uplink data machine is configured to transmit one of the two signals as a composite baseband video signal and to modulate and transmit the other signal as a passband video signal that does not overlap the baseband. signal. Some such embodiments include a downlink data machine configured to receive a composite baseband video signal and a passband video signal from the uplink data machine, and further configured to transmit an uplink passband signal to the uplink data machine. In some such embodiments, the uplink data machine stops transmission of at least one of the two signals when detecting degradation in the uplink passband signal. While the invention has been described with respect to the specific embodiments of the present invention, it will be understood that various modifications and changes of the embodiments may be made without departing from the scope of the invention. For example, the system has been described to provide compressed digital HD video and a baseband analog video nickname in parallel. Other embodiments of the present invention provide both standard enamel digits and analog feeds. Other embodiments provide full frame rate digital HD video along with a baseband analog video. Therefore, the description and drawings are to be regarded as illustrative rather than restrictive. [Simple Description of the Drawings] Figure 1 illustrates a prior art system that uses coaxial to carry standard picture quality analog video. Figure 2 illustrates a prior art method of transmitting high quality digital video. 99 201116058 Figure 3 depicts a system for transmitting analog and digital video in certain aspects in accordance with the present invention. Figure 4 depicts a network system for analog analog and digital video transmission in accordance with certain aspects of the present invention. Figure 5 shows the bandwidth allocation for analog and digital video transmission over a coaxial cable in accordance with certain aspects of the present invention. Figure 6 illustrates an example of a cctv camera device constructed in accordance with certain aspects of the present invention. Figure 7 illustrates an example of a data machine for use with a device constructed in accordance with certain aspects of the present invention. Figure 8 illustrates an example of a data machine for a network switch device constructed in accordance with certain aspects of the present invention. Figure 9 is an example of a frame structure for an AT S C digital television. Figure 10 is an example of a conventional frame synchronization packet. Figure 11 is an example of a data fragment in a conventional data frame. Figure 12 provides a simplified diagram of a frame configuration. Figure 13 is a block diagram of a modulator in accordance with some aspects of the present invention. Figure 14 is a block diagram of a pivot structure used in some embodiments of the present invention. Figure 15 illustrates the operation of one of the wrap byte interleavers in some embodiments of the present invention. Figure 16 is a block diagram of one of a number of specific embodiments of the invention that may be selected for rate puncturing interleaved modulation modulation. [ε 100 201116058 Figure 17 illustrates an example of QAM mapping. Figure 18 shows a frame sync/modal packet. Figure 19 is a simplified frame structure for use in some embodiments of the present invention. Figure 20 is a block diagram of a demodulator in accordance with some aspects of the present invention. Figure 21 is a block diagram of a camera side data machine in accordance with some aspects of the present invention. Figure 22 is a block diagram of one of the data units on the monitor side in accordance with some aspects of the present invention. Figure 23 illustrates a camera side fundamental to passband QAM modulator in accordance with certain aspects of the present invention. Figures 24A and 24B illustrate a monitor side passband pair baseband QAM demodulator in accordance with certain aspects of the present invention. Figure 25 illustrates a monitor side digital equalization and carrier phase/frequency loop in accordance with certain aspects of the present invention. Figure 26 shows a function describing the attenuation as a frequency in a coaxial cable. Figure 27A depicts the power spectral density (psD) of the equalizer input. Figure 27B depicts the amplitude response of the convergence equalizer stage. Figures 28A, 28B, 29A, and 29B show the loss versus tilt in different frequency bands that are wider than a passband digital video signal. Figure 30 shows a monitor side data machine having a digital equalizer in the qam demodulator L X .i, j 101 201116058 in accordance with certain aspects of the present invention. Figure 31 depicts an analogous active data filter suitable for equalizing the fundamental frequency CVBS in accordance with certain aspects of the present invention. Figure 32 shows an example of a filter response in some specific embodiments of the present invention. Figures 33A and 33B illustrate a rotating QpsK cluster in a complex plane. Figure 34 is a block diagram showing a phase correction procedure in accordance with some aspects of the present invention. Figure 35 depicts an integrated ratio (ιρ) filter in accordance with certain aspects of the present invention. Figure 36 illustrates a transmitted symbol. Figures 3A, 3B, 3C, and 3D are illustrated as possible recovery symbols based on the transmission symbols of Figure 36. Figure 38 shows an example of the phase offset in a received symbol. Figure 39 shows an example of a transmission cluster based on the real and imaginary parts of the frame sync symbol. Figure 40 is a block diagram of phase shifting used in one of the specific embodiments of the present invention. Figure 41 illustrates one of the procedures for determining the reliability of frame synchronization. Figure 42 depicts certain aspects of a first-class equalizer and carrier phase/frequency loop for use with certain embodiments of the present invention. r r L ·_* Figure 43 shows a splitter 102 201116058 and a phase error detector module for use with certain embodiments of the present invention. Figure 44 illustrates a complex index LUT module for use with certain embodiments of the present invention. Figures 45A and 45B plot the real part of the equalized output in a qpsk signal (Fig. 45A) and a 16-QAM signal (Fig. 45B). 46A, 46B, and 46 are clusters of qPSK (Fig. 46A) generated by a specific embodiment in which the equalizer converges at R = 58. 16-QAM (Fig. 46B) and 64-QAM (46C) Figure) Histogram of the power of the equalized output. Figure 47 illustrates an example of a cluster at the input of the equalizer wheel and carrier phase/frequency recovery loop module. Figure 48 shows an example of a qAM mapping with the described threshold. Figure 49 shows the upper right quadrant of all three clusters that overlap on the same graph. Figure 50 illustrates the operation of the method of determining a cluster. Figures 51A and 51B depict systems for simultaneously transmitting standard enamel and high quality video and having a signal order or interruption in accordance with certain aspects of the present invention. Figures 52A and 52B illustrate the procedure for generating a frame sync pulse from a noisy number of certain aspects of the present invention.

Figure 53 is a block diagram of a camera modem having a coaxial connection indicator in accordance with certain aspects of the present invention. U 103 201116058 Figure 54 illustrates some aspects of an automatic gain control loop. [Main component description] 10 analog camera 11 coax / coaxial electron microscope 12 digital video recorder / DVR 14 monitor 16 digital camera 17 coaxial electron microscope 20 digital camera 21 coaxial cable 22 DVR / MII protocol interface 24 enamel camera 25 Twisted pair cable 26 Coaxial cable 27 Data machine 28 Control and audio signal 29 Data machine 30 Camera 31 Data machine / SLOC-T 32 DVR / data machine 33 Coaxial cable 34 SD display 35 SLOC-R data machine 104 201116058 36 Data 38 Monitoring Unit side main system 40 Digital camera 41 IP output 42 Control signal 43 Display / SD display 44 Network switch / Uplink passband 45 Monitor side SLOC modem 49 SLOC camera side data machine 50 Baseband analog signal 52 Single band 53 Carrier 5 4 Channels / Uplink Passband 60 Camera 70 System 72 Coaxial Cable 74 Standard Tandem Monitor 80 Network Security Device 82 Coaxial Cable / Input Signal 84 Standard Tandem Monitor 85 High Quality Display 86 IP Video Server 92 Fragment Synchronization symbol 94 frame synchronization segment 105 201116058 96 data segment 98 data segment 100 segment synchronization 1 01 symbol pseudo-random noise sequence 102 symbol pseudo-random noise 104 third PN63 sequence 105 modal symbol 106 reserved symbol 107 pre-encoded symbol 140 packet 142 parity byte 150 input commutator 151 output exchange Path 154 Path 154 Path 156 Path/Shift Register 158 Path/Shift Register 180 First Part 182 Second Part 190 Reload 203 Second PN63 Sequence 207 Frame 210 Media Independent Interface (MII) Module 212 QAM Modulator 106 201116058 214 QAM Demodulator 216 Symbol 218 Duplexer 220 Duplexer 222 QAM Demodulator 224 QAM Modulator 226 MII Interface Module 248 Digital Equalizer and Carrier Phase/Frequency Circuit 250 Digital Equalizer 252 2D splitter

254 Voltage Controlled Oscillator/VCO 25 6 Low Pass 泸, Wave 258 Phase Error Detector Module 302 CVBS Analog Equalizer 304 QAM Demodulator 305 Filter Selection Signal 330 Analog CVBS Signal / Auxiliary Camera Output 332 High Quality signal / passband downlink IP signal 334 uplink communication 340 signal 341 equalizer 342 2D splitter

344 Voltage Controlled Oscillator / VCO 345 IP Filter 107 201116058 346 Phase Error Detector Module

400 LUT 402 Operation 404 Component 420 Equalizer 422 Error Calculator Module 423 Phase Manager

424 Lookup Table/LUT 426 IP Filter 427 Splitter and Phase Error Detector Module 428 Equalizer and Carrier Phase/Frequency Circuit 430 Switch 432 Second Switch 434 Three Stages 436 2D Splitter

440 SLOC-R

444 LUT 445 Phase Correction Factor 446 Output 480 Circle 482 Circle 510 Camera 511 SLOC Camera Side Data Machine 512 Cable Segment 108 201116058 513 Filter Stage 514 Cable Fragment 515 Data Machine 516 SD Display 519 Filter Stage 530 Camera Side QAM Demodulator 531 Coaxial Cable Connection signal 532 camera side QAM modulator 533 downlink passband signal 534 input signal 540 AGC loop 543 predetermined reference level

544 Low Pass Filter / LPF 545 Adder 546 Delay Element 547 Gain Control Signal 548 Gain Block 549 System Input 600 Camera Optics 602 Image Sensor 603 Scan Signal 604 Processor 605 Signal 606

SLOC-T 109 201116058

606 Data Machine / SLOC-T 610 Storage 612 Audio Output System / Speaker 614 Microphone 616 Sensor 618 Control Interface

700 SLOC-R 701 analog baseband video signal 702 DVR processor 703 digital video signal 704 analog video decoder 705 digital standard video signal 706 HD digital display processor 707 signal 708 digital video decoder 710 peripheral device / network interface 712 Peripheral device / local bus 714 Peripheral device / local hard disk drive

800 SL0C-R 801 CVBS Signal 802 Network Switch Processor 803 Digital Video Signal 804 Component 806 Component 110 201116058 1300 RS Encoder 1301 Byte Data 1302 Cyclotron Interleaver 1303 Frame Synchronization Signal 1306 Random Generator 1308 PT CM Module 1312 Module 1313 QAM Mapper 1314 Passband Modulation/PB Mod 1322 Packet/Forward Error Correction (FEC) Data Frame 1324 FEC Data Frame 1328 Input 1332 Output Bit/Encoder Output 1334 FEC Data Box 1336 Frame Structure 1500 Top 1506 Parallel Path 1508 Parallel Path / Bottom 2000 Module 2001 Fundamental Frequency QAM Symbol 2002 Phase Offset Corrector 2004 Module 2006 Soft Demapper 2008 Viterbi Decoder 111 201116058 2014 Bits Deinterlaced 2016 RS decoder 2018 two-bit quasi-segment 2019 split QAM symbol 2020 frame synchronization module 2021 frame synchronization signal 2023 solution random generator 2100 camera / base frequency IP data stream 2120 pass band QAM symbol 2160 base frequency CVBS Signal 2162 passband downstream signal 2140 high passband uplink signal 2200 low passband IP protocol signal 2201 CVBS signal 2202 lowpassband signal 2203 high 2300 band signal mapper / encoder / stream CVBS signal 5102 signal 5130 SD camera-side display unit 5170 a data signal test 5131 2302 5000 Flow baseband additional connections 112 5100

Claims (1)

201116058 VII. Patent application scope: 1. A camera, comprising: a processor, receiving an image signal from an image sensor and generating a plurality of video signals representing the image signal, wherein the video signals comprise a baseband video signal a signal and a digital video signal; and an encoder combining the baseband video signal and the digital video signal as an output signal transmitted through an electron microscope, wherein the fundamental video signal includes a standard image quality analog video signal, And wherein the digital video signal comprises a high quality digital video signal. 2 'A camera as claimed in claim i, wherein the combined fundamental and digital video signals are substantially isochronous. 3. The camera of claim 2, wherein the digital video signal is modulated prior to being combined with the baseband video signal. 4. The camera of claim 1, further comprising: a decoder configured to demodulate an uplink signal received from the cable, wherein the demodulated uplink signal comprises a control signal . 5. The camera of claim 4, wherein the control signals include signals for controlling the position and orientation of the camera. The camera of claim 4, wherein the control signals include signals for controlling the baseband video signal and the digital video signal generated by the processor. The camera of claim 6, wherein the control signal includes a portion for selecting the image signal for encoding to generate a signal of the baseband video signal. And wherein the control signals are used for encoding as 8. The phase number escaped as in item 6 of the scope of the patent application includes a signal for selecting one of the digital video signals of the image signal. A camera as claimed in claim 4, wherein the demodulated signal is included to drive the camera to an apostrophe. "A voice message output 10" is used to transmit a video image. The method includes the following steps: receiving one from a video imaging device, J. 5, 5, and 5 are divided into multiplex processing to obtain a Modulating a digital signal; generating an output signal by combining the modulation/reciprocal digit 彳5唬 with a k-number representing a fundamental frequency of the video signal; and transmitting the round-trip signal to one or more devices, The invention comprises a digital video capture device and a display for displaying a video image from the fundamental analog signal. 11. The method of claim H, wherein the digital video capture device comprises a video server. 12. The method of claim 4, wherein the step of dividing the digital video signal by the frequency division multiplexing comprises the steps of: compressing the video signal, and modulating the compressed video signal on a carrier. 13. The method of claim 1, wherein the step of transmitting the output signal comprises the steps of: providing the output signal to a coaxial electric iron' and further comprising the steps of: [s] 114 201116058 demodulation Receiving an input signal from the coaxial cable to obtain a control signal; generating the base frequency analog signal by encoding a portion of the video signal in a composite video signal; and using the control signal to select a composite video signal to be used in the composite video signal The portion of the video signal encoded in it. 14. The method of claim 13, further comprising the step of using the control signal to control a position of the camera. 15. The method of claim 13, wherein the step of demodulating the input signal comprises the step of: extracting an audio signal from the input signal. 16. A system for use with a frequency separation and a digital signal carried by a cable between a transmitter and a receiver implemented in a camera and a baseband analog signal, the system comprising : a digital equalizer 'which removes the distortion of the digital signal received from the receiver; an analogous equalizer 'which compensates for the attenuation of the analog signal & caused by the cable' Applying one of the set of fundamental frequency analog choppers to compensate for the attenuation, wherein the applied fundamental frequency analog filter is - estimated to select 'the estimate is based on the difference in attenuation at different frequencies' and is equalized by the digit ϋ Calculated. 17. The system of claim 16, wherein the estimated attenuation cup · / L 1 • ^ ' is calculated from a frequency band having a force rate spectral density in which the tilt is approximately linear. 115 201116058 18. The system of claim 17, wherein the tilting is performed using a fast Fourier transform for a plurality of filter steps. 19. The method of claim 17, wherein the frequency bin in the frequency band is selected to allow the frequency response of one of the digital equalizers to be calculated using the following addition: |^j4W + l ]-W|gj4„ + 2]/f ^[4„ + 3], where GR] is the discrete Fourier transform of the time domain convergence equalizer filter tap and corresponds to a particular frequency band of the DFT. 2. The system of claim 16, wherein the digital signal comprises a high quality representation of the video image captured by a camera, and wherein the analog code includes the video image. A standard enamel representation. 21. A method for equalizing an analog signal on an electrical circuit, and wherein the cable also carries a digital signal separated by a frequency from the analog signal, the method being performed by a data machine that receives the analogy And a digital signal and a baseband video signal, the method comprising the steps of: calculating a tilt in the digital signal, wherein the tilt describes the attenuation as a function attributable to the frequency of the cable; The digital signal; selecting one of a set of fundamental frequency analog filters by the calculation to configure an analog-like equalizer; 116 201116058 using the selected fundamental frequency analog filter; the skin device equalizing the analog signal, wherein the analog signal A baseband video signal is included and the digital signal includes a high quality version of the baseband video signal. 22. The method of claim 21 wherein the step of calculating the tilt comprises the step of estimating the attenuation in a frequency band having a power spectral density wherein the tilt is approximately linear. 23. The method of claim 22, wherein the step of estimating attenuation comprises the step of using a fast Fourier transform for the plurality of filter stages. 24. The method of claim 23, wherein the step of estimating attenuation comprises the step of selecting a frequency band in the frequency band, wherein the selected frequency band is optimal for calculating the efficiency of the step of the tilt. a digital communication system comprising: a back-and-forth byte interleaver (c〇nv〇luti〇nal byte interleaver), which interleaves a frame of data, wherein the interleaver is synchronized to a frame structure a random generator 'configured to generate a randomized data frame from the interleaved data frame; a punctured trellis code modulator operating at a selectable rate The selectable bit rate operation generates a fence-encoded data frame from the randomized data frame; a QAM mapper that maps the fence-encoded data frame to the 117 201116058 group and the bit to The symbol is modulated to provide a mapping frame; and a synchronizer adds a synchronization packet to the mapping frame, wherein the synchronization packet is added to each of the mapping frame sequences. 26. The system of claim 25, wherein the prune fence modulator is bypassed to obtain an optimized net based on the white noise of one of the systems. Bit rate. 27. The system of claim 25, wherein one of the synchronization packets comprises 127 symbols. 28. The system of claim 25, wherein one of the synchronization packets includes a different one-bit sequence for the real and imaginary parts of the modulation symbols. 29. The system of claim 25, wherein the portion of the synchronization packet includes a same binary sequence for both the real and imaginary parts of the modulation symbols. 30. The system of claim 29, wherein the synchronization packet includes data indicative of a transmission mode of the mapping frame, the data comprising a selected QAM cluster and a selected fence rate. 3 1. The system described in claim 25, wherein the system generates a constant integer number of Reed-Solomon packets for each frame, regardless of the transmission mode. . 32. The system of claim 25, wherein the system generates a variable integer number of modulation symbols for each of the frames of the frame, regardless of the transmission modality. The system of claim 25, wherein the system generates an integer number of puncturing mode loops in each frame material regardless of the transmission mode. a method comprising the steps of: providing a set of different quadrature amplitude modulation (QAM) clusters; generating a frame of data packets using a combination of punctured fence codes, each combination corresponding to a correlated modal; providing a variable integer number A frame of the QAM symbol, wherein the number of the QAM symbols corresponds to a 敎 modality, wherein each of the frames and one of the Reed_Solom 〇 1^ packets are associated with a constant number. 35. The scope of claim 23, wherein the step of generating a frame data packet using a combination of punctured copies comprises the following steps: generating a pattern cycle for each mode regardless of the associated modality. An integer number in the body is deleted as described in claim 35, wherein each of the QAM symbols of the majority mode is used to '^ 匕 贝 贝 八 37 37 37 37 37 37 37 37 37 37 ',Knife.掇 can go ', where for all modulo I, each frame of the fence encoder puncturing is an integer. a number 38. A system for transmitting a digital video signal, which is scooped in: a phase offset corrector that receives an equalized signal representative of a signal and modulates from the equalized signal = amplitude Corrected signal; u derived by phase 119 201116058 which splits the equalized signal to obtain a real-two-bit quasi-divider and a virtual sequence; a frame synchronizer, which uses the corresponding part of the sequence to perform the same and has been stored a frame synchronization pseudo-random real and a correlation of the virtual sequence; phase correction 彳0, which is provided by the frame synchronizer to the phase offset corrector, and the phase correction signal in the middle of the interview is based on the correlation The maximum real and imaginary value. 39. For example, the system of claim 38, wherein the frame is associated with the continuous intersection of the incoming symmetrical elements on the incoming quadrature amplitude modulation. The system of claim 39, wherein the one of the continuous cross-correlation-binary frame pseudo-random noise sequences is stored separately for the real and imaginary sequences. 1. The system of claim 38, wherein the frame sync symbol of the quadrature amplitude modulation signal has the same symbol, and the symbol of the maximum real and imaginary value of the correlation I indicates the equalization signal Phase rotation in . 42. The system of claim 41, wherein the phase correction signal provided by the frame synchronizer comprises the symbols of the associated maximum real and imaginary values. The system of claim 41, wherein the phase offset corrector determines a phase correction value by indexing the lookup table with the symbols of the associated maximum real and imaginary values. The signal corrected by [stone] 120 201116058 is derived. 44. A method for correcting a carrier phase offset for a quadrature amplitude modulation signal, wherein the method is implemented in a system comprising an address state to execute an instruction or a majority processor, the method comprising the following steps Executing, on the one or more processors, instructions configured to equalize the signal; performing, on the or plurality of processors, configuring to split the equalized signal to obtain real and virtual from the equalized signal a sequence of instructions; on a "Hai or a majority of processors, executing instructions configured to identify a frame synchronization sequence in the real and virtual sequences, wherein the step of identifying the frame synchronization sequence comprises the steps of: Do not use the real and imaginary sequences to perform a continuous cross-correlation on a stored copy of the frame sync sequence, and determine the maximum correlation value of the real and imaginary sequences from the beginning of one of the frames; and ^ in the or And executing, on the processor, a command configured to correct a phase error in the equalized signal based on the maximum correlation values, wherein the frame synchronization symbols of the frame synchronization sequence have the same symbol, Wherein the correction-phase error includes the symbols based on the maximum correlation values to determine the phase rotation in the equalization signal. 45. The method of claim 44, wherein the frame synchronization symbol of the frame synchronization sequence has the same symbol. 46. The method of claim 44, wherein correcting the phase error in the equalized signal comprises: using the real and virtual maximum phases [off S] 121 201116058 t of the symbols... a lookup table . A method for identifying cluster symbols, which is performed by a modal quadrature amplitude modulation communication system - or a majority of processors, the method comprising the steps of: performing the - or majority processing An instruction describing a power distribution in a signal, wherein the 兮, 玄, 、, μ force rate is statistically tracked by the occurrence of the power level detected in the signal; the execution causes the one or more processing The processor determines an instruction to generate a power level within the power distribution - or a plurality of spikes; and the processor or the fraction processor determines an instruction of the cluster based on a distribution of the spikes. 48. If the patented range number processor is based on this set. The method of claim 47, wherein the expansion of the one or more or sigma peaks determines the method of the group 49, wherein the signal is a specialized signal, and wherein the signal is a specialized signal, and wherein the one or more The octave eclipse processor determines the power level of each of the cluster's corresponding segments corresponding to one of the associated complex cluster candidates by examining the complex segments in the histogram of the work knives One of the areas. Where the complex group ~~ quadrature amplitude modulation 50. The method set candidate as described in claim 49 includes a quadrature phase shift keying cluster and (QAM) cluster. ^ I ψ 寻 〜 ~ ~ 退 退 , , , , , , , , , , , , , , , , 122 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使 行使The steps of the identified reliability of the cluster > yv include: sin, the device; the follow-up decision to confirm the identification of the cluster when the increment is determined by a subsequent decision - the number is reduced when different clusters a counter that provides a measure of reliability based on the value of the counter, wherein the cluster is identified when the count H exceeds the threshold. 52. The method of claim 51, wherein The complex cluster candidates each provide a counter, and wherein the cluster is reliably identified when its corresponding counter exceeds a threshold. 53. The method of claim 47, wherein the spikes of power levels occur Corresponding to the corner symbol of the cluster. 54. The method of claim 47, wherein the cluster is identified before the signal is equalized. 5 5. The species is used in a multimodal orthogonal A method for identifying a cluster of symbols in a variable amplitude communication system, the method being performed by a processor in a data machine of the communication system, and comprising the steps of: receiving a message at the data machine The initial detection of the frame data 'executes instructions for causing the processor to retrieve modal information from the frame data of the data; performing so that the processor selects one of the most closely matched possible modules by the complex number of possible cluster codes One of the status bits corresponds to a code to determine an instruction of a 123 201116058 cluster; if the current cluster matches a previously determined cluster, an instruction is executed to cause the processor to associate with one of the previously identified clusters of the trusted meter; s if the current The cluster is different from the previously identified cluster, performing an instruction to cause the processor to reduce the trust meter, and recording the current cluster as the previously identified cluster; and repeating the processor to capture modal information, selection, and subsequent frame data a step of clustering and adjusting the trust meter until the trust meter exceeds a predetermined threshold, and the tenth is the trust meter The cluster is identified when the predetermined threshold is exceeded. 56. The method of claim 55, wherein the step of selecting a cluster code comprises the step of: causing the processor to each of the plurality of possible cluster codes 57. The method of claim 55, wherein the cluster is in an unequalized signal carrying one of the frame data and subsequent frame data. 58. The method of claim 57, wherein the cluster is identified when the processor recovers a carrier from the signal. 59. The method of claim 57, wherein Further included is the step of executing an instruction that causes the processor to use a constant modulus algorithm (CMA) to calculate an error signal to converge the equalizer filter stage to allow equalization of the signal. 60. The method of claim 57, wherein the step of equating the method of 126 201116058 comprises the step of φ: analyzing the function of the equalization signal: the step of using - probability quality = histogram comprises the following Step 2: The method described in item 57 of the benefit range, wherein the step of equalizing the execution of the letter includes a step county: executing an instruction to cause the processor to execute the following items: The power of the plurality of symbols; and identifying the corner symbol of the cluster by using a threshold signal, &# u a limit power level, wherein the threshold power level indicates the identification of the cluster . 62. A system for transmitting video signals, the system comprising a camera side data machine configured to receive two signals from a video camera, each signal representing a sequence of images taken by the camera, and further Configuring to transmit one of the two signals as a composite baseband video signal and to modulate and transmit the other signal as a passband video signal that does not overlap with the baseband signal, wherein the camera side data machine includes: a mixer that combines the baseband and passband video signals to provide a transmission signal; a duplexer configured to transmit the transmission tongue number through a transmission line and to receive a passband from the transmission line a detector that monitors the camera-side data machine and generates a coincidence signal when the received passband signal is recognized, wherein the enable signal controls at least one of the baseband video signal and the passband video signal The transmission of the passband, wherein the passband video signal is only when the one is ... 125 201116058 The enable signal is generated when the transmission is β 63 · The system of claim 62, wherein the system receives The passband L is subjected to quadrature amplitude modulation, wherein the debt detector monitors an estimate of the mean square error in a quadrature amplitude solution, and wherein the enable is generated when the estimate exceeds a threshold signal. 64. The system of claim 62, wherein the detector monitors a cluster detector and wherein the enable signal is generated based on a measurement of reliability provided by the cluster detector. The system of claim 62, wherein the reliability measurement is based on a frame synchronization sequence. 66. The system of claim 62, wherein the detector - an estimate of the mean square error in the equalizer, and wherein the estimate s exceeds a threshold Can signal. 67. The system of claim 62, wherein the detector monitors an increase factor of an automatic gain control module of the camera-side data machine and wherein ▲ the gain factor has less than - threshold The enable signal is generated at one value. The system of claim 62, wherein the detector monitors a magnitude of the received passband signal, and wherein the generation produces the enablement when the magnitude has a value greater than a threshold signal. 69. A method for controlling signalling in a security system, comprising the steps of: determining, at an uplink data machine, the presence of an uplink q AM signal in a retransmission k number on a coaxial electrical network ; 126 201116058 when determining that the uplink QAM signal exists, causing the uplink data machine to transmit a composite baseband video signal and a passband video signal on the coaxial cable, wherein the composite baseband video signal and the passband video signal are a parallel representation of a sequence of images captured by a video camera; and when it is determined that the uplink QAM signal does not exist, causing the uplink data machine to transmit the composite baseband video signal on the coaxial cable and prevent transmission of the passband video signal . 70. The method of claim 69, wherein when an gain value of an automatic gain control signal exceeds a threshold, determining the presence of the uplink QAM signal. 71. The method of claim 69, wherein the determining of the uplink QAM signal is performed when one of the magnitudes of the uplink QAM 彳§ is less than a threshold. The method of claim 69, wherein when the estimate of the mean square error in the equalizer exceeds a threshold, determining that the uplink QAM signal does not exist. 73. The method of claim 69, wherein when an internet protocol data packet is identified in the uplink QAM signal, the uplink QAM signal is determined to be absent. 74. An automatic reconfiguration system for transmitting video signals, comprising: an uplink data machine 'configured to receive two signals from a video camera' each signal representing a sequence of images captured by the camera And further configured to transmit one of the two signals as a composite baseband video signal and to modulate and transmit the other signal as a passband video P 127 201116058 'which does not overlap with the baseband signal; a downlink data The machine is configured to receive the composite baseband video signal and the passband video signal from the uplink data machine, and is further configured to transmit an uplink passband signal to the uplink data machine, wherein the uplink data machine In the uplink passband signal, when the debt is measured to be small, the uplink data machine stops only the round of at least one of the two signals. Find 128