KR101708386B1 - Mixed format media transmission systems and methods - Google Patents

Abstract

A system and method for operating a camera are described. The image signal received from the image sensor can be processed as a plurality of video signals representing the image signal. The encoder may combine the baseband and digital video signals for transmission over a cable. The video signal may comprise a substantially isochronous baseband and digital video signal. The decoder acquires a control signal that demodulates the upstream signal to control the position and orientation of the camera and the content of the baseband and digital video signal. Receives various signals, provides synchronization information related to the signals, corrects the phase shift offset of the signals, and uses or detects the encoding method used in the signaling. Systems and methods for detecting the presence of a signal are described.

Description

[0001] MIXED FORMAT MEDIA TRANSMISSION SYSTEMS AND METHODS [0002]

The present invention relates to a multimedia transmission system, and more particularly, to a system and method for transmitting standard analog video and high definition digital video over a signal cable.

With the advent of digital broadcast television and streaming video technology, a variety of video cameras, monitors, and video recorders have become available with enhanced resolution and enhanced characteristics. Currently, closed circuit television (CCTV) systems provide high-definition video output and compressed digital video signals for use in applications such as on-site monitoring, equipment access control and remote monitoring. However, older computer systems remain, and standard analog video signals are widely used and will continue to be used during transmission to all digital, high-definition systems. In particular, coaxial cables ("Coax") have been used to transmit signals from CCTV cameras to surveillance stations. Some used CCTV cameras transmit compressed video signals over a local network, or a wide area network, and these cameras may use the Internet Protocol ("IP ") as a means of communicating compressed video signals.

Figure 1 shows a prior art system using Coax to deliver standard analog video. Typically, the base analog camera 10 uses Coax 11 to generate a composite video baseband signal (CVBS) that can be transmitted up to 300 meters. Usually the CVBS signal is provided in a video recording system which often includes a digital video recorder ("DVR") that records CVBS in digital format. The conventional monitor 14 may be connected to the DVR 12 and may simultaneously display standard analog video having a resolution of 720 x 480 pixels.

The digital camera 16 may replace the analog camera 10 in some applications. The digital camera 16 may support a serial digital interface ("SDI") that may be used to transmit uncompressed standard digital video over the Coax 17 to the DVR 12 at approximately 270 Mbps.

Figure 2 is a conventional approach to transmitting high definition video (1920 x 1080 pixels) in systems currently in use. First, the digital camera 20 may support a high definition serial digital interface (HD-SDI) that can be used to transmit uncompressed high definition digital video over the Coax 21 to the DVR 22 at a 1.5 Gbps rate. Under such high transmission rates, the supported cable distances are up to 100 meters. Second, an IP-based High Definition ("HD") camera 24 generates a digital HD video signal compressed through 100 Mbps Ethernet using standard Category 5 ("CAT5") twisted pair cable (25) You may. The signal is received by the DVR 22 and recorded for non-real time playback. The current Coax 26 may be used to transfer video from the camera 24 to the DVR 22 using CAT5-to-Coax bridge modems 27 and 29 or other conversion devices. The use of a network to allow cameras to transmit digital video allows these systems to add some upstream communications, typically control and audio signals 28.

Certain embodiments of the present invention provide a camera and a system and a method of operating the camera. The processor may receive the image signal from the image sensor and generate a plurality of video signals representative of the image signal. The encoder is used to combine the baseband video signal with the digital signal as an output signal over a cable. The video signal may also include digital video and baseband video that are substantially isochronous. The camera may also operate as a closed circuit high definition television camera.

In accordance with certain aspects of the present invention, the baseband signal may comprise a standard analog video signal, and the digital video signal may be modulated prior to coupling with the baseband video signal. The digital video signal may include a compressed high definition digital video signal. In particular, when a modulated digital signal is provided to a video recorder, the frame rate of the digital video signal may be less than the frame rate of the image signal.

In a particular embodiment, the decoder is configured to demodulate an upstream signal received from a transmission cable or from a wireless communication network used to deliver downstream video. The modulated upstream signal includes a signal for controlling the position and direction of the camera, a baseband video signal by the processor and a signal for controlling the generation of the digital video signal, a signal for selecting a portion of the image signal for encoding as a baseband video signal And a control signal. The control signal may also include a signal for selecting a portion of the image signal for encoding as a digital video signal, and an audio signal used to drive the audio output of the camera, such as a loudspeaker.

A particular embodiment of the invention provides a method of transmitting a video image. The method includes frequency division multiplexing a video signal received from a high definition image video to obtain a modulated digital signal, generating an output signal by combining the modulated signal and a baseband analog signal representative of the video signal, And simultaneously transmitting the output signal to the video storage device. In some of these embodiments, the monitor displays a baseband analog representation of the video signal, and / or the digital video repository records a sequence of high definition frames extracted from the modulated digital signal using a digital video recorder. The digital video signal may be compressed.

In certain embodiments, transmitting the output signal includes providing the output signal to a coaxial cable and / or a wireless transmitter. An input signal received from a coaxial cable or wireless network may be demodulated to obtain a control signal. The baseband analog signal may be generated by encoding a portion of the video signal in the composite video signal and the portion of the video signal to be encoded in the composite video signal may be controlled using the control signal. The control signal may also control the position of the camera. Demodulating the input signal may further calculate an audio signal from the input signal.

Certain embodiments of the present invention provide a system and method for operating a camera. The processor may be configured to receive an image signal from the image sensor to generate a plurality of video signals, and the control logic may be configured to respond to the control signal received by the camera, wherein the modulator modulates the digital video signal to obtain a modulated signal Lt; / RTI > The plurality of video signals may include a baseband video signal and a digital video signal. Each of the plurality of video signals represents at least a portion of the camera's field of view, and the control signal may control the content of the digital video signal and the baseband. Typically, the modulated signal and the baseband video signal are simultaneously transmitted by the camera.

The baseband and digital video signals may be substantially isochronous. The encoder can combine the baseband video signal and the modulated signal as an output signal for transmission over a cable. The control signal may be received wirelessly, for example, from a wireless network. The modulated signal may be transmitted at least partially over the air. The digital video signal may be a high definition digital video signal or a compressed digital video signal. The control signal moves some of the field of view indicated by one of the video signals.

Figure 1 shows a prior art system using Coax for delivering standard analog video.
2 is a prior approach to transmitting high definition digital video.
Figure 3 illustrates a system for the transmission of analog and digital video according to certain aspects of the present invention.
Figure 4 illustrates a network for the transmission of analog and digital video according to certain aspects of the present invention.
5 illustrates bandwidth allocation for transmission of analog and digital video over a coaxial cable in accordance with certain aspects of the present invention.
Figure 6 shows an example of CCTV equipment constructed in accordance with certain aspects of the present invention.
Figure 7 illustrates an example of a modem used in a DVR device constructed in accordance with certain aspects of the present invention.
Figure 8 illustrates an example of a modem used in a network switch equipment constructed in accordance with certain aspects of the present invention.
Figure 9 is an example of a frame structure used in an ATSC digital television.
10 is an example of a conventional frame synchronization packet.
11 is an example of a data segment of a conventional data frame.
Figure 12 provides a simplified view of the frame arrangement.
13 is a block diagram of a modulator in accordance with certain aspects of the present invention.
Figure 14 is a block diagram of a frame structure used in certain embodiments of the present invention.
15 illustrates the operation of a convolutional byte interleaver in a particular embodiment of the present invention.
16 is a block diagram of optional code rate punctured lattice coded modulation used in certain embodiments of the present invention.
17 shows an example of QAM matching.
18 shows a frame synchronization / mode packet.
Figure 19 is a simplified frame structure used in certain embodiments of the present invention.
20 is a block diagram of a demodulator according to certain aspects of the present invention.
21 is a block diagram of a camera-side modem in accordance with certain aspects of the present invention.
22 is a block diagram of a monitor-side modem in accordance with certain aspects of the present invention.
Figure 23 shows a QAM modulator from the baseband to passband side of the camera side according to certain aspects of the present invention.
24A and 24B show a QAM demodulator from the baseband to the passband on the monitor side according to certain aspects of the present invention.
Figure 25 illustrates a monitor side digital equalizer and a carrier phase / frequency loop in accordance with certain aspects of the present invention.
Fig. 26 shows that attenuation appears as a function of frequency in a coaxial cable.
Figure 27a shows the power spectral density (PSD) of the equalizer input.
Figure 27B shows the amplitude response of the converged equalizer tap.
Figures 28A, 28B, 29A and 29B show the loss versus slope of the passband digital video signal at different frequencies.
Figure 30 shows a monitor-side modem with a digital equalizer within a QAM demodulator in accordance with certain aspects of the present invention.
Figure 31 shows an analog active filter suitable for equalizing the baseband CVBS according to certain aspects of the present invention.
32 illustrates an example of a filter response in a particular embodiment of the present invention.
33A and 33B are QPSK constellations representing rotation in the complex plane.
34 is a block diagram showing a phase correction process according to a specific aspect of the present invention.
Figure 35 illustrates an integral-proportional ("IP") filter according to certain aspects of the present invention.
Figure 36 shows the transmitted symbols.
37A, 37B, 37C and 37D show possible recovered symbols based on the transmitted symbols of FIG.
Figure 38 shows the phase shift in the received symbol.
Figure 39 shows an example of a constellation transmitted based on the normal real and imaginary parts of a frame synchronization symbol.
40 is a block diagram of a phase offset corrector used in accordance with certain aspects of the present invention.
Figure 41 illustrates a process for determining reliability associated with frame synchronization.
Figure 42 depicts certain aspects of equalizer and carrier phase / frequency loops used in certain embodiments of the present invention.
Figure 43 shows a phase error detection module and slicer used in certain embodiments of the present invention.
Figure 44 shows a multiple index LUT module used in certain embodiments of the present invention.
45A and 45B show the real part of the QPSK signal (Fig. 45A) and the equalized output of the 16-QAM signal (Fig. 45B).
Figures 46 (a), 46 (b) and 46 (c) show QPSK (Figure 46a), 16-QAM (Figure 46b), and 64- QAM (Figure 46b) generated using an embodiment in which the equalizers converge at R = , It is the histogram of the power of the equalized output.
47 is an example of a constellation diagram at the equalizer output and the carrier phase / frequency recovery loop module input.
Figure 48 shows an example of QAM matching to the threshold shown.
Figure 49 shows a quadrant of all three constellations superimposed on the same plot.
Figure 50 illustrates the operation of one approach to determining a constellation diagram.
Figures 51A and 51B illustrate a system for simultaneous transmission of standard and high definition video according to certain aspects of the present invention with interrupt or taps of the signal.
Figures 52A and 52B illustrate a process for generating a frame sync pulse from a noise signal in accordance with certain aspects of the present invention.
53 is a block diagram of a camera-side modem having a Coax connection indicator in accordance with a particular aspect of the present invention.
54 shows a specific aspect of an automatic gain control loop.

BRIEF DESCRIPTION OF THE DRAWINGS Embodiments of the invention will now be described in detail with reference to the drawings provided as illustrative examples in which those skilled in the art will be able to practice the invention. In particular, the following drawings and examples are not intended to limit the scope of the invention to a single embodiment, and other embodiments are possible by exchanging some or all of the components described or shown. Wherever convenient, the same reference numerals will be used to refer to the same or like parts throughout the hinge. Where specific elements of these embodiments are implemented in part or in whole using known elements, only those parts of such known components that are necessary for an understanding of the present invention will be described, and other parts of such known components Will be omitted so as not to obscure the present invention. In the detailed description, embodiments that represent a single component are not intended to be limiting, and the present invention is intended to include alternate embodiments that include a plurality of identical components or vice versa, unless expressly referred to herein. Applicants also do not intend for any word in the description or the claims to have such a meaning that they are not explicitly stated in a general sense or in a specific sense. Furthermore, the present invention does not include present and future equivalents to the components referred to herein by way of illustration.

A particular embodiment of the present invention provides a system and method for allowing a camera to simultaneously transmit standard analog video and high definition digital video over Coax. High definition cameras are applied to generate digital video signals and analog baseband signals. The digital signal is modulated and transmitted in a separate frequency band from the upper frequency of the baseband video signal. The analog signal may be encoded according to any standard, including PAL, SECAM, and NTSC standards and modifications thereof.

For purposes of the detailed description, an example of a system using a secure link ("SLOC") via coax will be described. SLOC is generally described as having upstream and downstream signals to the camera, and the cameras are placed upstream. In the detailed description, an example of a SLOC system provides downstream high definition ("HD") of the first passband, upstream and control signals of the second passband, and downstream CVBS. Other bandpass signals and bandwidth allocation may be used. For example, the system may use two digital video signals of standard or high definition resolution.

Figure 3 illustrates an embodiment of the present invention illustrating certain theory of operation of the present invention. This example illustrates the use of a HD camera 30 in a system where it is desirable to view the live video generated by the camera 30 while recording a high quality video copy at the DVR 32. [ An example of such a system is a security or surveillance system. The function of the HD camera 30 may be remotely controlled as will be described below. The HD camera 30 may be adapted to generate the high definition signal 332 and the analog CVBS signal 330 simultaneously. In certain embodiments, high definition signal 332 and analog CVBS signal 330 are isochronous, but may be substantially isochronous if the delay is not the same in processing different signals. In one example, CVBS signal 330 may be delayed due to digital-to-analog conversion overhead. In another example, the high definition signal 332 may be extruded and is subject to possible delays based on compression ratio. In certain embodiments, the CVBS 330 and the high definition signal 332 may be maintained or synchronized in a constant time relationship with the normal audio signal generated by the camera 30. [

The camera 30 may be applied by adding an e-component or by integrating hardware and software into the camera 30. [ For example, a secure link modem ("SLOC-T") 31 via coax is provided inside the camera. The SLOC-T 31 may be implemented as a modem integrated into the camera 30 as an add-on or using components already integrated in the camera 30. [ The SLOC-T 31 allows the multimedia feed to be transport downstream through communication as shown, and the SLOC-T 31 provides a plurality of The SLOC used in the transmitting device, such as the camera 30, will be referred to herein as "SLOC-T" for the sake of clarity of explanation, The SLOC provided at the receiving device will be referred to as "SLOC-R ". The description of SLOC-T and SLOC-R is described in further detail below.

The SLOC-T 31 may cooperate with the components of the camera 30, and / or may add enhanced functionality that allows the camera 30 to operate in various modes. In one embodiment, the camera 30 may generate an uncompressed HD digital video output and the SLOC-T 31 may provide the capability to compress the HD digital video signal. As a result, the SLOC-T 31 may provide more than modulation and demodulation performance to improve the functionality of the host camera 30 as needed. Thus, some SLOC-T devices may operate in various modes, some of which are provided in an exemplary manner. In one mode, the SLOC-T 31 receives the standard analog signal version and HD compressed video signal from the camera and transmits the two signals through coax 33. [ In another example, the SLOC-T 31 receives a standard analog signal version and an uncompressed HD video signal from the camera 30 and transmits the compressed HD digital signal version along with the standard analog signal via coax 33 do. The SLOC-T 31 transmits the standard analog signal and the HD digital signal extracted from the HD signal received from the camera 30. [

In a particular embodiment, the SLOC-T 31 uses frequency division multiplexing to generate an output signal for transmission on the Coax 33. In the example shown in FIG. 5, the downstream digital signal is provided in the signal band of the frequency 52 at which the center 53 is located at the carrier 53 of the frequency f _Cd . The band of frequency 52 starts above the highest frequency f0 of the baseband analog signal 50. The band of this separated frequency 52 may be referred to as a channel. The channel 52 may be selected based on the capacity of the SLOC-T 31, available bandwidth, signal bandwidth, and other reasons. In some embodiments, the channel 52 may be selected for compatibility with the receiving equipment. In one example, the signal may be provided directly to a standard television, and the channel 52 may be selected to ensure proper separation from the baseband signal. The frequency band of channel 52 may be selected based on a standard for digital video transmission if a standard definition encoding of the signal is used. It is contemplated that a single digital signal may be transmitted using two or more different channels to convey a portion of the digital signal.

Any suitable modulation scheme may be used to generate a version of a transmittable digital signal. For example, different types of wired and wireless connections may be implemented using phase shift keying (PSK), frequency shift keying (FSK), quadrature amplitude modulation (QAM), orthogonal frequency division multiplexing Orthogonal frequency division multiplexing (OFDM), or the like. Typically, the modulation scheme is selected based on the medium used for transmission, the elements including the characteristics of the frame rate of the desired video signal, and other factors affecting the usable bandwidth of the channel 52.

The SLOC-R modem 35 may be provided to a video capture device such as DVR 32. [ The SLOC-R modem 35 may receive digital video and CVBS signals. Typically, the CVBS signal is extracted and delivered directly to the display system 33 for a live view of the video image captured by the camera 30. The display system 33 may be a standard monitor, although it may receive a digitized version of the received analog signal. In one embodiment, the SLOC-R modem 35 may generate a digitized version of an analog signal for use with a digital monitor and a suitably equipped computer. The baseband signal can be affected using a lowpass filter, which can be implemented using analog components or through digital signal processing techniques. The digital HD signals may be separately extracted and provided to the recording portion of the DVR 32. [ In a particular embodiment, the digital HD video signal may be compressed to a DVR prior to recording. In many embodiments, the digital HD video signal is received as a compressed digital signal.

In a particular embodiment, SLOC-T 31 and SLOC-R 35 are configured to support bi-directional communication of signals. 6, the camera 30 includes a microphone 614, a loudspeaker 612, a sensor 616, a control interface 618 for controlling the electromechanical actuator, , And other features (see FIG. 6). In this example, the SLOC-T 31 and the SLOC-R 35 are typically configured to communicate control, audio and other data 36 to the camera 30.

Referring again to FIG. 5, in one embodiment, the upstream data may be communicated to the camera in one or more channels 54 installed at the upper end of the available bandwidth. The channel control, the control and audio signal 54 and other data for the communication of the digital multimedia signal 52 may be based on the available bandwidth, the signal-to-noise ratio detected on the channels 52 and 54, the signaling standard and / . ≪ / RTI > In some embodiments, the channel configuration, bandwidth, and signal-to-noise ratio are determined upon connection of the SLOC-T 31 and the SLOC-R 35 using a training sequence. Typically, the training sequence is used to determine the signal capacity of a predetermined or negotiated channel, to select a channel 52 for transmission of digital video, and to determine the available bandwidth in the selected channel 52. The characteristics of the selected channel 52 may be used to set the compression level for the digital video signal.

In a particular embodiment, the upstream signal 54 includes a signal capable of controlling the center of the downstream 52 and baseband 50 signals. For example, the camera optics 600 may provide a fish-eye view that is monitored by the camera 60, and the camera processor may select a portion of the image for transmission as the baseband signal 50 May be controlled. Typically, the downstream digital signal 52 may be recorded on a DVR or may provide a complete image for additional processing. The baseband signal 50 receives the baseband signal 50 for live monitoring of the area under supervision. The baseband signal 50 may comprise an adjusted image that corrects the visual effect produced by the fisheye lens. The viewer of the baseband signal 50 may move the view within the field of view of the fish-eye lens by selecting a new portion of the captured image for viewing. For example, a viewer may request "pan-right" to move the view to the right. The data transmitted in the upstream signal 54 causes the camera to extract and process the desired portion of the processor in view. In certain embodiments, the field-of-view request included in the baseband signal 50 may cause a physical movement of the camera 60. As a result, the control data of the upstream signal 54 may affect the content of both the baseband 50 and downstream digital 52 signals.

In a particular embodiment, the downstream audio may be transmitted as part of the HD digital video signal and / or as part of the CVBS signal. Some downstream signals may be delivered on a dedicated dedicated channel (not shown). In certain embodiments, upstream communication to the camera 30 may be handled outside of a communication method, including, for example, a wired or wireless network. Certain embodiments may wirelessly transmit the downstream digital signal 52 as an alternative or additional option. As a result, the baseband signal 50 can be transmitted over Coax, and some combinations of upstream 54 and downstream 52 are transmitted wirelessly. Typically, the upstream data 54 includes control signals for the downstream 52 and baseband 50 signals, regardless of the transmission method.

In certain embodiments, cable 33 may be provided directly to display system 33 for display of analog standard video. Typically, a standard monitor or display 33 includes a filter circuit that enables selection between a baseband signal and a standard modulated TV channel. As a result, the monitor 330 may discard the high frequency digitally encoded carrier signal. The DVR 32 also transmits the digital video signal without additional processing if the digital video signal is transmitted on a standard channel and uses standard digital encoding. R 35. The SLOC-R 35 decodes the signal generated by the SLOC-T 31 and provides the decoded HD digital video and other signals to the DVR 32. The SLOC- May also encode control, audio, and other data for transmission to the camera 30.

Referring to FIG. 4, there is provided an embodiment of the present invention showing certain operating principles of the present invention. 4 illustrates an example based on a system where it is desirable to view the live video generated by the camera 40 while simultaneously providing a high quality copy of the video over the network via the network switch 44. [ In one example, the HD video feed is captured or streamed using an internal or external IP video server. The camera 40 is typically adapted to simultaneously generate a high definition signal and an analog baseband video signal. The camera 40 may be applied by adding external components or by integrating the camera 40 with hardware software such as the SLOC-T 400. [ The SLOC-T 400 may operate in the same manner as the SLOC-R 31 featured in FIG. However, the SLOC-T 400 may be configured to encode a digital video signal in a manner that facilitates forwarding of the digital video signal over the network. For example, the SLOC-T 400 may be programmed or otherwise configured to provide a digital video signal in accordance with the streaming format supported by the IP video server.

The multiplexed video signal transmitted by the camera 40 may be received by the network switch 44 with the SLOC-R 440 optionally mounted. A baseband standard analog signal can be extracted and provided to the display 43. [ In a particular embodiment, the SLOC-R 440 may extract the digital high definition video signal and forward it to a video server or other network device using a suitable network with sufficient bandwidth to deliver the digital video signal. The digital HD video signal may comprise a compressed HD video signal. In a particular embodiment, the digital high definition signal extracted by the SLOC-R 440 is compressed or further compressed for forwarding to a video server or other network device. The SLOC-R 440 includes hardware and software to record and / or remodulate a digital high definition signal for transmission over a network. For example, the SLOC- -264 < / RTI >

Referring again to Figure 6, certain embodiments of the present invention provide improved performance applicable to security systems. In the illustrated example, the camera 60 includes a processor and modem SLOC-T 606 configured and adapted to provide a digitally encoded multimedia signal in accordance with certain aspects of the present invention. The sequential images may be captured using a combination of image sensor 602 and optics 600, including combinations of CCD sensors and lens systems known to those skilled in the art. The processor 604 typically receives a scan signal 603 from an image sensor 602 that provides a captured sequential image according to a desired or predetermined frame rate.

In some embodiments, image sensor 602 may convert a scanned analog signal representing an image captured by one or more sensors to produce a digital video signal. For example, the image sensor 602 may include an RGB (red, green, blue) sensor, and the image sensor 602 may internally process the RGB sensor output to produce an output 603 of the image sensor 602 To generate an encoded color video signal. In another embodiment, the processor 604 may pre-process the signal 603 from the image sensor 602 to obtain a raw digital video signal. The raw digital video may be further processed by the processor 604 to obtain an initial HD digital video signal, whether internally obtained or received from the image sensor 602. [ The analog standard signal may be obtained by processing an unprocessed digital video signal, an output 603 of the sensor 602, or an initial HD digital video signal. The processor 604 may then format the initial HD digital video signal to obtain one or more HD digital video signals that conform to broadcast and other standards. For example, processor 604 may generate a signal that complies with broadcast video standards such as ATSC and DVB standards. The processor 604 may further compress the digital video signal.

The camera processor 604 may comprise a combination of commercially available components and custom hardware and software. In one example, a processor includes one or more microprocessors, a digital signal processor, a microcontroller, a sequencer, and other programmable devices in combination with support logic and memory to perform sequential steps, instructions and / or programs It is possible. The storage 610 may be used to store computer readable instructions that perform some or all of the functions described in this application at the time of real life. Camera processor 604 may include some embedded or "hard-coded" processes that may be used for building specific embodiments of the present invention. In addition, the storage 610 may be used for program scratch memory and / or to maintain configuration information. In certain embodiments, the storage 610 may be used to store a record of the video captured by the camera 60. For example, Accordingly, storage 610 may be implemented using volatile and non-volatile memory, optical and magnetic disks, removable electrically erasable memories, USB memory drives and other semiconductors, electromagnetic and optical storage devices.

The signal 605 is received by the processor 604 from the video signal provided to the SLOC-T 606 and from the upstream control, audio and line 62 forwarded to the processor 604 by the SLOC- Lt; RTI ID = 0.0 > upstream information. The upstream audio information may be decoded, processed, and / or formatted by the processor 604 before the audio information is relayed to the loudspeaker, transducer, or other audio output system 612. The processor may also amplify the audio signal or use a separate amplifier for the audio output component 612. The upstream control may include a control signal and an optical control 601 for an external device, typically provided via a control interface 618. The external device may include a motor or an actuator used to interpret, rotate, or direct the camera 60. The optical control signal 601 and the external control signal 618 may be generated in response to a predefined command by the remote control system. For example, the remote user may adjust the joystick to produce a coded series of commands interpreted by the camera 604 as "rotate the camera 90 degrees clockwise in the horizontal plane" By sending a series of pulses to a stepping motor that is installed vertically with respect to the camera 60, and the series of pulses may cause the camera to produce a desired rotation about the vertical axis of the camera. A similar command may adjust the focus, zoom, and iris of the optics 600.

In yet another example, instructions and data may be provided to the upstream control information that may be used to control the functions of the processor 604 and / or the sensor 602. The instructions and data may be used to select an area within the field of view of the camera 60 for encoding in one or more of the upstream video signals. In a particular embodiment, the command and data provide one or more virtual cameras that can be remotely adjusted to specify a portion of the field of view to be encoded, whereby this portion is operable within the actual field of view determined by the optics of the camera 60 And is selected by the virtual pan, zoom and tilt. In certain embodiments, the processor 604 additionally triggers a physical movement of the camera, thereby extending the range of pan, tilt, and zoom functions.

In at least some embodiments, the CVBS and the digital signal may each convey a portion of the image captured by the image sensor 602. Portions of the image may be superimposed or from different areas within the field of view provided by lens 600. Further, in certain embodiments, additional camera 60 and / or additional image sensor 602 may be used to extend the available field of view. For example, it may be desirable to construct a plurality of cameras to obtain a panoramic (360 °) field of view of the area. One or more processors 604 may provide analog and digital signals representative of a field of view or portion of field of view. In one example, a complete panoramic view may be provided to the digital signal, which may be recorded in the DVR, and the CVBS signal may provide a selectable view in the panorama. The selectable view may be controlled using zoom, pan, and other controls. In another example, the CVBS and digital signal may provide a common or different portion of the panoramic view, which portion may be independently controlled by the remote viewer.

7 shows an example of the use of the SLOC-R 700 of the secure digital video recording system 70, similar to the SLOC-R 35 described in FIG. The system 70 includes a DVR processor 702, an analog video decoder 704, a digital video decoder 708, and an HD digital display processor 704 connected to the SLOC-R 700, peripheral devices 710, 712, (706). As described above, SLOC-R 700 typically receives and decodes signals from Coax 72, which include analog standard video signals and HD digital video signals. In addition, the SLOC-R 700 transmits upstream audio and control signals through the Coax 72. Typically, the SLOC-R divides the analog CVBS signal from the HD digital video signal of the input signal 72, providing the digital video signal to the processor 702, and as a live supply from the camera 60 shown in FIG. 6 And provides CVBS to the standard monitor 74. The SLOC-R 700 provides an analog baseband video signal 701 to an analog video decoder 704 which processes the analog baseband video signal 701 to produce a digital standard video signal 705 ). The display processor 706 multiplexes and / or selects between the digital standard signal 705 and the signal 707 derived from the playback of the stored HD digital video. The display processor provides the selected signal in a format that can be displayed by the HD television or monitor 76.

The DVR processor 702 receives the digital HD video signal 703 and optionally stores at least a portion of the signal as a record of the video captured by the camera 60. The recording may be stored in other optoelectronic or semiconductor storage connected via a hard disk drive 714, a network storage (not shown), or a network interface 710 and / or a USB / FireWire or other local bus 712 May be stored. Recorded video is further compressed to save storage space. The DVR processor retrieves the recorded video and provides a retransmission signal 707 using a digital video decoder 708.

8 shows an example of the use of a SLOC-R 800 of a networked security device 80, similar to the SLOC-R 440 described in FIG. The device 80 includes a SLOC-R 800 and a network switch processor 802 connected to the IP video server 86, typically by a network. As described above, the SLOC-R 800 typically receives and decodes a signal from Coax 82 that includes an analog standard video signal and an HD digital video signal. The SLOC-R 800 optionally transmits upstream audio and control signals via Coax 82. Typically, the SLOC-R divides the analog CVBS signal from the HD digital video signal of the input signal 82, providing the digital video signal to the processor 802, and as a live supply from the camera 60 shown in FIG. 6 And provides CVBS to the standard monitor 84. In a particular embodiment, the SLOC-R 80 is a component that digitizes the CVBS signal 801 for use with a digital display such as a high definition display 85, and also a live supply from the camera 60 shown in FIG. (804, 806, etc.). However, a suitably mounted display device or computing device may receive the CVBS signal 801 and perform digitization of the signal. The switch processor 802 receives the digital HD video signal 803 and optionally transmits the received signal to a network video server 86 that is capable of maintaining a record of the video captured by the camera 60. The digital HD video signal 803 may be further compressed before it is transmitted to the video server 86. [

Referring to Figures 5 and 6, certain embodiments of the present invention allow the content of the downstream signal 52 and the baseband analog signal 50 to be selected as desired. In one example, the baseband signal 50 and the downstream signal 52 comprise the same image, the former being in analog form and the latter being digitally encoded. The digital image can be optionally and selectively transmitted in compressed and uncompressed, standard and high quality, and in full frame or reduced frame rate. In another example, the baseband signal 50 provides some of the entire image captured by the image sensor 602, and the downstream signal 52 carries the entire image. In another example, the baseband signal 50 provides the entire image provided by the image sensor, and the downstream includes some of the entire image. As a result, a highly configurable system allows a user of a digital camera to select from a wide range of options for displaying, recording, and transmitting video images.

An analog equalizer for the baseband signal

Certain embodiments of the present invention include a system and method for improving the effect of significant frequency falls on a cable causing more frequency to decrease as the cable length increases. This tilt induced by the cable deteriorates the baseband analog signal and the passband digital video signal, and degradation deteriorates as cable length increases. Certain embodiments of the invention typically provide a digital receiver with an equalizer that eliminates the slope on the digital passband signal to enable reliable decoding of the transmitted symbols.

Certain embodiments of the present invention improve the performance of systems and devices in which baseband video signals are combined with digital representations and control signals of baseband video signals, including the systems described above, thereby enabling coaxial cable ("coax" ≪ / RTI > Figures 3 and 4 illustrate examples of embodiments that provide a SLOC system, and Figure 5 illustrates one possible modulation scheme for a SLOC system. 3, the HD camera 30 provides an output that includes compressed digital HD video 332 and the auxiliary camera output 330 includes analog standard ("SD ") CVBS. The compressed video signal 332 is modulated into the passband 52 using a SLOC camera side modem 31 that includes a QAM modulator that provides a modulated signal that can be combined with the baseband analog CVBS signal 330. The combined signal is downstream transmitted via coaxial cable 33 for distances that can typically be extended by more than 300 meters. On the monitor side, the SLOC monitor modem 35 separates the signal representing the baseband CVBS signal from the signal representation of the passband downstream video signal 332. The signal representation of the CVBS is supplied to the SD display 34 for a live view without delay. The high pass band downstream signal is demodulated into a host processor that supports live (perhaps slightly delayed) HD viewing on the monitor 34 and non real time HD playback for later viewing and a QAM demodulator whose output is supplied to the DVR 32 .

For example, upstream communication is provided according to, for example, the IP protocol. Upstream communication may additionally be used to transmit the audio and camera control signal 334 from the monitor side to the camera 30. The bit rate for the upstream signal and thus the required bandwidth is typically significantly lower than the bit rate required for the downstream passband signal and hence the required bandwidth. The monitor side SLOC modem 35 includes a QAM modulator for modulating the IP signal into the upstream passband 54. [ As shown in FIG. 5, the upstream passband 54 and the downstream passband 52 are located at different spectral positions. On the camera side, the SLOC modem 31 includes a QAM demodulator that receives the upstream signal. This approach offers several advantages over conventional systems and methods, including:

(1) Increased operating range - increased distance.

(2) A system that uses existing infrastructure and can be used by reusing coaxial cables.

(3) availability of low-latency, real-time (live) video

(4) Live CVBS and HD video can be seen in separate locations.

FIG. 21 is a simplified diagram showing additional details of the SLOC camera side modem 49 of FIG. The IP connection to the HD camera 2100 is interfaced to a QAM modulator 212 and a QAM demodulator 214 via a media independent interface ("MII") module 210. In one example, the MII 210 conforms to the IEEE 802.3 standard. QAM modulator 212 operates using a known theory of converting baseband IP data stream 2100 into passband QAM symbol 2120. [ These symbols are summed with the baseband CVBS signal 2160 and supplied to the diplexer 218. Diplexer 218 carries a baseband and lowpass band downstream signal 2162 coupled to coax and receives a high pass band upstream signal 2140 from coax and provides it to a QAM demodulator 214 2-way analog divider. The QAM demodulator 214 typically operates using a known theory of demodulating the high pass band upstream signal 2140 received from the monitor side and outputting the baseband data to the MII interface 210.

FIG. 22 is a simplified diagram showing additional details of the SLOC monitor modem 45 of FIG. The diplexer 220 receives the downstream combined baseband CVBS and low passband IP signal 2200 from the coaxial cable and provides the signal 2200 with low pass (LP) and high pass (HP) Elements 2201-2203. The CVBS signal 2201 may be transmitted directly to a standard monitor or display device. The low passband signal 2202 may be provided to a QAM demodulator 222 which feeds the MII interface module 226. The diplexer may also receive the high passband signal 2203 from the QAM modulator 224 and may transmit this upstream signal to the coaxial cable. The QAM modulator 222 typically receives input from an MII interface 226 that can be coupled to a host / DVR that supports the IP protocol.

Typically, coaxial cables exhibit considerable high frequency roll off characteristics that cause more high frequency attenuation as the cable length increases. This "tilt" may be significant within the band of the passband signal, and the slope may cause significant internal symbol interference ("ISI"). The digital equalization may be necessary for the QAM demodulator 222 to correctly recover the transmitted data.

In the baseband Passband  module

23 shows the QAM modulator 212 (FIG. 21) in the camera-side baseband to passband in more detail. For example, an FEC encoder / matcher that adds air protection data to a data stream received from MII 210 using concatenated Reed-Solomon coding, byte interleaving, and / or lattice coding, Data is received from the MII 210. The matcher / encoder 2300 demultiplexes the data into streams 2300 and 2302, and the given bit group size for each stream represents the QAM symbol amplitude level in the real and imaginary directions, respectively. The isolated transmitted QAM pulses,

Lt; / RTI >

Where d _{R , m,} and d _{I , m} are the real and imaginary parts of the complex QAM symbol, respectively, determined by two independent message streams, and m = 1 ... M is the cardinality two dimensional QAM constellation Where M is the modulated carrier frequency and q (t) is the root raised cosine pulse function.

에 의해 주어지며, 여기서 *는 컨벌루션 (convolution)을 나타내며, c(t)는 채널 임펄스 응답이고, υ(t)는 부가적인 화이트 가우시안 잡음이다. 그 결과, Continuous series of the transmitted QAM pulse s (t) is transmitted through a multipath channel noise at a rate of F _s = 1 / T _S. As a result, the received signal at the input to the QAM receiver

, Where * denotes the convolution, c (t) is the channel impulse response, and v (t) is the additive white Gaussian noise. As a result,

, Where, d frequency of [n] are complex, and the transmitted symbol, f _0, and θ ₀ is f _L0 = f _c of the demodulator local oscillator to baseband in the receiver pass band with respect to the transmitter so that -f _0, respectively, and Phase offset.

In the passband  The baseband demodulator

24A shows the monitor side announcement band to baseband QAM demodulator 222 (Fig. 22) in more detail. The signal r (t) may be received from the coaxial cable and may result in a sampled signal r (nT _samp ), e.g., sampled at a rate higher than the symbol rate (see 240). Since the following salpling:

Thereafter, after down conversion, resampling at symbol rate 1 / Ts, and matched filtering,

는 샘플링된 복소 필터링된 잡음이며, 완전한 심볼 레이트 샘플 타이밍과 결합된, 펄스 형상화 및 정합된 필터링 q 로 인해,

는 채널 임펄스 응답 c 만으로 인한 것임을 가정한다. . here

Is the sampled complex filtered noise and due to the pulse shaping and matched filtering q combined with the full symbol rate sample timing,

Lt; / RTI > is due only to the channel impulse response c.

Equalizer and carrier phase / frequency loop

의 위상 회전 버전과 비교하여, 필터 탭 가중치의 업데이트된 세트를 계산하는데 사용되는 에러 신호를 생성한다. LMS 알고리즘은 아래아 같이 동작할 수도 있다.The digital equalizer and carrier phase / frequency loop of Fig. 24A will be described in more detail with reference to Fig. The signal x [k] is applied to an adaptive digital equalizer 250, which may include a linear digital filter used to compensate for the slope caused by the channel impulse response c. The tap weight adjustment value may be obtained using one or more known methods including an LMS algorithm. The equalizer divides its output y [k] into two-dimensional ("2-D") slicer determinations

To produce an error signal that is used to compute an updated set of filter tap weights. The LMS algorithm may operate as follows.

x [k] represents N long equalizer input vectors,

y [k] represents the equalizer output vector g ^H [k] x [k].

Where g ^H [k] is N long equalizer tap weight vectors, and the superscript H is the conjugate transposition (Hermitian)

Here, [mu] is a parameter of small step size, and the superscript * represents a conjugate complex number.

To eliminate the influence of the passband cable slope, after conversion, the LMS equalizer tap is close to the inverse of the channel impulse response c.

및 z[k]의 실수부 및 허수부를 독립적으로 나눈다. 위상 에러 검출 모듈 (258)은 z[k] 및

을 수시ㄴ하여 위상 에러 신호

를 형성한다. 로우 패스 ("LP")필터 (256)은 루프가 위상 및 주파수 오프셋 모두를 정정하게 하는 적분 비례 필터일 수 있다. 로우 패스 필터 (256)의 출력은 θ0 및 f0 모두를 정정하는 복소 위상/주파수 정정 요소

를 출력하는 복소 이산 전압 제어된 발진기 ("VCO") (254)에 공급된다. 또한, VCO (254)은 슬라이스 출력

을 "비보정"하는 출력

을 제공하여, 균등화기 탭 업데이트를 위한 에러 신호를 도출하는데 사용될 수 있다. 이는 통상적으로 균등화기가 x[k] 상에서 동작하기 때문에 요구된다. 또한, 도 24a를 참조하면, 균등화기 출력 z[k]은 검출된 실수 및 허수 레벨을 비트 그룹으로 변환하는 심볼 역정합기에 공급된다. 그 후, 디코더는 비터비 (Viterbi) 디코딩, 바이트 역인터리빙, 및/또는 리드-솔로몬 디코딩을 실행하여, 수신된 비트 에러를 정정하며 결과적인 데이터를 MII 인터페이스에 전달한다. The 2-D slicer 252 outputs an estimate of the original transmitted d [k]

And z [k] are independently divided into a real part and an imaginary part. The phase error detection module 258 determines z [k] and

The phase error signal < RTI ID = 0.0 >

. A low pass ("LP") filter 256 may be an integral proportional filter that causes the loop to correct both phase and frequency offsets. The output of the low-pass filter 256 is a complex phase / frequency correction factor < RTI ID = 0.0 >

Controlled oscillator ("VCO") 254, In addition, the VCO 254 outputs a slice output

Output "uncorrected"

To be used to derive an error signal for the equalizer tap update. This is usually required because the equalizer operates on x [k]. Also, referring to Fig. 24A, the equalizer output z [k] is supplied to a symbol warping unit that converts the detected real and imaginary levels into bit groups. The decoder then performs Viterbi decoding, byte deinterleaving, and / or Reed-Solomon decoding to correct the received bit error and deliver the resulting data to the MII interface.

Effect of cable length

를 유발하며, 그 결과, 전송 신뢰도를 상당히 악화시킬 수 있다. 디지털 신호에서, 균등화기는 이러한 장애를 제거하기 위해 수신기에서 사용될 수 있다. 도 27a 및 도 27b는 균등화기 입력의 전력 스펙트럼 밀도 (PSD) 및 수렴된 균등화기 탭의 응답을 각각 도시한다. 특히, 도 27a는 15.98MHz (통과대역 및 상대적인 기적대역 주파수 모두 도시)의 반송파 주파수로, RG-6 케이블의 2000ft를 통한 전송 이후 균등화기 입력의 PSD 를 도시하며, 도 27b는 수렴된 디지털 균등화기 탭의 진폭 응답을 도시한다. The received video signal may experience attenuation as a function of frequency contributes to a particular characteristic of the cable. For the purpose of this discussion, an example of a coaxial cable is described. The severity of the attenuation, referred to as the slope, typically depends on the cable type and length. Figures 26A and 26B show attenuation as a function of frequency for cable types RG6 and RG59 of various lengths. The slope is equal to multipath distortion, and the additive path and the main path have a very small delay spread. As the slope increases, the number of non-small multipath components, and their respective gains, also increases. Multipath distortion is a function of the

And as a result, the transmission reliability can be significantly deteriorated. In a digital signal, an equalizer may be used at the receiver to eliminate this obstacle. Figures 27A and 27B show the power spectral density (PSD) of the equalizer input and the response of the converged equalizer tap, respectively. In particular, FIG. 27A shows the PSD of the equalizer input after transmission over 2000 ft of RG-6 cable at a carrier frequency of 15.98 MHz (both passband and relative mirror band frequency), and FIG. 27B shows the converged digital equalizer Lt; / RTI > shows the amplitude response of the tap.

를 제거할 수 있으며, 전송된 데이터의 신뢰할 수 있는 디코딩을 가능케 한다. 케이블의 길이가 증가함에 따라, 모니터측에서 디지털 통과대역 신호는 디지털 균등화기, 또는 연관된 리스-솔로몬 코딩 및 격자 코딩과 같은 디지털 데이터에 대한 공지된 포워드 에러 방지 방법을 사용하여 신뢰성 있게 수신될 수 있다. 그러나, 케이블 기울기는 기저대역 아날로그 CVBS 신호의 고 주파수에 불리한 영향을 미쳐, 모니터측에서 보이는 컬러의 선명함 및 휘도를 감소시킨다. 따라서, 특정 실시예는 기저대역에서의 케이블 기울기를 보상하기 위해 모니터측에서의 CVBS 신호에 인가될 수 있는, 아날로그 균등화기와 같은 적용가능한 필터를 제공한다. 특정 실시예는 기저대역에서의 기울기 총량을 측정하기 위해 통과대역 디지털 균등화기를 사용하여, 수신된 CVBS 신호에 적용될 기저대역 아날로그 필터들 중 적당한 하나의 세트를 선택한다. A particular embodiment of the invention may include a digital equalizer capable of undoing the slope introduced by the cable,

And enables reliable decoding of the transmitted data. As the length of the cable increases, the digital passband signal at the monitor side can be reliably received using a digital equalizer, or a known forward error prevention method for digital data such as associated LeS-Solomon coding and trellis coding . Cable tilt, however, adversely affects the high frequency of the baseband analog CVBS signal, reducing the clarity and brightness of the colors seen on the monitor side. Thus, a particular embodiment provides an applicable filter, such as an analog equalizer, that can be applied to the CVBS signal at the monitor side to compensate for cable tilt in the baseband. A particular embodiment uses a passband digital equalizer to measure the total amount of tilt in the baseband to select an appropriate one of the baseband analog filters to be applied to the received CVBS signal.

Passband  Efficient Measurement of Tilt

In measuring the slope in the signal band, if the slope of the input signal in PSD is quantified in dB, the frequency band may be selected in the portion to be approximately linear. Consequently, the frequencies of -2.67 MHz to 2.67 MHz of the baseband digital equalizer input corresponding to 13.31 MHz and 18.65 MHz of the passband input signal provide a reasonable range. As shown in FIG. 26A, the slope of 13.31 MHz and 18.65 MHz is approximately 3.7 dB for 2000 feet of RG-6. To measure the slope of dB from the converged digital equalizer filter taps, the following calculation can be performed.

G [k] is the DFT of the time domain converged equalizer filter tap, and k ₁ and k ₂ correspond to a particular frequency bin of the DFT. Because the digital equalizer of Fig. 25 may be performed with time domain convolution, an FFT (or multiply or add N complex numbers at both points) is typically required for purposes of measuring the slope for a given k1 and k2. In other words,

이며, n=0, 1...N-1은 N 개의 시간 도메인 군등화기 탭이다 (시간 인덱스에 대한 의존성은 생략됨). 1/N 스칼라는 이 계산에서 불필요하다. 유사한 계산이 G(k₂)에 대해 수행될 수도 있다. 그러나, 계산은 주파수 빈을 주의깊게 선택함으로써 상당히 감소될 수 있다. 2.67MHz의 주파수에 대응하여 K₁=N/4 로 함으로써, 수학식 (2)의 복소 지수는 상당히 간단화된다.here,

And n = 0, 1 ... N-1 are N time domain equalizer taps (dependency on the time index is omitted). The 1 / N scalar is unnecessary in this calculation. A similar calculation may be performed for G (k ₂ ). However, the calculation can be significantly reduced by careful selection of the frequency bin. By making K ₁ = N / 4 corresponding to the frequency of 2.67 MHz, the complex index of the equation (2) is considerably simplified.

The real and imaginary parts of the filter frequency response can be calculated using summation.

Finally, the power at this frequency bin is:

By allowing k ₁ = N / 4, the power calculation is considerably simplified. Similarly, corresponding to a frequency of -2.67 MHz, by making K ₁ = 3 N / 4, the complex index will again be considerably simplified.

The real and imaginary parts are:

는 상기와 같이 계산된다. 도 2b에서, 수렴된 필터 탭의 (dB 의) 진폭 응답의 상승 기울기는 탭 잡음 및 64-QAM 신호 대한 보통의 SNR까지 선형이다. 또한, 이러한 방법에서 계산시,

이며, 이는 이 3.7dB의 대역에 걸처 실제 기울기에 상당히 근접한다.And the power

Is calculated as described above. In FIG. 2B, the rising slope of the amplitude response (in dB) of the converged filter tap is linear to tap noise and the normal SNR for a 64-QAM signal. Also, in this method,

, Which is very close to the actual slope over this 3.7 dB band.

Baseband CVBS  For tilt correction Passband  Use of slope estimates

After estimating the passband slope for the digital video signal, a suitable baseband analog filter may be selected from one of the M different filters. The estimated passband slope of the digital video signal band will indicate the severity of the slope of the baseband CVBS signal and the intensity can be roughly corrected by an analog filter. In Figure 28A, the slopes of the digital video signal bands at 13.31 MHz and 18.65 MHz are shown for lengths similar to RG-6, RG-11, RG-59, and RG-174 and these cables. Figure 28a shows the slope versus loss at 3.58 MHz in the passband digital video signal for the RG-6, RG-11, RG-59, and RG-174 cable types. Fig. 28B shows the loss at 6 MHz. The losses at 3.58 MHz and 6 MHz are approximately the same for the four cable types for a given slope. Figure 29A shows the slope versus loss at 3.58 MHz in the passband digital video signal for the RG-6, RG-11, RG-59, and RG-174 cable types. FIG. 29B shows the loss at 6 MHz. Losses at 3.58 MHz and 6 MHz will be observed to be approximately the same for the four cable types for a given slope.

Since the estimated passband slope is the only available information about the frequency response of the cable, the ideal scenario is that the frequency response of the cable in the baseband (CVBS signal band) depends on the cable type or length, Is related to the slope of the digital signal. Figures 28b, 29a, and 29b identify this situation of frequency response at DC, 3.58MHz, and 6MHz. For example, at a 1.5 dB slope of the passband digital video signal, loss at DC, loss at color carrier (3.58 MHz), and loss at 6 MHz are approximately 0.68 dB, 4.1 dB , And 5.3 dB. As a result, regardless of whether 1.5 dB of the passband slope results from 275 ft. Of RG-174, 750 ft. Of RG-59, 825 ft. Of RG-9, or 1825 ft. Of RG-11, The baseband slope of the CVBS signal may be underscored.

An example of the algorithm used to select the appropriate analog filter from the M filter sets is as follows.

α ₀ = 1, and the other value of α _n is less than 1, and the bit-shifted addition is chosen to be sufficient to calculate R _n . Thus, the monitor side QAM demodulator of Figure 24A is typically modified such that the digital equalizer of the passband QAM demodulator provides a signal to select one of the M analog CVBS filter responses. Figure 24B shows a modified part of a monitor side QAM demodulator with an analog filter select output from a digital equalizer operating according to the algorithm described above. 30 shows an overall monitor modem with a digital equalizer in a QAM demodulator 304 that provides a filter selection signal 305 to CVBS analog equalizer 302. [

An example of an analog active filter suitable for equalizing the baseband CVBS signal is shown in FIG. In this example, M = 3, so there are four possible filtering choices. The preferred filter response is selected by closing one of the M + 1 switches of the switch module 310, which in turn is grounded to each RC pair connected to the switch module 310. A possible filter response is shown in FIG.

Those skilled in the art will appreciate that the present invention applies to digital communication systems and forward error correction methods that use different passband modulation. Those skilled in the art will also recognize that two or more points of the FFT of the passband digital equalizer tap weight vector g [n] may be used to select the analog filter for the CVBS signal, and the values of G ₁ [k] and G ₂ [k] It will be appreciated that other types of digital equalizer designs for passband signals, including those already computed as frequency domain equalizers, may be used as part of this equalization process. Also, like RLS, known equalizer tap weighting methods other than LMS may be used.

In certain embodiments, a CVBS analog filter having a selectable response may take other forms than those described above. In addition, the equalizer for the CVBS signal may take the form of a digital filter where the CVBS is sampled and digitized prior to equalization. In this case, the tap weights of the digital filter are selected from the predetermined M weighted vector sets according to the same algorithm described for selecting one of the M analog filter responses.

In a digital communication system Framing

Typically, digital data has some kind of frame structure so that the data is organized into groups of uniformly sized bits or bytes. A system that uses block-based forward error correction (FEC) has an organized frame around the error-correcting codeword size. Also, if the system uses interleaving to combat impulsive noise, the frame structure will be arranged into the interleaver parameters in mind. If the system uses data randomization to obtain a flat spectrum, the pseudo-random sequence used may be synchronized to the frame structure that restarts at the beginning of each frame.

For RF digital communication systems, the receiver typically must first obtain carrier and symbol flops synchronization and equalization. The receiver can then recover the malfunctioned data. However, in order to understand the data stream being applied, the receiver must synchronize to the frame structure. That is, the receiver must know where the error correction codeword starts and ends. In addition, the receiver modules, such as an inverse interleaver, must be synchronized to match the interleaver operation of the transmitter, so that the resulting deinterleaved bits or bytes must be correctly ordered, and the reverse randomizer uses the pseudo-random Matches the start point of the sequence.

Conventional systems often provide receiver frame synchronization by attaching a known pattern of symbols of fixed length to the beginning and end of a frame. This same pattern is repeated every frame and consists of a two-level (i.e., binary) pseudo-random sequence with the preferred autocorrelation properties. This means that the correlation (side-lobe) is significantly smaller when the offset is not zero while the auto-correlation of the sequence yields a large value at zero offset. In addition, the correlation for this frame synchronization sequence with random symbols will yield a small value. Thus, if the receiver performs correlation of applied symbols with a stored frame sync pattern version, it will yield a large value only at the correct beginning of each frame. The receiver can then easily determine the starting point of each frame.

Example of frame structure

Referring to FIG. 9, the ATSC Digital Television (DTV) terrestrial transmission standard, adopted in 1996, provides a system in which data is transmitted in frames. The frame 90 includes 313 segments, each segment including 832 symbols, including a total of 260,416 symbols per frame. The first four symbols of each segment are the segment sync symbols 92 including the sequence [+5, -5, -5, +5]. The first segment of each frame is a frame sync segment 94 with 312 data segments 96, 98. 10, the frame sync segment 94 includes a segment sync 100, 511 symbol pseudo-random noise (PN511) sequences 101, 63 symbol pseudo-random noise (PN63) 2 PN63 sequence (203), and a third PN63 sequence (104). This is followed by 24 mode symbols 105 indicating that the mode is 8 VSBs. The pre-code symbol 107 and the reserved symbol 106 complete the frame sync segment 94. The segment sync (100) and PN511 (101) symbols are known to the receiver and may be used to obtain frame synchronization via a correlation method. All the above mentioned symbols come from set {+5, -5}. From the last 12 symbol sets {-7 -5 -3 -1 +1 +3 +5 +7} of this segment, and is a copy of the last 12 symbols of the preceding data field. These are referred to as precode symbols (not discussed herein).

11, for each of the following 312 segments of a field, referred to as data segments, 828 symbols 32 following four segment sync symbols 30 take two bits at a time, By trellis encoding with three bits, by matching each unit of three bits to the eight level symbols from the set {-7 -5 -3 -1 +1 +3 +5 +7}, a single Is generated from the 207 byte (1656 bit) Reed-Solomon (RS) code-word of.

Another example of framing in digital communication systems is shown in the ISDB-T system. Unlike the single-carrier ATSC system, ISDB-T uses orthogonal frequency division multiplexing {COFDM; coded orthogonal frequency division multiplexing. For example, mode 1 for ISDB-T uses 1,404 carriers. The frame can be thought of as a combination of 1,404 independent QAM symbols, each of which consists of 204 COFDM symbols, one for each carrier. As a result, the frame is composed of 204 x 1040 = 286,416 QAM symbols. Of these, 254,592 are data, 31,824 include pilot information (which can be used for frame synchronization), and mode information distributed through a frame in a known pattern.

A simplified example of such a frame configuration is shown in Fig. It can be seen that the pilot and mode information is distributed over the frame in a known pattern. The system has a mode using three different QAM constellation-QPSK, 16 QAM, and 64 QAM. In addition, the system supports five different lattice coding rates {1/2, 2/3, 3/4, 5/6, 7/8} based on a single punctured mother code. This known technique is fairly economical to construct a single Viterbi decoder in a receiver that is easily tuned and capable of decoding all five of a particular code.

Prior to lattice coding at the transmitter, the data is formed of 204 bytes (1,632 bits) long RS blocks. The number of COFDM symbols per frame is always constant, and the number of RS blocks per frame varies with the selected mode, but most importantly, the number is always a constant. This facilitates RS block synchronization at the receiver if frame synchronization is established and the lattice code rate is known. The number of data bits per frame before lattice coding should be evenly distributed to 1.632 for all modes so that this is the case.

Table 1 shows the number of data bits per frame for all modes (combination of QAM constellation and lattice code rate). In all cases, the number of data bits per frame is evenly distributed to 1632 (the data bits mean bits prior to lattice coding).

Data bits per frame for ISDB-T mode Data bits / frame (before lattice coding) Beat / frame after lattice coding 1/2 2/3 3/4 5/6 7/8 QPSK 254592 336456 381888 424320 445536 509184 16 QAM 509184 678912 763776 848640 891372 1318368 64 QAM 763776 1318368 1145664 1272960 1336608 1527552

A particular embodiment of the present invention provides a frame structure for a modulation system used in a digital communication system. In particular, a signaling system and method are provided that can be used in a security system, including those described above. A convolution byte interleaver interleaves a frame of data, an interleaver is synchronized to a frame structure, and a randomizer is configured to generate a randomized data frame from the interleaved data frame. In one example, the punctured lattice code modulator is operated at a selectable code rate that produces a lattice-coded data frame from the randomized data frame. A QAM matcher matches a bit group of a lattice-coded data frame to a modulation symbol thereby providing a matched frame, which adds a synchronization packet to the matched frame. The punctured lattice code modulator may be bypassed as desired to obtain an optimized net bit rate under various white noise conditions, thereby permitting performance optimization of the system.

In a particular embodiment, a new frame structure is provided in a single carrier communication system. Auto-correlation of a known pattern of fixed length symbols at the beginning and end of a frame at an offset of 0 yields a large value and the correlation value (side-lobe), if the offset is not zero, Is very small. However, the correlation for this frame synchronization sequence with random symbols yields a small value. Thus, in order to obtain a large value at the correct start of each frame that causes the receiver to determine the starting point of each frame, the receiver may perform correlation of the symbols applied to the stored version of the frame sync pattern. The communication system may operate in any of a plurality of modes and may use various combinations of symbol constellation diagrams, lattice codes, and interleaved patterns. The receiver must recognize and understand the mode to successfully recover the transmitted data. For this purpose, additional mode symbols may be added to the frame sync pattern. These mode symbols can be reliably received using a correlation method because the mode symbols are repeatedly transmitted every frame. Reliable reception can be more prominent by encoding the mode symbols using block codes.

The frame structure according to certain aspects of the present invention uses a perforated lattice coding and a QAM constellation combination similar to those used in ISDB-T. The number of symbols per frame may be a mode-dependent variable integer, and the number of RS packets per frame is a constant constant independent of mode. This structure simplifies the design of receivers that process blocks such as reverse randomizer and de-interleaver, since the number of RS packets per frame is always fixed. In conventional systems such as ISDB-T, the number of symbols per frame is constant, and the number of RS packets per frame is a mode dependent variable. The frame will be described with reference to the example shown in Fig. 13 of the transmitter structure constructed in accordance with certain aspects of the present invention.

RS encoder 1300 obtains an externally generated frame synchronization signal indicating the start of each group of byte data 1301 and 315 Reed-Solomon packets 1322. [ As shown in FIG. 14, each packet 140 includes 207 bytes, 20 of which are parity bytes 142. These 315 Reed-Solomon packets form a forward error correction ("FEC") data frame 1322 that contains 65,205 bytes.

The convolutional byte interleaver 1302 is as follows. Fig. 15 shows the mode of operation of the interleaver 1302 to combat impulse noise affecting the transmitted signal. The parameter B of paths 156 and 158 is set to 207 and the parameter M of paths 152,154, 156, and 158 is set to one. The frame sync signal 1303 forces the input and output commutators 150 and 151 to the top position 1500 and thereby synchronizes the interleaving with the frame structure. Input and output commutators 150 and 151 move down to one location 1502 when a byte is applied to the interleaver and a different byte leaves the interleaver. When the commutators 150 and 151 reach the bottom 1508, the commutators 150 and 151 move back to the top 1500 again. Each of the B parallel paths 1506 and 1508 includes a shift register 156 and 158 having the length shown in Figure 15 (path 1506 has a length of (B-2) M, (B-1) M.

Randomizer 1306 is configured on 65,205 x 8 = 521,640 bits of FEC data frame 1324 with a 209-1 length PN sequence that is shortened by resetting the PN (pseudo-random noise) By performing an exclusive or operation on the FEC data frame 1324 to generate a randomized FEC data frame 1328 by operating on 65,205 x 8 = 521,640 bits of the FEC data frame 1324.

An example of a selectable code rate punctured trellis coded modulation (PTCM) module 1308 is shown in detail in Figure 16. The PTCM 1308 uses methods known to those skilled in the art. State 1/2 rate coder and begins puncturing to obtain any one of the five different code rates. [0064] [0075] In addition, in certain embodiments, the PTCM 1308 may be completely bypassed (code rate = 1) This allows for a selectable tradeoff between the white noise performance and the net bit rate for the system. A similar lattice coding technique is used in the ISDB-T and DVB-T systems. The QAM matcher 1313 generates a coder output 1332. The QAM matcher 1313 generates two bits 1332 at the output of the coder output 1332. However, 13, and 1332, respectively, and matched to QPSK, 16 QAM, or 64 QAM symbols, respectively. An example of such a match is provided in FIG.

Module 1312 adds a frame-synchronous / mode symbol packet (all symbols are QPSK) to the beginning of each FEC data frame 1334. Referring to FIG. 18, a first portion 180 of this packet includes 127 symbols and includes an identified binary PN sequence for both the real and imaginary parts of the symbol. Other PN sequence lengths are possible, and the real and imaginary parts can have opposite signs. The second portion 182 of the packet includes data indicative of the transmission mode-the selected QAM constellation and the selected grid code rate. This mode data may be encoded using a block error correction code for added reliability at the receiver. Methods that may be used include BCH coding and other block codes. In one example, six possible lattice code rates are possible, including a bypass. There are also three constellations that derive 18 modes. Thus, five bits are needed to represent each possible mode selection. The five bits may be encoded in a 16-bit code word using an extended BCH code. Since each QPSK symbol includes two bits, eight mode symbols may be required.

Figure 19 shows the frame structure 1336 (see Figure 13) provided in passband modulation ("PB Mod"). The payload 190 includes 315 RS packets (521, 640 bits). The number of QAM symbols to which 315 RS packets are matched may be changed according to the mode selection. The PB Mod module 1314 then modulates the baseband QAM symbol into the passband using any suitable method known to those skilled in the art.

The frame structure according to certain aspects of the present invention advantageously overcomes certain drawbacks and failures of conventional frames. In particular, the frame structure may be used for all modes;

- constant integer RS packets per frame, regardless of mode, and

The number of QAM symbols per frame is a variable integer for all modes.

- integer of perforation pattern period per frame for all modes

Lt; / RTI > Providing an integer QAM symbol per frame is a minor outcome since an FEC data frame must have exactly Ix 207 data bytes, where I is an integer chosen to have a fixed integer number of RS packets per frame. Thus, the number of data bits per frame prior to lattice coding must not only be an integer, but must also be distributed evenly to 207 x 8 = 1656 for all modes. In addition, the number of lattice coder output bits per QAM symbol is 2, 4, and 6 bits for QPSK, 16 QAM, and 64 QAM, respectively (see Table 2 for code rate = 1 for lattice code bypass) . In addition, the lattice coding adds bits. The number of data bits per symbol prior to lattice coding is shown in Table 2, where each entry is calculated as follows.

(Rightmost column entry-code rate)

The data bits per symbol (input bits to the trellis coder per matched QAM symbol) Constellation map Lattice code rate 1/2 2/3 3/4 5/6 7/8 One QPSK 1.00 4/3 1.50 5/3 1.75 2.00 16 QAM 2.00 8/3 3.00 13/3 3.50 4.00 64 QAM 3.00 4.00 4.50 5.00 5.25 6.00

The number of data bits per symbol is a fractional requirement, and the number of RS packet sizes per frame and the number of RS packets are accurately selected. With a 315 packets per frame and an RS packet size of 207, a still number of symbols per frame is obtained. As shown in Table 3, each entry is calculated as follows.

(Number of data bits per frame / number of data bits per symbol = 521640 / entry from Table 2)

Symbols per frame Constellation map Lattice code rate 1/2 2/3 3/4 5/6 7/8 One QPSK 521640 391230 347760 312984 298080 260820 16 QAM 260820 195615 173880 156492 149040 130410 64 QAM 173880 130410 115920 104328 99360 86940

This frame provides an additional benefit of having a perforation pattern (pp / frame) period of integral number per frame for all modes. To decode punctured lattice coded data, the decoder of the receiver must know how the puncturing pattern is aligned with the data. The bit-wise puncturing pattern applied to the output of the mother code appears in the second column of the table of FIG. The number of ones in each puncturing pattern is the puncturing pattern length. In the proposed system, the puncturing pattern is always line up at the beginning of the FEC data frame. This allows the use of frame synchronization in the receiver, so that the bit-stream decoder properly aligns the de-puncturers. A preferred alignment is shown in Table 4, which shows the cal- culation of pp / frame for all modes. The puncturing pattern per symbol ("pp / symbol") entry is calculated as follows.

(# of grid-coder output per pp / symbol)

pp / frame entry;

Symbol per frame from Table 3 / (pp / symbol)

Perforated pattern per frame code
Rate pp
Length QPSK
(Two bits / symbol) 16QAM
(4 bits / symbol) pp / symbol pp / frame pp / symbol pp / frame pp / symbol pp / frame 1/2 2 One 521640 2 521640 3 521640 2/3 3 2/3 260820 4/3 260820 2 260820 3/4 4 1/2 173880 One 173880 3/2 173880 5/6 5 1/3 134328 2/3 134328 One 134328 7/8 8 1/4 74520 1/2 74520 3/4 74520 One NA NA NA NA NA NA NA

Other combinations of number of packets per frame and RS packet size may be used to achieve the same desired result. The numbers provided herein are disclosed for purposes of illustration only.

및

(2019)를 형성한다. 프레임 동기 모듈 (2000)은 이진 프레임-동기 PN 시퀀스의 저장된 복사본으로, 실수부 및 허수부 모두에 대해 별개로, 인가하는 슬라이스된 QAM 심볼 (2019)상에서 연속적인 상호-상관 (cross-correlation)동작을 수행한다. 저장된 복사본의 각각의 수는 -1 또는 +1의 값을 가진다. 이 동작은,As shown in FIG. 20, a particular embodiment of the present invention provides a receiver configured to handle frames constructed in accordance with certain aspects of the present invention. The module 2000 receives the data transmitted in the passband signal and converts it to a baseband QAM symbol. The operations performed by module 2000 may typically include symbol clock synchronization, equalization (to remove intermediate-symbol interference), and carrier recovery using sub-modules. Thus, the module 2000 may include an equalizer that outputs the recovered baseband QAM symbol 2001. The baseband QAM signals 2001 are provided to a two-level slicer 2018 that slices both in the real direction and the imaginary direction so that the sequence provided to the frame-

And

(2019). The frame synchronization module 2000 is a stored copy of the binary frame-synchronized PN sequence, which performs a continuous cross-correlation operation on the sliced QAM symbol 2019 that applies separately for both the real and imaginary parts . Each number of stored copies has a value of -1 or +1. In this operation,

Lt; / RTI >

Where s is a copy stored in 127 long frame-synchronized PN sequences. b The maximum amplitude of the _R or _I b represents the start of a FEC data frames.

If the frame sync start position is located, the position of the codewords including the mode bits (congestion degree and lattice code rate) is known. The codeword can be reliably decoded, for example, by a BCH decoder, or by selecting a codeword that correlates the received codeword with all possible codewords and yields the best result. Since this information is repeatedly transmitted, additional reliability can be obtained by requiring that the same result occur a plurality of times before the result is accepted.

This derived frame-sync signal 2021 is used to indicate which symbol will be removed in the "removed frame-sync / mode symbol" module 2004 before the symbol is supplied to the soft- do. In one example, 127 frame-sync symbols and 8 mode symbols are removed from the stream to ensure that only the symbols corresponding to the RS packets are delivered to the soft de-matcher 2006. The soft de-matcher 2006 computes a soft bit matrix using algorithms known in the art including, for example, the algorithms described by Akay and Tosato. For correct operation, soft de-matcher 2006 needs to know which puncturing pattern (which lattice code) was used in the transmitter and the alignment of the pattern with the received bits. This information 2021 is provided by a frame-synchronizing module 2020 that provides a repetitive frame synchronizing signal in which puncturing patterns are aligned, regardless of the current mode, and decodes the mode information. These soft bit matrices operate in a manner known in the art and are supplied to a Viterbi decoder 2008 that reaches an estimate of the bits that were input to the transmitter's PTCM encoder.

The de-randomizer 2013, the byte de-interleaver 2014 and the RS decoder 2016 are both synchronized by the frame-synchronizing signal 2021 and each de-randomize, de-interleave, To obtain data originally authorized to the RS encoder of the transmitter.

Carrier phase offset correlation

A particular embodiment of the present invention uses a carrier phase offset correction system and method. In a particular embodiment, the receiver includes a phase offset corrector that receives an equalized signal representing a quadrature amplitude modulated signal and derives a phase-corrected signal from the equalized signal, a processor that slices the equalized signal to obtain real and imaginary sequences A frame synchronizer that performs correlation between a 2-level slicer, a real and imaginary sequence and a corresponding portion of a stored frame-synchronized pseudo-random sequence, and a phase correction signal provided by a frame synchronizer to a phase offset corrector. Phase correction signal correlation is based on the maximum real and imaginary values of the phase correction signal correlation. The frame synchronizer performs successive cross-correlation on the applied sliced quadrature amplitude modulated symbols. Continuous cross-correlation is performed separately for the real and imaginary sequences as a stored copy of the binary frame-synchronous pseudo-random noise sequence.

From the baseband Passband  Modulation

Certain wireless digital communication systems, including broadcast, wireless LAN, and wide area mobile systems, use some form of QAM. QAM also enables two dual-side-band suppressed-carrier modulated waves to occupy the same channel bandwidth, and each wave is modulated by independent messages in North America and Europe using spherical- They are all used in digital cable television standards. As described above, FIG. 23 shows a simple QAM modulator that may act as the PB mode (mod) 1314 in the example of FIG. The isolated transmitted QAM pulses,

Lt; / RTI >

Where d _{R , m,} and d _{I , m} are determined by two independent streams and represent the real and imaginary parts of a complex QAM symbol (e.g., see FIG. 17), where m = 1 ... M Denotes the two-dimensional QAM constellation of the radix, where M is the modulated carrier frequency and q (t) is the root raised cosine pulse function.

에 의해 주어지며, 여기서 *는 컨벌루션 (convolution)을 나타내며, c(t)는 채널 임펄스 응답이고, υ(t)는 부가적인 화이트 가우시안 잡음이다. 그 결과, Continuous series of the transmitted QAM pulse s (t) is transmitted through a multipath channel noise at a rate of F _s = 1 / T _S. As a result, the received signal at the input to the QAM receiver

, Where * denotes the convolution, c (t) is the channel impulse response, and v (t) is the additive white Gaussian noise. As a result,

, Where, d frequency of [n] are complex, and the transmitted symbol, f _0, and θ ₀ is f _L0 = f _c of the demodulator local oscillator to baseband in the receiver pass band with respect to the transmitter so that -f _0, respectively, and Phase offset.

In the passband  The baseband demodulator

24A shows the monitor side announcement band to baseband QAM demodulator 222 (Fig. 22) in more detail. The signal r (t) may be received from the coaxial cable and may result in a sampled signal r (nT _samp ), e.g., sampled at a rate higher than the symbol rate (see 240). Since the following salpling:

Thereafter, after demodulation, resampling at symbol rate 1 / Ts, and matched filtering,

는 샘플링된 복소 필터링된 잡음이다. 완전한 심볼 레이트 샘플 타이밍과 결합된, 펄스 형상화 및 정합된 필터링 q로 인해, 임의의

는 채널 임펄스 응답 c 만으로 인한 것임을 가정한다. 복조 이후, 완전한 균등화를 가정하는 경우, 균등화기 출력에서의 근처 기저대역 복소 시퀀스 z[k]는,here

Is the sampled complex filtered noise. Due to the pulse shaping and matched filtering q combined with the full symbol rate sample timing,

Lt; / RTI > is due only to the channel impulse response c. Assuming perfect equalization after demodulation, the near baseband complex sequence z [k] at the equalizer output is given by:

Lt; / RTI >

As a result, the recovered near baseband sequence represents the transmitted constellation with the rotation of the phase offset θ _0, the frequency f _0. In order to reliably recover the transmitted d _R and d _I , the use of an equalizer, a two-dimensional slicer combined with, for example, a phase and frequency offset recovery loop, should remove the frequency offset f ₀ that rotates the constellation, The remaining static phase offset θ _0, which may place the constellation in the static rotation position, should be removed.

To understand the phase / frequency recovery, the QAM constellation in the baseband should be understood. In the simple example of FIG. 33A, the QAM modulation known as QPSK consists of four symbols. In the example shown, the real and imaginary parts of d [k] can each take two different values (equal to 占). The effect of the phase offset [theta] ₀ on the recovered d [k] is shown in Figure 33b, which shows the rotation in the complex plane. Effect of f ₀ It is understood by recognizing the call ships with time in a counter-clockwise direction or counterclockwise direction by rotation depends on the sign of f _0.

Equalizer and carrier phase / frequency loop

의 위상 회전된 버전과 비교하여, 업데이트된 필터 탭 가중치 세트를 계산하는데 사용되는 에러 신호를 생성한다. 이 필터는 채널 임펄스 응답 c에 의해 유발된

를 제거한다.34, signal x [k] 340 is received by digital equalizer and carrier phase / frequency loop 248 (e.g., see FIG. 24A) dp. The equalizer 341 component typically includes a linear digital filter and the equalizer 341 multiplies the output y [k] of the equalizer 341 by a known or proprietary method, such as a least mean square (LMS) Determine slicer

And generates an error signal that is used to calculate the updated set of filter tap weights. This filter is a filter that is generated by the channel impulse response c

.

를 출력한다. z[k] 및

모두 위상 에러 검출 모듈 (346)으로 인가하여

에 의해 주어진 위상 에러 신호를 형성한다. 적분-비례 ("IP") 필터 (345)는 도 35의 필터 또는 당업자에 공지된 임의의 균등물을 포함할 수 있다. IP 필터 (345)는 루프가 이상 및 주파수 오프셋을 보정하도록 승인한다. IP 필터 (345)의 출력은 θ₀ 및 f₀ 모두를 보정하는 복수 위상/주파수 보정 성분

을 출력하는 복소 전압 제어된 발진기 (VCO) (344)에 공급된다. 또한, VCO (344)는 슬라이스 출력

을 "보정하지 않는"

를 출력하여,

는 균등화기 탭 업데이트에 대한 에러 신호를 도출하는데 사용될 수 있다.The 2-D slicer 342 independently slices the real and imaginary parts of z [k] to produce an estimate of the originally transmitted d [k]

. z [k] and

All are applied to the phase error detection module 346

Lt; RTI ID = 0.0 > a < / RTI > The integral-proportional ("IP") filter 345 may comprise the filter of FIG. 35 or any equivalent known to those skilled in the art. The IP filter 345 allows the loop to correct for anomalies and frequency offsets. The output of the IP filter 345 is a plurality-phase / frequency correction component for correcting all θ ₀ and f ₀

Controlled oscillator (VCO) 344 that outputs a voltage-controlled oscillator. In addition, the VCO 344 outputs a slice output

Quot; non-compensated "

Respectively,

May be used to derive an error signal for the equalizer tap update.

This approach appears because the equalizer operates on x [k] including both θ ₀ and f ₀ .

로서 수신된다. 따라서, 위상 복구 루프는 신호를 회전시켜 θ₀를 보상함으로써,

은 a로 라인업된다. 그러나, 2-D 슬라이서 (162)의 결정은, b가

에 더 근접하기 때문에 보정 심볼은 b라는 것이 될 것이다. 이는 위상 복구 루프가, 성좌도를 회전시켜

가 b로 라인업되는 방법으로 수렴하게 할 수 있다. 이 경우 최종 위상은 있어야 할 곳으로부터 오프셋 -π/2 이다. In a particular embodiment, efficiency can be achieved by implementing a discrete VCO 344 due to the delay of one integrator being fed into a complex-index look-up table (LUT). However, a final correction to? ₀ may have an ambiguous? / 2 meaning that the recovered phase can be accurate (offset = 0),? / 2, offset?, Or offset 3? / 4. These results are shown in FIG. 35 and FIG. 37, and the actually transmitted symbols are shown in FIG. 36 and possible recovered symbols with respective offsets are shown in FIGS. 37A and 37D. Typically, because the 2-D slicer 342 performs the nearest neighbors operation, the receiver can not know which of the four possible symbols was actually transmitted. 38 shows that the transmitted symbol a is < RTI ID = 0.0 ># _{0 &lt}; / RTI &

As shown in FIG. Thus, the phase recovery loop rotates the signal to compensate for &thetas; ₀ ,

The line up is a. However, the decision of the 2-D slicer 162 is that b is

Lt; RTI ID = 0.0 > b < / RTI > This causes the phase recovery loop to rotate the constellation

Can be converged in such a way as to line up with b. In this case, the final phase is offset -π / 2 from where it should be.

및

를 형성하는 2-D 레벨 슬라이서 (342)에 의해 실수 방향 및 허수 방향 모두로 슬라이스된다. 프레임 동기 모듈 (2020)은 이진 프레임-동기 PN 시퀀스의 저장된 복사본으로, 실수부 및 허수부 모두에 대해 개별적으로, 인가되는 슬라이스된 QAM 심볼상에서 연속적인 상호-상관 동작을 수행한다. 저장된 복사본의 각각의 멤버는 -1 또는 +1의 값을 가진다. 이 동작은 구체화될 수도 있어 결과는,Certain embodiments of the present invention provide a method for eliminating and / or minimizing this problem in a lattice-coded system, including a group of perforated lattice codes used in some of the presently disclosed embodiments. As described above, the output of the equalizer is supplied to the frame-synchronizing module 2020 (see FIG. 20)

And

Level slicers 342 that form the 2-D level slice. The frame synchronization module 2020 is a stored copy of the binary frame-synchronized PN sequence and performs successive mutual-correlation operations on the applied sliced QAM symbols separately for both real and imaginary parts. Each member of the stored copy has a value of -1 or +1. This action may be materialized,

to be.

Where s is a stored copy of 127 long frame-synchronized PN sequences. b The maximum amplitude of the _R or _I b represents the start of a FEC data frames.

Sign of maximum b _R The sign of maximum b _I Required phase compensation + + 0 - + + pi / 2 - - + pi + - -π / 2

가 주어지는 경우, 이 동작은, For frame sync symbols, the real and imaginary parts have the same sign and the real and imaginary part constructions are shown in FIG. As a result, the sign of the maximum amplitude b _R or b _I is positive for a rotation of zero. for a rotation of π, and both b and _R b _I is negative, for the rotation of π / 2, and the maximum amplitude _R b is positive, the maximum amplitude _I b is negative. This is summarized in Table 5 above. As a result, the signs of the maximum amplitudes b _R and b _I , in combination, represent the quadrants of the complex plane where the final phase offset converges. This allows additional phase correction to be applied to the signal as shown in Fig. The sign of the maximum b _R and b _I is transmitted from the correlation-based frame-synchronous module to the phase offset corrector. The operation of the phase offset corrector module, in which the LUT operation 404 is shown as an example, is shown in FIG.

If this is the case,

1. For φ = + θ

2. For φ = + π / 2

3. For φ = -π / 2

As shown in FIG.

40 is a block diagram representation of a phase offset corrector that derives a phase-corrected signal by indexing the LUT with sign of the maximum real and imaginary values of the correlation according to certain aspects of the present invention.

multiple- mode QAM  Constellation detection

를 최소화하기 위해 표준 CMA 로 재시작한다. 균등화기 출력은 정확하게 스케일링될 수 있으며, 이 단계 이후 감소된 성좌도 반송파 복구 (RCCR; reduced constellation carrier recovery) 및 반송파 복구에 대한 결정이 수행되어, 결합된 균등화기 반송파 주파수/위상 루프에 의해 반송파 주파수 및 위상을 복구한다. 미공지 QAM 성좌도를 결정하는 또 다른 방법에서, 균등화기는 초기에, 수정된 CMA 를 사용하여

를 최소화한다. 균등화기 출력이 프로세스 주 이 포인트에서 정확히 스케일링되지 않을 수도 있지만, 균등화기 반송파 주파수/위상 루프는 성좌도를 알지 못하면서 RCCR을 사용하여 반송파 주파수 및 위상을 복구한다. 복구된 위상은 잡음일 수 있다. 수신기는 QAM 성좌도가 전송되고 있는 신호 프레임에 내장된 정보를 판독할 수도 있다. 그 후 균등화기 동작은 미공지 성좌도에 기반하여 표준 CMA로 재시작하며, 반송파 복구에 대한 RCCR 및 결정이 후속한다. A particular embodiment provides a system and method for determining an unknown QAM constellation from a set of possible received QAM constellations. One method is after the inter-symbol-interference (ISI) is minimized to a modified constant modulus algorithm (CMA) equalizer, but before the carrier frequency and phase are completely recovered, Is used. Thereafter, the unconfigured constellation diagram is determined from the histogram. The equalization processor is based on uncharted constellations

Restart to standard CMA to minimize. The equalizer output can be accurately scaled and a decision on reduced constellation carrier recovery (RCCR) and carrier recovery after this step is performed to determine the carrier frequency and phase by the combined equalizer carrier frequency / Restore the phase. In yet another method for determining the unrecognized QAM constellation, the equalizer is initially used with a modified CMA

. The equalizer carrier frequency / phase loop uses RCCR to recover the carrier frequency and phase without knowing the constellation, although the equalizer output may not be precisely scaled at the process mains point. The recovered phase may be noise. The receiver may read information embedded in the signal frame in which the QAM constellation diagram is being transmitted. The equalizer operation then restarts to the standard CMA based on the unacknowledged constellation, followed by RCCR and decision for carrier recovery.

Certain embodiments of the present invention employ a perforated lattice coding and a QAM constellation combination similar to those used in ISDB-T described above. As used herein, a constellation is understood to mean a match in the complex plane of a possible symbol in a modulation method. The number of symbols per frame is a mode-dependent variable integer, and the number of RS packets per frame is a constant constant independent of mode. This configuration is described in more detail above and simplifies the design of the receiver.

Referring back to FIG. 20, the frame synchronization module 2020 is a stored copy of the frame-synchronized PN sequence to which it applies, and for each of the real and imaginary parts, on a sliced QAM symbol 1219, - Perform a correlation operation. Each member of the stored copy has a value of -1 or +1. This operation given by equation (10) is repeated here.

Where s is a copy stored in 127 long frame-synchronized PN sequences. b The maximum amplitude of the _R or _I b represents the start of a FEC data frames.

As will be explained in more detail below, there is ambiguity of pi / 2 in the recovered carrier phase. This results in any additional recovered phase offset of 0, 占 π / 2, or π. For the frame synchronous symbol, the real part and the imaginary part have the same sign, and the constellation diagram transmitted for the frame synchronous symbol is as shown in FIG. As a result, for a phase offset of 0, the sign of the maximum amplitudes b _R and b _I are both positive. 40, the -π / 2 offset yields a negative maximum amplitude b _R and a positive maximum amplitude b _I , and for an offset of pi, b _R and b _I will both be negative, and π / For an offset of 2, the maximum amplitude b _R would be positive and the maximum amplitude b _I would be negative. As a result, the signs of the maximum amplitudes b _R and b _I , in combination, represent the quadrants of the complex plane where the final phase offset converges. This acknowledges the additional phase correction to be applied to the signal of the phase offset correlation module 2002. The sign of the maximum b _R and b _I may be transmitted from the correlation-based frame-sync module 2020 to the phase offset corrector 2002.

가 주어지는 경우, 동작 (402)는, Referring to FIG. 40, the operation of certain aspects of the phase offset corrector 2002 of the example of FIG. 20 can be better understood. The LUT 400 generates an output based on the sign of the maximum amplitudes b _R and b _I (see component 404 of FIG. 40).

The operation 402 may be performed in any order,

1) For φ = + π

2) For φ = + π / 2

3) For φ = -π / 2

As shown in FIG.

Where the frame sync start position is located and the m [pi] / 2 phase offset is corrected, the location of the codeword including the mode bits (constellation and lattice code rate) is known. The codeword can be reliably decoded, for example, by a BCH decoder, or by selecting a codeword that correlates the received codeword with all possible codewords and yields the best result. Since this information is repeatedly transmitted, additional reliability can be obtained by requiring that the same result occur a plurality of times before accepting the result.

Fig. 41 shows an example of a process that can be performed by the frame synchronization module 2020. Fig. In response to the frame-sync signal 2021, in step 4100, the received constellation codewords are cross-correlated with all valid codewords. The cross-correlation yields a value that can be used to select the best match. In one example, a valid codeword for generating a maximum correlation value is selected in step 4102. [ This selected codeword can be used to identify the current constellation diagram. At step 4104, the identity of the current constellation is compared to the identity of the previously identified constellation diagram that has been recorded or stored. In step 4104, if the current constellation diagram and the previously identified constellation diagram are the same constellation diagram, the confidence counter may be increased. If it is determined in step 4104 that the previously identified constellation diagram is different from the current constellation diagram, the current constellation diagram is recorded as the previously identified constellation diagram in step 4107, the reliability counter is decremented in step 4107, Waiting. Following step 4106, which is an increase in the reliability counter, a determination of the signal constellation diagram may be made at step 4110 if the reliability counter is tested at step 4108 and determined to exceed a predetermined or configured threshold. The repetition of this process may be performed until the reliability counter exceeds a predetermined or configured threshold.

Equalizer and carrier phase / frequency loop

를 제거한다. 균등화기 (420)의 출력 y[k]는 임의의 나머지 반송파 위상 및 주파수 오프셋을 감소시키기 위해 (421)에서 위상 회전된다. 위상 회전된 출력 z[k]은 적분-비례 (IP) 필터 (426)에 공급되는 위상 에러 값 e_θ[k]을 계산하는 위상 에러 검출기 모듈 (427) 및 슬라이서에 의해 처리된다. IP 필터 (426) 출력은 반송파 위상 및 주파수 오프셋을 보정하기 위해 루프에서 사용된 복소 지수 값을 계산하는 복수 지수 LUT (424) 및 적분기로 공급된다. 슬라이서 및 위상 에러 검출 모듈 (427)은 그 위상이

로 곱셈에 의해 "보정되지 않으며" 에러 계산기 모듈 (422)에서 사용되는 가장 근접한 이웃 2-차원 슬라이스된 심볼 결정을 출력한다. 에러 계산기 모듈 (422)은 이 입력뿐만 아니라 x[k]를 사용하여 에러 신호 e[k]를 계산한다. 도시된 바와 같이, 에러 계산기 모듈 (422) 및 슬라이스 및 위상 에러 검출기 모듈 (427)의 내부 동작은 단계 제어기 (423)에 의해 결정되는 현재 동작 단계 (1, 2, 또는 3)에 의존한다. Referring to Figure 42, a specific embodiment of the equalizer and carrier phase / frequency loop 248 of Figure 24A is described. The signal x [k] is applied to a carrier phase / frequency loop 248 and a digital equalizer, which may include an equalizer 420 including a linear digital filter. The error calculation module 422 calculates an error signal e [k] that may be used to calculate the updated set of filter tap weights using any suitable method known to those skilled in the art. In one example, an LMS algorithm may be used. Lt; RTI ID = 0.0 > impulse < / RTI > response c

. The output y [k] of the equalizer 420 is phase rotated at 421 to reduce any remaining carrier phase and frequency offset. Phase rotated output z [k] is the integration - are processed by a proportional (IP) phase error detector module 427 to calculate the value of the phase error _θ e [k] is supplied to the filter 426 and the slicer. The output of the IP filter 426 is fed to an integrator and a multiple exponent LUT 424 that calculates the complex exponent value used in the loop to correct the carrier phase and frequency offset. The slicer and phase error detection module 427 determines whether the phase

Dimensional sliced symbol determinations that are not "corrected" by multiplication by the multiplier. Error calculator module 422 computes the error signal e [k] using this input as well as x [k]. As shown, the internal operations of the error calculator module 422 and the slice and phase error detector module 427 depend on the current operational phase 1, 2, or 3 determined by the phase controller 423.

In a particular embodiment, the LMS algorithm is used to calculate an equalizer filter tap weight and operates as follows:

x [k] represents the N number of long equalizer input vector, y [k] denotes the equalizer output vector ^{y [k] = g H [} k] x [k], where, g ^H [k] is N , And the superscript H is the conjugate transposition (Hermitian). Thereafter, the updated e [k] is calculated in the error calculator module 422, for example, using the method described below.

Here, [mu] is a parameter of small step size, and the superscript * represents a conjugate complex number.

The step controller 423 takes the carrier phase / frequency loop 428 and the equalizer through three operating steps so that the switching from step 1 to step 2, step 3, is a simple counting of the input data samples x [k] And is executed based on the threshold value. In addition, more complex step switching is possible based on an estimate of the error at the equalizer output. The three steps are summarized in Table 6.

Equalizer and Carrier Phase / Frequency Loop Phase step e _θ [k] Calculation method e [k] calculation method Frequency / Phase Recovery Phase One CMA Always 0 Constellation Spin 2 CMA Based on Gimsoon Constellation (RCCR) Gradual phase / frequency recovery 3 DD Based on the entire constellation map Phase noise reduction

에 의해 주어진 심볼의 전력 z[k]이 임계값 ξ를 초과하는 경우, z[k]는 성좌도의 코너 심볼 중 하나이며, RCCR 은 도시된 제 2 스위치 (432)를

를 산출하는 상위 위치로 설정함으로써 인에이블된다. 또는,

인 경우, 제 2 스위치 (432)는 반송파 루프를 디스에이블하는 더 낮게 도시된 위치에 있다. 그 결과, 심볼들 중 서브세트만이 단계 2 동안 반송파 복수에 기여할 수 있다. 임계값 ξ성좌도 코너 주변 영역에 더 많은 심볼을 포함하기 위해 감소될 수 있지만, 결과적인 위상 보정 텀 (term) e_θ[k]은 더 잡음이 많을 것이다. 단계 3 동안, 스위치 (430)는

를 산출하는 최저로 도시된 위치에 있으며, 여기서

는 가장 근접한 이웃 2-차원 슬라이스된 심볼 결정

의 켤레 복소수이다. 균등화기 탭들이 수렴하도록 충분한 시간이 흘렀으며, 슬라이드된 심볼 결정이 신뢰할만 하도록 반송파 위상이 실질적으로 보정되었음을 가정한다. 특히, 관계

및

은 단일의 복소 평면 내에서 효율적으로 동작한다. 이는 전술한 바와 같이 복구된 반송파 위상에서 mπ/2의 모호함을 유발한다. The slicer and phase error detector module 427 is shown in greater detail in FIG. The switch 430 is set according to one of three operating steps 434. During phase 1, switch 430 is a _θ e [k] = 0 in the uppermost position. This effectively turns off the carrier loop, so there is no carrier phase during this phase. During step 2, switch 430 is in the middle position and the loop operates using a reduced constellation carrier recovery (RCCR) algorithm.

Z [k] is one of the corner symbols of the constellation diagram, and RCCR represents the second switch 432 shown in the figure if the power z [k] of the symbol given by [

To the upper position at which it is calculated. or,

, The second switch 432 is in the lower shown position which disables the carrier loop. As a result, only a subset of the symbols may contribute to the carrier wave during phase 2. Threshold ξ constellation can be reduced to include more symbols in the area around the corner, but the resulting phase correction term e _θ [k] will be more noisy. During step 3, switch 430

Lt; RTI ID = 0.0 >

Lt; RTI ID = 0.0 > 2 < / RTI >

The conjugate of the complex is. It is assumed that sufficient time has passed for the equalizer taps to converge and that the carrier phase has been substantially calibrated so that the slidged symbol decisions are reliable. In particular,

And

Operate efficiently within a single complex plane. This causes m π / 2 ambiguity in the recovered carrier phase as described above.

)을 출력하는 LUT (444)로 공급되는 위상 에러 신호 θ[k]를 형성하기 위해 입력의 한 단계 지연된 (442) 버전에 모듈로 (modulo) 부가된 2π (440) (도 44 참조) 이다. LUT (444)는 슬라이서 출력

을 "보정하지 않는" 출력 (446) (

)을 제공하여, 출력 (446) (

)은 균등화기 탭 업데이트에 대한 에러 신호를 도출하는데 사용될 수 있다. 이는 균등화기가 θ₀ 및 f₀ 모두를 포함하는 x[k]사에서 동작하기 때문에 필요하다. An example of an IP filter (see FIG. 42) is shown in more detail in FIG. IP filter 426 allows the loop to correct both phase and frequency offsets. The output of the IP filter 426 is supplied to the integrator complex exponent LUT module 424, which is described in more detail in FIG. Input of the integrator / LUT (424) is a phase correction component for correcting all θ ₀ and f ₀ (445) (

440 (see FIG. 44) modulo added to the one-stage delayed (442) version of the input to form the phase error signal? [K] supplied to the LUT 444 outputting the LUT 444 outputting the phase error signal? The LUT 444 includes a slicer output

Uncorrected "output 446 ("

) To provide an output 446 (

May be used to derive an error signal for the equalizer tap update. This is necessary because the equalizer operates in x [k] including both θ ₀ and f ₀ .

Error calculation module and step operation summary

Error calculator 422 may use a different method to calculate e [k] depending on the step. For steps 1 and 2, e [k] is typically CMA;

Based process. Here,

Lt; / RTI >

를 최소화하 것과 균등하다. Where E is the expected operating period and d [k] is the symbol (see FIG. 17). This e [k], which leads to the tab update of Equation 11, is independent of the phase of the symbol decision and x [k] and depends only on the equalizer output, equalizer input, and constellation statistics. During steps 1, 2, and 3, the use of a CMA error to derive equation (11), even if the constellation spins due to carrier frequency and phase offset

Minimizing and equalizing.

를 최소화한다.

가 최소화된 이후, 단계 2 가 시작하여 루프는 RCCR에 대해 턴온되며, 도 43에 관하여 전술한 바와 같이, 반송파 위상/주파수 복구는 성좌도의 코너 심볼만을 사용하여 시작한다. 단계 2의 종료시, 반송파 위상 및 주파수가 성공적으로 복구되어, 도 43의 2-차원 슬라이서 (436)는 신뢰할만한 심볼 결정

을 출력하기 시작한다.As a result, during phase 1, the phase / frequency recovery loop is disabled and the equalizer uses the CMA error function

.

Step 2 begins and the loop is turned on for RCCR, and carrier phase / frequency recovery begins using only the corner symbols of the constellation diagram, as described above with respect to FIG. At the end of step 2, the carrier phase and frequency are successfully recovered and the two-dimensional slicer 436 of FIG.

.

로서 계산될 수도 있다. 이러한 설명의 목적을 위해, R 이 이들 성좌도 각각에 대해 상이하기 때문에, 수신기는 도 17의 3개의 성좌도 중 어느 것이 전송되고 있는지를 결정한 것으로 가정한다. 또한, RCCR은 성좌도의 지식, 특히 성좌도의 코너 심볼의 전력 지식을 요구한다. The determined detected (DD) error may be used in step 3. The DD error

. For purposes of this discussion, it is assumed that the receiver has determined which of the three constellation maps in FIG. 17 is being transmitted, since R is different for each of these constellations. In addition, the RCCR requires knowledge of the constellation map, especially the power knowledge of the corner symbols of the constellation map.

Unknown Constellation  Have CMA

In the example described herein, one of three different constellations may be transmitted, and the above described equalization and phase / frequency recovery requires knowledge of the transmitted constellation diagram. Constellation selection is encoded in the mode symbol and equalization and phase / frequency recovery precedes frame synchronization (see FIG. 20), and this information is directly decoded as described above (see, for example, Figures 28, 20 and 41) . Consequently, in certain embodiments, the constellation diagram is determined within the equalizer and carrier recovery algorithm itself.

R (as provided in Equation 12) is constellation-dependent. 17, the real and imaginary parts of the symbols for 64-QAM are selected from the set ± {1,3,5,7}, and the real and imaginary parts of the symbols for 16-QAM The divisor is selected from the set ± {2,6}, and the real and imaginary parts of the symbol for QPSK are selected from the set ± 4. According to Equation (12), the value of R is < RTI ID = 0.0 &

to be.

에 의해 스케일링된 도일한 값의 세트로 수렴되게 하며, 균등화기는 출력은 유사하게 스케일링된다.

는 그럼에도 불구하고 최소화된다. 성좌도가 미공지된 일 예에서, R은 58로 설정될 수 있으며, 전송된 성좌도에 관계없이,

는 단계 1 동안 최소화될 것이다. 전술한 예에 대해, 범위 32-58 내의 임의의 값 R이 사용될 수 있다. 그러나 최대값 (즉, 58)의 선택은 균등화기 출력에서 초대 밀도의 성좌도 (여기서는 64-QAM)의 압축을 방지하며, 균등화기 성능에 대한 부담을 감소시킨다. For any constellation of the three constellation diagrams in Figure 17, the use of the scaled value [alpha] R for CMA error calculations indicates that the equalizer filter tab

To be converged into a set of odd values scaled by the equalizer, and the equalizer scales the output similarly.

Is nevertheless minimized. In one example where the constellation is not known, R may be set to 58 and, regardless of the transmitted constellation,

Will be minimized during step 1. For the above example, any value R in the range 32-58 may be used. However, the choice of the maximum value (i.e., 58) prevents the compression of the very density constellation (here 64-QAM) at the equalizer output and reduces the burden on equalizer performance.

The use of the scaled CMA parameter R causes a scaling rise of the equalized output by the converged filter taps,

의 제거 및 성좌도와 관계없음을 가정한다. 그 결과, QPSK 에 대해,

가 단계 1 동안 최소화된 이후, 균등화기 출력은 아래와 같이 스케일링될 것이다.And complete

And no relation to the constellation. As a result, for QPSK,

Is minimized during step 1, the equalizer output will be scaled as follows.

를 제거하는 솔루션에 수렴함에 따라, R=58의 값으로 인해 출력은

에 의해 스케일링된다. 도 45b는 θ₀=f₀=0 인 경우에 대해, 16-QAM 를 갖는 시스템에 대한 균등화된 출력의 실수부를 나타낸다.

이 상대적으로 1에 근접하기 때문에, 균등화기 출력의 실수부는 약간 스케일링된 것으로만 보인다. 그 결과, 실제 스케일링은 균등화기 수렴 동안 명백하다. Figure 45a is θ ₀ = f ₀ = 0 for the case, represents the real part of the equalized output of the system with the QPSK. Equalizer

, The value of R = 58 causes the output to be < RTI ID = 0.0 >

Lt; / RTI > Figure 45B shows the real part of the equalized output for a system with 16-QAM, for the case of ₀ = f ₀ = 0.

Is relatively close to 1, the real part of the equalizer output appears to be only slightly scaled. As a result, actual scaling is apparent during equalizer convergence.

How to protect the constellation

의 전력 히스토그램을 고려한다. 히스토그램은 균등화기가 R=58로 수렴된 이후의 전력을 나타낸다. 균등화기의 출력이 위상에 독립적이며, 각각의 성좌도에 대한 히스토그램은 실질적으로 상이하기 때문에, 전송된 성좌도는 균등화기 출력 전력 히스토그램으로부터 수신기에서 결정될 수 있다. In certain embodiments, prior to entering step 2, a histogram may be used to determine the constellation. The constellation can be determined even if the carrier phase and frequency are not yet recovered. 16A, 46B, and 46C for the QPSK, 16-QAM, and 64-QAM constellation diagram, respectively,

Lt; / RTI > The histogram represents the power after the equalizer converges to R = 58. Since the output of the equalizer is phase independent and the histogram for each constellation diagram is substantially different, the transmitted constellation can be determined at the receiver from the equalizer output power histogram.

이다. 16-QAM 성좌도에 해대, 균등화기 출력에 대한 확률 질량 함수는,Without addition or tap noise, the power of each equalizer output sample for the QPSK constellation is

to be. The probability mass function for eigenvalue and equalizer output on the 16-QAM constellation is:

Similarly, the probability mass function for the equalizer output on the 64-QAM constellation is given by:

to be.

및 탭 업데이트 잡음으로 인해, 예를 들어, 실질적인 30dB의 SNR에 대해서도 이들 값 주변에 히스토그램의 일부 확산이 존재한다. 균등화기 출력상의 잡음을 심볼에 부가적이며 독립적으로 모델링시, 출력에는

가 없음을 가정하면,Additional noise on the input signal

And tap update noise, there is some spread of the histogram around these values, for example for a substantial 30 dB SNR. When noise on the equalizer output is modeled additively and independently to the symbol,

Assuming there is no,

항과 관련된 변동은 심볼 전력이 증가함에 따라 증가한다. 히스토그램 형상에서, 이 현상은 증가하는 심볼 전력과 함께 증가하는 주어진 성좌도 전력 주변의 확산, 즉 변동으로 나타난다. 16-QAM 경우, 심볼 ±2.1±j2.1의 성좌도 전력에 대한 확산은 심볼 ±6.3±j6.3의 성좌도 전력에 대한 확산 미만이다.Subject to the conditions of a given symbol,

The variation associated with the term increases as the symbol power increases. In the histogram shape, this phenomenon appears as diffusion, or variation, around a given constellation power that increases with increasing symbol power. For 16-QAM, the spread for the constellation power of the symbol ± 2.1 ± j2.1 is less than the spread for the constellation power of the symbol ± 6.3 ± j6.3.

Certain other relationships can be observed from the histogram of the equalizer output power.

Region T1 of the QPSK histogram substantially falls between R2 and R3, which are the second and third regions of the 16-QAM histogram, respectively. Thus, the area that declares which symbol power was transmitted does not overlap for QPSK and 16-QAM constellation diagrams.

를 나타낸다. 그 결과, 영역 T₁에 대한

의 비교를 위해,

는 영역 T₁의 외부에 있을 가능성이 높다.A comparison of the QPSK histogram for the 64-QAM histogram shows that for 64-QAM

. To that effect, areas T ₁

For comparison,

Is likely to be outside the region T ₁ .

는 9/16의 확률로 세트 {2,18,26,34,58,98}로부터 값을 취한다. 그 결과, 기본적인 성좌도가 64-QAM 인 경우, 잡음을 무시하면,In the absence of 64-QAM example noise,

Takes a value from the set {2, 18, 26, 34, 58, 98} with a probability of 9/16. As a result, if the basic constellation diagram is 64-QAM, ignoring noise,

는 OR 를 나타낸다. 따라서, 전송된 성좌도가 64-QAM 이며

가 영역 R₁, R₂, 및 R₃ 와 비교되는 경우,

는 이들 영역의 외부에 있을 가능성이 높다.here

Indicates an OR. Thus, the transmitted constellation is 64-QAM

Is compared with regions R ₁ , R ₂ , and R ₃ ,

Is likely to be outside these areas.

Certain embodiments use algorithms based on these observations.

이 영역 R₁, R₂, 및 R₃ 내에 있는 경우 증가하며, 그렇지 않은 경우 감소한다. After the equalizer has converged, the algorithm is initialized and, in the first part, increases the QPSK counter [lambda] ₄ [k] if the equalizer output power is in the N equalizer output sample domain T ₁ . If the equalizer output power is not in region T ₁ , the counter decreases. Similarly, the 16-QAM counter lambda ₁₆ [k]

Increases in the regions R ₁ , R ₂ , and R ₃ ; otherwise, decreases.

는 QPSK 및 16-QAM 영역의 외부에 속할 것이다. 전송된 성좌도가 QPSK 또는 16-QAM 인 경우, 전송된 성좌도의 카운터는 상당히 클 것이다.After the N equalizer output samples, the histogram is correctly characterized. If the basic constellation is 64-QAM, the QPSK and 16-QAM counters will be much smaller,

Will belong outside of the QPSK and 16-QAM regions. If the transmitted constellation is QPSK or 16-QAM, the transmitted constellation counter will be quite large.

As a result,

The threshold value M can be experimentally determined, but should be relatively small compared to N. [ The algorithm is extremely intelligent and reliably selects a low signal-to-noise ratio (SNR) when QPSK, 16-QAM, or 64-QAM is transmitted. If the constellation diagram is reliably determined, then R may be set to correct the value of equation (13) and step 1 reaches completion. The equalizer output will be scaled appropriately, and step 2 can be initiated with knowledge of the threshold ξ required for RCCR.

임계값 ξ을 초과하는 경우, 단계 2 RCCR에 대한 키는 심볼들만의 고려사항이다. z[k]는 성좌도의 코너 심볼들 중 하나인 것으로 가정될 수도 있다. 균등하게,

는 코너 심볼을 나타낼 수 있다. 64-QAM 성좌도에 대해 도 48a에서 설명한 바와 같이 성좌도가 공지된 경우 , ξ에 대한 값을 선택하기가 상대적으로 용이하다. 도 48은 반송파 위성/주파수 복구 루프 모듈 입력 및 균등화기 출력에서의 3개의 성좌도를 모두 도시한다. 코너 포인트에 대해

일 수 있다. 예를 들어, 점선원 (484)에 의해 표시된 임계값

은 코너 포인트만이 선택됨을 보장한다. 유사하게, 원 (482)에 의한

및 원 (480)에 의한

은 16-QAM 및 QPSK 각각에 대해 상당한 마진으로 사용될 수 있다.Another method of determining the constellation diagram before the equalizer enters step 3 is described. In this way, step 1 is executed and allowed to complete with R = 58. As a result, as described, all constellations will be scaled at the equalizer output and derive y [k] as shown in the three constellation diagrams of Figure 47, even though these constellations are likely to spin. As discussed with respect to FIG. 43, if the power of the symbol is given by z [k]

If the threshold value ξ is exceeded, the key for the Step 2 RCCR is a consideration of only symbols. z [k] may be assumed to be one of the corner symbols of the constellation diagram. Evenly,

Can represent corner symbols. When a constellation diagram is known as described in FIG. 48A for a 64-QAM constellation diagram, it is relatively easy to select a value for?. Figure 48 shows all three constellations at the carrier satellite / frequency recovery loop module input and equalizer output. About corner point

Lt; / RTI > For example, the threshold value indicated by the dotted circle 484

Ensures that only corner points are selected. Similarly, by the circle 482

And the circle 480

Can be used with a significant margin for each of 16-QAM and QPSK.

인 경우, 점선 외부에 속하는 QPSK 및 16-QAM 대한 코너 포인트만이 RCCR에 의해 사용될 것이다. 그러나 64-QAM 이 수신된 경우, 5개의 성좌도 포인트 (4개의 비-코너)가 원 외부에 속하며, RCCR에 의해 사용될 것이다. 복구된 위상이 덜 잡음이 있기 때문에 코너 성좌도 포인트들이 사용된 경우에만 RCCR은 통상적으로 최상으로 동작한다. 그러나 위상 잡음이 발생할지라도, 일부 부가적인 포인트가 사용되는 경우에도 RCCR은 성공적으로 위상을 복구한다. 따라서, 단계 2는

로 초기에 동작할 수 있어, 모든 3개의 성좌도에 대한 적합한 초기 반송파를 허용하며, 성좌도는 수신기에 미공지로 유지된다.Figure 49 shows a duplicate representation of a quadrant among all three constellations.

, Only the corner points for QPSK and 16-QAM belonging to the outside of the dotted line will be used by RCCR. However, when 64-QAM is received, five constellation points (four non-corners) belong to the outer circle and will be used by the RCCR. The RCCR typically works best only when corner constellation points are used because the recovered phase is less noisy. However, even if phase noise occurs, the RCCR successfully restores the phase even if some additional points are used. Thus, step 2

, Allowing an appropriate initial carrier for all three constellations, and the constellation is kept unreported to the receiver.

20, the equalizer 2000 supplies the 2-level slicer 2018 and the 2-level slicer 2018 in sequence to the frame synchronization module 2020. The 2- The frame synchronization module 2020 may perform a successive mutual-correlation operation on the sign of the applied sliced QAM symbol, with a stored copy of the binary frame-synchronized PN sequence, as described by Equation (10). Continuous cross-correlation operations may be performed separately for both the real part and the imaginary part. Each member of the stored copy has a value of -1 or +1. b The maximum amplitude of the _R or _I b represents the start of a FEC data frames. The only difference here is that for a 64-QAM constellation, the two-level slicer 2018 operates on a signal with some additional phase noise. However, this additional phase noise has a D harmful effect on fairly robust 2-level slicing and subsequent inter-correlation-based frame synchronization even in the presence of phase noise. The decoding of the constellation codeword is fairly robust to phase noise as described above.

Figure 50 illustrates the operation of this another approach for determining a constellation that can be summarized as follows.

(1) The equalizer and the phase / frequency loop complete step 1 with R = 58 and then enter step 2.

(2) Instead of waiting for step 3, correlation-based frame-synchronization 2020 receives the input data during step 2, retrieves the frame sync, and decodes the constellation codeword.

(3) The determined constellation information 2021 is sent back to phase / frequency loop and equalizer 2000 returning to step 2 using an R value that responds appropriately to the determined constellation diagram.

(4) Steps 1, 2, and 3 are completed as before.

The main difference in the system shown in FIGS. 50 and 20 is the additional connection 5000 to equalizer / carrier recovery 2000 conveying the constellation information from frame-synchronizer 2020.

Coax  On the secure link SPOT  Modulation

Certain embodiments of the present invention include a baseband video signal, including the embodiments described above, combined with a digital representation of a baseband video signal and a control signal to enable transmission over a single cable, such as a coaxial cable Thereby improving the performance of the system and the device. 4, an embodiment of the present invention provides a secure link ("SLOC ") system over coax. Figure 5 shows one possible modulation method for the SLOC system. For example, the HD camera 30 provides an IP output 41 comprising a compressed digital HD video 332 and an auxiliary camera signal comprising an analog SD CVBS 330. The compressed HD video IP signal 332 is modulated into the passband 52 using the SLOC camera side modem 49 which includes a QAM modulator (see modulator 212 of modem 32 of FIG. 21). The modulator 212 provides a modulated signal that can be combined with the baseband analog CVBS signal 330. The combined signal is downstream transmitted over the coaxial cable 41 for distances that can typically be extended by more than 300 meters. On the monitor side, the SLOC monitor modem 45 separates the baseband CVBS signal 330 from the passband downstream IP signal 332. The separate CVBS signal 330 is supplied to the SD display 43 for live viewing without delay. Passband downstream IP signal 332 is demodulated into a QAM demodulator (see demodulator 222 in FIG. 22) that outputs a signal to host network switch 44 or a processor / DVR (not shown in FIG. 4).

In one example, upstream communication is provided in accordance with IP protocol requirements. Upstream communication 334 may additionally be used to transmit audio and camera control signals 42 from the monitor side to camera 40. Typically, the bit rate for the upstream signal and the corresponding required bandwidth will be much lower than required for the downstream passband signal. The monitor side SLOC modem 45 includes a QAM modulator (see modulator 224 of FIG. 22) that modulates the IP signal into the upstream passband 44. As shown in FIG. 5, the upstream passband 54 and the downstream passband 52 are located at different spectral positions. On the camera side, the SLOC modem 49 includes a QAM demodulator (see demodulator 214 of the modem of FIG. 21) that receives the upstream signal. This approach provides several advantages over conventional systems and methods, including increased operating range, ease of adoption using existing coax infrastructure, low-latency, real-time video acquisition. 21 and 22 illustrate the SLOC camera side modem 49 of FIG. 4 and the SLOC monitor side modem 45 of FIG. 4 and have been described in detail above.

Figure 51 shows that the filtered tab 519 is provided between the coaxial cable segment 512 and the coaxial cable segment 514 such that the tab 513 and the cable segments 512 and 514 connect the camera- Lt; RTI ID = 0.0 > SLOC < / RTI > system based on the system described in FIG. Typically, the filtered tap 513 is used to extract at least some of the baseband CVBS signal 5100 to the camera-side SD display 5130. Display 5130 may be provided near camera 510 for testing, setup and / or local monitoring. Typically, the filtered tap 513 includes a low pass filter that blocks undesired signals such as modulated digital, IP, and / or control signals that may interfere with the display function 5130. The tap 513 may also include a filter or a switch to block the transmission of signals between the modem 511 and the modem 515. [ For example, a test modem 5131 may be connected via a tap 513 to enable initial setup or repair of the camera-side modem 511, and the display-side modem 515 may interfere with the signal and / May be separated to prevent deterioration. 5, the SLOC camera-side modem 511 typically outputs a low passband QAM signal based on the camera-generated portion of the signal 5102 in addition to the baseband CVBS signal 5100, Side modem 515 outputs a high pass band QAM signal based on the control signal of signal 5170. [ One or more filters may be provided by the tap 513 to prevent unwanted interference visible on the SD display 5130 and / or 516, and to block IP and control signals. Some displays and monitors lack filtering required to block further melted frequency signals (for baseband CVBS signal 5100) in the passband signal.

51B shows that the cable 514 between the camera side and the monitor side is temporarily disconnected from the camera side and the SD display device or the monitor 5130 is directly connected to the SLOC camera side modem 511 via the cable segment 519 , A SLOC system based on the system described in FIG. The test modem 5131 may optionally be connected for test / setup purposes. The SD display device 5130 displays the baseband CVBS signal and provides the ability to monitor video from the camera 510 near the physical location of the camera 510 and reconfiguration of the connection facilitates setup and troubleshooting Lt; / RTI > In Figure 51B, the low passband QAM signal 5102 may cause undesirable visual interference on the SD display 5130 that lacks high frequency filtering.

In the example shown in Figs. 51A and 51, a partial or complete disconnection of the signal between the modem 511 and the modem 515 may occur. Partial disconnection of the signal completely leaves the QAM signal transmission path. However, the reconfiguration of some connections causes the separation of the QAM signal between the camera side modem 511 and the monitor side SLOC modem 515. A specific embodiment of the present invention provides a mechanism for outputting only the CVBS signal when the camera side modem 511 stops transmitting the passband QAM and the connection between the modem 511 and the modem 515 is interrupted. Temporary replacement of the test modem 5131 with respect to the display side modem can be achieved by disconnection between the modem 511 and the modem 515 and establishment of a connection between the modem 511 and the modem 5131, The connection between the modem 511 and the modem 515, and the reconstruction of the connection between the modem 511 and the modem 515. [ Disconnection of the QAM signal may be detected using various functional components of the modem 511. [ Thus, the operation of the SLOC system is described in greater detail below.

SLOC  For the system QAM  Modulation structure

As described above, FIG. 19 shows the frame structure 1336 provided in the passband modulation (PB mode) module 1314 (see FIG. 13). The lattice coding of Fig. 16 adds bits, and the number of data bits per matched QAM symbol before lattice coding is as shown in Table 2. The number of QAM symbols to which 315 RS packets (521640 bits) in FIG. 14 are matched is changed according to the mode selection. As shown in Table 3, a still number of symbols per frame is obtained with 315 packets per frame and 207 RS packet sizes. PB mode module 1314 modulates the baseband QAM symbols in the passband using any conjugated method known to those skilled in the art (see, e.g., the discussion above with respect to FIG. 24).

및

(2019)를 형성한다.As described above, with reference to Fig. 20, the QAM demodulator of Figs. 21 and 22 is further described. The module 2000 receives the data transmitted in the passband signal and converts it to a baseband QAM symbol. The operations performed by module 2000 may typically include symbol clock synchronization, equalization (to remove intermediate-symbol interference), and carrier recovery using sub-modules. Thus, the module 2000 may include an equalizer that outputs the recovered baseband QAM symbol 2001. The baseband QAM signals 2001 are provided to a two-level slicer 2018 that slices both in the real direction and the imaginary direction so that the sequence provided to the frame-

And

(2019).

The frame synchronization module 2020 is a stored copy of the binary frame-synchronized PN sequence and performs successive mutual-correlation operations on the applied sliced QAM symbols separately for both real and imaginary parts. Each member of the stored copy has a value of -1 or +1. This operation is given by Equation (1), and is reproduced here.

{Equation 10}

Where s is a copy stored in 127 long frame-synchronized PN sequences. b The maximum amplitude of the _R or _I b represents the start of a FEC data frames. If this FEC data frame start point is detected in the stream, a frame sync pulse or other synchronization signal is communicated to one or more of the receiver modules.

Figures 52A and 52B show components of a process that can reliably generate a frame sync pulse when a noise signal is received. 52A is a portion of a processor that determines the frame length. The frame length can be changed depending on the selected transmission mode (Table 3). The process starting at step 5200 is repeatedly executed on a symbol, and the symbol counter records the number of symbols between executions that result in a value exceeding a predetermined threshold. In step 5201, a cross-correlation is performed on each arriving symbol, and the symbol counter increases until a predetermined threshold is determined to be exceeded in step 5202. [ The symbol counter is incremented for each symbol until the threshold is exceeded (5203). If the threshold is exceeded in step 5202, the symbol counter is cleared (5204) and the steps of cross-correlation 5205, incrementing symbol counter 5207, and receiving new symbol 5208, Is determined to be exceeded. The intermediate symbol counter is recorded in step 5208, and the symbol counter is reset in step 5209. The steps of cross-correlation 5210, incrementing symbol counter 5212, and receiving new symbol 5213 are repeated until it is determined at step 5211 that the threshold is exceeded. If in step 5214 the symbol counter is equal to the intermediate symbol counter recorded in step 5208, then in step 5215 the frame length is returned as the value of the symbol counter. In the illustrated example, the frame length can be determined after two successive constant counters. However, the same successive required counters may be selected as desired.

FIG. 52B shows a process in which the frame synchronization module 2020 generates precisely timed frame sync pulses even when the received signal is substantially noisy. In addition, the process provides for the acquisition of a new frame synchronization location after a momentary signal interruption has occurred, or after the transmitter transmission mode change has caused a corresponding change in frame_size. The free running counter uses the modulo frame_size operation to count the received symbols, where frame_size was determined by the steps described in connection with Figure 52A. In the result of equation (10), if the cross-correlation exceeds the selected threshold, the symbol counter value will always have the same value. If the value is constant, then the confidence counter is increased to a selected maximum value-for example a maximum of 16, otherwise the confidence counter is reduced towards a minimum value of zero.

As a result, upon receipt of the symbol at step 5250, the cross-correlation is performed at step 5251, and if the result at step 5252 exceeds the threshold, the current maximum value is set to the threshold, Is set to the current value of the counter. In the illustrated example, if the reliability counter is set to 4 or greater (5254) and the current symbol counter indicates a frame synchronization point (5255), then the frame synchronization signal is output in step 5256. Next, at step 5257, the symbol counter is incremented here using modulo 4 addition. Unless the symbol counter is determined to be 0 in step 5270, the next symbol waits in step 5277. If the symbol counter is zero, the current maximum value is reset in step 5271. If, in step 5272, the current maximum point equals the frame synchronization point, then the confidence counter is incremented in step 5273 and the next symbol waits in step 5277, otherwise the confidence counter is decremented in step 5274. In the presently described example, if it is determined in step 5275 that the reliability has fallen down by two, then in step 5276 the frame synchronization point is set to the current maximum point. In any case, the next symbol is queued at step 5277.

In summary, according to the described process, if the reliability counter exceeds a predetermined value - for example, 4, frame synchronization is determined to be obtained reliably. Then, the frame synchronization module can provide a frame synchronization pulse at the cleared and cleared time. If the confidence counter exceeds 4, the frame sync pulse will be output at the correct time - typically at the time corresponding to the beginning of the frame, although noise will often produce a low value in Equation (10).

If the transfer mode is changed, the confidence counter will ultimately return to zero. This can be used to trigger a recalculation of the frame length of the new frame length (e.g., using the process of Figure 52A). There may be an ambiguity of pi / 2 in the recovered carrier phase which may result in a binary additional recovered phase offset of 0, [pi] / 2, or [pi], as described below with respect to carrier recovery. For a frame sync symbol, the real part and the imaginary part have the same sign, and the transmitted constellation is shown in Fig.

As a result, for a phase offset of 0, the sign of the maximum amplitudes b _R and b _I are both positive. As summarized in Table 5, the -π / 2 offset yields a negative maximum amplitude b _R and a positive maximum amplitude b _I , and for an offset of π, both b _R and b _I will be negative and an offset of π / 2 The maximum amplitude b _R will be positive and the maximum amplitude b _I will be negative. As a result, the signs of the maximum amplitudes b _R and b _I , in combination, represent the quadrants of the complex plane where the final phase offset converges. This acknowledges the additional phase correction to be applied to the signal of the phase offset correlation module 2002. The sign of the maximum b _R and b _I may be transmitted from the correlation-based frame-sync module 2020 to the phase offset corrector 2002.

가 주어지는 경우, 동작 (402)는, Referring to FIG. 40, the operation of certain aspects of the phase offset corrector 2002 of the example of FIG. 20 can be better understood. The LUT 400 generates an output based on the sign of the maximum amplitudes b _R and b _I (see Table 5).

The operation 402 may be performed in any order,

1) For φ = + π

2) For φ = + π / 2

3) For φ = -π / 2

As shown in FIG.

Where the frame sync start position is located and the m [pi] / 2 phase offset is corrected, the location of the codeword including the mode bits (constellation and lattice code rate) is known. The codeword can be reliably decoded, for example, by a BCH decoder, or by selecting a codeword that correlates the received codeword with all possible codewords and yields the best result. Since this information is repeatedly transmitted, additional reliability can be obtained by requiring that the same result occur a plurality of times before the result is accepted. Fig. 41 shows an example of a process that can be performed by the frame synchronization module 2020. Fig.

Continuing with the system of FIG. 20, the frame-sync signal 2021 may be used to indicate which symbols are to be removed in the module 2004, before the symbols are supplied to the soft de-matcher 2006. In one example, 127 frame-sync symbols and 8 mode symbols are removed from the stream to ensure that only the symbols corresponding to the RS packets are delivered to the soft de-matcher 2006. The soft de-matcher 2006 computes a soft bit matrix using algorithms known in the art including, for example, the algorithms described by Akay and Tosato. For correct operation, soft de-matcher 2006 needs to know which puncturing pattern (which lattice code) was used in the transmitter and the alignment of the pattern with the received bits. Information 2021 is provided by frame-synchronizing module 2020 that provides a repetitive frame synchronization signal in which the puncturing pattern is aligned and decodes the mode information, regardless of the current mode. These soft bit matrices operate in a manner known in the art and are supplied to a Viterbi decoder 2008 that reaches an estimate of the bits that were input to the transmitter's PTCM encoder. The de-randomizer 2013, the byte de-interleaver 2014 and the RS decoder 2016 are both synchronized by the frame-synchronizing signal 2021 and each de-randomize, de-interleave, To obtain data originally authorized to the RS encoder of the transmitter.

Step switching

Certain embodiments use step-switching based on the mean square error at the output of the equalizer. An accurate estimate of the mean square error (MSE) of the equalizer output may be obtained from the series of errors e [k] computed by the error calculation module 422 of FIG. For example,

Lt; / RTI &gt; Where β <1 is the forgotten factor. Other methods of averaging e [k] are known and can be used. Equation 18 may be compared to a predetermined threshold and may be used by the step control module 423 of FIG. 42 to switch operations from step 1 to step 2 if MSE [k] falls below a threshold Generate possible result values. The result value is compared with a second predetermined threshold to switch the operation from step 2 to step 3 if MSE [k] falls below the second threshold value.

Disconnection and reconnection detection

A particular embodiment provides a system and method for detecting disconnection and reconnection events on the camera side of a communication link. Referring again to Figures 51a and 51b, partial or complete disconnection of signals between the modem 511 and the modem 515 may occur in normal operation. The specific disconnection affects the QAM signal between the camera-side modem 511 and the monitor-side SLOC modem 515. In particular, the signal carrying the image captured by the HD camera 510 is encoded and / or modulated by the modem 511 for transmission over the cable 514 to the display side modem 515. A plurality of methods for detecting disconnection and reconnection events associated with the coax 514 may be performed by the camera side SLOC modem 511. In response to a disconnection or reconnection event, the modem 511 may stop, start, or restart the downstream passband QAM transmission. In some embodiments, a "coax connected" signal sent from the QAM demodulator 530 to the QAM modulator may be used to control transmission for a connection-related event.

53, camera side QAM modulator 530 transmits a downstream passband signal 533 only when coax connected signal 531 is asserted by camera side QAM modulator 532, for example, . The camera side QAM demodulator 532 may use the Viterbi method to determine the presence of the input signal 534 transmitted by the monitor side QAM modulator (not shown). Typically, when reception of the input signal 534 is reliably acknowledged, coherent signal 531 is received by camera-side QAM demodulator 532 when constellation identification is confirmed, and / .

A method of detecting the presence of an input signal 534 includes a method based on an automatic gain control (AGC) loop. As found in communication receivers that include a QAM demodulator, the AGC is used to control the signal level at various stages and points of the receiver. One example showing an AGC loop 540 added to the receiver front end of FIG. 24 is shown in FIG. In the AGC loop 540, the amplitude of the complex signal is determined at 541 and subtracted at 541 from a predetermined reference level 543. The result is filtered by a low pass filter (LPF) 544 to suppress noise and short term changes. The LPF 544 provides an output that is provided to an accumulator that includes an adder 545 and a delay component 546. [ The accumulator output is used as the gain control signal 547, which is fed back to the gain block 548 at system input 549. In one example, the gain control signal 547 is used as a multiplier or gain component to determine the gain provided by the gain block 548 so that the gain provided by the gain block 548 is increased as the gain control 547 increases And increases within a predetermined limit. If the input 549 is disconnected (e. G., When coax is disconnected) the output of the amplitude block 541 tends to be significantly lower. Typically, the coax connected signal 531 may be asserted only if the amplitude block output exceeds a predetermined threshold. Also, the gain control signal 547 is typically quite high when the input 549 is disconnected. As a result, the coax connected signal 531 may be asserted only if the gain control signal is below a predetermined threshold. AGC loop 540 may be used to monitor the connection state of input 549 only if a loop is found elsewhere in QAM demodulator 532. [

The method of detecting the presence of the input signal 534 is based on the carrier phase / frequency rope phase and equalizer shown in FIG. 43 (see equation 18). In particular, the QAM modulator stage controller 434 of the QAM demodulator 532 may assert a coax connected signal 531 when switching to stage 2 based on the result of Equation 18 (at the beginning of stage 1) . the transition from step 1 to step 2 occurs only if coax is connected and QAM demodulator 532 is actively receiving the upstream signal from the monitor side QAM modulator. The subsequent disconnection of coax will lead to a loss of signal, an increase in the MSE calculated by equation 18, and a return to step 1. coax connected signal 531 may be reset or asserted if QAM beat 532 is in phase one. In some embodiments, the camera side QAM demodulator 532 may be required to have step 3 obtained prior to claiming the coax connected signal 531.

Another way of detecting the presence of the input signal 534 is based on the demodulator frame synchronization reliability counter discussed with respect to Figure 52b. In particular, the ocax connected signal 531 may be asserted by the camera side QAM demodulator 532 only if the reliability counter registers a value greater than a predetermined threshold. In one example, the threshold may be 4. Thus, the coax connected signal 531 will only be asserted if coax is connected and the monitor modem is sending the SLOC frame to the camera. If the frame synchronization process continues freehand, even if the symbol is not being received, the disconnection will cause the reliability counter to return and eventually drop below 4, and the coax connected signal 531 will be reverse claimed.

Another way to detect the presence of an input signal 534 is based on a higher layer protocol. Referring again to Figure 51A, the HD camera 30 and the monitor host system 38 may communicate using a networking protocol. For the purposes of this discussion, the Ubiquitous Internet Protocol (IP) can be used as an example of a networking protocol. Some IP modes are essentially two-way, thus allowing data to be transmitted both upstream and downstream. When the cable is disconnected, the network controller or processor of the HD camera 30 and / or the modem 32 recognizes that there is no return IP packet arriving from the monitor side and sends the camera SLOC modem 32). In one example, such a notification may include transmitting a particular predetermined data packet from the HD camera 30 to the modem 32 via the MII interface 536 shown in FIG. 53, for example.

Additional descriptions of certain aspects of the present invention

The foregoing description of the present invention is intended to be illustrative, not limiting. For example, those skilled in the art will appreciate that the present invention may be practiced with various combinations of the functionality and capabilities described above and may include fewer or more components than those described above. Certain additional aspects and features of the present invention may be obtained using the functionality and components described in greater detail above, as will be appreciated by those skilled in the art after being further illustrated and described below by the teachings of the present disclosure.

Certain embodiments of the present invention provide systems and methods related to cameras. These embodiments include a processor that receives an image signal from an image sensor and generates a plurality of video signals representing the image signal, and an encoder that couples the baseband video signal and the digital video signal as an output signal for transmission over the cable . In some of these embodiments, the video signal comprises a baseband video signal and a digital video signal. The baseband and digital video signals may be substantially isochronous. In some of these embodiments, the camera is a closed circuit high definition television camera. In some of these embodiments, the baseband video signal includes a standard analog video signal. In some of these embodiments, the digital video signal is modulated prior to combining with the baseband video signal. In some of these embodiments, the digital video signal includes compressed digital video. In some of these embodiments, the digital video signal is a high definition digital video signal. In some of these embodiments, the frame rate of the digital video signal is less than the frame rate of the image signal. In some of these embodiments, the modulated digital signal is provided to a video recorder.

In some of these embodiments, the decoder is configured to demodulate the upstream signal received from the cable. In some of these embodiments, the demodulated upstream signal includes a control signal. In some of these embodiments, the control signal includes a signal that controls the position and orientation of the camera. In some of these embodiments, the control signal includes a baseband video signal by the processor and a signal that controls the generation of the digital video signal. In some of these embodiments, the control signal includes a signal that selects some of the image signals for encoding as a baseband video signal. In some of these embodiments, the control signal comprises a signal that selects some of the image signals for encoding as a digital video signal. In some of these embodiments, the demodulated upstream signal includes an audio signal driving the audio output of the camera.

Certain embodiments of the present invention provide systems and methods for transmitting video images. Some of these embodiments include frequency division multiplexing a video signal received from a high definition imaging device to obtain a modulated digital signal, generating an output signal by combining the modulated digital signal with a baseband analog signal representing the video signal , And transmitting the output signal to the display system and the digital video capture and / or storage device simultaneously. In some of these embodiments, the display system displays an image derived from a baseband analog representation of the video signal. In some of these embodiments, the digital video storage unit records the sequence of high definition frames extracted from the modulated digital signal using a digital video recorder.

Some of these embodiments include compressing the video signal. In some of these embodiments, frequency division multiplexing the digital video signal includes compressing the video signal prior to modulation. In some of these embodiments, transmitting the output signal includes providing an output signal to the coaxial cable. Some of these embodiments include demodulating the input signal received from the coaxial cable to obtain a control signal. Some of these embodiments include generating a baseband analog signal by encoding a portion of the video signal in a composite video signal. Some of these embodiments include selecting a portion of the video signal to be encoded, in a composite video signal, using a control signal. Some of these embodiments include controlling the position of the camera using control signals. In some of these embodiments, demodulating the input signal includes extracting the audio signal from the input signal.

Certain embodiments of the present invention provide a system and method for operating a camera. Some of these embodiments include a processor that receives an image signal from an image sensor and generates a plurality of video signals, control logic configured to respond to the control signal received by the camera, and a controller configured to modulate the digital video signal as a modulated signal Modulator. In some of these embodiments, the plurality of video signals includes a baseband video signal and a digital video signal. In some of these embodiments, each of the plurality of video signals represents at least a portion of the camera's field of view. In some of these embodiments, the control signal controls the content of the digital video signal and the baseband. In some of these embodiments, the modulated signal and the baseband video signal are simultaneously transmitted by the camera.

In some of these embodiments, the baseband and digital video signals are substantially isochronous. Some of these embodiments include encoders that combine the baseband video signal with the modulated signal as an output signal for transmission over a cable. In some of these embodiments, the control signal is received as a radio signal. In some of these embodiments, the modulated signal is transmitted wirelessly. In some of these embodiments, the digital video signal is a high definition digital video signal. In some of these embodiments, the digital video signal comprises a compressed digital video signal. In some of these embodiments, the control signal moves some of the field of view exhibited by one of the video signals.

Some of these embodiments provide equalizers for use with digital signals and baseband analog signals that are separated by frequency and delivered by cable. Some of these embodiments include a digital equalizer that removes distortion from the digital signal received at the receiver. Some of these embodiments include an analog equalizer that compensates for the attenuation of the analog signal caused by the cable. In some of these embodiments, the analog equalizer applies one of the sets of baseband analog filters to compensate for attenuation. In some of these embodiments, the applied baseband analog filter is selected based on an estimate computed by a digital equalizer of the difference in attenuation at different frequencies.

In some of these embodiments, digital and analog signals are transmitted between a transmitter and a receiver embedded in the camera, and the receiver provides an equalized signal indicative of an analog signal to the monitor. In some of these embodiments, the cable includes a coaxial cable. In some of these embodiments, the distortion increases with cable length. In some of these embodiments, the distortion includes multipath. In some of these embodiments, the estimate of the attenuation is calculated from a frequency band having a power spectral density whose slope is approximately linear. In some of these embodiments, the slope is calculated using Fast Fourier Transform for a plurality of filter taps. In some of these embodiments, frequency bins in the frequency band are selected to allow calculation of the frequency response of the filter of the digital equalizer using summing.

Where G [k] is the DFT of the time domain converged equalizer filter tap and k ₁ and k ₂ correspond to the specific frequency bin of the DFT. In some of these embodiments, the digital signal includes a high-definition representation of the video image captured by the camera, and the analog signal includes a standard representation of the video image.

A particular embodiment of the invention provides a method of equalizing an analog signal in a cable carrying a separated digital signal from an analog signal by frequency. In some of these embodiments, the method is performed by a modem that receives analog and digital signals and outputs a baseband video signal. Some of these embodiments include calculating the slope in a digital signal. In some of these embodiments, the slope characterizes the attenuation as a function of the frequency that can contribute to the cable. Some of these embodiments include equalizing the digital signal based on the calculated slope. Some of these embodiments include configuring an analog equalizer by using a calculated slope to select one of the sets of baseband analog filters. Some of these embodiments equalize the analog signal using a selected baseband analog filter.

In some of these embodiments, the analog signal comprises a baseband video signal and the digital signal comprises a high definition version of the baseband video signal. In some of these embodiments, the cable includes a coaxial cable, the tilt varying with the length of the cable. In some of these embodiments, the slope is derived from multi-path distortion. In some of these embodiments, calculating the slope includes estimating the attenuation in a frequency band having a power spectral density whose slope is approximately linear. In some of these embodiments, estimating the attenuation includes using Fast Fourier Transform for a plurality of filter taps. In some of these embodiments, estimating the attenuation includes selecting a frequency bin within the frequency band. In some of these embodiments, the selected frequency bin optimizes the efficiency of the step of calculating the slope.

A particular embodiment of the invention provides a digital communication system using a new frame structure. Some of these embodiments include a convolutional byte interleaver that interleaves the frames of data, and the interleaver is synchronized to the frame structure. Some of these embodiments include a randomizer configured to generate a randomized data frame from an interleaved data frame. Some of these embodiments include a perforated lattice code modulator operated at a selectable code rate that produces a lattice-coded data frame from a randomized data frame. Some of these embodiments include a QAM matcher that matches a bit group of a lattice-coded data frame with a modulation symbol to produce a matched frame. Some of these embodiments include a synchronizer that adds a synchronization packet to the matched frame.

In some of these embodiments, the perforated lattice code modulator is bypassed to obtain an optimized net bit rate based on the measured white noise performance of the system. In some of these embodiments, the same synchronization packet is added to each subsequent sequence of matched frames. In some of these embodiments, the same synchronization packet is added to each matched frame. In some of these embodiments, a portion of the synchronization packet includes 127 symbols. In some of these embodiments, some of the synchronization packets include different binary sequences for the real and imaginary parts of the modulation symbols. In some of these embodiments, a portion of the synchronization packet includes the same binary sequence for both the real part and the imaginary part of the modulation symbol. In some of these embodiments, the synchronization packet includes data indicating a transmission mode for the matched frame. In some of these embodiments, the indication of the transmission mode includes the selected QAM constellation diagram and the selected grid code rate. In some of these embodiments, the system generates a certain number of Reed-Solomon packets for each data frame regardless of the transmission mode. In some of these embodiments, the system generates modulation symbols of variable constants for each data frame, regardless of the transmission mode. In some of these embodiments, the system generates a regular number of puncturing pattern periods for each data frame, regardless of the transmission mode.

A particular embodiment of the present invention provides a framing method for a variable net bit rate digital communication system. Some of these embodiments include providing a different set of quadrature amplitude modulation (QAM) constellation diagrams. In some of these embodiments, generating a data packet frame using a punctured grating code combination, wherein each combination corresponds to an associated mode. Some of these embodiments include providing a frame with a variable-sine number of QAM symbols. In some of these embodiments, the number of QAM symbols corresponds to the selected mode. In some of these embodiments, the number of relevant bytes and Reed-Solomon packets per frame is a constant. In some of these embodiments, generating a frame of data packets using a punctured lattice code combination includes generating a periodicity puncturing pattern period per data frame regardless of the associated mode. In some of these embodiments, the number of data bits per QAM symbol for one or more modes is a fraction. In some of these embodiments, the number of lattice coder perforation pattern periods per frame is an integer for all modes.

A specific example of the present invention provides a system for correcting a phase offset. Some of these embodiments include a phase offset corrector that receives an equalized signal representing a quadrature amplitude modulated signal and derives a phase-corrected signal from the equalized signal. Some of these embodiments include a two-level slicer that slices the equalized signal to obtain real and imaginary sequences. Some of these embodiments include a frame synchronizer that performs correlation of real and imaginary sequences with corresponding portions of a stored frame-synchronized pseudo-random sequence. Some of these embodiments include a phase correction signal provided by a frame synchronizer to a phase offset corrector. In some of these embodiments, the phase correction signal is based on the maximum real and imaginary values of the correlation. In some of these embodiments, the frame synchronizer performs persistent cross-correlation on the applied sliced quadrature amplitude modulated symbols. In some of these embodiments, persistent cross-correlation is performed separately for the real and imaginary sequences as a stored copy of the binary frame-synchronous pseudo-random noise sequence. In some of these embodiments, the quadrature amplitude modulated signal is modulated using a punctured grating code. In some of these embodiments, the quadrature amplitude modulated signal is modulated using quadrature phase shift keying modulation. In some of these embodiments, the QAM signal is modulated using 16-QAM. In some of these embodiments, the QAM is modulated using 64-QAM. In some of these embodiments, the frame sync symbols of the quadrature amplitude modulated signal have the same sign, and the sign of the maximum real and imaginary values of the correlation represents the phase rotation in the equalized signal. In some of these embodiments, the phase correction signal provided by frame synchronization includes the sign of the maximum real and imaginary values of the correlation. The phase offset corrector derives the phase-corrected signal by indexing the LUT with the sign of the maximum real and imaginary values of the correlation to determine the phase correction value.

A particular embodiment of the present invention provides a method of correcting a carrier phase offset of a quadrature amplitude modulated signal at a receiver. Some of these embodiments include equalizing the signal. Some of these embodiments include slicing the equalized signal, thereby obtaining real and imaginary sequences from the equalized signal. Some of these embodiments include identifying a frame synchronization sequence of real and imaginary sequences. In some of these embodiments, identifying the frame synchronization sequence includes correlating the stored pseudo-random sequence with real and imaginary sequences. In some of these embodiments, identifying the frame synchronization sequence includes determining the start of the frame from the maximum correlation value associated with the real and imaginary sequences. Some of these embodiments include correcting the phase error of the equalized signal based on the maximum correlation value.

In some of these embodiments, the correlating step comprises performing persistent cross-correlation of a series of sliced quadrature amplitude modulated symbols with stored copies of the binary frame-synchronous pseudorandom noise sequence. In some of these embodiments, the correlating step includes separately performing persistent cross-correlation on stored copies of the frame synchronization sequence with real and imaginary sequences. In some of these embodiments, the frame sync symbols of the frame sync sequence have the same sign. In some of these embodiments, correcting the phase error includes determining the phase rotation of the equalized signal based on the sign of the maximum correlation value. In some of these embodiments, correcting the phase error of the equalized signal involves indexing the LUT with the sign of the real and imaginary maximum correlation values.

A particular embodiment of the present invention provides a method for correcting a carrier phase offset of a quadrature amplitude modulated signal. In some of these embodiments, the method may be implemented in a system comprising one or more processors configured to execute instructions. Some of these embodiments include executing instructions configured to equalize signals on one or more processors. Some of these embodiments include executing instructions on one or more processors configured to slice the equalized signal, thereby obtaining real and imaginary sequences from the equalized signal. Some of these embodiments include executing instructions on one or more processors configured to identify a frame synchronization sequence of real and imaginary sequences. In some of these embodiments, identifying the frame synchronization sequence involves performing persistent cross-correlation on the stored copies of the frame synchronization sequence in real and imaginary sequences. In some of these embodiments, identifying the frame synchronization sequence includes determining the start of the frame from the maximum correlation value associated with the real and imaginary sequences. In some of these embodiments, the method includes executing on the one or more processors instructions configured to correct phase errors of the equalized signal based on the maximum correlation value. In some of these embodiments, the frame sync symbols of the frame sync sequence have the same sign. In some of these embodiments, correcting the phase error includes determining the phase rotation of the equalized signal based on the sign of the maximum correlation value.

A particular embodiment of the invention provides a method of identifying a constellation of symbols. In some of these embodiments, the method is performed by one or more processors of a multi-mode quadrature amplitude modulated communication system. Some of these embodiments include executing instructions that cause one or more processors to characterize the power distribution of the signal. In some of these embodiments, the power distribution statistically tracks the occurrence of the detected power level in the signal. Some of these embodiments include executing instructions that cause one or more processors to determine one or more peak occurrences of a power level within a power distribution. Some of these embodiments include executing instructions that cause one or more processors to determine a constellation based on a distribution of peak occurrences.

In some of these embodiments, the one or more processors determine a constellation diagram based on the spread of one or more peak occurrences. In some of these embodiments, the signal is an equalized signal and the one or more processors determine the constellation diagram by testing a plurality of sections of the histogram of the power distribution. In some of these embodiments, each section corresponds to a range of power levels associated with one rather than all of the plurality of constellation candidates. In some of these embodiments, the plurality of constellation candidates include a quadrature phase shift key constellation diagram and a QAM constellation diagram. In some of these embodiments, the plurality of constellation candidates includes a 16-QAM and a 64-QAM constellation. In some of these embodiments, the plurality of constellation candidates includes a 256-QAM constellation.

Some of these embodiments include executing instructions that cause one or more processors to establish confidence in the identified constellation diagram by performing steps for each succession of constellation determinations. In some of these embodiments, this step includes increasing the counter if the continual determination confirms the identity of the constellation. In some of these embodiments, this step includes decrementing the counter if successive determinations identify a different constellation. In some of these embodiments, this step includes providing a measure of reliability based on the value of the counter.

In some of these embodiments, a counter is provided for each of the plurality of constellation candidates, and the constellation diagram is identified when the corresponding counter of the constellation diagram exceeds a threshold value. In some of these embodiments, the peak generation of the power level corresponds to a corner symbol of the constellation diagram. In some of these embodiments, the constellation is identified before the signal is equalized.

A particular embodiment of the present invention provides a method for identifying a constellation of symbols in a multi-mode quadrature amplitude modulated communication system. In some of these embodiments, the method is performed by a processor of a modem of a communication system. In some of these embodiments, the processor includes executing instructions to cause the modem to extract mode information from a data frame in response to detecting the beginning of a received data frame. Some of these embodiments include executing a command that causes the processor to determine a current constellation map by selecting a code that most closely matches the corresponding code of the mode bits from a plurality of potential constellation codes. Some of these embodiments include executing a command that causes the processor to increase the confidence metric associated with the previously identified constellation when the current constellation map matches the previously determined constellation diagram. Some of these embodiments include executing a command to cause the processor to record the current constellation diagram as a previously identified constellation diagram and to reduce the confidence metric if the current constellation diagram is different from the previously identified constellation diagram. Some of these embodiments include repeating the steps of the processor extracting the mode information, determining the current constellation, and adjusting the confidence metric for the subsequent data frame until the confidence metric exceeds a predetermined threshold do. In some of these embodiments, the constellation diagram is identified when the constellation metric exceeds a predetermined threshold.

In some of these embodiments, selecting a constellation code includes causing the processor to perform cross-correlation of each of the plurality of potential constellation codes with corresponding code bits. In some of these embodiments, the constellation diagram is identified in the equalized signal carrying a data frame and a subsequent data frame. In some of these embodiments, the constellation is identified while the processor is recovering the carrier from the signal. Some of these embodiments include executing a command that causes the processor to compute the error signal using a constant coefficient algorithm that converges the equalizer filter taps to allow equalization of the signal. In some of these embodiments, the error signal is calculated using the scaled CMA parameters to improve the equalization performance. In some of these embodiments, performing equalization of the signal includes analyzing the histogram of the power of the equalized signal. In some of these embodiments, analyzing the histogram involves using a probability mass function. In some of these embodiments, performing equalization of the signal includes executing a command that causes the processor to calculate power associated with a plurality of symbols of the equalized signal. In some of these embodiments, performing an equalization of the signal includes executing a command that causes the processor to identify a corner symbol of the constellation diagram by using a threshold power level. In some of these embodiments, the threshold power level represents the identity of the constellation.

A particular embodiment of the present invention is a method and apparatus for receiving two signals representing a sequence of images captured by a camera from a video, respectively, transmitting one of the two signals as a composite passband video signal, And a camera-side modem configured to modulate and transmit as a non-overlapping passband video signal. In some of these embodiments, the camera-side modem includes a mixer that combines the baseband and passband video signals to provide a transmission signal. In some of these embodiments, the camera-side modem includes a diplexer configured to transmit a transmission signal over a communication line and to extract a passband signal received from the transmission line. In some of these embodiments, the camera-side modem includes a detector that monitors the camera-side modem and generates an enable signal if the received passband signal is identified. In some of these embodiments, the enable signal controls the transmission of at least one of the baseband video signal and the passband video signal.

In some of these embodiments, the passband video signal is transmitted only when an enable signal is generated. In some of these embodiments, the received passband signal is quadrature amplitude modulated. In some of these embodiments, the detector monitors an estimate of the mean square error in the quadrature amplitude modulator, and the enable signal is generated if the estimate exceeds the threshold. In some of these embodiments, the detector monitors the constellation detector. In some of these embodiments, the enable signal is generated based on a measurement of the reliability provided by the constellation detector. In some of these embodiments, the measurement of reliability is based on a sequence of frame synchronization. In some of these embodiments, the detector monitors an estimate of the mean squared error of the equalizer. In some of these embodiments, the enable signal is generated when the estimate exceeds the threshold. In some of these embodiments, the detector detects the gain component of the automatic gain control module of the camera-side modem. In some of these embodiments, the enable signal is generated when the gain component has a value below the threshold. In some of these embodiments, the detector monitors the amplitude of the received passband signal. In some of these embodiments, the enable signal is generated when the amplitude has a value that exceeds the threshold value. In some of these embodiments, the received passband signal includes data encoded according to the Internet protocol.

Certain embodiments of the present invention provide a method for controlling signals in a security system. Some of these embodiments include detecting the presence of an upstream QAM signal in a composite signal transmitted over a coaxial cable in an upstream modem. Some of these embodiments include allowing the umbilical modem to transmit a composite baseband video signal and a passband video signal over a coaxial cable if it is determined that an upstream QAM signal is present. In some of these embodiments, the composite baseband video signal and the passband video signal are a simultaneous representation of a sequence of images captured by a video camera. Some of these embodiments include allowing an upstream modem to transmit a synthesized baseband video signal over a coaxial cable and preventing transmission of a passband video signal if an upstream QAM signal is determined to be absent.

In some of these embodiments, the upstream QAM signal is determined to be present if the gain value of the automatic gain control signal exceeds a threshold value. In some of these embodiments, the upstream QAM signal is determined to be present if the estimate of the amplitude of the upstream QAM signal is below a threshold. In some of these embodiments, the upstream QAM signal is determined to be absent if the estimate of the mean square error of the equalizer exceeds the threshold. In some of these embodiments, the upstream QAM signal is determined to be absent if the Internet protocol data packet is identified in the upstream QAM signal.

Certain embodiments of the present invention provide a system that can be automatically configured to transmit video signals. Some of these embodiments include an upstream modem configured to receive two signals from a video camera. In some of these embodiments, each signal represents a sequence of images captured by the camera. In some of these embodiments, the upstream modem is configured to transmit one of the two signals as a composite baseband video signal and to modulate and transmit the other signal as a passband video signal that does not overlap the baseband signal. Some of these embodiments include a downstream modem configured to receive a composite baseband video signal and a passband video signal from an upstream modem and to transmit an upstream passband signal to the upstream modem. In some of these embodiments, the upstream modem stops transmission of at least one of the two signals when the upstream modem detects degradation in the upstream passband signal.

While the present invention has been described with reference to certain exemplary embodiments, it will be apparent to those skilled in the art that various changes and modifications can be made without departing from the broader spirit and scope of the invention. For example, a system has been described that simultaneously provides compressed digital HD video with a baseband analog video signal. Yet another embodiment of the present invention provides simultaneous standard digital and analog supplies. Another embodiment provides full frame rate digital HD video analog with baseband analog video. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a restrictive sense.

Claims (16)

CLAIMS What is claimed is: 1. A system for use in a digital signal and a baseband analog signal separated by frequency and transmitted by a cable,
A digital equalizer that removes distortion from the digital signal received at the receiver; And
And an analog equalizer for compensating for attenuation of the analog signal by the cable,
Wherein the analog equalizer compensates for the attenuation by applying one of a set of baseband analog filters wherein the applied baseband analog filter is selected based on an estimate computed by the digital equalizer of the difference in attenuation at different frequencies,
Wherein the distortion comprises multipath distortion,
Wherein the estimate of the difference in the attenuation comprises an estimate calculated from a frequency band having a power spectral density whose tilt is linear,
Wherein the slope characterizes attenuation as a function of the frequency contributing to the cable,
The frequency bins in the frequency band are summed:

Is used to approve the calculation of the frequency response of the filter of the digital equalizer,
Where G [k] is a discrete Fourier transform (DFT) of a time-domain converged equalizer filter tap, and k ₁ corresponds to a particular frequency bin of the DFT. The method according to claim 1,
Wherein the digital signal and the analog signal are transmitted between a receiver and a transmitter embedded in the camera, the receiver providing an equalized signal representative of the analog signal to a monitor. 3. The method of claim 2,
Wherein the cable comprises a coaxial cable. The method of claim 3,
Wherein the distortion increases with the length of the cable. delete delete The method according to claim 1,
Wherein the slope is calculated using a fast Fourier transform for a plurality of filter taps. delete The method according to claim 1,
Wherein the digital signal comprises a high definition representation of a video image captured by a camera and wherein the analog signal comprises a standard definition representation of the video image. CLAIMS What is claimed is: 1. A method of equalizing an analog signal in a cable carrying a digital signal separated from an analog signal by a frequency, the method being performed by a modem receiving the analog signal and the digital signal and outputting a baseband video signal, The method comprises:
Calculating a slope in the digital signal, the slope characterized by an attenuation as a function of the frequency contributing to the cable; calculating the slope;
Equalizing the digital signal based on the calculated slope;
Constructing an analog equalizer by using the calculated slope to select one of a set of baseband analog filters; And
And equalizing the analog signal using the selected baseband analog filter,
Wherein the step of calculating the slope includes estimating an attenuation in a frequency band having a power spectral density whose slope is linear,
Wherein estimating the attenuation comprises selecting frequency bins within the frequency band, wherein the selected frequency bins optimize the efficiency of the step of calculating the slope,
The frequency bins in the frequency band are summed:

Is used to accept the calculation of the frequency response of the filter,
Where G [k] is a discrete Fourier transform (DFT) of a time-domain converged equalizer filter tap and k ₁ corresponds to a particular frequency bin of the DFT. 11. The method of claim 10,
Wherein the analog signal comprises a baseband video signal and the digital signal comprising a high definition version of the baseband video signal. 12. The method of claim 11,
Wherein the cable comprises a coaxial cable, the slope varying with the length of the cable. 13. The method of claim 12,
Wherein the slope is derived from multi-path distortions. delete 11. The method of claim 10,
Wherein estimating the attenuation comprises using fast Fourier transform for a plurality of filter taps. delete

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