TW201110096A - Pixel array - Google Patents
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- TW201110096A TW201110096A TW98130282A TW98130282A TW201110096A TW 201110096 A TW201110096 A TW 201110096A TW 98130282 A TW98130282 A TW 98130282A TW 98130282 A TW98130282 A TW 98130282A TW 201110096 A TW201110096 A TW 201110096A
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201110096 2009-I-P-D-010TW 31967twf.doc/n 六、發明說明: 【發明所屬之技術領域】 本發明是有關於一種晝素陣列’且特別是有關於一種 改善饋通效應(feed through effect)的#素陣列。 【先前技術】 隨著光電與半導體技術的演進,所以帶動了顯示面板 之蓬勃發展。在諸多顯示面板中,液晶顯示面板(Liquid Crystal Display panel, LCD panel)近來已被廣泛地使用, 並取代陰極射線管顯示面板(Cathode Ray Tube,CRT )成 為下一代顯示面板的主流之一。 圖1A繪示一種傳統液晶顯示面板之晝素陣列的等效 電路圖。請參照圖1A,晝素陣列1〇〇包括多條彼此平行的 掃描線GLM、GL,、GL,_+1、…、多條彼此平行的資料線 DL以及與掃描線GL;·」、%、GL/+i、和資料線dl耦接 的多個畫素結構110,其中每一晝素結構11〇包括一 電晶體U〇T以及一晝素單元110P。其中每_佥夸L _、 11=包含與晝素電極相連的電容,有接至下 線= :電極線的存儲電容Cst,’接至上板共用電極的液 水上迷,掃描線GL^ DL彼此相交,並定義出陣列'· · ·以及資料線 -薄膜電曰㈣列的晝素結構11G,其中每 掃描線以㈣極以及—源極分顺接至對廣的 ㈣線以及對應㈣料線,祕_至對應的晝素電=的 201110096 2009-I-P-D-01 〇TW 31967twf.d〇c/n 更詳細地說,第/列晝素红 閘極耦接至第/條掃插構110中的薄膜電晶體ι1〇τ的 構110與對應之掃描^认GL,,如此類推其餘列之畫素結 -圖1B為根據圖1A中叙^關係。 晝素結構翁示的驅動淚,接至第/條掃描線的其中一個 第Η条掃描線GLi•致ft ^圖。請參照圖出’於位期間’ 高準位,且資料線/隸時掃描電壓吨的電壓準位為 電晶體110T而值、Ί斤傳运的資料電壓Vdata’可透過薄膜 中,並進行充電二作對應由的晝素單元11〇1>内的畫素Γ 的書音帝 由圖1B可知,對應的晝素電極 的;厂丨Vpixel,所繪示’其中晝素電壓波形Vpixe1’ 的電S準位即為圖1A中節點犯的準位。 士隨後ta期間結束的瞬間,掃描線沉,停止致能,此 =晝素結構110中之閘極_祕寄生電容c如的存在,使 知晝素電i vpixel’受到掃描電壓SGi的下降緣的影響而隨 之下降一饋通電壓thr〇ugh⑹如肛)。一般稱 此現象稱為饋通效應(feed也⑺吨匕e任ect),其會使畫素 電壓Vpixei’發生偏離資料電壓vdata,的情形。 然而’饋通效應會導致液晶顯示面板產生閃爍 (flicker)等不良晝面。此外,當液晶顯示面板的尺寸越 大時’不同晝素單元的饋通效應不盡相同,而使顯示畫面 不均勻的情形變得嚴重,如此晝面閃爍的現象便更難以解 決 【發明内容】 201110096 2009-I-P-D-010TW 3I967twf.doc/n 本發明提供-種畫素陣列,其可降低饋通現象,進而 使顯示晝面的閃爍現象獲得大幅度的改善。 次本發明提出-種晝素陣列,其包括多條掃描線、多條 貝料線,及與掃描線和資料線輕接且陣列排列的多個晝素 、、:口構母晝素結構包括一開關元件、一畫素單元、— 償電容以及:二極體。在第ζ·列畫素結構中的每一晝素結 開關①件的控制端以及—第—端分別祕第Ζ·條婦 Ϊ以及其中—條#料線,晝素單元__元件的一第 二端而補&電容輕接晝素單元,且二極體的陽極端以及 去極端分別g接補償電容以及第㈣)條掃描線。 ☆在本發明之-實施例中,每一晝素單元包括一液晶電 ^。液^電容的—端_開關元件的第二端以及補償電 2而”另—端_—共用電壓。在一實施例中,第 j結構巾的每—晝料元更包括—儲存電容 的第一償電容,“ 體,二體之 晶體的閘極耦接。 ,、/、溥膠電 在本發明之一實施例中,當第 掃描線_的二極體導通, 與第中’當第㈣條掃描線禁能時, )令娜線她的二極體關,補償電容電壓準饭 201110096 zuuy-i-t>-D-〇l〇TW 31967twf.doc/n 維持不變。 在本發明之-實施例中,每一晝素單元包括1 極,其中晝素電極祕開關元件的第二端以及補償電二二 在一實施例t,當耦接第(汗1)條掃插.線的二極體導通ς °, 對應的補償電容提供對應的晝素電極一補償電壓。、 在本發明之一實施例中,補償電容由 構成—極體的陽極端的導電材料所組成。 —晝素電極以及201110096 2009-IPD-010TW 31967twf.doc/n VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a halogen array 'and in particular to an improved feed through effect# Prime array. [Prior Art] With the evolution of optoelectronics and semiconductor technology, the display panel has been booming. Among various display panels, a liquid crystal display panel (LCD panel) has recently been widely used, and a cathode ray tube display panel (CRT) has been replaced as one of the mainstream of the next generation display panel. 1A is an equivalent circuit diagram of a pixel array of a conventional liquid crystal display panel. Referring to FIG. 1A, the pixel array 1A includes a plurality of scanning lines GLM, GL, GL, _+1, . . . , a plurality of data lines DL parallel to each other, and a scanning line GL. GL/+i, and a plurality of pixel structures 110 coupled to the data line dl, wherein each of the pixel structures 11A includes a transistor U〇T and a pixel unit 110P. Each of the _ 佥 L _, 11 = contains the capacitance connected to the halogen electrode, connected to the lower line =: the storage capacitance Cst of the electrode line, 'the liquid water fan connected to the common electrode of the upper plate, the scanning line GL ^ DL intersect each other And define the array '· · · and the data line - thin film electric (4) column of the halogen structure 11G, in which each scan line is connected to the (four) line and the corresponding (four) line by the (four) pole and the source. _ _ to the corresponding 昼 电 = = 201110096 2009-IPD-01 〇 TW 31967twf.d 〇 c / n In more detail, the / 昼 昼 红 red gate is coupled to the / in the sweeping structure 110 The structure 110 of the thin film transistor ι1〇τ and the corresponding scan GL, and so on are the analogy of the remaining columns of the pixel - FIG. 1B is according to the relationship in FIG. 1A. The driving tear of the elementary structure is connected to one of the scanning lines of the scanning line GLi• ft ^ map. Please refer to the figure for the 'in-position period' high level, and the voltage level of the data line/time scanning voltage is ton 110T, and the value of the data voltage Vdata' transmitted through the film can be charged and charged. The corresponding book of the pixel element 11〇1> in Fig. 1B corresponds to the corresponding pixel electrode; the factory Vpixel, which shows the electric power of the pixel voltage waveform Vpixe1' The S level is the level of the node in Figure 1A. At the moment when the ta period ends, the scanning line sinks and stops enabling. This = the existence of the gate _ secret parasitic capacitance c in the structure of the halogen element 110, so that the i 昼 电 i i 受到 受到 受到 受到 受到 受到 受到The effect is accompanied by a feedthrough voltage thr〇ugh(6) such as anus. Generally speaking, this phenomenon is called the feedthrough effect (feed is also (7) tons 匕e ect), which causes the pixel voltage Vpixei' to deviate from the data voltage vdata. However, the feedthrough effect causes the liquid crystal display panel to produce undesirable defects such as flicker. In addition, when the size of the liquid crystal display panel is larger, the feedthrough effects of different pixel units are not the same, and the situation in which the display screen is uneven is severe, so that the phenomenon of flashing on the face is more difficult to solve. 201110096 2009-IPD-010TW 3I967twf.doc/n The present invention provides a pixel array which can reduce the feedthrough phenomenon and further improve the flickering phenomenon of the display surface. The present invention proposes a seed crystal array comprising a plurality of scanning lines, a plurality of shelling lines, and a plurality of halogen elements which are lightly connected to the scanning lines and the data lines and arranged in an array, and the:: A switching element, a pixel unit, a capacitor, and a diode. In the ζ· column pixel structure, the control end of each elementary switch and the first end of the Ζ Ζ 条 条 Ϊ Ϊ Ϊ Ϊ Ϊ Ϊ Ϊ Ϊ Ϊ Ϊ Ϊ Ϊ Ϊ Ϊ Ϊ Ϊ Ϊ Ϊ The second end complements the & capacitor and is connected to the halogen unit, and the anode end and the extremum of the diode are respectively connected to the compensation capacitor and the (4)th scanning line. ☆ In the embodiment of the invention, each of the pixel units comprises a liquid crystal. The second end of the liquid-capacitor-terminal _ switching element and the compensation power 2 and the "other-side _-shared voltage. In one embodiment, each of the j-th structure of the j-th structure includes - the storage capacitor A compensation capacitor, "body, the gate of the two-body crystal is coupled. In one embodiment of the present invention, when the diode of the scan line _ is turned on, and when the scan line of the fourth (when the fourth (four) scan line is disabled,) the line is her diode. Off, the compensation capacitor voltage is scheduled for 201110096 zuuy-i-t>-D-〇l〇TW 31967twf.doc/n remains unchanged. In an embodiment of the invention, each of the pixel units includes a pole, wherein the second end of the pixel electrode and the compensation electrode are in an embodiment t, when coupled to the (sweat 1) sweep The diode of the plug-in line is turned on, and the corresponding compensation capacitor provides a corresponding voltage for the pixel element. In one embodiment of the invention, the compensation capacitor is comprised of a conductive material that forms the anode end of the body. - halogen electrodes and
、在本發明之-實施财,補償電容由—晝素電極以及 —導電結構所域。在-實施例中,導電結構的材質與竺 ,電極的材質相同。在另-實施例中,導電結構的材= ^描線的材質相同。在更-實施例中,導電結構的材質盘 貧料線的材質相同。 '、 基於上述,本發明之晝素陣列透過補償電容的設置以 2-晝素結射開關元件以及二極體分_接至兩相鄰 、、掃描線的巧妙配置,使得饋通電壓獲得補償,進而使饋 通效應所產生的不良晝面獲得改善。 —為讓本發明之上述特徵和優點能更明顯易懂,下文特 牛貫施例,並配合所附圖式作詳細說明如下。 【實施方式】 圖^2繪不本發明之一實施例之畫素陣列的等效電路 圖二請參照圖2,本實施例之晝素陣列2〇〇包括多條彼此 ,行的掃描線GLy、GL,、GL,+1、...、多條彼此平行的資 碑線DL以及與掃描線GL/ i、%、沉出、...和資料線dl 201110096 2009-I-P-D-010TW 31967twf.doc/n 耗接的多個畫f結構210。其中,掃描線GLM、GLr GL/+1、…以及資料線DL彼此相交,以進一步定義出這此 陣列排列的晝素結構210。 &二 詳細而言,本實施例之每一晝素結構MO包括 元件SW—晝素單㈣χ、—補償電容&以及—二極』 D。更進-步地說’就第列晝素結構21〇中的各個構件而 言’,關兀件SW的控制端Ec以及第一端&分別麵 Μ条掃描、線GLZ·以及其中-條資料線DL,晝素單元 接開關元件SW的第二端E2,而補償電容―c々接^ ? ΡΪΧ以及開關元件SW的第二端E2,且二極體;= 及陰極端-分職接補償電容Cc以及第= =線GLi+1。同理’可得知其他列晝素結構 件的配置關係。 <各個構 由上述可知,每一晝素結構21〇中的 ,二極體D並非耦接至同一條掃描線,“以 相鄰的掃描線。 疋77別耦接至兩 =實施例中,每一開關元件,例如為 中開關兀件SW的控制端&為薄膜電^.、電晶 :開關元件SW的第一、第二端Ει、e2二曰=閉核, :體的源極、沒極。在下述實施例中,主要m細 -所構成的開關元件sw進行說明,其令第—相電晶 2兩端例如為第一、第二源/汲極。 一鸲Bp 心f本實施例之晝素_21()應用於液晶續亍^ 息素單元PIX包括一液晶電容CLC。如圖^面板中, 闼2所不,本實 201110096 zuuy小ίΜ>01OTW 31967twf_doc/n 施例之液晶電容cLC的一端耦接至開關元件sw的第二端 E2 (第二源/及極)以及補償電容Cc ’而其另一端則祕 至一共用電壓Vcom。 貫務上,為了提升液晶顯示面板的顯示品質,通常會 在每-晝素單元ΠΧ中進-步設置—儲存電容^,其中本 實施例例如採用儲存電容Cst位㈣極上方(cs⑽糾e) 的設計。詳细而言,就第ζ·列晝素結構210中的每一儲存 電谷cst而g,其^端耦接開關元件二 广 二源/汲極)以及補償電容Cc,而立 —(弟 條掃描線GW然而,本發明並不限定“電 何,在其他實施例中,也可採用儲存 、孓心為 方(Csonc(Hnm〇n)的設計。 奋位於共用電極上 特別一提的是,本實施例之二極 — 體T所構成,如圖2A的等效電路一可由一薄膜電晶 體T的源極以及汲極兩者之其,其中薄膜電晶 接。 …寻犋電晶體T的閘極耦 根據圖2以及圖2A所繒'示的等$带 之畫素陣列200力佈局設計可以如圖3電路圖’本實施例 〜圖6B所繪示,其中圖3B〜圖沾八^〜圖6A以及圖3B 6A中剖面線A-A,、B-B,、C-C,和D-ry為根據圖3A〜圖 圖。此外,構成本實施例之二極體〇 的剖面示意 為限。 料貌’但本發明不以此 在本實施例中,液晶電容C^(纟會 下於圖2以及圖2A) 201110096 2009-I-P-D-010TW 31967twf.doc/n 可由兩電極爽設一液晶層(未繪'7R )所構成,其中一個電 極可在畫素單元I>IX中透過設置耦接至開關元件SW的第 —端E〗(第二源/没極)以及補償電容cc的一晝素電極212 (例如圖3A,、圖4A、圖5A以及圖6A所繪示)來達成,_ 而另一電極(未繪示)則為上板(未繪示)中耗接至共用 電壓Vcom的共用電極。 山由圖3A〜圖6A可知,用以形成開關元件SW的控制 ,Ec (閘極)的導電層Ml以及用以形成開關元件sw的 第二端E2(第二源/汲極)的導電層河2互相重疊,因而控 K Ec (閘極)的以及第一端& (第二源/没極)之間存 在—閘極-汲極寄生電容(parasitic capacit〇r) & 〇 =卜’由圖3A以及圖3B可知,薄膜電晶體Ta透这 接觸窗ha與導電結構(即導電層M1)電性連接,且導售 =Ml與晝素電極m兩者之間因電容輕合而形成補償屬 :Cc,其中導電層M1的材質與掃描線gl 〇 G 的材質相同。 而,圖4A以及圖4B可知,薄膜電晶體^透過接潑 ιτ〇1=電結構(即導電層1T0)電性連接,且導電肩In the implementation of the present invention, the compensation capacitor is composed of a halogen electrode and a conductive structure. In the embodiment, the material of the conductive structure is the same as that of the electrode and the electrode. In another embodiment, the material of the electrically conductive structure is the same as the material of the trace. In a further embodiment, the material of the electrically conductive structure is of the same material. Based on the above, the pixel array of the present invention is compensated by the setting of the compensation capacitor, and the feedthrough voltage is compensated by the ingenious configuration of the 2-halogen junction switch element and the diode to the two adjacent and scan lines. In turn, the defective surface produced by the feedthrough effect is improved. In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following detailed description will be made in conjunction with the accompanying drawings. [Embodiment] FIG. 2 is an equivalent circuit diagram of a pixel array according to an embodiment of the present invention. Referring to FIG. 2, the pixel array 2 of the present embodiment includes a plurality of scanning lines GLy of each other. GL, GL, +1, ..., a plurality of parallel monuments DL and scan lines GL / i, %, sink, ... and data lines dl 201110096 2009-IPD-010TW 31967twf.doc /n A plurality of f structures 210 that are consumed. Wherein, the scan lines GLM, GLr GL/+1, ..., and the data lines DL intersect each other to further define the pixel structure 210 of the array arrangement. < In detail, each of the unitary structures MO of the present embodiment includes the elements SW-昼素单(四)χ, the compensation capacitor & and the 2-pole D. Further step by step, 'for each component in the first column of the structure 12', the control terminal Ec of the member SW and the first end & respectively, the face scan, the line GLZ· and the - The data line DL, the halogen unit is connected to the second end E2 of the switching element SW, and the compensation capacitor "c" is connected to the second end E2 of the switching element SW, and the diode; = and the cathode end - sub-join The compensation capacitor Cc and the == line GLi+1. The same reason can be seen in the configuration relationship of other columns of the structure. <As shown in the above, in each of the pixel structures 21A, the diode D is not coupled to the same scanning line, "with adjacent scanning lines. 疋77 is coupled to two = in the embodiment Each switching element, for example, the control terminal of the middle switch element SW, is a thin film capacitor, and the first and second terminals 开关ι, e2 of the switching element SW are 曰 = closed core, the source of the body In the following embodiments, the main m--the switching element sw is described, and the two ends of the first-phase electric crystal 2 are, for example, the first and second source/drain electrodes. f The 昼素_21() of the present embodiment is applied to the liquid crystal continuation unit. The PIX unit includes a liquid crystal capacitor CLC. As shown in the panel of Fig. 2, 闼2 is not, this is a real 201110096 zuuy small Μ 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 One end of the liquid crystal capacitor cLC is coupled to the second end E2 (second source/pole) of the switching element sw and the compensation capacitor Cc', and the other end thereof is secreted to a common voltage Vcom. The display quality of the display panel is usually set in a step-by-step setting—the storage capacitor ^, which is an example of this embodiment. For example, the design of the storage capacitor Cst bit (four) pole top (cs(10) ee) is used. In detail, for each storage grid cst in the ζ 昼 昼 昼 结构 structure 210, the end is coupled to the switching element two The second source/drainage) and the compensation capacitor Cc, and the vertical-- (the latter scanning line GW, however, the invention is not limited to "electricity, in other embodiments, storage can also be used as a square (Cnmc (Hnm The design of 〇n) is particularly specific to the common electrode of the present embodiment. The equivalent circuit of FIG. 2A can be used as a source and a drain of a thin film transistor T. Wherein, the thin film is electrically connected. The gate coupling of the seek transistor T can be as shown in Fig. 2 and Fig. 2A, and the pixel layout design of the pixel array can be as shown in Fig. 3 The example is shown in FIG. 6B, wherein the cross-sectional lines AA, BB, CC, and D-ry in FIG. 3B to FIG. 3B to FIG. 6A and FIG. 3B 6A are according to FIG. 3A to FIG. The cross-section of the diode 〇 of the embodiment is limited. The appearance is 'but the invention is not used in this embodiment, the liquid crystal capacitor C^(纟2 and 2A) 201110096 2009-IPD-010TW 31967twf.doc/n A liquid crystal layer (not shown '7R) can be formed by two electrodes, one of which can be set in the pixel unit I> Coupling to the first terminal E of the switching element SW (second source / no pole) and the compensation element cc of a halogen electrode 212 (such as shown in FIG. 3A, FIG. 4A, FIG. 5A and FIG. 6A) The other electrode (not shown) is a common electrode that is drained to the common voltage Vcom in the upper board (not shown). 3A to 6A, a conductive layer M1 for forming a switching element SW, a conductive layer M1 of Ec (gate), and a conductive layer for forming a second end E2 (second source/drain) of the switching element sw The rivers 2 overlap each other, thus controlling the K Ec (gate) and the first end & (second source / no pole) - gate-dip parasitic capacitance (parasitic capacit〇r) & As can be seen from FIG. 3A and FIG. 3B, the thin film transistor Ta is electrically connected to the conductive structure (ie, the conductive layer M1) through the contact window ha, and the sales volume = M1 and the halogen electrode m are lightly coupled due to the capacitance. The compensation compensation is: Cc, wherein the material of the conductive layer M1 is the same as the material of the scanning line gl 〇G. 4A and FIG. 4B, the thin film transistor is electrically connected to the electrical structure (ie, the conductive layer 1T0), and the conductive shoulder is electrically connected.
Cc if Γ212兩者之間因電_合而形成補償電笔 質,、中’導電層ITO的材質亦為構成晝素電極212的相 導電,以及圖5β可知,缚與電晶體τ C )電性連接,且導電層咖 極212兩者之間因電容耗合而形成補償電容其: 201110096 ζυυ^-ι-r-D-01OTW 31967twf.doc/nCc if Γ212 forms a compensation electric pen between the two, and the material of the conductive layer ITO is also the phase conduction of the pixel electrode 212, and FIG. 5β shows that the cell τ C is electrically connected. The connection is made, and the conductive layer is formed by the capacitor to form a compensation capacitor. 201110096 ζυυ^-ι-rD-01OTW 31967twf.doc/n
電層M2的材質與資料線DL的材質相同。然而,圖5a ^ 及圖5B所繪示的設計佈局還可進一步簡化為圖6A以及g 6B的樣貌,亦即薄膜電晶體Td不透過額外設置的導電二 …構’而直接透過其源/汲極的導電特性與晝素電極212匕 執合以形成補償電容Cc,也可以看成薄膜電晶體〜直^ 與構成二極體D的陽極端+的導電材料,其中本實施例之 薄膜電晶體td的源後極以及形成二極體D的陽極端+的 導電材料例如是由導電層M2所構成。 在此需要說明的是’上述圖3A〜圖6A以及圖犯〜 圖6B所缘示的佈局僅用以方便說明本實施例,並非限制 本發明[也就是說’本發明之4素_的佈局設計還可以 為其他樣貌。然而’實際的佈局設計應視產品的需求而定, 因而在此不逐一緣示。 圖7繪不本發明之—實施例之驅動波形圖,其中圖7 僅緣示第ζ·列其中一個金去 wf電極212的電壓波形為例。請 同時參照圖2〜圖7,在太每,士 ^ w 皮 长本貫施例中,於tl期間,第ί條 5線GL」·致能’此哼婦描電μ艰的電壓準位為高準位。 二料線,所傳送的資料電壓v—可透過開關元 素電極扣中,並進行充電的動作。其 中,晝素電極212的金喜 &思素電壓波形如vpm所繪示,其中畫 素電壓波形Vpixei的雷厭嘴 P 壓準位即為圖2中節點N2的電壓準 位。 間,掃描線GL,·停止致能,此 -汲極寄生電容Cgd的存在,使 接著,tl期間結束的瞬 %因晝素結構210中之閘極 201110096 2009-I-P-D-0 l〇TW 31967twf.d〇c/n ^ 她I受到掃描電壓艰的下降 晝錢=識資料電麗、—饋通電壓(二= Ilf ,—般稱此現象為饋通效應如d如㈣ D導通,並對補第㈣)條掃描線GLl+1輕接的二極體 ^ ί=。進行充電。鱗,掃描知 的上升緣會使晝素電極m的晝素電Μ v 電壓,其中該補償電壓盘饋 p:升補知 等。如此一來,晝素電壓'ν 數值大致相 V Plxel便回復至等同於資料電壓 V data。 、 日士,,第(ί+1)條掃描線GLm禁能時,即t3 二’、且、=描線GL i+1耦接的二極體D會呈現關閉 ^且補侦電谷Cc的電屋準位維持不變。 壓造成影響,而 ^ΐτ Μ Ρ 基本_得。於是,接至此掃 二田線GL出的二極體D自關閉到下一次導通期間 堡Vpixel的準位便可基本維持不變。 一素電 通’在本實_中’關通電壓所導致的饋 應可獲的解決。此外,當液晶顯示面板的尺寸越大時, =電阻電容延遲(RC delay)的肩而使掃描電壓的上 、二,『降緣的幅度*盡相同,進*使面板各處的饋通 π不姐相同。然而’本實施例之每—條掃描線停止致能 12 201110096 zuuy-^-D-〇l〇TW 31967twf.doc/n 時所導致的饋通電壓便可隨即透過下一條掃描線的致能動 作來獲得實質上等值的補償電壓,因而使顯示面板各處發 生程度不一的饋通效應獲得解決。簡言之,無論液晶顯示 面板的尺寸大小為何,·本實施例之晝素陣列均可進行改善。The material of the electric layer M2 is the same as the material of the data line DL. However, the design layout illustrated in FIGS. 5a and 5B can be further simplified to the appearance of FIGS. 6A and 6B, that is, the thin film transistor Td does not pass through the additionally disposed conductive structure and directly passes through the source/ The conductive property of the drain electrode is combined with the halogen electrode 212 to form a compensation capacitor Cc, which can also be regarded as a thin film transistor ~ and a conductive material constituting the anode terminal + of the diode D, wherein the thin film electricity of the embodiment The source back electrode of the crystal td and the conductive material forming the anode end + of the diode D are, for example, composed of the conductive layer M2. It should be noted that the layouts shown in the above-mentioned FIG. 3A to FIG. 6A and FIG. 6B are only for convenience of explaining the present embodiment, and are not intended to limit the present invention [that is, the layout of the present invention] The design can also look like other things. However, the actual layout design should be based on the needs of the product, so it is not shown here. Fig. 7 is a diagram showing driving waveforms of an embodiment of the present invention, wherein Fig. 7 is only an example of a voltage waveform of one of the gold-de-wf electrodes 212 of the second column. Please refer to Fig. 2 to Fig. 7 at the same time. In the case of Taiyi, Shi ^ w skin length, in the case of tl, during the period of tl, the ί 5 line GL"· enable 'this wife's electric shock voltage level High level. The two material lines, the transmitted data voltage v- can be transmitted through the switch element electrode buckle and charged. The voltage of the gold and the pixel of the halogen electrode 212 is as shown by vpm, wherein the voltage of the pixel voltage waveform Vpixei is the voltage level of the node N2 in Fig. 2. Between, scan line GL, · stop enable, the presence of this - bungee parasitic capacitance Cgd, so that the end of the t1 period is due to the gate in the pixel structure 210 201110096 2009-IPD-0 l〇TW 31967twf. D〇c/n ^ She I was subjected to a difficult voltage drop due to the scanning voltage = knowledge of the data, and the voltage of the feedthrough (two = Ilf, generally referred to as the feedthrough effect such as d (4) D conduction, and complement (4)) The scanning diode GLl+1 is lightly connected to the diode ^ ί=. Charge it. The scale, the rising edge of the scan will cause the voltage of the halogen electrode m to be v voltage, wherein the compensation voltage is fed by p: liter. As a result, the value of the halogen voltage 'ν' is approximately V Plxel and returns to the data voltage V data. , Japanese, and the (ί+1) scan line GLm is disabled, that is, t3 two ', and = the line GL i+1 coupled with the diode D will be closed ^ and compensate the electric valley Cc The electrical house level remains unchanged. The pressure has an effect, and ^ΐτ Μ Ρ basic _ get. Therefore, the position of the V pixel of the second diode D which is connected to the second line GL can be maintained substantially unchanged from the time of closing to the next conduction. The feedback caused by the pass-through voltage of the first pass is solved. In addition, when the size of the liquid crystal display panel is larger, the shoulder of the RC delay is the shoulder of the RC delay, so that the amplitudes of the upper and the second of the scanning voltage are the same, and the feedthrough π of the panel is made. Not the same sister. However, the feedthrough voltage caused by the stop of each scan line of the present embodiment 12 201110096 zuuy-^-D-〇l〇TW 31967twf.doc/n can be immediately transmitted through the next scan line. In order to obtain a substantially equivalent compensation voltage, a feedthrough effect of varying degrees across the display panel is resolved. In short, regardless of the size of the liquid crystal display panel, the pixel array of the present embodiment can be improved.
表T、上所述’本發明之晝素陣列透過補償電容的設置以 及每一畫素結構中開關元件以及二極體的巧妙安排,可對 饋通%壓進行補償。如此一來,由饋通效應所產生的晝面 閃燦、晝面不均等不良晝面便可獲得大幅度地改善。 雖然本發明已以實施例揭露如上,然其並非用以限定 本發明,任何所屬技術領域中具有通常知識者,在不脫離 本發明之精神和範圍内,當可作些許之更動與潤飾,故本 發明之保護範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖 電路圖 1A繪示—種傳統液晶顯示面板之晝素陣列的等效 查圖1B為根據圖1A中耦接至第ζ·條掃描線的其中一個 旦素結構所繪示的驅動波形圖。 圖2繪示本發明之一實施例之晝素陣列的等效電路 雷^ 2Α會示本發明之一實施例之晝素陣列的另一等效 陵^ 3Α〜圖6Α分別繪示本發明之—實施例之四種晝素 降列的上視示意圖。 13 201110096 2009-I-P-D-010TW 31967twf.doc/n 圖3B〜圖6B分別為根據圖3A〜圖6A中剖面線 A-A’、B-B’、C-C’和D-D’所繪示的剖面示意圖。 圖7繪示本發明之一實施例之驅動波形圖。 . .... - 【主要元件符號說明】 100、200 :晝素陣列 110、210 :晝素結構 110T、T、TA、TB、Tc、TD :薄膜電晶體 110P、PIX :晝素單元 212 :晝素電極 A-A,、B-B,、C-C’、D-D,:剖面線Table T, the above description of the pixel array of the present invention, through the arrangement of the compensation capacitor and the ingenious arrangement of the switching elements and the diodes in each pixel structure, can compensate for the feedthrough % voltage. As a result, the defective surface of the kneading surface caused by the feedthrough effect, such as uneven surface kneading, can be greatly improved. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a diagram showing an equivalent diagram of a pixel array of a conventional liquid crystal display panel. FIG. 1B is a diagram showing one of the denier structures coupled to the scan line of FIG. 1A. Drive waveform diagram. 2 is a diagram showing an equivalent circuit of a pixel array according to an embodiment of the present invention. FIG. 2 is a diagram showing another equivalent of a pixel array according to an embodiment of the present invention. - A top view of the four elements of the embodiment. 13 201110096 2009-IPD-010TW 31967twf.doc/n Figures 3B to 6B are depicted in accordance with the cross-sectional lines A-A', B-B', C-C' and D-D' in Figures 3A to 6A, respectively. Schematic diagram of the section. FIG. 7 is a diagram showing driving waveforms of an embodiment of the present invention. .. - [Main component symbol description] 100, 200: Alizarin array 110, 210: Alizarin structure 110T, T, TA, TB, Tc, TD: Thin film transistor 110P, PIX: Alizarin unit 212: Alizarin electrodes AA, BB, C-C', DD,: hatching
Cc :補償電容 cgd:寄生電容 Clc’、Clc :液晶電容 Cst’、Cst :儲存電容 D .二極體 DL .貧料線 Ei :第一端 E2 :第二端 Ec :控制端 GLy、GL,·、GLi+i :掃描線 HA、HB :接觸窗 Ml、M2、ITO :導電層 SGi’、SGi :掃描電壓 201110096 ▲ V-D-01OTW 31967twf.doc/n sw :開關元件 ta、tl :期間 t2、t3 :時間Cc: compensation capacitor cgd: parasitic capacitance Clc', Clc: liquid crystal capacitor Cst', Cst: storage capacitor D. diode DL. lean line Ei: first end E2: second end Ec: control terminals GLy, GL, ·, GLi+i: scan line HA, HB: contact window Ml, M2, ITO: conductive layer SGi', SGi: scan voltage 201110096 ▲ VD-01OTW 31967twf.doc/n sw : switching element ta, tl: period t2 T3 : time
Vcom’、Vcom :共用電壓 Vdata’、Vdata :資料電壓 Vpixei、Vpixei .晝素電壓 △ VFT’、Δν^Γ :饋通電壓 + :陽極端 一:陰極端Vcom', Vcom: common voltage Vdata', Vdata: data voltage Vpixei, Vpixei. halogen voltage Δ VFT', Δν^Γ : feedthrough voltage + : anode terminal one: cathode terminal
1515
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CN110136668A (en) * | 2018-11-09 | 2019-08-16 | 友达光电股份有限公司 | Driving circuit and driving method |
CN115933237A (en) * | 2022-12-16 | 2023-04-07 | 业成科技(成都)有限公司 | Display device and operation method thereof |
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CN110136668A (en) * | 2018-11-09 | 2019-08-16 | 友达光电股份有限公司 | Driving circuit and driving method |
TWI689903B (en) * | 2018-11-09 | 2020-04-01 | 友達光電股份有限公司 | Driving circuit and driving method |
CN115933237A (en) * | 2022-12-16 | 2023-04-07 | 业成科技(成都)有限公司 | Display device and operation method thereof |
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