TW201100565A - Fabricating method of polycrystalline silicon thin film - Google Patents

Fabricating method of polycrystalline silicon thin film Download PDF

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Publication number
TW201100565A
TW201100565A TW099112329A TW99112329A TW201100565A TW 201100565 A TW201100565 A TW 201100565A TW 099112329 A TW099112329 A TW 099112329A TW 99112329 A TW99112329 A TW 99112329A TW 201100565 A TW201100565 A TW 201100565A
Authority
TW
Taiwan
Prior art keywords
film
insulating layer
conductive film
center
amorphous germanium
Prior art date
Application number
TW099112329A
Other languages
English (en)
Chinese (zh)
Inventor
Jae-Sang Ro
Won-Eui Hong
Original Assignee
Ensiltech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ensiltech Corp filed Critical Ensiltech Corp
Publication of TW201100565A publication Critical patent/TW201100565A/zh

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/326Application of electric currents or fields, e.g. for electroforming

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Recrystallisation Techniques (AREA)
  • Silicon Compounds (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
TW099112329A 2009-04-21 2010-04-20 Fabricating method of polycrystalline silicon thin film TW201100565A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020090034791A KR101075261B1 (ko) 2009-04-21 2009-04-21 다결정 실리콘 박막의 제조방법

Publications (1)

Publication Number Publication Date
TW201100565A true TW201100565A (en) 2011-01-01

Family

ID=43011600

Family Applications (1)

Application Number Title Priority Date Filing Date
TW099112329A TW201100565A (en) 2009-04-21 2010-04-20 Fabricating method of polycrystalline silicon thin film

Country Status (3)

Country Link
KR (1) KR101075261B1 (ko)
TW (1) TW201100565A (ko)
WO (1) WO2010123263A2 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI664646B (zh) * 2016-09-12 2019-07-01 日商愛發科股份有限公司 附透明導電膜之基板之製造方法、附透明導電膜之基板之製造裝置、及附透明導電膜之基板

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3407792B2 (ja) * 1997-09-10 2003-05-19 株式会社トクヤマ 光電変換素子及びこの製造方法
JP4287579B2 (ja) * 2000-08-02 2009-07-01 パナソニック株式会社 プラズマ処理装置及び方法
WO2004107453A1 (en) * 2003-05-27 2004-12-09 Jae-Sang Ro Method for annealing silicon thin films and polycrystalline silicon thin films prepared therefrom

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI664646B (zh) * 2016-09-12 2019-07-01 日商愛發科股份有限公司 附透明導電膜之基板之製造方法、附透明導電膜之基板之製造裝置、及附透明導電膜之基板

Also Published As

Publication number Publication date
WO2010123263A2 (ko) 2010-10-28
WO2010123263A3 (ko) 2010-12-23
KR101075261B1 (ko) 2011-10-20
KR20100116062A (ko) 2010-10-29

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