TW201034204A - Thin film transistor and method for manufacturing same - Google Patents

Thin film transistor and method for manufacturing same Download PDF

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Publication number
TW201034204A
TW201034204A TW99100024A TW99100024A TW201034204A TW 201034204 A TW201034204 A TW 201034204A TW 99100024 A TW99100024 A TW 99100024A TW 99100024 A TW99100024 A TW 99100024A TW 201034204 A TW201034204 A TW 201034204A
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oxide
thin film
film transistor
film
cerium oxide
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TW99100024A
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Chinese (zh)
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Masashi Kasami
Kazuyoshi Inoue
Koki Yano
Shigekazu Tomai
Hirokazu Kawashima
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Idemitsu Kosan Co
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thin Film Transistor (AREA)

Abstract

A thin film transistor which comprises an oxide semiconductor film containing indium oxide and at least one oxide selected from a group consisting of lanthanum oxide, neodymium oxide, samarium oxide, europium oxide, gadolinium oxide, terbium oxide, dysprosium oxide, holmium oxide, erbium oxide, thulium oxide and ytterbium oxide, wherein the atomic ratio M/(In + M) is 0.1 to 0.4 inclusive when the at least one oxide is represented by M2O3.

Description

201034204 六、發明說明: 【發明所屬之技術領域】 本發明係關於一種薄膜電晶體。更詳細而言係關於—種 包含氧化物半導體膜之薄膜電晶體。 【先前技術】 已知公知之非晶質IGZO(氧化銦-氧化鎵_氧化辞)作為薄 膜電晶體顯示出良好之特性。然而,以IGZ〇為成分之薄 膜電晶體含有成分包含In、Ga、Zn及〇之四元系氧化物。 ^ 於此情形時,因各金屬成分之濺鍍率或對基板之附著率不 同,故存在以下情形:濺鍍靶材之組成與所得薄膜之組成 會發生變化,或者當使用大型成膜裝置進行成膜時,破璃 之中心部分與周邊部分之組成不同,玻璃中心部分與周邊 部分之電晶體特性(遷移率、臨界電壓Vth、8值)不同,難 以提高該等之均勻性。 又,亦有使用氧化銦之結晶質薄膜電晶體之報告(專利 φ 文獻丨),於此情形時,該電晶體只顯示出常開之薄膜電晶 體特性’但期望的是常關之非晶質薄膜電晶體。 先前技術文獻 專利文獻 專利文獻1 :日本專利特開2008-130814號公報 【發明内容】 本發明之目的在於提供一種包含顯示常關之薄膜電晶體 特性之氧化物半導體膜的薄膜電晶體及其製造方法。於本 發明中’所謂「常關」,係定義為臨界電壓之值為正之情 145702.doc 201034204 形。臨界電壓係根據轉換曲線(汲極電流-閘極電壓)之圖之 X截距而求出。 為達成上述目的’本發明者們進行潛心研究,發現:包 含含有氧化銦與自特定元素之氧化物中選擇的丨種或2種以 上之氧化物的氧化物半導體之氧化物薄膜電晶體顯示出常 關之薄膜電晶體特性,從而完成本發明。 根據本發明’可提供以下之薄膜電晶體及其製造方法。 1. 一種薄膜電晶體’其包含氧化物半導體膜,該氧化物 半導體膜含有氧化銦與選自由氧化鑭、氧化鈦、氧化釤、 氧化銪、氧化釓、氧化铽、氧化鏑、氧化鈥、氧化铒、氧 化铥及氧化镱所組成之群中的1種或2種以上之氧化物,且 在將該氧化物設為Μ:ι〇3時,原子比M/(In+M)之值為〇」以 上、0.4以下。 2. 如上述1之薄膜電晶體,其中上述氧化物半導體膜為非 晶質。 3. 如上述1或2之薄膜電晶體,其中上述薄膜電晶體之結 構為蝕刻終止層型薄膜電晶體。 一種薄膜電晶體之製造方法,其係製造如上述丨至3中 任一項之薄膜電晶體者,該製造方法包含利用雜使上述 氧化物半導體膜成膜之步驟,且使該濺鍍中之氧氣濃度為 2 20體積%,使基板溫度為室溫至以下。 5.如上述4之薄膜電晶體之製造方法,其中將上述氧化物 半導體膜形成為源極.沒極電極後,於⑽谓進行 〇·5〜1200分鐘熱處理。 145702.doc 201034204 根據本發明,可提供一種顯示常關之薄膜電晶體特性之 氧化物薄膜電晶體。 根據本發明’可提供一種顯示常關之薄膜電晶體特性之 氧化物薄膜電晶體的製造方法。 【實施方式】 以下,詳細地說明本發明。 本發明之氧化物薄膜電晶體(以下,稱為本發明之薄膜 ❹電晶體)之特徵在於:其包含氧化物半導體膜,該氧化物 半導體膜含有氧化銦與選自由氧化鑭、氧化鈥、氧化釤、 乳化销、氧化亂、乳化試、氧化鏑、氧化鈥、氧化辑、氧 化链及氧化镱所組成之群中的1種或2種以上之氧化物且 在將該氧化物设為M2〇3時,原子比M/(In+M)之值為〇, 1以 上、0.4以下。 即,本發明之氧化物半導體膜含有氧化銦及以m2〇3表示 之氧化物’上述Μ係選自由鑭、鈥、釤、銪、釓、錢、 ❹ 鏑、鈥、铒、鍤及镱所組成之群中的1種或2種以上之元 素’原子比Μ/(Ιη+Μ)之值為〇.1以上、〇 4以下。 本發明中,氧化物半導體膜並不限定於非晶質膜,但若 為非晶質’則成膜時難以與氧反應,可降低電晶體特性發 .生變化之虞,因而更佳。藉由使本發明所使用之氧化物半 導體膜含有氧化銦與上述特定之正3價鑭系金屬氧化物, 可獲得非晶質膜。此外,所謂「非晶質膜」,係指藉由χ射 線繞射無法確認結晶峰值之層。 於本說明書中’有時將本發明中之非晶質氧化物半導體 145702.doc 201034204 膜稱為半導體膜(薄媒)、#晶質氧化物膜(薄膜)或非晶質 半導體膜(薄膜)。 若使氧化銦中含有選自由氧化鑭、氧化敍、氧化釤、氧 化銪、氧化釓、氧化铽、氧化鏑、氧化鈥、氧化铒、氧化 铥及氧化镱所組成之群中的1種或2種以上之氧化物,而形 成非=質氧化物半導體膜,則可降低半導體膜之載體濃 度,此夠於接近室溫之溫度下使半導體膜之載體濃度未達 2xl0+17 cm_3,顯示出良好之薄膜電晶體特性。接近室溫 之溫度下之載體濃度較好的是未達lxl〇+n cm·3。若載體 濃度為2X10+17 cm.3以上,則有作為薄膜電晶體(以下稱為 TFT(Thin Film Transistor))而無法驅動之虞。又,即便作 為TFT而驅動,亦存在成為常開、或臨界電壓成為較大負 值、或開-關值減小之情形。 於本發明中,將選自由氧化鑭、氧化鈥、氧化釤、氧化 銪、氧化釓、氧化試、氧化鏑' 氧化鈥、氧化斜、氧化铥 及氧化镱所組成之群中的1種或2種以上之氧化物設為Maos 時,原子比M/(In+M)之值需為0.1以上、〇·4以下。藉由設 為此種原子比之範圍,可實現氧化銦成為氧化物半導體之 主成分、常關特性、保持高遷移率、S值較小(於轉換曲線 中上升較快)之電晶體。 再者,各金屬元素之含量可藉由^^Inductively Coupled Plasma,感應耦合電漿)測定而求出。 又’各金屬元素之含1之調整例如可藉由調整於形成半 導體膜時所使用之濺鍵乾材之各元素的豐度而實施。半導 145702.doc 201034204 體膜之組成與濺鍍靶材之組成基本一致。 再者於可獲得本發明之效果之範圍内,半導體膜亦可 含有氧化銦及上述特定之正3價鑭系金屬氧化物以外之成 分。例如,亦可含有氧化鎵、氧化钪等。 又,本發明中所使用之半導體膜可實質上包含氧化銦及 述特疋之正3價鑭系金屬氧化物,又,亦可僅由該等成 刀構成。所謂「實質上包含」,係指半導體膜除含有氧化 及上述特疋之正3價鋼系金屬氧化物外,可含有上述其 他成分。 ^ 於本發明之薄膜電晶體中,基板、間極電極、閘極絕緣 膜、源極.汲極電極等之構成構件可使用公知者,並 別限定。 ,… 例如,各電極可使用AI、Cu、Au等金屬薄膜,閉極絕 緣膜可使用氧化矽膜、氧化铪膜等氧化物薄膜。 圖1係表示本發明之薄膜電晶體之實施形態的概略剖面 圖。 薄膜電晶體i於基板10及閘極絕緣膜3〇之間夾持有門極 電極20,於閘極絕緣膜3Q上積層有半導體膜(溝道層州作 為活性層。進而’以覆蓋半導體膜4〇之端部附近 八 別設置有祕電㈣及祕„52。於半導體㈣、2 電極5〇及㈣電極52所包m形成溝道部6〇。 再者,圖1之薄模電晶體4所謂之溝道蝕刻型薄臈泰曰 體。本發明之薄膜電晶體並不限u溝道餘刻型薄膜= 體’可採用本技術領域中公知之元件構成。例如,亦可為 145702.doc 201034204 蝕刻終止層型薄膜電晶體。 圖2係表示本發明之薄膜電晶體之其他實施形態的概略 剖面圖。再者,對與上述薄膜電晶❸相同之構成構件標 註相同編號,並省略其說明。 薄膜電晶體2為所謂之蝕刻終止層型薄膜電晶體。薄膜 電晶體2以覆蓋溝道部60之方式形成有蝕刻終止層7〇,除 此以外,與上述薄膜電晶體丨之構成相同。以覆蓋半導體 膜40之端部附近及蝕刻終止層7〇之端部附近之方式,分別 3又置有源極電極5 〇及沒極電極5 2 ^ 本發明中,半導體膜4〇使用含有氧化銦與上述特定之正 3 4貝鑭系金屬氧化物之半導體膜。 再者,藉由使半導體膜為非晶質膜,可使蝕刻加工性優 異’提高薄膜電晶體之生產性。 本發明之氧化物薄膜電晶體之薄膜電晶體結構較好的是 银刻終止層型薄膜電晶體。 成為本發明之㈣電晶體之氧化物薄膜容易溶解於金屬 蝕刻液中。藉此’可在電極形成之同日寺,形成氧化物薄膜 之島’降低所使用之光罩數量。 右乳化物薄膜無法用姓刻源極.汲極配線.源極·沒極電極 之姓刻液來溶解,則需要耗f工夫來變更㈣ 步驟變得H而無法n 1 其次,對本發明之薄膜電晶體之製造方法加以說明。 '本發明之薄膜電晶體之製造方法(以下稱為本發明之方 法)之特徵在於:包含利用濺鍍使構成本發明之氧化物薄 145702.doc 201034204 膜電晶體之氧化物半導體膜成膜之步驟 ^ 丨又0次视锻中之氦 乳濃度為2〜20體積。/◦,使基板溫度為室溫至2〇〇。〇以下 根據本發明’即便以軸步驟來進行氧化物半導體膜 成膜步驟,亦可獲得與賤鑛靶材相同組成之薄膜 之 Γ大型玻璃基板。又,藉由使_中之氧氣濃度^〜2應〇 體積。/。’可於下-步驟所進行之電晶體穩定化處理步 賦予均勻之電晶體特性。201034204 VI. Description of the Invention: TECHNICAL FIELD OF THE INVENTION The present invention relates to a thin film transistor. More specifically, it relates to a thin film transistor including an oxide semiconductor film. [Prior Art] It is known that amorphous IGZO (indium oxide-gallium oxide-oxidation) exhibits good characteristics as a thin film transistor. However, the thin film transistor containing IGZ〇 contains a quaternary oxide containing In, Ga, Zn and yttrium. ^ In this case, since the sputtering rate of each metal component or the adhesion rate to the substrate is different, there are cases where the composition of the sputtering target and the composition of the obtained film are changed, or when a large film forming apparatus is used. At the time of film formation, the composition of the center portion and the peripheral portion of the glass is different, and the crystal characteristics (mobility, threshold voltage Vth, and 8 values) of the central portion and the peripheral portion of the glass are different, and it is difficult to improve the uniformity of the particles. In addition, there is also a report of a crystalline thin film transistor using indium oxide (patent φ literature 丨). In this case, the transistor exhibits only a normally open film transistor characteristic 'but it is expected to be normally closed amorphous Thin film transistor. PRIOR ART DOCUMENT Patent Document Patent Document 1: JP-A-2008-130814 SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film transistor including an oxide semiconductor film which exhibits a film characteristic of a film which is normally closed, and a process for producing the same method. In the present invention, the term "normally closed" is defined as the value of the threshold voltage being positive 145702.doc 201034204. The threshold voltage is obtained from the X intercept of the graph of the conversion curve (bump current - gate voltage). In order to achieve the above object, the present inventors have conducted intensive studies and found that an oxide thin film transistor including an oxide semiconductor containing indium oxide and an oxide selected from an oxide of a specific element or two or more kinds of oxides is shown. The film characteristics of the film are normally closed, thereby completing the present invention. The following thin film transistor and its method of manufacture can be provided in accordance with the present invention. A thin film transistor comprising an oxide semiconductor film containing indium oxide and selected from the group consisting of cerium oxide, titanium oxide, cerium oxide, cerium oxide, cerium oxide, cerium oxide, cerium oxide, cerium oxide, and oxidation. One or two or more oxides of the group consisting of cerium, cerium oxide and cerium oxide, and when the oxide is Μ: ι〇3, the atomic ratio M/(In+M) is 〇" above, below 0.4. 2. The thin film transistor according to 1, wherein the oxide semiconductor film is amorphous. 3. The thin film transistor according to the above 1 or 2, wherein the structure of the above thin film transistor is an etch stop layer type thin film transistor. A method of producing a thin film transistor, which is the method of manufacturing a thin film transistor according to any one of the above-mentioned items, which comprises the step of forming a film by using the above-mentioned oxide semiconductor film, and in the sputtering The oxygen concentration was 20,000% by volume, and the substrate temperature was room temperature to below. 5. The method for producing a thin film transistor according to the above 4, wherein the oxide semiconductor film is formed as a source and a non-electrode electrode, and then subjected to heat treatment at (10) for 5 to 1200 minutes. 145702.doc 201034204 According to the present invention, an oxide thin film transistor which exhibits the characteristics of a normally closed thin film transistor can be provided. According to the present invention, there can be provided a method of producing an oxide thin film transistor which exhibits a film characteristic of a film which is normally closed. [Embodiment] Hereinafter, the present invention will be described in detail. The oxide thin film transistor of the present invention (hereinafter referred to as a thin film germanium transistor of the present invention) is characterized in that it comprises an oxide semiconductor film containing indium oxide and is selected from the group consisting of cerium oxide, cerium oxide, and oxidation. One or two or more oxides of the group consisting of ruthenium, emulsified pin, oxidative emulsification, emulsification test, ruthenium oxide, ruthenium oxide, oxidation, oxidation chain, and ruthenium oxide, and the oxide is set to M2. At 3 o'clock, the atomic ratio M/(In+M) has a value of 〇, 1 or more and 0.4 or less. That is, the oxide semiconductor film of the present invention contains indium oxide and an oxide represented by m2〇3, which is selected from the group consisting of ruthenium, osmium, iridium, osmium, iridium, ruthenium, osmium, iridium, osmium, iridium and osmium. The value of the atomic ratio Μ/(Ιη+Μ) of one or two or more elements in the group of the composition is 〇.1 or more and 〇4 or less. In the present invention, the oxide semiconductor film is not limited to the amorphous film. However, if it is amorphous, it is difficult to react with oxygen during film formation, and it is more preferable because it can reduce the change in crystal characteristics. An amorphous film can be obtained by including the indium oxide and the specific positive trivalent lanthanide metal oxide described above in the oxide semiconductor film used in the present invention. In addition, the term "amorphous film" refers to a layer in which a crystal peak cannot be confirmed by diffraction of a ruthenium. In the present specification, the amorphous oxide semiconductor 145702.doc 201034204 film in the present invention is sometimes referred to as a semiconductor film (thin medium), a #crystalline oxide film (thin film), or an amorphous semiconductor film (film). . If the indium oxide contains one or two selected from the group consisting of cerium oxide, cerium oxide, cerium oxide, cerium oxide, cerium oxide, cerium oxide, cerium oxide, cerium oxide, cerium oxide, cerium oxide and cerium oxide. By forming the above oxides and forming a non-quality oxide semiconductor film, the carrier concentration of the semiconductor film can be lowered, which is sufficient to make the carrier concentration of the semiconductor film less than 2x10 + 17 cm_3 at a temperature close to room temperature, showing good Thin film transistor properties. The carrier concentration at a temperature close to room temperature is preferably less than lxl 〇 + n cm · 3. When the carrier concentration is 2X10+17 cm.3 or more, it is a film transistor (hereinafter referred to as TFT (Thin Film Transistor)) and cannot be driven. Further, even if it is driven as a TFT, there is a case where it is normally open, or the threshold voltage becomes a large negative value, or the on-off value is decreased. In the present invention, one or two selected from the group consisting of cerium oxide, cerium oxide, cerium oxide, cerium oxide, cerium oxide, oxidative test, cerium oxide cerium oxide, oxidized oblique, cerium oxide and cerium oxide. When the above oxide is set to Maos, the value of the atomic ratio M/(In+M) needs to be 0.1 or more and 〇·4 or less. By setting the range of the atomic ratio, indium oxide can be realized as a main component of the oxide semiconductor, a normally-off characteristic, a high mobility, and a small S value (fast rise in the conversion curve). Further, the content of each metal element can be determined by measuring inductively coupled plasma. Further, the adjustment of the content of each of the metal elements can be carried out, for example, by adjusting the abundance of each element of the splash-bonded dry material used in forming the semiconductor film. Semi-conductive 145702.doc 201034204 The composition of the body membrane is basically the same as the composition of the sputtering target. Further, in the range in which the effects of the present invention can be obtained, the semiconductor film may contain indium oxide and a component other than the specific positive trivalent europium metal oxide. For example, it may contain gallium oxide, antimony oxide or the like. Further, the semiconductor film used in the present invention may substantially contain indium oxide and a normal trivalent europium metal oxide as described above, or may be composed only of such a mold. The term "substantially contained" means that the semiconductor film may contain the above-mentioned other components in addition to the oxidized and the above-mentioned characteristic trivalent steel-based metal oxide. In the thin film transistor of the present invention, a constituent member such as a substrate, a mutual electrode, a gate insulating film, a source, a drain electrode or the like can be used, and is not limited. For example, a metal film such as AI, Cu, or Au can be used for each electrode, and an oxide film such as a ruthenium oxide film or a ruthenium oxide film can be used as the closed-electrode insulating film. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic cross-sectional view showing an embodiment of a thin film transistor of the present invention. The thin film transistor i has a gate electrode 20 interposed between the substrate 10 and the gate insulating film 3A, and a semiconductor film is laminated on the gate insulating film 3Q (the channel layer state is an active layer. Further, the semiconductor film is covered) There are secret electricity (4) and secrets 52 in the vicinity of the end of the 4th. The channel portion 6〇 is formed in the semiconductor (4), the 2 electrode 5〇 and the (4) electrode 52. Further, the thin mode transistor of Fig. 1 4. The so-called channel-etched thin ruthenium body. The thin film transistor of the present invention is not limited to a u-channel remnant film = body ' can be formed by components known in the art. For example, it can also be etched by 145702.doc 201034204 Fig. 2 is a schematic cross-sectional view showing another embodiment of the thin film transistor of the present invention. The same components as those of the above-mentioned thin film transistor are denoted by the same reference numerals and will not be described. The transistor 2 is a so-called etch stop layer type thin film transistor. The thin film transistor 2 is formed with an etch stop layer 7 覆盖 so as to cover the channel portion 60, and is the same as the above-described thin film transistor 。. Semiconductor film 40 In the vicinity of the end portion and the vicinity of the end portion of the etching stopper layer 7〇, the source electrode 5 and the electrodeless electrode 5 2 are respectively disposed. In the present invention, the semiconductor film 4 is made of indium oxide and the above specific one. In addition, by making the semiconductor film an amorphous film, the etching processability is excellent, and the productivity of the thin film transistor is improved. The oxide thin film transistor of the present invention is improved. The thin film transistor structure is preferably a silver engraved layer type thin film transistor. The oxide film of the (iv) transistor of the present invention is easily dissolved in a metal etching solution, thereby forming an oxidation at the same day as the electrode formation. The island of the film "reduces the number of reticle used. The right emulsion film can not be used to etch the source. The 汲 配线 wiring. The source and the electrode of the electrode are dissolved to dissolve, it takes a lot of time to change (4) The method of producing the thin film transistor of the present invention will be described below. The method for producing a thin film transistor of the present invention (hereinafter referred to as the method of the present invention) is characterized by including sputtering. The oxide thin film 145702.doc 201034204 of the present invention is formed into a film of the oxide semiconductor film of the film transistor. The concentration of the emulsion in the 0-times forging is 2 to 20 volumes. /◦, the substrate temperature is room temperature. In the following, according to the present invention, even if the oxide semiconductor film forming step is performed in the axial step, a large-sized glass substrate having the same composition as that of the antimony ore target can be obtained. The oxygen concentration ^~2 should be 〇 volume. /. 'The transistor stabilization step that can be performed in the next step gives uniform crystal characteristics.

若使濺鑛中之氧氣濃度未達2體積%或超過2〇體積%,則 有於下-步驟之電晶體穩定化處理步驟(熱處理步驟)中益 =獲得均勻之電晶體特性之情形。又,使此時之基板溫度 為室溫至2〇〇。(:以下。若使基板溫度低於室溫,則需要冷 部裝置而變得不經濟,若超過赠,則有加熱成本捭: 之情形’且有氧化物薄膜易結晶化之情形。於氧化心膜 結晶化之情形等,有於钮刻步驟中產生殘逢或無法進行钱 刻之情形,而有無法形成所需形狀之島之情形。基板溫度 根據基板之種類及耐熱性進行適當調整即可。 -於本發明之方法巾’較好的是將如±所述㈣鍍成膜之 氧化物半導體膜形成為源極.汲極電極後,於150〜450°C進 订〇·5〜1200分鐘熱處理。若低於15〇°C,則有成為常開之 虞,有可能無法獲得穩定之薄膜電晶體。再者,若高於 450°C ’則有成為結晶質之虞。 半導體膜之熱處理可於大氣下或氧氣環境下制燈退火 裝置雷射退火裝£、熱風加熱裝置、接觸加熱裝置等。 較好的是將半導體膜於大氣下或氧氣環境下,以 145702.doc 201034204 15〇:45(TC、〇.5〜12〇〇分鐘之條件進行熱處理。若未達 5〇 °則有半導體膜未充分穩定化之情形,若超過 4贼’則有對基板或半導體膜造成損害之情形。熱處理 溫度更好的是180t〜35(TC,尤其好的是2〇(rc〜3〇n:。 又,若熱處理時間未達〇.5分鐘,則有熱處理時間過短 而膜之熱穩定化不充分之情形,若超過12〇〇分鐘,則過度 耗費時間而無法量產化。熱處理時間更好的是1分鐘〜600 分鐘,尤其好的是5分鐘〜6〇分鐘。 、熱處理較好的是於源極.汲極配線·源極.汲極電極形成後參 進行藉由5亥等熱處理,可降低源極汲極配線源極.沒極 電極之電阻值,且可使氧化物薄膜電晶體之特性穩定化。 &氧化物薄膜藉由減鑛而成媒,於成膜後立即於非平衡狀 〜下來進仃薄膜化之情況較多,有内部應力不均句、或於 厚度方向之密度上產生分布之情形。於此情形時因氧化 物薄臈並非平衡狀態,故而部位不同而其狀態不均勾,因 此有時電晶體特性(尤其是開/關值、遷移率、臨界電壓If the concentration of oxygen in the splashing is less than 2% by volume or more than 2% by volume, there is a case where the transistor stabilization step (heat treatment step) in the next step is advantageous in obtaining uniform crystal characteristics. Further, the substrate temperature at this time was made room temperature to 2 Torr. (The following. If the substrate temperature is lower than room temperature, the cold part device is required and it is uneconomical. If it exceeds the weight, there is a case where the heating cost is ': and the oxide film is easily crystallized. In the case of crystallization of the pericardium, etc., there is a case where a residue is not formed in the button etching step, and an island having a desired shape cannot be formed. The substrate temperature is appropriately adjusted according to the type of the substrate and the heat resistance. Preferably, in the method towel of the present invention, the oxide semiconductor film which is plated as described in (4) is formed as a source and a drain electrode, and then printed at 150 to 450 ° C. Heat treatment at 1200 minutes. If it is less than 15 〇 ° C, it may become a normally open film, and a stable film transistor may not be obtained. Further, if it is higher than 450 ° C, it may become a crystalline film. The heat treatment can be performed under the atmosphere or in an oxygen environment, the laser annealing device, the laser annealing device, the hot air heating device, the contact heating device, etc. It is preferable to use the semiconductor film under the atmosphere or in an oxygen atmosphere to 145702.doc 201034204 15 〇:45 (TC, 〇.5~12 The heat treatment is carried out under the conditions of a few minutes. If the temperature is less than 5 〇, the semiconductor film is not sufficiently stabilized. If it exceeds 4 thieves, the substrate or the semiconductor film may be damaged. The heat treatment temperature is preferably 180t~ 35 (TC, especially preferably 2 〇 (rc~3〇n:. Also, if the heat treatment time is less than 55 minutes, there is a case where the heat treatment time is too short and the heat stabilization of the film is insufficient, if it exceeds 12) 〇〇 Minutes, it takes too much time and cannot be mass-produced. The heat treatment time is better from 1 minute to 600 minutes, especially preferably from 5 minutes to 6 minutes. The heat treatment is better at the source. · Source. After the formation of the surface of the drain electrode, the heat treatment of the source of the source of the drain is reduced by the heat treatment of the source of the source of the drain, and the resistance of the oxide film can be stabilized. The oxide film is formed by a reduced ore-forming medium, and the film is formed in a non-equilibrium-down manner immediately after film formation, and there is a case where the internal stress is uneven or the density is distributed in the thickness direction. In this case, the oxide is not flat. Balanced state, so the location is different and its state is not uniform, so sometimes the transistor characteristics (especially on/off value, mobility, threshold voltage)

Vth⑷會產生偏差。藉由熱處理可使氧化物薄膜電晶❿ 體之特性穩定化。X,有降低源極·没極配線源極沒極電 極與氧化物薄膜電晶體間之接觸電阻之效果,可獲得更加 穩定化之電晶體特性。 . 以下’參照圖3對利用本發明之方法之姓刻終止層型薄. 膜電晶體之形成方法進行說明。圖3之右側圖係表示所使 用之遮罩的圖案,左側之圖係藉由該遮罩所形成之積層社 構的遮罩圖案中所示之虛線部分之剖面I 、、。 145702.doc -10· 201034204 於玻璃(基板10)上形成金屬薄膜,進行光阻塗布、曝 光、顯影、姓刻、光阻剝離及清洗,而形成閘極配線.間 極電極20。此時,使用用以形成所需閘極配線·閘極電極 20之形狀的第一光罩。 其次’使用 CVD(Chemical Vapor Deposition,化學氣相 沈積法)使SiNx成膜而作為閘極絕緣膜3〇後,形成本發明 之氧化物薄膜(半導體膜40)及成為蝕刻終止層70之Si02薄 ❹膜進行光阻塗布、曝光、顯影、蝕刻、光阻剝離及清 洗而形成所需之蝕刻終止層形狀。此時,蝕刻較好的是 由乾式製程來進行。 例如,可使用CF4與氧氣作為蝕刻氣體,藉由乾式製程 來钮刻Sl〇2。此時,為形成所需形狀之蚀刻終止層,而使 用第二光罩。 /、-人,形成成為源極.汲極電極50、52之金屬薄膜,進 一光阻塗布、曝光、顯影H光阻剝離及清洗,可於 ® 成所而源極·汲極配線.源極.汲極電極50、52之同時,除 成為溝道6G之部分之金屬薄膜。上述氧化物薄膜可使 用^屬钱刻液容易地姓刻,故而可形成應成為氧化物薄膜 電曰曰體之島(島結構)。#此,可於使用形成源極·没極配 •:原極汲極電極之蝕刻液之同日夺,利用第三光罩形成應 成為氧化物薄膜電晶體之島(島結構)。 實施例 歹】舉實施例及比較例來更具體地說明本發明,但 本發明不受該等實施例任何限定。 145702.doc 201034204 實施例1 <薄膜電晶體之製作> 利用光阻法來製作圖4所示之蝕刻終止層型薄膜電晶 體。 於附有熱氧化膜30(Si〇2膜)之導電性石夕基板1〇上,使用 包含氧化銦及氧化釓之靶材[Gd/(In+Gd)=〇 15],以濺鍍法 成膜40 nrn之半導體膜(非晶質氧化物薄膜)4〇。真空排氣 至背壓達到5x10 4 pa後’ 一面流動氬氣95 sccrn、氧氣〇.5 seem,一面將壓力調整至〇2 pa,以濺鍍功率i〇〇 w於室 溫下進行濺鍍。 其次,將Si作為靶材,流動氬氣7 sccm、氧氣3 , 於壓力0.5 Pa下成膜1〇〇 nm。其後,塗布光阻於預 烤15刀鐘其後,通過遮罩將UV(ultraviolet,紫外線)光 (光強度:300 mJ/cm2)照射至光阻膜,其後,利用3糾%之 四甲基氫氧化錢(tetramethylammonium hydr〇xide,TMAH) 進行顯影。使用純水進行清洗後,將光阻膜於n(rc後烘 烤15分鐘,於成為溝道部6〇之下部之部分(蝕刻終止層)形 成圖案。藉由利用CF4之乾式蝕刻,形成蝕刻終止層7〇。 利用光阻剝離劑來剝離光阻,再進行水洗,藉由鼓風而進 行乾燥。 其後,於半導體膜40、蝕刻終止層7〇上成膜鉬金屬膜 300 nm ° 於鉬金屬膜上塗布光阻,於8〇亡預烤15分鐘。其後,通 過遮罩將UV光(光強度:3〇〇 mjw)照射至光阻膜,其 145702.doc •12· 201034204 後’使用3 wt%之四曱基氫氧化銨(TMAH)進行顯影。使用 純水進行清洗後,將光阻膜於130。(:後烘烤15分鐘,形成 源極電極50及汲極電極52之形狀之光阻圖案。 利用磷酸·乙酸.琐酸之混合酸對附有光阻圖案之基板進 打處理’藉此同時蝕刻鉬金屬膜及非晶質氧化物薄膜4〇。 於此情形時,由蝕刻終止層保護之溝道部上之鉬金屬膜受 到钱刻,而形成溝道部60。Vth(4) will produce a deviation. The characteristics of the oxide thin film electro-crystal body can be stabilized by heat treatment. X has the effect of lowering the contact resistance between the source and the gateless source and the oxide film of the oxide film, and it is possible to obtain more stable transistor characteristics. Hereinafter, a method of forming a film transistor using the method of the present invention will be described with reference to Fig. 3. The right side view of Fig. 3 shows the pattern of the mask used, and the left side view is the section I of the broken line portion shown in the mask pattern of the laminated structure formed by the mask. 145702.doc -10· 201034204 A metal thin film is formed on the glass (substrate 10), and photoresist coating, exposure, development, surname, photoresist peeling, and cleaning are performed to form a gate wiring and a via electrode 20. At this time, the first photomask for forming the shape of the desired gate wiring and gate electrode 20 is used. Next, 'the CVD (Chemical Vapor Deposition) method is used to form SiNx as a gate insulating film 3, and then the oxide film (semiconductor film 40) of the present invention and the SiO 2 which becomes the etch stop layer 70 are formed. The ruthenium film is subjected to photoresist coating, exposure, development, etching, photoresist stripping, and cleaning to form a desired etch stop layer shape. At this time, the etching is preferably carried out by a dry process. For example, CF4 and oxygen can be used as an etching gas to inscribe S1〇2 by a dry process. At this time, in order to form an etch stop layer of a desired shape, a second mask is used. /, -People, forming a metal film as a source. Bipolar electrodes 50, 52, further photoresist coating, exposure, development, H photoresist stripping and cleaning, can be used in the source and source wiring. Source At the same time as the gate electrodes 50 and 52, a metal thin film which is a part of the channel 6G is removed. The above oxide film can be easily surnamed by using a smear, so that an island (island structure) which should be an oxide film electric raft is formed. #此, It is possible to form an island (island structure) which is to be an oxide thin film transistor by using a third photomask in the same day as the etching liquid which forms the source and the bottom electrode. EXAMPLES The present invention will be specifically described by way of Examples and Comparative Examples, but the present invention is not limited by the Examples. 145702.doc 201034204 Example 1 <Production of Thin Film Transistor> An etch stop layer type thin film transistor shown in Fig. 4 was produced by a photoresist method. On a conductive slab substrate 1 with a thermal oxide film 30 (Si 〇 2 film), a target [Gd/(In+Gd)=〇15] containing indium oxide and yttrium oxide was used for sputtering. A film of 40 nrn of a semiconductor film (amorphous oxide film) was formed. Vacuum evacuation After the back pressure reaches 5x10 4 pa, the flow of argon is 95 sccrn, oxygen 〇.5 seem, and the pressure is adjusted to 〇2 pa, and the sputtering power is sputtered at room temperature for sputtering. Next, Si was used as a target, and argon gas of 7 sccm and oxygen gas were flowed, and a film of 1 〇〇 nm was formed at a pressure of 0.5 Pa. Thereafter, the photoresist was applied to the pre-bake for 15 knives, and then UV (ultraviolet) light (light intensity: 300 mJ/cm 2 ) was irradiated to the photoresist film through a mask, and thereafter, 3 Development was carried out by tetramethylammonium hydr〇xide (TMAH). After cleaning with pure water, the photoresist film was baked at n (rc for 15 minutes, and patterned in a portion (etch stop layer) which becomes a lower portion of the channel portion 6〇. The etching was formed by dry etching using CF4. The layer 7 is terminated by a photoresist stripper, and then washed with water, and dried by blowing. Thereafter, a film of molybdenum metal is formed on the semiconductor film 40 and the etching stopper layer 7 at 300 nm. The photoresist was coated on the molybdenum metal film and pre-baked for 15 minutes at 8 。. Thereafter, UV light (light intensity: 3 〇〇mjw) was irradiated to the photoresist film through a mask, which was after 145702.doc •12·201034204 'Using 3 wt% of tetradecyl ammonium hydroxide (TMAH) for development. After washing with pure water, the photoresist film was placed at 130. (: After baking for 15 minutes, source electrode 50 and drain electrode 52 were formed. The photoresist pattern of the shape is subjected to a treatment of the substrate with the photoresist pattern by using a mixed acid of phosphoric acid, acetic acid and tribasic acid, thereby simultaneously etching the molybdenum metal film and the amorphous oxide film 4〇. The molybdenum metal film on the channel portion protected by the etch stop layer is engraved and shaped Channel 60.

剝離光阻後,使用純水進行清洗,進行鼓風而使之乾 燥。其後,熱處理基板。具體而言,將基板於熱風加熱爐 内、於空氣中、30(TC熱處理30分鐘。藉由以上步驟,製 作薄膜電晶體(溝道部60之源極.汲極電極間間隙(l)為1⑼ Μ·111、寬(W)為 1〇〇〇 μηι)。 再者,若於鉬金屬膜之蝕刻後實施上述熱處理,則有可 降低源極.汲極配線/源極.汲極電極之電阻值、且可降低與 非晶質氧化物薄膜電晶體之接觸電阻的效果。 ζ' <薄膜電晶體之評價> 使用半導體參數分析儀(Keithley 42〇沾以),於室$ 大氣中且遮光環境下進行測定。 該薄膜電晶體之場效遷移率為32.3咖2以.咖,臨; 壓Vt㈣.6 V,S值=0·98 v/dec•,開關比為1〇6,薄^ 體顯示出常關之特性…輸出特性顯示出明確之夾』 〇對3'極電極施加2。v電㈣。分鐘後之偏移竭 改 變基板之位置所製造之薄膜電晶體 之性能基本無差別 145702.doc -13· 201034204 且穩定。 <半導體膜之評價> 於石英玻璃基板上’以與上述濺鑛相同之條件來形成半 導體膜。其後’於熱風加熱爐内,於空氣中、3 〇(rc熱處 理30分鐘。進行所得半導體膜之X射線繞射(χ_Γ叮 diffraction,XRD)測定時,觀察不到源自氧化銦、氧化釓 之結構之峰值,而獲得較寬之又射線繞射圖案。藉此,可 確認半導體膜為非晶質。又,藉由霍耳量測所求出胃之载體 濃度為 6.3xl〇 + M cm·3。 利用裝置來測定半導體膜之組成時,與乾材之组成 相同。又’成膜基板内為均勻之組成。 内部應力為5Xl"dyn.cm-2以下,僅顯示出較小之内 部應力,基板内幾乎無分布而較為穩定。 實施例2 除使用包含氧化銦、氧化斂之㈣[Nd/(in+Nd)= 為減錄乾材以外,愈_音# Υ | i I乍 /、實鉍例1同樣地製作薄犋電晶體。 ❹ 該溥膜電晶體夕4、绝Μ 體之%效遷移率為32 cm2/vAfter the photoresist was peeled off, it was washed with pure water, and air-dried to dry it. Thereafter, the substrate is heat treated. Specifically, the substrate was heat-treated in a hot air heating furnace at 30 °C for 30 minutes. By the above procedure, a thin film transistor was formed (the source of the channel portion 60. The inter-electrode gap (1) was 1(9) Μ·111, width (W) is 1〇〇〇μηι). Further, if the above heat treatment is performed after etching the molybdenum metal film, the source/drain wiring/source. The resistance value and the effect of reducing the contact resistance with the amorphous oxide thin film transistor. ζ ' < Evaluation of thin film transistor> Using a semiconductor parameter analyzer (Keithley 42 〇), in the room $ atmosphere The measurement was carried out under a light-shielding environment. The field-effect mobility of the thin-film transistor was 32.3 coffee 2, coffee, pressure, Vt (four), 6 V, S value = 0.98 v/dec, and the switching ratio was 1〇6. The thin body shows the characteristics of the normally closed... The output characteristics show a clear clip. 〇 The 2' pole electrode is applied with 2. v electricity (4). After the minute shift, the performance of the thin film transistor produced by changing the position of the substrate is basically No difference 145702.doc -13· 201034204 and stable. <Evaluation of semiconductor film> On the glass substrate, a semiconductor film was formed under the same conditions as the above-mentioned sputtering. Then, it was heat-treated in a hot air heating furnace at 3 Torr for 30 minutes. The X-ray diffraction of the obtained semiconductor film was performed (χ_Γ叮). In the measurement of diffraction, XRD), the peak of the structure derived from indium oxide and yttrium oxide was not observed, and a wide diffraction pattern of the ray was obtained, whereby the semiconductor film was confirmed to be amorphous. The carrier concentration of the stomach obtained by the ear measurement was 6.3 x 1 〇 + M cm · 3. When the composition of the semiconductor film was measured by the device, it was the same as the composition of the dry material, and the composition inside the film-forming substrate was uniform. The stress is 5Xl"dyn.cm-2 or less, showing only a small internal stress, and there is almost no distribution in the substrate and it is stable. Example 2 Except for using indium oxide and oxidizing (4) [Nd/(in+Nd) = In addition to the dry material, the _ 音 # i i i i 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 Cm2/v

Vth=1.2V,Sii = l8v/H %,臨界電壓 但1.8 V/dec.,開關比為1〇6, 示出常關之特性。〗私山 溥膜電晶體顯 又,輸出特性顯示出明確之夾止。Vth=1.2V, Sii = l8v/H %, threshold voltage but 1.8 V/dec., the switching ratio is 1〇6, showing the characteristics of the normally closed. 〗 〖 private mountain 溥 film transistor display, output characteristics show a clear pinch.

又’進行所得半導體膜之X 察不到源自氧化 ㈣D)測疋時,觀 虱化銦、氧化鉸之結構之峰值, X射線繞射圖案。益 而獲侍較寬之 藉由霍耳量測所求:此’可確認半導體膜為非晶質。又’ 實施例3 求出之載體濃度為2糊-咖' 145702.doc •14- 201034204 除使用包含葡#加 ^ 氧化銦、氧化铽之靶材[Tb/(In+Tb)=01 為滅鑛乾材以外,> 卜與實施例1同樣地製作薄膜電晶體。 該薄膜電晶艚$ @ Α _ 场效遷移率為27 cm2/V · sec,臨界電懕 Vth=2.8 V,8值=1 】v/j 一 · V/dec•’開關比為106 ’薄膜電晶體顯 丁《關之特性。又,輸出特性顯示出明確之夾止。Further, when the X of the obtained semiconductor film is not detected by the oxidation (4) D), the peak of the structure of the indium antimonide or the oxidized hinge and the X-ray diffraction pattern are observed. It is possible to obtain a wide range of benefits by Hall measurement: this confirms that the semiconductor film is amorphous. Further, the concentration of the carrier obtained in Example 3 was 2 paste-coffee' 145702.doc •14- 201034204 except that the target containing the indium oxide and yttrium oxide was added [Tb/(In+Tb)=01 In the same manner as in Example 1, except for the dry mineral material, a thin film transistor was produced. The thin film transistor 艚 $ @ Α _ field effect mobility is 27 cm2/V · sec, critical voltage Vth = 2.8 V, 8 value = 1 】 v / j · · V / dec • 'switching ratio is 106 ' film The transistor shows the characteristics of Guan. Also, the output characteristics show a clear pinch.

進行所知半導體膜之X射線繞射(XRD)測定時,觀 察不到源自氧化銦、氧⑽之結構之峰值,而獲得較寬之 :射線、堯射圖帛。藉此’可確認半導體膜為非晶質。又, 藉由霍耳量测所求出之載體濃度為3 7χ1〇+ι6啦_3。 實施例4 除使用包含氧化銦、氧化鑭之乾材&物心)4.2]作為 滅鑛乾材以外’與實施例1同樣地製作薄膜電晶體。 膜電Βθ體之場效遷移率為24 cm2/V · see,臨界電壓 Vth=3.1 V , c v* =1 _ 一 5 v/dec. ’開關比為1〇5,薄膜電晶體顯 不出常關之特性。又’輸出特性顯示出明確之夾止。 又進行所得半導體膜之X射線繞射(XRD)測定時,觀 察不到源自氧化銦、氧化鑭之結構之峰值,而獲得較寬之 X射m射圖帛。藉此’可確認半導體膜為非晶質。又, 藉由霍耳量測所求出之載體濃度為G.95xl0+16 cm·3。 實施例5 除使用包含氧化銦、氧化彭之把材[Sm/(In+Sm)=〇.25]作 為賊乾材以外,與實施例i同樣地製作薄膜電晶體。 該薄膜電晶體之場效遷移率為18 cm2/v · sec,臨界電壓When the X-ray diffraction (XRD) measurement of the known semiconductor film is carried out, the peak of the structure derived from indium oxide and oxygen (10) is not observed, and a wide range of rays and radiance maps are obtained. From this, it was confirmed that the semiconductor film was amorphous. Further, the carrier concentration determined by Hall measurement was 3 7χ1〇+ι6啦_3. Example 4 A thin film transistor was produced in the same manner as in Example 1 except that a dry material containing <RTIgt; indium oxide and cerium oxide> The field effect mobility of the membrane Βθ body is 24 cm2/V · see, the threshold voltage Vth=3.1 V , cv* =1 _ a 5 v/dec. 'The switching ratio is 1〇5, and the thin film transistor is not common. Off characteristics. Also, the output characteristics show a clear pinch. Further, when X-ray diffraction (XRD) measurement of the obtained semiconductor film was carried out, the peak of the structure derived from indium oxide and antimony oxide was not observed, and a wide X-ray m-map was obtained. From this, it was confirmed that the semiconductor film was amorphous. Further, the carrier concentration determined by Hall measurement was G.95x10 + 16 cm·3. (Example 5) A thin film transistor was produced in the same manner as in Example i except that a material containing indium oxide and oxidized Peng [Sm/(In+Sm) = 〇.25] was used as a dry material for thieves. The field effect mobility of the thin film transistor is 18 cm 2 /v · sec, the threshold voltage

Vth=5.4 V » ς/±-ι 〇 ,x/, c 5值-1.3 V/dec.,開關比為106,薄膜電晶體顯 145702.doc 15 201034204 又,—如。 察不到源自體膜之X射線繞射(XRD)測定時,觀 X射線繞射圖案藉此,之結構之峰 藉由霍耳量測所炎:可確⑽半導體膜為非晶質。又, 實施例6 求出之載體濃度一〜。 除使用包含氧化銦、 為減鑛乾材以外,*〜 ^^fe#[Eu/(In+Eu)=〇.l5]^ 、貫施例1同樣地製作薄膜電晶體。 V :〜值膜广曰曰體之場效遷移率為15 Cm2/V · SeC,Vth=1·5 關之二生’開關比為1〇5,薄膜電晶體顯示出常 又,輸出特性顯示出明確之夾止。 又,進仃所得半導體膜之X射線繞射(XRD)測定時,觀 ,丁'不到源自氧化銦、氧化销之結構之峰值,而獲得較寬之 X射線繞射圖帛。藉此,可確認半導體膜為非晶質。又, 藉由霍耳量測所求出之載體濃度為2 lxlG+16cm_3。 實施例7 、除使用包含氧化銦、氧化鈥之靶材[H〇/(in+H〇Xl5]作 ◎ 為濺鍍靶材以外,與實施例i同樣地製作薄膜電晶體。 該薄膜電晶體之場效遷移率為13 cm2/v· sec,臨界電壓 V 8值—2.2 V/dec. ’開關比為106,薄膜電晶體顯 示$關之特性。又’輸出特性顯示明確之夾止。 又’進行所得半導體膜之X射線繞射(XRD)測定時,觀 察不到源自氡化銦、氧化鈥之結構之峰值,而獲得較寬之 X射線繞射圖案。藉此,可確認半導體膜為非晶質。又, 145702.doc •16- 201034204 =:8耳量—载體濃度為5.1χ1°+,、·3。 . 該薄膜電實施例1同樣地製作薄膜電晶體。 .vth=4.5 v,:==!率為35 cm2/v6·sec,臨界電麼 示出常關夕μ ec. ’開關比為ι〇6,薄膜電晶體顯 丁出常關之特性。又’輸出特性顯示出明確之夾止。 •察二體膜之x射線繞射(xrd)測定時,觀 x射線繞射圖幸。兹士 叩獲侍較莧之 精此,可確認半導體膜為非晶質。又, 藉由霍耳量測所求出之載體濃度為5·1Χ1〜3質 實施例9 為含氧化鋼、氧化矩之蝴Tm/(In+Tm);=0.i5]作 *飞Λ 以外,與實施例1同樣地製作薄膜電晶體。 該薄膜電晶體之場效遷移率如cm2/v. sec,臨界電廢 * ::12V’S值=2·6v/dec.,開關比為1〇7’薄膜電晶體顯 不常關之特性。又,輸出特性顯示明確之炎止。 又,進行所得半導體膜之X射線繞射(XRD)測定時,觀 . 冑不到源自氧化銦、氧化链之結構之峰值,而獲得較寬之 • X射線繞射圖案。藉此,可確認半導體膜為非晶質。又, 藉由霍耳量測所求出之載體濃度為27xl〇+16cm-3。 實施例10 除使用包含氧化錮、氧化镱之乾材[Yb/(In+Yb)=0.15]作 為濺锻乾材以外,與實施例1同樣地製作薄膜電晶體。 145702.doc -17· 201034204 該薄膜電晶體之場效遷移率為17 cm2/v·…,臨 值=1.9版’開關比為ι〇8,薄媒電晶體續 不出常關之特性。又,輸出特性顯示出明讀之央业。 又’進行所得半導體膜之x射線繞射(xrd)測定時,觀 察不到源自氧化銦、氧化镱之結構之峰值,而獲得較寬之 X射線繞射圖t。藉此,可確認半導體膜為非晶質。又, 藉由霍耳量測所求出之载體濃度為3 6xl〇 + U em-3。 比較例1 除濺鍍靶材使用包含氧化銦(純度99.9%)之靶材(作為雜 質含有Sn、Ti、Zr之總計:12〇 ppm)以外,與實施例… 樣地製作薄膜電晶體。 其結果,該薄膜電晶體之場效遷移率為46 em2 〇 w 〇 , 開/關比為1〇5,臨界電壓vth為_12 V,s值為2 4 , 薄膜電晶體顯示出常開之特性。 根據所得薄膜之X射線繞射結果,判明該薄膜為結晶質 膜。又,藉由霍耳量測所求出之載體濃度為l 4xl〇18 。 比較例2 除賤鍍靶材使用包含氧化銦及氧化彭之乾材 [Sm/(ln+sm)=0.45]以外’與實施例1同樣地製作薄膜電晶 體。 '日3 其結果’因溝道層(實施例中為半導體膜)成為絕緣體, 故而觀察不到TFT特性。 根據所得薄膜之X射線繞射結果,判明該薄膜為非晶質 膜。又’藉由霍耳量測所求出之載體濃度為10M em-3u 145702.doc .18- 201034204 下。 比較例3 除激錄把材使用包含氧化銦及氧化釤之乾材 [Sm/(ln+Sm)=0.07],又,不進行熱處理(於熱風加熱爐 内,於空氣中、30(TC熱處理30分鐘)以外,與實施例1同 樣地製作薄膜電晶體。Vth=5.4 V » ς/±-ι 〇 ,x/, c 5 value -1.3 V/dec., switch ratio is 106, thin film transistor display 145702.doc 15 201034204 Again, - as. When the X-ray diffraction (XRD) measurement derived from the body film is not observed, the X-ray diffraction pattern is thereby obtained, and the peak of the structure is measured by Hall measurement: it is confirmed that (10) the semiconductor film is amorphous. Further, the carrier concentration of Example 6 was determined in Example 6. A thin film transistor was produced in the same manner as in Example 1 except that the indium oxide was used as the dry ore-reducing material, *~^^fe#[Eu/(In+Eu)=〇.l5]^. V: ~ value film wide body field mobility is 15 Cm2 / V · SeC, Vth = 1 · 5 off the second generation 'switching ratio is 1 〇 5, thin film transistor display often again, output characteristics display Clearly pinched. Further, when the X-ray diffraction (XRD) of the semiconductor film obtained was carried out, the peak of the structure derived from indium oxide and the oxidized pin was not obtained, and a wider X-ray diffraction pattern was obtained. Thereby, it was confirmed that the semiconductor film was amorphous. Further, the carrier concentration determined by Hall measurement was 2 lxlG + 16 cm_3. Example 7 A thin film transistor was produced in the same manner as in Example i except that a target containing indium oxide and yttrium oxide [H〇/(in+H〇Xl5) was used as a sputtering target. The field effect mobility is 13 cm2/v·sec, the threshold voltage V 8 is -2.2 V/dec. 'The switching ratio is 106, and the thin film transistor shows the characteristic of OFF. The output characteristic shows a clear pinch. 'When the X-ray diffraction (XRD) of the obtained semiconductor film was measured, the peak of the structure derived from indium antimonide and antimony oxide was not observed, and a wide X-ray diffraction pattern was obtained. Thereby, the semiconductor film was confirmed. It is amorphous. Further, 145702.doc •16-201034204 =:8 ear amount—the carrier concentration is 5.1χ1°+,··3. The film is electrically produced in the same manner as in Example 1. The film is made in the same manner. 4.5 v,:==! The rate is 35 cm2/v6·sec, and the critical electric power is shown in Changguan Xi ec. 'The switching ratio is ι〇6, and the thin film transistor shows the characteristics of the normally closed. It shows a clear pinch. • When measuring the x-ray diffraction (xrd) of the two-body film, the x-ray diffraction pattern is fortunate. It can be confirmed that the semiconductor film is amorphous. Further, the carrier concentration determined by Hall measurement is 5·1Χ1 to 3. Example 9 is a steel containing oxidation oxide, and the oxidation moment is Tm/(In+Tm); ○.i5] A film transistor was produced in the same manner as in Example 1. The field effect mobility of the film transistor was cm2/v. sec, critical electric waste*: ::12 V'S value = 2·6 v. /dec., the switch ratio is 1〇7' thin film transistor is not always closed characteristics. In addition, the output characteristics show a clear inflammation. Also, when the X-ray diffraction (XRD) measurement of the obtained semiconductor film is performed, The peak of the structure derived from indium oxide and the oxidized chain is not obtained, and a wide X-ray diffraction pattern is obtained, whereby the semiconductor film is confirmed to be amorphous. Further, it is determined by Hall measurement. The carrier concentration was 27 x 1 〇 + 16 cm - 3. Example 10 A sample was produced in the same manner as in Example 1 except that a dry material [Yb/(In+Yb) = 0.15) containing cerium oxide and cerium oxide was used as the dry material for splashing and forging. Thin film transistor. 145702.doc -17· 201034204 The field effect mobility of the thin film transistor is 17 cm2/v·..., the value = 1.9 version 'switching ratio is ι〇8, thin dielectric transistor In addition, the output characteristics show the central industry of reading. In addition, when the x-ray diffraction (xrd) of the obtained semiconductor film is measured, the peak of the structure derived from indium oxide and antimony oxide is not observed. A wide X-ray diffraction pattern t was obtained, whereby the semiconductor film was confirmed to be amorphous. Further, the carrier concentration determined by Hall measurement was 3 6 x 1 〇 + U em-3. Comparative Example 1 A thin film transistor was produced in the same manner as in Example except that a target containing indium oxide (purity: 99.9%) was used as a sputtering target (a total of Sn, Ti, and Zr was contained as a impurity: 12 〇 ppm). As a result, the field effect mobility of the thin film transistor is 46 em2 〇w 〇, the on/off ratio is 1〇5, the threshold voltage vth is _12 V, and the s value is 2 4 , and the thin film transistor shows a normally open state. characteristic. According to the X-ray diffraction results of the obtained film, it was found that the film was a crystalline film. Further, the carrier concentration determined by Hall measurement was l 4xl 〇 18 . Comparative Example 2 A thin film transistor was produced in the same manner as in Example 1 except that a dry material containing indium oxide and oxidized Peng [Sm/(ln+sm) = 0.45] was used. The result of the 'day 3' was that the channel layer (the semiconductor film in the example) was an insulator, and thus the TFT characteristics were not observed. According to the X-ray diffraction results of the obtained film, it was found that the film was an amorphous film. Further, the carrier concentration determined by Hall measurement was 10M em-3u 145702.doc .18- 201034204. Comparative Example 3 Except for the excitation material, a dry material containing indium oxide and yttrium oxide [Sm/(ln+Sm)=0.07] was used, and heat treatment was not carried out (in a hot air heating furnace, in air, 30 (TC heat treatment) A thin film transistor was produced in the same manner as in Example 1 except for 30 minutes.

其結果’2溝道層為半導體’該薄膜電晶體之場效遷移率 為40.1 cm2/V · sec。然而,開關比較小為i〇3,s值為4 2 V/dec.。又,薄膜電晶體顯示出常開之特性。又,輸出特 性顯示出明確之夾止。對閘極電極施加2〇 v電壓分鐘 後之偏移電壓(Δν^ΐι)為0.29 V。 =者’根據所得薄膜之χ射線繞射結果,判明該薄膜為 非晶質膜。又’藉由霍耳量測所求出之載體濃度為 4.8 χ 1 018 〇 比較例4 除濺鍍無材使用包含氧化銦、氧化錫及氧化彭之乾材 [In/(In+Sn+Sm)=0.9,Sn/(In+Sn+Sm)=0.07 > Sm/(In+Sn+Sm)= 0.03,Sm/(In+Sm)=〇.〇3]以外,與實施例丨同樣地製作薄膜 電晶體。 其、’’°果,因溝道層(實施例中為半導體膜)成為導電體, 故而觀察不到TFT特性。 根據所得薄膜之X射線繞射結果,判明該薄膜為結晶質 膜又’藉由霍耳量測所求出之載體濃度為。 ;下i^表1中,匯總表示實施例及比較例令所使用之氧 化物半導體膜之構成及特性。 145702.doc -19- 201034204 比較例4 B κη 0.03 1 1 1 1 1 1 結晶質 1.4χ1020 比較例3 B ΚΠ 1 0.07 40.1 fS — l.OxlO3 0.29 結晶質 4.8><1〇'8 比較例2 a B ΚΠ 1 0.45 1 1 < 1 1 1 非晶質 l.OxlO14 以下 比較例1 1 Ν 1 CN 1 <N l.OxlO5 0.30 結晶質 1.4χ1018 實施例10 1 0.15 卜 卜 (N C) 1.0x10s 涅 0.49 非晶質 3.6x10 丨6 實施例9 三 B H 1 0.15 二 <S 'sO v〇 <N l.OxlO7 0.51 非晶質 2.7χ1016 實施例8 c ώ 1 0.15 m l.OxlO6 罢 0.28 非晶質 5-ΙχΙΟ16 實施例7 nS 1 0.15 m CN ri l.OxlO6 罢 0.48 非晶質 5.1xl0,s 實施例6 1 »r> 〇 »〇 oo l.OxlO8 0.47 非晶質 2.1x10丨6 實施例5 1 0.25 oo cn l.OxlO6 私· 0.42 非晶質 1.4χ1〇'6 實施例4 £ cd 1 ίΝ V~1 1.0x10s 落 0.37 非晶質 9.5χ1015 實施例3 -Ω 1 0.15 00 <N l.OxlO6 1_ | 0.34 非晶質 3.7χ1016 1 實施例2 a g 1 2 <s CN 00 l.OxlO6 罢 0.31 非晶質 2.9χ1016 實施例1 α 1 0.15 32.3 0.98 l.OxlO6 0.30 非晶質 6.3χ1〇'6 組成 第1元素 第2元素 第3元素 Μ/(Ιη+Μ) 遷移率(cm2/V/sec) 臨界電壓(v) S 值(V/dec·) 開/關比 動作 △Vth(V) XRD結果 載體濃度(cm_3) -20 145702.doc 201034204 產業上之可利用性 本發明之非晶質氧化物薄膜電晶體可適用於顯示器用面 板、RFID(radio frequency identification,射頻識別)標 籤、X射線檢測器面板·指紋傳感器.光傳感器等傳感器 等。 本發明之薄膜電晶體之製造方法尤其適用於蝕刻終止層 型薄膜電晶體之製造方法。 以上稍微詳細地說明了本發明之實施形態及/或實施 例,但業者容易在實質上不脫離本發明之新穎主旨及效果 之情況下,對該等例示之實施形態及/或實施例實施進行 夕種變更。因此,該等多種變更亦包含於本發明之範圍 内。 本說明書中所記載之文獻之内容全部引用於此。 【圖式簡單說明】 圖1係表示本發明之薄膜電晶體之實施形態的概略 圖。 圖2係表示本發明之薄膜電晶體之其他實施形態的概略 剖面圖。 圖3係表示本發明之薄膜電晶體之製造步驟及所用光罩 的模式圖。 圖4係表示於實施例及比較例中之薄膜電晶體之製造步 驟的模式圖。 / 【主要元件符號說明】 1、2 薄膜電晶體 145702.doc -21 - 201034204 10 基板 20 閘極電極 30 閘極絕緣膜 40 半導體膜 50 源極電極 52 汲極電極 60 通道部 70 蚀刻終止層As a result, the '2 channel layer was a semiconductor' and the field effect mobility of the thin film transistor was 40.1 cm 2 /V · sec. However, the switch is smaller than i〇3 and the s value is 4 2 V/dec. Further, the thin film transistor exhibits a normally open characteristic. Also, the output characteristics show a clear pinch. The offset voltage (Δν^ΐι) after applying a voltage of 2 〇 v to the gate electrode was 0.29 V. = ' According to the diffraction result of the obtained film, it was found that the film was an amorphous film. Also, the carrier concentration determined by Hall measurement was 4.8 χ 1 018 〇 Comparative Example 4 In addition to sputtering, no material containing indium oxide, tin oxide and oxidized Peng was used [In/(In+Sn+Sm)= A film was produced in the same manner as in Example 0.9 except that 0.9, Sn/(In+Sn+Sm)=0.07 > Sm/(In+Sn+Sm)=0.03, Sm/(In+Sm)=〇.〇3] Transistor. This is because the channel layer (the semiconductor film in the embodiment) is a conductor, and thus the TFT characteristics are not observed. Based on the X-ray diffraction results of the obtained film, it was found that the film was a crystalline film and the carrier concentration determined by Hall measurement was . In the following Table 1, the composition and characteristics of the oxide semiconductor film used in the examples and comparative examples are collectively shown. 145702.doc -19- 201034204 Comparative Example 4 B κη 0.03 1 1 1 1 1 1 Crystalline 1.4χ1020 Comparative Example 3 B ΚΠ 1 0.07 40.1 fS — l.OxlO3 0.29 Crystalline 4.8><1〇'8 Comparative Example 2 a B ΚΠ 1 0.45 1 1 < 1 1 1 amorphous l.OxlO14 The following Comparative Example 1 1 Ν 1 CN 1 < N l.OxlO5 0.30 Crystalline 1.4χ1018 Example 10 1 0.15 Bub (NC) 1.0 X10s Nie 0.49 Amorphous 3.6x10 丨6 Example 9 TriBH 1 0.15 II <S 'sO v〇<N l.OxlO7 0.51 Amorphous 2.7χ1016 Example 8 c ώ 1 0.15 m l.OxlO6 止0.28 Amorphous 5-ΙχΙΟ16 Example 7 nS 1 0.15 m CN ri l.OxlO6 0.40.48 Amorphous 5.1xl0,s Example 6 1 »r> 〇»〇oo l.OxlO8 0.47 Amorphous 2.1x10丨6 Implementation Example 5 1 0.25 oo cn l.OxlO6 private · 0.42 amorphous 1.4χ1〇'6 Example 4 £ cd 1 ίΝ V~1 1.0x10s falling 0.37 amorphous 9.5χ1015 Example 3 - Ω 1 0.15 00 <N l.OxlO6 1_ | 0.34 Amorphous 3.7χ1016 1 Example 2 ag 1 2 <s CN 00 l.OxlO6 Stroke 0.31 Amorphous 2.9χ1016 Example 1 α 1 0.15 32.3 0.98 l.OxlO6 0.30 Amorphous 6.3χ1〇'6 Composition 1st element 2nd element 3rd element Μ/(Ιη+Μ) Mobility (cm2/V/sec) Threshold voltage (v) S value (V/dec·) On/Off Specific operation ΔVth(V) XRD Result carrier concentration (cm_3) -20 145702.doc 201034204 Industrial Applicability The amorphous oxide thin film transistor of the present invention can be applied to a display panel, RFID (radio frequency identification, Radio frequency identification) tags, X-ray detector panels, fingerprint sensors, sensors such as light sensors, etc. The method for producing a thin film transistor of the present invention is particularly suitable for a method of manufacturing an etch-stop layer type thin film transistor. The embodiments and/or the embodiments of the present invention have been described in detail above, but the embodiments and/or embodiments of the present invention may be practiced without departing from the spirit and scope of the invention. Evening changes. Accordingly, such various modifications are also included within the scope of the present invention. The contents of the documents described in the present specification are all incorporated herein. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing an embodiment of a thin film transistor of the present invention. Fig. 2 is a schematic cross-sectional view showing another embodiment of the thin film transistor of the present invention. Fig. 3 is a schematic view showing the steps of manufacturing the thin film transistor of the present invention and the photomask used. Fig. 4 is a schematic view showing the steps of manufacturing the thin film transistor in the examples and the comparative examples. / [Main component symbol description] 1, 2 thin film transistor 145702.doc -21 - 201034204 10 substrate 20 gate electrode 30 gate insulating film 40 semiconductor film 50 source electrode 52 drain electrode 60 channel portion 70 etch stop layer

145702.doc •22-145702.doc •22-

Claims (1)

201034204 七、申請專利範圍: 1· -種薄膜電晶體’其包含氧化物半導體膜,該氧化物半 導體膜含有氧化銦與選自由氧化鑭、氧化斂、氧化釤、 氧化銪、氧化釓、氧化铽、氧化鏑、氧化鈥、氧化餌、 氧化铥及氧化镱所組成之群中的〗種或2種以上之氧化 物,且在將該氧化物設為m2〇3時,原子ttM/(in+M)之值 為0.1以上、〇. 4以下。201034204 VII. Patent application scope: 1. A thin film transistor comprising an oxide semiconductor film containing indium oxide and selected from the group consisting of cerium oxide, oxidized cerium, cerium oxide, cerium oxide, cerium oxide, cerium oxide , an oxide of cerium oxide, cerium oxide, oxidized bait, cerium oxide, and cerium oxide, or two or more oxides, and when the oxide is m2〇3, the atom ttM/(in+ The value of M) is 0.1 or more and 〇. 4 or less. 2·如請求項1之薄膜電晶體 非晶質。 其中上述氧化物半導體膜為 3. 4. 5.2. The thin film transistor of claim 1 is amorphous. Wherein the above oxide semiconductor film is 3. 4. 5. 如請求項⑴之薄膜電晶體,其中上述薄膜電晶體之結 構為钮刻終止層型薄膜電晶體。 一種薄膜電晶體之製造方法’其係製造如請求項山中 任一項之薄膜電晶體者,該製造方法包含利㈣錄使上 述氧化物半導體膜成模之步驟’且使該濺鑛中之氧氣濃 度為2〜20體積% ’使基板溫度為室溫至2〇〇。。以下。 如請求項4之薄膜電晶體之製造方法,其中將上述氧化 物半導體膜形成為源極.沒極電極後,於15〇〜45〇t针 〇·5〜1200分鐘熱處理。 丁 145702.docThe thin film transistor of claim 1, wherein the structure of the thin film transistor is a button-cut layer type thin film transistor. A method for producing a thin film transistor, which is a method of manufacturing a thin film transistor according to any one of the claims, wherein the method comprises the steps of: recording a film forming step of the oxide semiconductor film and making oxygen in the sputtering The concentration is 2 to 20% by volume 'the substrate temperature is room temperature to 2 Torr. . the following. The method for producing a thin film transistor according to claim 4, wherein the oxide semiconductor film is formed as a source and a non-electrode electrode, and then heat-treated at 15 〇 to 45 〇t for 5 to 1200 minutes. Ding 145702.doc
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