201021641 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種印刷電路板之嵌入式薄膜電阻製造方 法，其主要係在印刷電路板中形成具有單顆或多顆嵌入式電阻元 件者。 【先前技術】201021641 IX. Description of the Invention: [Technical Field] The present invention relates to an embedded thin film resistor manufacturing method for a printed circuit board, which is mainly formed in a printed circuit board having a single or multiple embedded resistor elements. [Prior Art]
一般的印刷電路板之電阻除了採用傳統被動式元件焊接，另 外，又有以厚膜及薄膜兩種工藝，製造嵌入式電阻。其中，厚膜 製程係將電阻碳漿，印刷於電路板上烤乾而成，再使用雷射調組 機，調適至所需電阻值；而薄膜嵌入式電阻製造方法則係在電路 板之壓合製程中，以鍍鎳矽銅箱代替純銅猪，將該鎳矽銅箔及環 氧樹酯壓成一體，該鎳矽銅箔之鎳矽面朝内，與玻璃纖維布黏 合，銅箔面朝外，再依傳統電路板之工藝，進行曝光顯影蝕刻， 先利用酸性蝕刻液同時蝕刻該鎳矽層及銅層，再以鹼性蝕刻液只 蝕去嵌入式電阻上方之銅層，形成單個或數個具有特定長寬形狀 的鎳矽電阻，再透過雷射調組機修整各個鎳矽電阻之阻值。 另外，數年前美商麥特（Macdermid)公司採用工業界習用之 高磷鎳或高磷鈀浸鍍，製造嵌入式電阻，其流程為線路製造、活 化、黏貼感光膜、曝光顯影露出電阻位置、浸鍍無電解浸鍍液、 剝除感光膜、雷射調阻，完成薄膜嵌入式電阻製造。 【發明内容】 《所欲解決之問題》 在前述習用的印刷電路板之厚膜或薄膜電阻製造方法中，電 201021641 阻碳漿所製造之厚膜電阻，製造成本較低，方法成熟簡單，可惜 因電路板玻纖布不耐高溫，只能使用低溫碳漿，低溫碳漿中摻入 的高分子黏合劑在低溫燒烤過程後，形成高分子存在電阻中，其 親水性為日後電阻阻值變化之主因，無法製造阻值精確，恆久不 變之電阻。再者，使用鍍鎳矽銅箔之嵌入式電阻製造工藝，與傳 統印刷線路板工法相同，所製成之嵌入式電阻，其阻值精確度及 阻值穩定性均遠優於厚膜式。可惜鎳矽銅箔生產成本十分高昂， 難以普及。.而美商麥特公司發明之無電解浸鍍法，其活化工藝採 φ 用鈀或其他貴金屬，而業界目前活化只有浸泡法，整片線路板均 浸入鈀液中，十分浪費。而且活化層只沉積微米級厚度，壓感光 膜時部分將黏在膜上，隨顯影沖洗流失，鹼性顯影液亦將溶去部 分活化層，導致活化功能可能受損，從而降低嵌入式電阻之可靠 性。這可能是該法自2001公開後，迄今未為市場接受之原因。 本發明與麥特公司發明之印刷電路板嵌入式薄膜電阻製造方法 雖類似，但藉由將活化工藝改為敏化及活化兩段，並將感光膜黏 貼及曝光顯影工藝移至敏化之後活化之前，利用調高敏化劑濃 ©度，克服黏貼感光膜及顯影工藝對敏化功能之干擾，而敏化劑如 氣化亞錫價格低廉，調高濃度成本增加有限。且活化劑鈀等貴金 屬價格高昂，本發明活化工藝排在曝光顯影後，一則確保鈀之活 化功能，而且昂貴鈀金屬只在後入式電阻上沉積可大幅降低成 本。 《解決問題之技術手段》 關於本發明係利用一印刷電路板之嵌入式薄膜電阻製造方 法，以實際解決一個甚至是數個前述相關技術中的限制及缺失。 201021641 本發明之印刷電路板之嵌入式薄膜電阻製造方法，再者，本 發明印刷電路板之嵌入式薄膜電阻製造方法製程及其達成之電 路板結構，只係一具體化之實施例。本發明主要係欲在單面或雙 面或多層電路板或增層式（build-up)電路板中，透過無電解浸鍍 技術，在印刷電路板上製造其電路設計所需的嵌入式電阻元件。 《相較於先前技術之功效》 基於前述本發明印刷電路板之嵌入式薄膜電阻製造方法，其 φ 可達到以下效果： 1. 本發明印刷電路板之嵌入式薄膜電阻製造方法，在印刷電 路板中形成薄膜電阻，可達到節省電路板放置電阻之空 .間，進而讓電路佈的更密，縮小電路板之尺寸。 2. 本發明印刷電路板之嵌入式薄膜電阻製造方法，在印刷電 路板中形成薄膜電阻，可減低甚至免除傳統電阻兩端引腳 之寄生電容電感效應，增強訊號傳輸之速度及品質，尤其 在高頻線路上，效果更明顯。 3_本發明印刷電路板之嵌入式薄膜電阻製造方法，其中，該 薄膜電阻層之製程與傳統印刷線路板製程相去不遠，因 此，可藉由相同之設備完成，而無需添購太多新型之設備。 容易量產並降低成本. 為使熟悉該項技藝人士瞭解本發明之目的、特徵及功效，茲 藉由下述具體實施例，並配合所附之圖式，對本發明詳加說明如 后。 【實施方式】 201021641 參考第一圖為顯示本發明印刷電路板 構具體實施例的流程圖，其各步驟依序說=入式薄膜電阻結 步驟101，在絕緣材料所製成之—敏 形成印刷線路板所需之鄉)，且依電路所 寸’在線路⑼上形成對應的單個或數個電阻需= ⑻圖所顯示。 自(22)參考第二 ❹ ^之綱層⑺上的線路⑼及各個電 一般的印刷線路板㈣，影像轉移及_等工藝製造，方法= 習知減成法（subtractive)，加成法（心 匕 ⑽祕ve)等製程。 “ &咖叫或半加成法 ⑶ΐΓΓ在已完成步驟1Q1之印刷線路板上浸鑛—層敏化層 的㈣⑻圖所顯不。該敏化層（3)具有強還原力，最常用 劑為氣化亞錫。該敏化層（3)需沉積至經過後續感光膜黏 貼及顯影製程後仍紐化功能。 步驟103,在已敏化之該銅箱層⑺表面塗布或黏貼一層抗浸 又的感光膜⑷，並利用曝光顯影方法，露出各個電阻框⑼，該 電阻框(23)暴露出該_層⑺上的敏化層（3);再將此板進行活 t /舌化似會在覆蓋有敏化層(3)的電阻框(2 3)表面還原成活化 (5)，電阻框(23)長度在線路(21)方向應與電阻窗⑽等長或略 長’以確保端點之接觸良好，參考第二_所顯示。 步驟104 #著將電路板浸入一無電解浸錢液中，該無電解 201021641 浸鍍液將只在電阻框（23)内的活化層（5)上鍍上一電阻層（6)，直 到該電阻層（6)厚度沉積至預期厚度，該沉積後之電阻層（6)即形 成電阻元件（61)，參考第二（d)圖所顯示。 前述電阻層（6)之浸鍍材料可以係高磷鎳，高磷鈀，或其它具 有電阻值之無電解浸鍍液。 步驟105，剝除該銅箔層（2)上的抗浸鍍感光膜（4)，參考第 0 二（e)圖所顯示。 步驟106，使用一雷射調阻機，對該電阻層（6)進行精密切 割，藉以修整電阻層（6)的阻值。修整後之電阻層（6)即形成電阻 元件（61)。 前述步驟中，為保護電阻層（6)之阻值不受後續製程的影響 而改變，可於各個電阻層（6)上塗佈保護油墨並烤固；此保護油 墨亦可於雷射調阻前先進行塗佈並烤固後，再進行雷射調阻，以 ❹減少調阻後，印刷烤固對電阻之影響。 參考第三圖為顯示本發明印刷電路板之嵌入式薄膜電阻結 構另一具體實施例的流程圖，其各步驟依序說明如下： 步驟201，在絕緣材料所製成之一玻纖布（1)的銅箔層（2)上， 黏貼或塗布一層感光膜（4)，經由曝光顯影蝕刻工藝，依線路所 需之電阻位置及尺寸，蝕刻形成單個或數個電阻窗（22)，再剝除 感光膜（4)，參考第四（a)圖所顯示。 201021641 步驟202，將已開好電阻窗（22)的銅箔層（2)置入敏化劑中， 使電阻窗（22)表面塗佈一敏化層（3)，藉以敏化該玻纖布（1)於各 個電阻齒（22)所裸露之化學聚合物絕緣介面，該敏化層（3)具有強 還原力，敏化層（3)需沉積至經過後續黏貼感光膜及顯影製程仍 具敏化功能’參考第四（b)圖所顯示。 步驟203，經由黏貼或塗布感光膜（4)及曝光顯影，露出電阻 Φ框（23)，電阻框P3)長度在線路(21)方向應與電阻窗（22)等長或略 長，以確保端點之接觸良好。再將此板進行活化，活化劑只會在 覆蓋有敏化層（3)的電阻框（23)上還原成活化層（5)，參考第四（c) 圖所顯示。 步驟204 &著將電路板浸人—無電解浸錢液中，在該活化 層（5)上Una層（6) ’直到該電阻層⑹厚度沉積至預期厚 a 儿積後之電阻層（6)即形成電阻元件(61)，其兩端為接觸點 (62)。再剝除感光膜（4)，參考第四⑷圖所顯示。 月）述之電阻層（6)’讀液可以係高填錄，高碟把材料，或其它 具有相當電阻值之無電解鍵液。 ’驟依電路所需經由黏貼或塗布感光膜及曝光顯影， ^銅箱層⑺及電阻層⑹上表面形成具有 阻(61) 圖像之抗㈣m⑺，參考第四⑷圖所顯示^ 步驟206 #刻該_層⑺使得該鋼落層⑺對應該抗姓 201021641 刻膜（7)之圖形而形成線路（21)，參考第四（f)圖所顯示。 步驟207，剝除該銅箔層（2)上的抗蝕刻膜（7)，參考第四（g) 圖所顯示。 步驟205至207為正片蝕刻工藝。 若採用負片電鍍蝕刻法（承第四（d)圖），亦可完成線路及嵌 入式電阻製造，步驟如下： 參 步驟208，依電路所需經由黏貼或塗布感光膜及曝光顯影， 在該銅箔層（2)及電阻層（6)上行成具有線路（21)及電阻元件（61) 圖像之抗電鍍膜（7，），參考第四（h)圖所顯示。 步驟209，電鍍銅（Cull)及抗蝕刻金屬（8)，如錫或錫鉛，至 預定厚度，剝除抗電鍍膜（7’），經由塗布感光膜及曝光顯影，在 電阻元件（61)形成抗蝕刻膜（7”），再進行蝕刻，參考第四⑴圖所 顯示。 參 步驟210,剝除該線路（21)上之抗蝕刻金屬（8)及電阻元件（61) 上之抗蝕刻膜（7”）。 步驟211，使用一雷射調阻器，將該電阻層（6)之各個電阻元 件（61)進行精密切割，藉以調整各個電阻元件（61)之形狀及尺 寸，而增進各電阻元件（61)的阻值精確度。 11 201021641 前述步驟中，為保護該電阻層（6)中各個電阻元件（61)之阻值 不受後續製程的影響而改變，可於各個電阻元件（61)上塗佈保護 油墨並烤固；此保護油墨亦可於雷射調阻前先進行塗佈並烤固 後，再進行雷射調阻，以減少調阻後，印刷烤固對電阻之影響。 參考第二（e)圖及第四⑴圖所顯示，透過前述之製程，所完 成之電路板主要係由一玻纖布（1)頂端依序形成一銅箔層（2)及一 電阻層（6)所構成。其中，該電阻層（6)具有數個電阻元件（61)， φ 各個電阻元件（61)依電路板之電路設計所需，而分別具有特定之 電阻值。前述之各個電阻元件（61)分別形成兩個接觸點（62)，各 個接觸點（62)係對應該銅箔層（2)中的各個線路（21)而形成電氣 連·接。 雖然本發明已以一具體實施例揭露如上，然其並非用以限定 本發明，任何熟悉此技藝者，在不脫離本發明之精神和範圍内， 當可作各種之更動與潤飾，因此本發明之保護範圍當視後附之申 請專利範圍所界定者為準。 12 201021641 【圖式簡單說明】 第一圖為顯示本發明印刷電路板之嵌入式薄膜電阻製造方法之 具體化實施例的流程圖； 第二(a)〜(e)圖為顯示關於第一圖之製程示意圖； 第三圖為顯示本發明印刷電路板之嵌入式薄膜電阻製造方法之 另一具體化實施例的流程圖； 第四（a)〜⑴圖為顯示關於第三圖之製程示意圖。 . 【元件符號說明】 玻纖布（1) 銅箔層（2) 線路(21) 電阻窗（22) 電阻框（23) 敏化層（3) 感光膜（4) 活化層（5) ®電阻層（6) 電阻元件（61) 接觸點（62) • 抗蝕刻膜（7) 抗電鍍膜（7’） 抗钱刻膜C7”） 抗蝕刻金屬(8) 銅(Cun) 13In general, the resistance of printed circuit boards is soldered by conventional passive components, and in addition, thick film and film are used to manufacture embedded resistors. Among them, the thick film process is to make the resistance carbon paste printed on the circuit board and baked, and then use the laser to adjust the machine to adjust the required resistance value; and the film embedded resistor manufacturing method is based on the voltage of the circuit board. In the process of preparation, the nickel-copper copper box is replaced by a nickel-plated copper box, and the nickel-niobium copper foil and the epoxy resin are pressed into one body. The nickel-bismuth copper foil has the nickel side facing inward and is bonded to the glass fiber cloth, and the copper foil surface is bonded. Towards the outside, according to the traditional circuit board process, exposure and development etching is performed. First, the nickel ruthenium layer and the copper layer are simultaneously etched by using an acidic etching solution, and then the alkaline etchant is used to etch only the copper layer above the embedded resistor to form a single layer. Or a number of nickel-iridium resistors with a specific length and width shape, and then trim the resistance of each nickel-iridium resistor through a laser mixer. In addition, a few years ago, the American company Macdermid used industrial high-phosphorus nickel or high-phosphorus palladium immersion plating to manufacture embedded resistors. The process was to manufacture, activate, paste, and expose the resistive film. The immersion plating electroless immersion plating solution, the stripping of the photosensitive film, and the laser resistance adjustment complete the manufacture of the film embedded resistor. SUMMARY OF THE INVENTION [Problems to be Solved] In the thick film or thin film resistor manufacturing method of the conventional printed circuit board, the thick film resistor manufactured by the electric power circuit of 201021641 has a low manufacturing cost, and the method is mature and simple, but unfortunately Because the fiberglass cloth of the circuit board is not resistant to high temperature, only the low temperature carbon slurry can be used. The polymer binder mixed in the low temperature carbon slurry forms a polymer in the resistance after the low temperature baking process, and the hydrophilicity is the resistance change of the future resistance. The main reason is that it is impossible to manufacture a resistor with accurate resistance and constant resistance. Furthermore, the embedded resistor manufacturing process using nickel-plated copper foil is the same as the conventional printed circuit board method, and the built-in resistors have better resistance accuracy and resistance stability than thick film. Unfortunately, the production cost of nickel-bismuth copper foil is very high and it is difficult to popularize. The electroless immersion plating method invented by American Meite Company uses palladium or other precious metals in the activation process. However, the industry currently activates only the immersion method, and the whole circuit board is immersed in the palladium liquid, which is very wasteful. Moreover, the activation layer is only deposited on the micron-scale thickness, and part of the activation layer will adhere to the film, and the organic developer will also dissolve part of the activation layer, which may damage the activation function, thereby reducing the embedded resistance. reliability. This may be the reason why the law has not been accepted by the market since it was published in 2001. The invention is similar to the manufacturing method of the embedded thin film resistor of the printed circuit board invented by the company, but by changing the activation process to two stages of sensitization and activation, and moving the photosensitive film and the exposure and development process to the sensitization and activation. Previously, the use of heightening sensitizer richness to overcome the interference of the sensitizing function of the adhesive film and the developing process, and the sensitizer such as vaporized stannous is low in price, and the increase in concentration and cost is limited. Moreover, the noble metal such as activator palladium is expensive, and the activation process of the present invention is arranged after exposure and development to ensure the activation of palladium, and the deposition of expensive palladium metal only on the back-in resistor can greatly reduce the cost. <<Technical Means for Solving the Problem>> The present invention relates to an embedded thin film resistor manufacturing method using a printed circuit board to practically solve the limitations and disadvantages of one or even the aforementioned related art. 201021641 The method for manufacturing the embedded thin film resistor of the printed circuit board of the present invention, and the process for manufacturing the embedded thin film resistor of the printed circuit board of the present invention and the circuit board structure thereof are only embodied in an embodiment. The invention mainly relates to an embedded resistor required for manufacturing a circuit design on a printed circuit board through an electroless immersion plating technique in a single-sided or double-sided or multi-layer circuit board or a build-up circuit board. element. <<Compared to the efficacy of the prior art>> Based on the above-described embedded thin film resistor manufacturing method of the printed circuit board of the present invention, φ can achieve the following effects: 1. The embedded thin film resistor manufacturing method of the printed circuit board of the present invention is on a printed circuit board The formation of the thin film resistor can save the space of the board placed resistance, thereby making the circuit cloth more dense and reducing the size of the circuit board. 2. The embedded thin film resistor manufacturing method of the printed circuit board of the invention forms a thin film resistor in the printed circuit board, which can reduce or even eliminate the parasitic capacitance and inductance effect of the pins at both ends of the conventional resistor, and enhance the speed and quality of the signal transmission, especially in On the high frequency line, the effect is more obvious. 3) The method for manufacturing an embedded thin film resistor of the printed circuit board of the invention, wherein the process of the thin film resistive layer is not far from the traditional printed circuit board process, and therefore can be completed by the same equipment without adding too much new type Equipment. The present invention will be described in detail with reference to the accompanying drawings and the accompanying drawings. [Embodiment] 201021641 Referring to the first figure, there is shown a flow chart showing a specific embodiment of the printed circuit board structure of the present invention, and the steps thereof are sequentially said to be in the form of a thin film resistor junction step 101, which is formed by an insulating material. The required town of the circuit board, and the corresponding single or several resistors formed on the line (9) according to the circuit size need to be shown in the figure (8). From (22) refer to the line (9) on the second layer (7) and the various printed circuit boards (4), image transfer and other processes, methods = conventional subtractive method, additive method ( Heart palpitations (10) secret ve) and other processes. " & coffee or semi-additive method (3) is shown in the (4) (8) diagram of the leaching-layer sensitization layer on the printed circuit board that has completed step 1Q1. The sensitizing layer (3) has strong reducing power, the most commonly used agent. In order to vaporize stannous, the sensitizing layer (3) needs to be deposited until after the subsequent photo-adhesive film sticking and developing process. Step 103, coating or adhering a layer of anti-dipping on the surface of the sensitized copper box layer (7) a further photosensitive film (4), and exposing each of the resistor frames (9) by an exposure and development method, the resistor frame (23) exposing the sensitizing layer (3) on the layer (7); and then the sheet is subjected to live t / tongue formation The surface of the resistor frame (23) covered with the sensitizing layer (3) is reduced to activation (5), and the length of the resistor frame (23) should be as long or slightly longer than the resistance window (10) in the direction of the line (21) to ensure The contact of the end point is good, as shown in the second _. Step 104 # Immerse the board in an electroless immersion liquid, the electroless 201021641 immersion bath will only be in the active layer in the resistor frame (23) (5 Is coated with a resistive layer (6) until the thickness of the resistive layer (6) is deposited to a desired thickness, and the deposited resistive layer (6) forms electricity The resistive element (61) is shown in the second (d) diagram. The immersion plating material of the resistive layer (6) may be high phosphorous nickel, high phosphorus palladium, or other electroless immersion plating solution having a resistance value. Stripping the anti-dip coating film (4) on the copper foil layer (2), as shown in Figure 0 (e). Step 106, using a laser trimming machine, the resistive layer (6) Precision cutting is performed to trim the resistance of the resistive layer (6). The trimmed resistive layer (6) forms a resistive element (61). In the foregoing steps, the resistance of the resistive layer (6) is not affected by subsequent processes. The effect is changed, and the protective ink can be coated on each of the resistive layers (6) and baked; the protective ink can also be coated and baked before the laser is adjusted, and then the laser is adjusted. After reducing the resistance, the effect of printing the baking on the resistance. Referring to the third figure, a flow chart showing another embodiment of the embedded thin film resistor structure of the printed circuit board of the present invention, the steps of which are described as follows: Step 201, Adhering or coating a copper foil layer (2) of a fiberglass cloth (1) made of an insulating material The photosensitive film (4) is etched to form a single or several resistance windows (22) according to the resistance position and size required for the line, and then the photosensitive film (4) is peeled off by referring to the fourth (a) drawing. 201021641 Step 202, placing the copper foil layer (2) of the resistor window (22) into the sensitizer, and coating the surface of the resistor window (22) with a sensitizing layer (3) to sensitize The fiberglass cloth (1) is exposed to a chemical polymer insulating interface exposed by each of the resistor teeth (22), the sensitizing layer (3) has a strong reducing force, and the sensitizing layer (3) needs to be deposited until the subsequent bonding of the photosensitive film and The developing process still has a sensitizing function 'refer to the fourth (b) figure. Step 203, by attaching or coating the photosensitive film (4) and exposing the developing, exposing the resistance Φ frame (23), the length of the resistor frame P3) is in the line ( 21) The direction should be as long as or slightly longer than the resistance window (22) to ensure good contact at the end points. The plate is then activated and the activator is only reduced to the active layer (5) on the resistor frame (23) covered with the sensitizing layer (3), as shown in Figure 4(c). Step 204 & the board is immersed in the electroless immersion liquid, on the active layer (5) the Una layer (6) 'until the thickness of the resistive layer (6) is deposited to the expected thickness of the resistor layer ( 6) A resistive element (61) is formed, the two ends of which are contact points (62). Then peel off the photosensitive film (4), refer to the figure shown in the fourth (4). The resistive layer (6)' reading fluid described in the month can be high-filled, high-disc material, or other electroless bond liquid having a relatively high resistance value. 'Subsequent to the circuit required to adhere or apply the photosensitive film and exposure and development, ^ the upper surface of the copper box layer (7) and the resistive layer (6) form an anti-(4) m(7) with a resistive (61) image, as shown in the fourth (4) figure ^ Step 206 # Engraving the layer (7) causes the steel falling layer (7) to form a line (21) corresponding to the pattern of the surname 201021641 film (7), as shown in the fourth (f) figure. Step 207, stripping the anti-etching film (7) on the copper foil layer (2), as shown in the fourth (g) figure. Steps 205 to 207 are positive film etching processes. If the negative plate plating etching method is adopted (in accordance with the fourth (d) figure), the circuit and the embedded resistor can be manufactured as follows: Step 208, according to the circuit required to adhere or apply the photosensitive film and exposure development, in the copper The foil layer (2) and the resistive layer (6) are formed as an anti-plating film (7,) having an image of the line (21) and the resistive element (61), as shown in the fourth (h) diagram. Step 209, electroplating copper (Cull) and anti-etching metal (8), such as tin or tin-lead, to a predetermined thickness, stripping the anti-plating film (7'), applying the photosensitive film and exposing the developing, in the resistive element (61) Forming an anti-etching film (7") and performing etching, as shown in the fourth (1) figure. Referring to step 210, stripping the anti-etching metal (8) on the line (21) and resisting etching on the resistive element (61) Membrane (7"). Step 211, using a laser resistor, precision cutting each resistor element (61) of the resistor layer (6), thereby adjusting the shape and size of each resistor element (61), and enhancing each resistor element (61) The accuracy of the resistance. 11 201021641 In the foregoing steps, in order to protect the resistance value of each resistance element (61) in the resistance layer (6) from being affected by the subsequent process, the protection ink may be coated on each resistance element (61) and baked; The protective ink can also be coated and baked before the laser is tuned, and then subjected to laser trimming to reduce the influence of the printed baking on the resistance after the adjustment. Referring to the second (e) and fourth (1) diagrams, through the foregoing process, the completed circuit board mainly comprises a copper foil layer (2) and a resistive layer sequentially formed from the top of a fiberglass cloth (1). (6) constituted. The resistor layer (6) has a plurality of resistor elements (61), and each of the resistor elements (61) has a specific resistance value according to the circuit design of the circuit board. Each of the aforementioned resistive elements (61) forms two contact points (62), and each contact point (62) is electrically connected to each of the wires (21) in the copper foil layer (2). The present invention has been described above with reference to a particular embodiment, and is not intended to limit the invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application. 12 201021641 [Simple description of the drawings] The first figure is a flow chart showing an embodiment of the method for manufacturing the embedded thin film resistor of the printed circuit board of the present invention; the second (a) to (e) are diagrams showing the first figure FIG. 3 is a flow chart showing another embodiment of the method for manufacturing the embedded thin film resistor of the printed circuit board of the present invention; and the fourth (a) to (1) are schematic diagrams showing the process of the third figure. [Description of component symbols] Fiberglass cloth (1) Copper foil layer (2) Line (21) Resistance window (22) Resistance frame (23) Sensitization layer (3) Photosensitive film (4) Activation layer (5) ® Resistor Layer (6) Resistive element (61) Contact point (62) • Anti-etching film (7) Anti-plating film (7') Anti-etched film C7") Anti-etching metal (8) Copper (Cun) 13