201019808 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種咬合式電路結構及其製法。特定+ 之，本發明係關於一種半突出式之電路結構及其製法。 【先前技術】 *電路板是電子裝置種重料轉。為了追 ❹、薄的成品厚度、因應細線路的需求、突破餘刻與信賴 缺點，嵌入式結構已逐漸興起。由於嵌入式結㈣將線路 圖案全部埋入基材中，因此有助於減少封裝成品的厚度。 入隨著電子產品朝輕薄短小發展，在各種不同的應用場 合中，例如，無線通訊領域、攜帶型電子產品、汽車儀表 板等等’電路板往往被置放於有限的產品内部空間中，或 錄 者是另透過排線及模組化的接頭，將電子產品的電子元件 外接至電路板，例如汽車儀表板或者設有電子功能的方向 盤。 就目前的技術而言，已知有數種方法以形成此等電路 板。其中一種方法稱為轉印技術，其提供一種具有圖案化 線路之待轉印版，再利用反壓方式將線路層埋壓入介電層 中。 。另外一種方法則是使用雷射將基材圖案化，來定義一 鎮嵌形式的結構，再使用一導電材料來填滿形成在基材上 201019808 的凹穴，以完成一埋入式結構。 一般說來，基材的表面要先經過活化，才能使得導電 材料成功地填滿在基材上的凹穴’通常是使用無電電鑛的 技術。更有甚者，還有一種材料是不需要先經過無電電鍍 技術的活化步驟’就可以讓導電材料填入基材上的凹穴中。 就當前的技術方案而言，其製作方式是直接線路設 ® 計。例如前述使用雷射將基材圖案化，來定義一鑲嵌形式 的結構*再使用一導電材料來填滿形成在基.材上的凹穴’ 以完成一嵌入式結構。由於集中細線路的開發，故同一線 路層都設計成雷射凹埋深度皆大於或等於線路銅層厚度要 求。由於雷射加工的產能與鑲嵌結構的尺寸，即面積*深度 之積，有明顯的負相關性。所以對於大範圍或是高深度的 鑲嵌結構來說，雷射加工的影響更大、造成產能明顯偏低， ❹ 不符合工業生產要求的經濟規模。 如何在持續追求「短、小、輕、薄」的潮流中不斷開 發新的技術，既能增加雷射加工的產能，又還能兼顧電路 板的品質，實乃本領域之一重要課題。 【發明内容】 本發明於是提出一種咬合式電路結構及其製法。本發 201019808 明咬合式電路的製法，可以一方面增加雷射加工的產能， 另一方面還能兼顧電路板的品質。實為一不可多得之技術 方案。 本發明首先提出一種咬合式（anchor)電路結構。本發 明之咬合式電路結構，包含基材、位於基材上之介電層、 位於介電層中之溝槽，以及填滿溝槽並與之咬合的之導電 材料。本發明咬合式電路結構中之導電材料部分嵌入於溝 槽中，且部分突出於溝槽外。 本發明其次提出一種形成咬合式電路結構的方法。首 先，提供一基材，基材另包含位於其上之一介電層。其次， 圖案化介電層以形成一溝槽。然後，將一導電材料填入溝 槽中並與溝槽咬合，使得導電材料部分嵌入於溝槽中並部 分突出於溝槽外。 由於本發明咬合式電路結構中之導電材料部分嵌入於 溝槽中又部分突出於溝槽外，所以使用雷射加工溝槽的凹 埋深度不再需要大於或等於線路銅層厚度。換言之，雷射 加工的溝槽深度可以減小到能維持電路板的品質要求即 可。既然鑲嵌結構的尺寸變小，雷射加工的產能便可以提 升至符合工業生產要求的經濟規模，而解決了前述的問題。 201019808 【實施方式】 質 本發明提供一種咬合式電路結構及其製法。經由本發 明咬合式電路的製法’會形成部分嵌入於溝槽中，而部分 突出於溝槽外之導電層’故稱為咬合式電路。於是一方面 增加雷射加工的產能之外，另一方面又同時兼顧電路板的 ΡΠ ❹ 本發明首紐種形㈣以咬合式電騎構的方 法。第1-4圖例示形成本發明咬合式電路結構方法的一實 施例。首先，請參考第丨圖，提供一基材1〇1，並於基材 上形成-介電層110。基材1G1可以為單層板，也可以為 多層板。介電層110通常由一不導電之材料所組成，例如 聚合物。可以使用例如印刷法、喷塗法或是滾塗法，將聚 合物之液體印在基材101上後，再待介電層11〇定型即可。 另外，尚可以非液態的膜狀型態方式，利用熱壓合形成於 ❹基材上。視情況需要，介電層110還可以分成為第一介電 層111與第二介電層112之組合。 介電層110中可以進一步包含觸媒顆粒。觸媒顆粒又 可以包含奈米顆粒及/或過渡金屬的配位化合物。過渡金屬 的配位化合物，例如可以是：過渡金屬氧化物、過渡金屬 氮化物、過渡金屬錯合物、過渡金屬螯合物或其組合。合 用的過渡金屬可以為鋅(Zn，Zinc)、銅（Cu, Copper)、銀(Ag， 201019808201019808 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD The present invention relates to a snap-on circuit structure and a method of fabricating the same. Specifically, the present invention relates to a semi-protruding circuit structure and a method of fabricating the same. [Prior Art] * The circuit board is an electronic device type heavy material transfer. In order to trace the thickness of the finished product, the thickness of the finished product, the need for fine lines, and the shortcomings of breakthrough and trust, the embedded structure has gradually emerged. Since the embedded junction (4) completely buryes the line pattern in the substrate, it helps to reduce the thickness of the packaged product. As electronic products move toward thin and light, in many different applications, such as wireless communications, portable electronic products, automotive dashboards, etc., 'circuit boards are often placed in limited product interior space, or The recorder additionally connects the electronic components of the electronic product to the circuit board through a cable and a modular connector, such as a car dashboard or an electronically functioned steering wheel. As far as current technology is concerned, several methods are known to form such boards. One of the methods is called a transfer technique, which provides a pattern to be transferred having a patterned line, and then uses a back pressure method to embed the wiring layer into the dielectric layer. . Another method is to use a laser to pattern the substrate to define a structure in the form of a well-inserted form, and then use a conductive material to fill the cavity formed on the substrate 201019808 to complete a buried structure. In general, the surface of the substrate is first activated to enable the conductive material to successfully fill the recesses on the substrate. The technique of using electroless ore is generally used. What is more, there is also a material that allows the conductive material to be filled into the recesses in the substrate without the need for an activation step prior to electroless plating. As far as the current technical solutions are concerned, they are produced in a direct line design. For example, the foregoing substrate is patterned using a laser to define a structure in the form of a damascene* and then a conductive material is used to fill the recesses formed in the substrate to complete an embedded structure. Due to the development of concentrated thin lines, the same line layer is designed such that the depth of the laser recess is greater than or equal to the thickness of the copper layer of the line. Due to the product of the laser processing capacity and the size of the mosaic structure, ie the area * depth, there is a significant negative correlation. Therefore, for large-scale or high-depth mosaic structures, the impact of laser processing is greater, resulting in significantly lower production capacity, and the economic scale that does not meet the requirements of industrial production. How to continuously develop new technologies in the trend of “short, small, light and thin”, which can increase the production capacity of laser processing and the quality of circuit boards, is an important subject in this field. SUMMARY OF THE INVENTION The present invention therefore proposes a snap-on circuit structure and a method of fabricating the same. This method of 201019808 Ming-knit circuit can increase the production capacity of laser processing on the one hand, and the quality of the circuit board on the other hand. It is a rare technical solution. The present invention first proposes an anchor circuit structure. The snap-on circuit structure of the present invention comprises a substrate, a dielectric layer on the substrate, a trench in the dielectric layer, and a conductive material that fills the trench and engages it. The conductive material in the snap-on circuit structure of the present invention is partially embedded in the trench and partially protrudes outside the trench. The present invention secondly proposes a method of forming a snap-in circuit structure. First, a substrate is provided which additionally includes a dielectric layer thereon. Second, the dielectric layer is patterned to form a trench. A conductive material is then filled into the trench and snapped into the trench such that the conductive material is partially embedded in the trench and partially protrudes out of the trench. Since the conductive material in the snap-on circuit structure of the present invention is partially embedded in the trench and partially protrudes beyond the trench, the depth of the recess using the laser processed trench no longer needs to be greater than or equal to the thickness of the copper layer of the trace. In other words, the depth of the trenches processed by the laser can be reduced to maintain the quality requirements of the board. Since the size of the mosaic structure is reduced, the capacity of laser processing can be increased to an economic scale that meets the requirements of industrial production, and the aforementioned problems are solved. 201019808 [Embodiment] The present invention provides a snap-on circuit structure and a method of manufacturing the same. The method of manufacturing the snap-on circuit of the present invention forms a conductive layer partially embedded in the trench and partially protruding outside the trench, which is called a snap-in circuit. Therefore, on the one hand, the production capacity of the laser processing is increased, and on the other hand, the circuit board is also taken into consideration. The first type of the invention (4) is a method of the occlusal electric riding structure. Figs. 1-4 illustrate an embodiment of a method of forming a snap-on circuit structure of the present invention. First, referring to the figure, a substrate 1〇1 is provided, and a dielectric layer 110 is formed on the substrate. The substrate 1G1 may be a single layer or a multilayer. Dielectric layer 110 is typically comprised of a non-conductive material, such as a polymer. The liquid of the polymer may be printed on the substrate 101 by, for example, a printing method, a spray coating method or a roll coating method, and then the dielectric layer 11 may be shaped. Further, it may be formed on the ruthenium substrate by thermocompression bonding in a non-liquid film type. Dielectric layer 110 can also be divided into a combination of first dielectric layer 111 and second dielectric layer 112, as desired. Catalyst particles may further be included in the dielectric layer 110. The catalyst particles may in turn comprise coordination compounds of nanoparticles and/or transition metals. The coordination compound of the transition metal may be, for example, a transition metal oxide, a transition metal nitride, a transition metal complex, a transition metal chelate or a combination thereof. The transition metals used may be zinc (Zn, Zinc), copper (Cu, Copper), silver (Ag, 201019808).
Silver)、金(Au，Gold)、鎳(Ni，Nickel)、鈀(Pd，Palladium)、 麵（Pt，Platinum)、鈷（Co, Cobalt)、錄（Rh，Rhodium)、銀（Ir， Iridium)、麵（In, Indium)、鐵(Fe，Iron)、猛(Mn，Manganese)、 鉻（Cr, Chromium)、鑛（W，tungsten)、飢(V, Vanadium)、组 (Ta, Tantalum)或欽(Ti，Titanium)…等等。一但使用例如雷 射活化以後，介電層110在此觸媒顆粒的幫助下，可以辅 助另一導電層的成形。 其次’請參考第2圖，繼績將介電層110圖案化以形 成溝槽120。溝槽120可以視情況需要，具有多種之形狀， 例如V形121、U形122、梯形123、方形124或其組合。 第2圖即例示溝槽一些可能形狀之剖面圖。 圖案化介電層110的方式可以使用物理方法及/或化學 方法。物理方法可以包括使用雷射燒蝕製程、電聚餘刻製 ⑩ 程與機械切割製程…等等多種方法。其中，可以使用紅外 線雷射、紫外線雷射、準分子（Excimer)雷射或遠紅外線 雷射等雷射光源來進行雷射燒蝕製程。或是，可以使用水 刀切割、喷砂與外型切割來進行機械切割製程。 如果使用化學方法來圖案化介電層時，可以使用包括 氧化還原钱刻、驗性触刻、酸性#刻與非質子極性落劑姓 刻…等等多種方法。用來進行非質子極性溶劑触刻之溶 201019808 劑’例如為N-甲基-2-四氫0比咯酿J(N-Methyl-2-Pyrrolidone, NMP)、二甲基乙醯胺(N，N-dimethylacetamide, DMAC)、二 甲基甲醯胺(Dimethylformamide，DMF)、二甲基亞砜 (Dimethyl sulfoxide, DMSO)、四氫0夫喃（Tetrahydrofuran， THF)、1，2-二氣乙烷（l，2-dichloroethane，DCE)、氣仿 (Chloroform)或其組合。 ^ 接下來’請參考第3圖，完成介電層110的圖案化之 Ό 後’即可將一導電材料130填入溝槽120中，例如使用電 鍍法’將導電材料130，例如銅與鋁，填入溝槽120。填入 溝槽120中的導電材料no還會與溝槽120咬合，於是使 得導電材料130、介電層11〇與基材1〇ι —起形成了圖案 化電路結構。 需要特別注意的是，填入溝槽12〇中的導電材料130， ❹ 是部分嵌入於溝槽120中並部分突出於溝槽120外的。換 句話說，導電材料130並不是完全嵌入於溝槽120中，也 不是完全突出於介電層11〇外。嵌入於溝槽120中的導電 材料130的比例視情況需要而定，例如，嵌入之深度為導 電材料130總高度之ι%_70%之間，祇要溝槽12〇能將導 電材料130充分咬合，使得導電材料13〇能夠符合拉力測 試規格，較適嵌入之深度，可以不大於導電材料130總高 度之三分之一。 201019808 如果介電層110分成第一介電層111與第二介電層112 之組合時，在本發明一實施態樣中，第二介電層112可以 視為一阻障層，或具有較第一介電層111更高之雷射能量 吸收率。於是當導電材料130填入溝槽120後，即可以移 除第二介電層112,使得導電材料130部分嵌入於溝槽120 中並部分突出於溝槽120外，如第4圖所示，以突顯本發 ^ 明特徵。 ❹ 在經過上述步驟後，即可得到本發明之咬合式電路結 構。第5圖例示本發明咬合式電路結構的一實施例。本發 明之咬合式電路結構100，如第5圖所示，包含基材101、 介電層110、多種形狀之溝槽120，例如V形121、U形 122、梯形123、方形124與導電材料130。填入溝槽120 中的導電材料130即與溝槽120咬合，而部分嵌入於溝槽 © .120中並部分突出於介電層110外。本發明咬合式電路結 構100之其餘特徵與變化可以參考前者，而不予贅述。 由於本發明咬合式電路結構中之導電材料形成部分嵌 入於溝槽中並部分突出於溝槽外之特徵，所以使用雷射加 工的溝槽的深度不再需要大於或等於線路銅層厚度。換言 之，導電材料嵌入於溝槽部分的深度只要足以通過線路拉 力測試規格即可。本發明咬合式電路的製法，可以一方面 11 201019808 增加雷射加工的產能，本發明咬合式電路另一方面還能兼 顧電路板的品質。實為魚與熊掌兼得之優良技術方案。 以上所述僅為本發明之一實施例，凡依本發明申請專 利範圍所做之均等變化與修飾，皆應屬本發明之涵蓋範圍。 【圖式簡單說明】 第1-4圖例示形成本發明咬合式電路結構方法的一實 施例。 第5圖例示本發明咬合式電路結構的一實施例。 【主要元件符號說明】 100咬合式電路結構 101基材 110介電層 G 111第一介電層 112第二介電層 120溝槽 121、122、123、124 形狀 130導電材料 12Silver), Au (Gold), Nickel (Ni, Nickel), Pd (Palladium), Pt (Plat, Platinum), Co (Cobalt), Rh (Rh, Rhodium), Silver (Ir, Iridium) ), In, Indium, Fe, Iron, Manganese, Cr (Chromium), Mine (W, Tungsten), V (Vanadium), Group (Ta, Tantalum) Or Chin (Ti, Titanium)...etc. Once activated by, for example, laser activation, the dielectric layer 110, with the aid of the catalyst particles, can aid in the formation of another conductive layer. Next, please refer to FIG. 2, and the dielectric layer 110 is patterned to form the trenches 120. The trenches 120 can have a variety of shapes, such as a V-shape 121, a U-shape 122, a trapezoid 123, a square 124, or a combination thereof, as desired. Figure 2 is a cross-sectional view showing some of the possible shapes of the grooves. The manner in which the dielectric layer 110 is patterned may use physical methods and/or chemical methods. Physical methods can include a variety of methods, including laser ablation processes, electro-polymerization processes, and mechanical cutting processes. Among them, a laser ablation process can be performed using a laser source such as an infrared laser, an ultraviolet laser, an excimer laser or a far infrared laser. Alternatively, a waterjet process can be performed using waterjet cutting, sand blasting, and profile cutting. If chemical methods are used to pattern the dielectric layer, a variety of methods including redox engraving, inspective lithography, acidic engraving, and aprotic polar repellent surrogate can be used. The solution used for aprotic polar solvent etching 201019808 'for example, N-Methyl-2-Pyrrolidone (NMP), dimethylacetamide (N , N-dimethylacetamide, DMAC), Dimethylformamide (DMF), Dimethyl sulfoxide (DMSO), Tetrahydrofuran (THF), 1,2-Phase B Alkyl (l, 2-dichloroethane, DCE), gasoform (Chloroform) or a combination thereof. ^ Next, please refer to FIG. 3, after completing the patterning of the dielectric layer 110, a conductive material 130 can be filled into the trench 120, for example, using a plating method to electrically conductive material 130, such as copper and aluminum. Fill in the groove 120. The conductive material no filled in the trench 120 also engages with the trench 120, thereby forming the conductive material 130, the dielectric layer 11 and the substrate 1 to form a patterned circuit structure. It is important to note that the conductive material 130, ❹ filled in the trench 12, is partially embedded in the trench 120 and partially protrudes outside the trench 120. In other words, the conductive material 130 is not completely embedded in the trench 120, nor is it completely protruding beyond the dielectric layer 11. The proportion of the conductive material 130 embedded in the trench 120 is determined as needed, for example, the depth of the embedding is between 7% and 70% of the total height of the conductive material 130, as long as the trench 12 〇 can fully engage the conductive material 130, The conductive material 13〇 can be made to conform to the tensile test specification, and the depth of the suitable embedding can be no more than one third of the total height of the conductive material 130. 201019808 If the dielectric layer 110 is divided into a combination of the first dielectric layer 111 and the second dielectric layer 112, in an embodiment of the invention, the second dielectric layer 112 can be regarded as a barrier layer, or has a comparative The first dielectric layer 111 has a higher laser energy absorption rate. Then, after the conductive material 130 is filled into the trench 120, the second dielectric layer 112 can be removed, so that the conductive material 130 is partially embedded in the trench 120 and partially protrudes outside the trench 120, as shown in FIG. To highlight the characteristics of this issue. ❹ After the above steps, the snap-on circuit structure of the present invention can be obtained. Fig. 5 illustrates an embodiment of the snap-on circuit structure of the present invention. The snap-on circuit structure 100 of the present invention, as shown in FIG. 5, comprises a substrate 101, a dielectric layer 110, and a plurality of trenches 120, such as a V-shaped 121, a U-shaped 122, a trapezoid 123, a square 124, and a conductive material. 130. The conductive material 130 filled in the trench 120 is engaged with the trench 120 and partially embedded in the trench © .120 and partially protrudes outside the dielectric layer 110. For the remaining features and variations of the snap-on circuit structure 100 of the present invention, reference may be made to the former without further elaboration. Since the conductive material in the snap-on circuit structure of the present invention forms a feature that is partially embedded in the trench and partially protrudes outside the trench, the depth of the trench using the laser processing no longer needs to be greater than or equal to the thickness of the copper layer of the wiring. In other words, the depth at which the conductive material is embedded in the groove portion is sufficient to pass the line tensile test specification. The manufacturing method of the occlusal circuit of the present invention can increase the throughput of laser processing on the one hand 11 201019808, and the occlusion circuit of the present invention can also balance the quality of the circuit board. It is an excellent technical solution for both fish and bear's paw. The above is only one embodiment of the present invention, and all changes and modifications made to the patent range of the present invention should be covered by the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1-4 illustrate an embodiment of a method of forming a snap-on circuit structure of the present invention. Fig. 5 illustrates an embodiment of the snap-on circuit structure of the present invention. [Main component symbol description] 100 occlusal circuit structure 101 substrate 110 dielectric layer G 111 first dielectric layer 112 second dielectric layer 120 trench 121, 122, 123, 124 shape 130 conductive material 12