201015143 v / χ v i , * χ W 25703twf.doc/n 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種主動元件陣列基板，且特別是有 關於一種液晶顯示面板中之主動元件陣列基板。 【先前技術】 現今社會多媒體技術相當發達，多半受惠於半導體元 件與顯示裝置的進步。就顯示器而言，具有高畫質、空間 © _效率佳、低消耗功率、無輻射等優麟性之液晶顯示 面板已逐漸成為市場之主流。一般液晶顯示面板主要是由 主動70件陣列基板、彩色濾光基板以及夾於兩者之間的液 晶層所組成。 圖1是習知之主動元件陣列基板之示意圖。請參考圖 1，習知之主動元件陣列基板100具有一主動區Α與一周 邊線路區B。此主動元件陣列基板100主要由一基板11〇、 多個晝素單兀120、多條掃描線130、多條資料線14〇、多 個開關元件150、一匯流線160、多條測試線172、174與 罾 多個驅動電路18〇所構成。其中，畫素單元12〇配置於/主 動區A内，且畫素單元120會分別與所對應之掃描線'13〇 與資料線140電性連接。 t而s，為了測試的需要，主動元件陣列基板 上都會有測試線路。詳言之，位於周邊線路區B内之開關 兀件150具有一閘極150g、一源極15加與_汲極i5〇d。 開關元件150之閘極150g會與匯流線16〇電性連接，而匯 流線160之另一端連接至一接墊P。此外，測試線172會 5 201015143 υ/iuu/iiW 25703tw£doc/n 與奇數列關it件15G之源極15Gs電性連接，而測試線 174會與偶數列開關元件15〇之源極15〇s電性連接。 值得注意的是，開關元件15〇之沒極15〇d會與掃描 線130=:端電性連接。#閘極訊號藉由婦描線13〇傳送 至晝素單元120中時，由於掃描線13〇之末端會與開關元 件150相連接，因此很容易導致開關元件15〇有不正常開 啟之現象。：1^會造成訊號嚴重失真，進而使液晶顯示面板 Φ 之顯示品質大幅下降，實有改進之必要。 【發明内容】 有鑑於此，本發明提供一種主動元件陣列基板，其可 有效避訊號失真，以有效提升顯示品質。 本發明提出-種主動元件陣列基板，其具有一主動區 與-，邊線路區。此主動元件陣列基板包括—基板、多個 晝素單元、多條掃摇線、多條資料線、多個開關元件、一 匯流線、一測試線路組與至少一驅動電路。其中，畫素單 il1 ㈣排列於基板上之主動區内。掃描線與資料線配置於 基板上’且各晝素單元分別與所對應之掃描線與資料線電 性連接。此外’開關元件配置於基板上之周邊線路區内。 其中’各開關元件具有一閘極、一源極與一沒極。另外， 掃描線由主動區延伸至周邊線路區，以分別與開關元件之 /及極電性連接。上述之匯流線配置於周邊線路區内，並與 開關元件之閑極電性連接。測試線路組配置於周邊線路區 内並與開關元件之源極電性連接。本發明之驅動電路配 置於周邊線路區内，並與匯流線電性連接。此驅動電路適 6 201015143 25703twf.doc/n 於藉由匯流線輸入一訊號’以關閉開關元件。 在本發明之一實施例中’上述之主動元件陣列基板更 包括至少一擬配線（dummy line)，且擬配線由主動區向 兩侧延伸至周邊線路區，而電性連接於驅動電路與匯流線 之間。 z' 、 ❹201015143 v / χ vi , * χ W 25703twf.doc/n IX. Description of the Invention: [Technical Field] The present invention relates to an active device array substrate, and more particularly to an active device in a liquid crystal display panel Array substrate. [Prior Art] Today's social multimedia technology is quite developed, and most of them benefit from the advancement of semiconductor components and display devices. As far as the display is concerned, the LCD panel with high image quality and space © _ good efficiency, low power consumption, no radiation, etc. has gradually become the mainstream of the market. Generally, the liquid crystal display panel is mainly composed of an active 70-piece array substrate, a color filter substrate, and a liquid crystal layer sandwiched therebetween. 1 is a schematic view of a conventional active device array substrate. Referring to FIG. 1, the active device array substrate 100 has an active region and a peripheral line region B. The active device array substrate 100 is mainly composed of a substrate 11 , a plurality of pixel units 120 , a plurality of scanning lines 130 , a plurality of data lines 14 , a plurality of switching elements 150 , a bus line 160 , and a plurality of test lines 172 . And 174 and 罾 a plurality of drive circuits 18 〇. The pixel unit 12 is disposed in the / active area A, and the pixel unit 120 is electrically connected to the corresponding scan line '13' and the data line 140, respectively. t and s, for the test needs, there will be test lines on the active device array substrate. In detail, the switch element 150 located in the peripheral line region B has a gate 150g, a source 15 plus a _pole i5〇d. The gate 150g of the switching element 150 is electrically connected to the bus line 16A, and the other end of the bus line 160 is connected to a pad P. In addition, the test line 172 will be electrically connected to the source 15Gs of the odd-numbered column 15G, and the test line 174 will be connected to the source 15 of the even-numbered column switching element 15 5 5 201015143 υ / iu / iiW 25703 tw doc / n s electrical connection. It should be noted that the pole 15 〇d of the switching element 15 is electrically connected to the scan line 130=: terminal. When the gate signal is transmitted to the pixel unit 120 by the strobe line 13 ,, since the end of the scanning line 13 会 is connected to the switching element 150, it is easy to cause the switching element 15 to be abnormally turned on. :1^ will cause serious distortion of the signal, which will greatly reduce the display quality of the liquid crystal display panel Φ, which is necessary for improvement. SUMMARY OF THE INVENTION In view of this, the present invention provides an active device array substrate that can effectively avoid signal distortion to effectively improve display quality. The present invention proposes an active device array substrate having an active region and a side line region. The active device array substrate includes a substrate, a plurality of pixel units, a plurality of sweep lines, a plurality of data lines, a plurality of switching elements, a bus line, a test line group and at least one driving circuit. Wherein, the pixels il1 (four) are arranged in the active area on the substrate. The scan lines and the data lines are disposed on the substrate ′ and each of the pixel units is electrically connected to the corresponding scan line and the data line. Further, the switching element is disposed in a peripheral wiring region on the substrate. Wherein each of the switching elements has a gate, a source and a gate. In addition, the scan line extends from the active area to the peripheral line area to be electrically connected to the / and the switching elements, respectively. The above-mentioned bus line is disposed in the peripheral line region and is electrically connected to the idle pole of the switching element. The test line group is disposed in the peripheral line area and electrically connected to the source of the switching element. The driving circuit of the present invention is disposed in the peripheral circuit region and is electrically connected to the bus bar. The driving circuit is adapted to turn off the switching element by inputting a signal ' by the bus line. In an embodiment of the present invention, the active device array substrate further includes at least one dummy line, and the dummy wiring extends from the active region to the two sides to the peripheral circuit region, and is electrically connected to the driving circuit and the confluence. Between the lines. z', ❹
在本發明之一實施例中，上述之測試線路組包括一第 測试線與一第二測試線。其中，第一測試線配置於基板 上之周邊線路區内，並與偶數列之開關元件之源極電性連 接二此外，第二測試線配置於基板上之周邊線路區内，並 與奇數列之開關元件之源極電性連接。 ，本發明之—實施财’上述之主動元件陣列基板更 =括夕個接塾，其配置於周邊線路區内，且與匯流線電性 ，本發明之—實施财，上述之主航料列基板更 測 触，魏錄周雜路_，且分別與第 式線與第二測試線電性連接。 其中St之2施例中，上述之主動元件陣列基板， 私旦素早％包括—主動元件與—晝素電極。其中，主 之主動區内’且分別與所對應之掃描 連接㈣線電㈣接。此外’畫素電極會魅動元件電性 本發明峨狀開關元件可崎過匯流線， 却電性連接。此驅動電路可藉由匯流線而輸 而與驅動 出一低電壓 ，以關閉開關元件。因此，本發明主動區内之晝素單 201015143 …*------W 25703twf.doc/n 測試線路組隔絕，效免訊號失 之上述特徵和伽能更賴賴，下文特 並配合所附圖式，作詳細說明如下。In an embodiment of the invention, the test circuit set includes a first test line and a second test line. Wherein, the first test line is disposed in the peripheral circuit region on the substrate, and is electrically connected to the source of the even-numbered column of switching elements. In addition, the second test line is disposed in the peripheral circuit region on the substrate, and the odd-numbered column The source of the switching element is electrically connected. The active device array substrate of the present invention is further arranged in a peripheral circuit region, and is electrically connected to the bus bar. The present invention is implemented as the main carrier column. The substrate is further touched, and Wei Lu Zhou is _, and is electrically connected to the second line and the second test line, respectively. In the example of St 2, the above-mentioned active device array substrate, the self-density element includes the active element and the halogen element. Among them, the active area of the main unit is connected to the corresponding scan connection (4) line (4). In addition, the pixel electrode will be electrically connected to the element. The switch element of the present invention can be connected to the bus line but electrically connected. The driving circuit can be driven by a bus line to drive a low voltage to turn off the switching element. Therefore, the test unit of the active area of the present invention is isolated from the test circuit group 201015143 ...*------W 25703twf.doc/n, and the above-mentioned features and gamma energy are more dependent on the loss of the signal. The drawings are described in detail below.
❹ 圖。發明之—實施狀转元件_基板示意 二考目2A，本發明之主動元件陣列基板2〇〇具有一 括- ^與—周邊線路區B。此主動元件陣列基板200包 二土板210、多個畫素單元2 2 〇、多條掃描線2 3 〇、多條 貝料線24G、多個開關元件25G、—匯流線細、一測試線 路組270與至少一驅動電路28〇。其中，晝素單元22〇陣 列排列於基板21〇上之主動區A内，且晝素單元MO分別 與所對應之掃描線230與資料線24〇電性連接。 在一實施例中，畫素單元220可包括一主動元件222 與-畫素電極224。其中，主動元件222配置於基板21〇 上之主動區A内，且分別與所對應之掃描線23〇與資料線 240電性連接。此外，晝素電極224會與主動元 22 性連接]實務上，開關訊號可以透過掃描線23〇之傳遞而 將主動元件222開啟，在主動元件222開啟後顯示訊號可 以透過資料線240而傳遞至畫素電極224中。 ‘然’所屬技術領域中具有通常知識者應知每一畫素 ^元220至少包括一主動元件222與一晝素電極224。這 &視晝素單元220之效能設計而定。例如具有預充電 (pre-charge )效能設計之畫素單元224可能就需要兩個以 上的主動元件222。因此，圖2A所示之晝素單元220之佈 201015143 …*------W 257〇3twf.doc/n 局（layout)僅用以說明，在此並不刻意侷限每一晝素單 元220中主動元件222之數目。 另一方面，位於周邊線路區B内之開關元件250具有 一閘極250g、一源極250s與一汲極250d。所有開關元件 250之閘極250g會與周邊線路區b内之匯流線260電性連 接。此外，開關元件250之汲極250d會與掃描線230電性 連接，而開關元件250之源極250s會與測試線路組270 義 電性連接。 在一實施例中，測試線路組270可以包括一第一測試 線272與一第二測試線274。其中，位於周邊線路區;β内 之第一測試線272可與奇數列開關元件250之源極25〇s 電性連接。此外，位於周邊線路區B内之第二測試線274 可並與偶數列開關元件250之源極250s電性連接。實務 上，第一測5式線272與第二測試線274之末端更可連接至 一接墊P。當然，所屬技術領域中具有通常知識者應知第 一測試線272與第二測試線274連接至開關元件25〇之源 〇 極250s也可以有其它的方式，在此僅舉例說明並無意侷、 限。 一 特別的是，位於周邊線路區B内之驅動電路28〇會與 匯流線260電性連接。實務上，匯流線260可藉由接墊p， 而與驅動電路280電性連接。此驅動電路28〇適於藉由匯 流線260輸入一訊號，以強制關閉開關元件25〇。^訊號 例如是低閘極電壓（Vgl)。如此一來，當開關元件 被關閉時，主動區A内之晝素單元220可有效與周邊線路 W 25703twf.doc/n 201015143 區B内之第一測試線272與第二測試線274隔絕，以有效 避免訊號失真’進而可有效提升顯示品質。 > ❹ 這裡要說明的是，匯流線260可藉由多種方式而與驅 動電路280電性連接，如下所述。圖2B〜2D是本發明其 它佈局形式之主動元件陣列基板示意圖。如圖2B所示& 主動兀件陣列基板300更包括至少一擬配線231 line)。此擬配線231由主動區a向兩側延伸至周邊線路 區B，而電性連接於驅動電路28〇與匯流線26〇之間。當 然，擬配線231亦可配置於不同側，如圖2C所示。此外二 如圖2D所示’主動元件陣列基板5〇〇可具有兩條擬配線 231。^1述各種佈局形式之主動元件_基板觸樣可達到 避免況號失真與提升顯示品質之目的。 、综上所述，本發明測試用之開關元件會與驅動電路電 性，接。此轉電路可㈣擬配線或直接藉由匯流線而輸 ^低電壓之訊號，以關閉開關元件。因此，本發明 基板之晝素單元可有效與周邊線路區内之測試線 D、以有效避免訊號失真，進而提升顯示品質。 限定it發明已以較佳實施例揭露如上，然其並非用以 之中具有通常知識者，在不 因此本範圍内，當可作些許之更動與潤飾， 為準。W之保護制當視後附之中請專利範圍所界定者 【圖式簡單說明】 =1是^知之主動元件陣列基板之示意圖。 θ 2Α是本發明之一實施例之主動元件陣列基板示意❹ Figure. EMBODIMENT OF THE INVENTION - Embodiment of the substrate - The substrate 2A, the active device array substrate 2 of the present invention has a - - and - peripheral line region B. The active device array substrate 200 includes two earth plates 210, a plurality of pixel units 2 2 〇, a plurality of scanning lines 2 3 〇, a plurality of shell lines 24G, a plurality of switching elements 25G, a bus line, and a test line. Group 270 is coupled to at least one drive circuit 28A. The matrix unit 22 array is arranged in the active area A on the substrate 21, and the pixel unit MO is electrically connected to the corresponding scan line 230 and the data line 24, respectively. In an embodiment, the pixel unit 220 can include an active component 222 and a pixel electrode 224. The active component 222 is disposed in the active area A on the substrate 21A, and is electrically connected to the corresponding scan line 23A and the data line 240, respectively. In addition, the pixel electrode 224 is connected to the active element 22. In practice, the switching signal can be turned on by the transmission line 23 to turn on the active element 222. After the active element 222 is turned on, the display signal can be transmitted through the data line 240 to In the pixel electrode 224. It should be understood by those of ordinary skill in the art to which the invention belongs. Each element 220 includes at least one active element 222 and one elementary electrode 224. This & visual element unit 220 depends on the performance design. For example, a pixel unit 224 having a pre-charge performance design may require more than two active elements 222. Therefore, the fabric 201015143 ...*------W 257〇3twf.doc/n layout of the halogen unit 220 shown in FIG. 2A is for illustrative purposes only, and does not deliberately limit each pixel unit. The number of active elements 222 in 220. On the other hand, the switching element 250 located in the peripheral line region B has a gate 250g, a source 250s and a drain 250d. The gate 250g of all switching elements 250 is electrically coupled to the bus line 260 in the peripheral line region b. In addition, the drain 250d of the switching element 250 is electrically connected to the scan line 230, and the source 250s of the switching element 250 is electrically connected to the test line group 270. In one embodiment, test line set 270 can include a first test line 272 and a second test line 274. The first test line 272 in the peripheral line region is electrically connected to the source 25 〇s of the odd-numbered column switching element 250. In addition, the second test line 274 located in the peripheral line region B can be electrically connected to the source 250s of the even-numbered column switching element 250. In practice, the ends of the first test line 272 and the second test line 274 are more connectable to a pad P. Of course, those skilled in the art should know that the first test line 272 and the second test line 274 are connected to the source drain 250s of the switching element 25 也. There are other ways, and only the example is not intended. limit. In particular, the drive circuit 28A located in the peripheral line region B is electrically connected to the bus bar 260. In practice, the bus line 260 can be electrically connected to the driving circuit 280 by the pad p. The drive circuit 28 is adapted to input a signal via the bus line 260 to forcibly turn off the switching element 25A. The ^ signal is for example a low gate voltage (Vgl). In this way, when the switching element is turned off, the pixel unit 220 in the active area A can be effectively isolated from the first test line 272 and the second test line 274 in the peripheral line W 25703twf.doc/n 201015143 Effectively avoid signal distortion' and thus improve display quality. > ❹ It is to be noted that the bus line 260 can be electrically connected to the driving circuit 280 in various ways, as described below. 2B to 2D are schematic views of an active device array substrate in another layout form of the present invention. As shown in FIG. 2B, the active device array substrate 300 further includes at least one dummy wire 231 line). The dummy wiring 231 extends from the active area a to both sides to the peripheral line area B, and is electrically connected between the driving circuit 28A and the bus line 26A. Of course, the wiring 231 can also be arranged on different sides as shown in Fig. 2C. Further, as shown in Fig. 2D, the active device array substrate 5 can have two pseudo wirings 231. ^1 The active components of various layout forms _ substrate touch can achieve the purpose of avoiding the distortion of the condition and improving the display quality. In summary, the switching element for testing of the present invention is electrically connected to the driving circuit. The switching circuit can (4) bewiring or directly input a low voltage signal through the bus line to turn off the switching element. Therefore, the pixel unit of the substrate of the present invention can effectively cooperate with the test line D in the peripheral circuit area to effectively avoid signal distortion, thereby improving display quality. The invention has been described above by way of a preferred embodiment, and it is not intended to be a one of ordinary skill in the art. The protection system of W is defined as the scope defined by the patent scope. [Simplified description of the diagram] =1 is a schematic diagram of the active device array substrate. θ 2Α is a schematic diagram of an active device array substrate according to an embodiment of the present invention
201015143 / Λ. Λ. ^ f ^ A w 25703twf.doc/n 圖。 圖2B〜2D是本發明其它佈局形式之主動元件陣列基 板示意圖。 【主要元件符號說明】 100、200、300、400、500 :主動元件陣列基板 110、210 :基板 120、220 :畫素單元 130、230 :掃描線 ❹ 140、240 :資料線 150、250 :開關元件 150g、250g :閘極 150s、250s :源極 150d、250d :汲極 160、260 :匯流線 172、174 :測試線 180、280 :驅動電路 φ 222:主動元件 224 :晝素電極 231 :擬配線 270 :測試線路組 272 :第一測試線 274 :第二測試線 A ·主動區 B:周邊線路區 P :接墊 11201015143 / Λ. Λ. ^ f ^ A w 25703twf.doc/n Figure. 2B to 2D are schematic views of an active device array substrate of another layout of the present invention. [Description of main component symbols] 100, 200, 300, 400, 500: active device array substrate 110, 210: substrate 120, 220: pixel unit 130, 230: scanning line 140, 240: data line 150, 250: switch Element 150g, 250g: gate 150s, 250s: source 150d, 250d: drain 160, 260: bus line 172, 174: test line 180, 280: drive circuit φ 222: active element 224: halogen electrode 231: Wiring 270: Test Line Group 272: First Test Line 274: Second Test Line A • Active Area B: Peripheral Line Area P: Pad 11