TW201120548A - Slim border display panel and electronic device using the same - Google Patents

Slim border display panel and electronic device using the same Download PDF

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Publication number
TW201120548A
TW201120548A TW98142791A TW98142791A TW201120548A TW 201120548 A TW201120548 A TW 201120548A TW 98142791 A TW98142791 A TW 98142791A TW 98142791 A TW98142791 A TW 98142791A TW 201120548 A TW201120548 A TW 201120548A
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Taiwan
Prior art keywords
insulating layer
line segment
scan line
display panel
scan
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TW98142791A
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Chinese (zh)
Inventor
Chih-Chang Lai
Jyun-Sian Li
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Wintek Corp
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Priority to TW98142791A priority Critical patent/TW201120548A/en
Publication of TW201120548A publication Critical patent/TW201120548A/en

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Abstract

A slim border display panel including a plurality of pixels, a plurality of data lines and a plurality of scan lines is provided. The pixels are arranged in a matrix and each have a switch element, a first edge and a second edge perpendicular to the first edge. Each data line is disposed along the first edge and connected with an input terminal of the switch element. Each scan line has a first scan line segment and a second scan line segment connecting the first scan line segment. The first scan line segment is parallel to and overlapped with the data line. The second line segment is disposed along the second edge and connected with the control terminal of the switch element.

Description

201120548 ^ * i 六、發明說明: 【發明所屬之技術領域】 明是有關於—種顯示面板,且特別是有關於一種 乍i框”'、員不面板與應用其之電子裝置。 【先前技術】 f著顯示技術的發展,目前市面上具備顯示功能之電 曰產叩已具備许多能夠滿足使用者的功能,如 1攜帶之優點。然而’在市場產品推陳出新與高 下,各家廠商必須針對產品的設計不斷的尋 求更新的解法,以吸引使用者更多注意力。 就傳統的液晶顯示器而言,其邊框 佈局掃描線,使顯示面板與终端產品,如手== 構上的配合度較不佳,亦即需要配置較大: 邊去展,又顯不面板,無法有效降低終端產品之體積。 【發明内容】 本發明係有關於-财邊框顯示 :裝:僅之部分走線與資料線“: 包括一方面,提出-種窄邊框顯示面板,I 匕括夕個I素、夕個資料線與多、 形式排列,其令,各畫素具有一閉闕元件以 第-邊緣與第二邊緣。各開關元件具有輪入端與受控端, 201120548201120548 ^ * i VI. Description of the invention: [Technical field to which the invention pertains] The invention relates to a display panel, and in particular to an electronic device, a panel, and an electronic device using the same. 】 With the development of display technology, there are many functions that can meet the needs of users, such as the advantages of 1 carrying. The design of the product is constantly seeking new solutions to attract more attention. In the case of traditional LCD monitors, the border layout scan line makes the display panel and the end product, such as the hand == structure Poor, that is, the need to configure a larger: while going to the exhibition, but also the panel, can not effectively reduce the volume of the terminal product. [Summary] The present invention is related to the - wealth border display: loading: only part of the routing and data Line ": Including one aspect, proposed - a narrow frame display panel, I 匕 个 I I I, 夕 资料 资料 资料 与 夕 夕 夕 夕 夕 夕 夕 夕 夕 夕 夕 夕 夕 夕 夕 夕 夕 夕 夕 夕The piece has a first edge and a second edge. Each switching element has a wheeled end and a controlled end, 201120548

I /JKA ' T 資料線沿著第一邊緣設置,並連接開關元件之輸入端。各 掃描線具有相連接之第一掃描線段與第二掃描線段,其 中,第一掃描線段與資料線平行且重疊設置,第二掃描線 段沿著第二邊緣設置,並連接開關元件之受控端。 根據本發明之另一方面,提出一種窄邊框顯示面板之 晝素陣列結構,其包括一底板、一第一絕緣層、一第二絕 緣層、一第三絕緣層、一開關元件、一掃描線、一資料線 與一晝素電極。第一絕緣層設置於底板上,第二絕緣層設 置在第一絕緣層上,而第三絕緣層設置在第二絕緣層上。 開關元件包含一受控端、一輸入端以及一輸出端,其中受 控端係位於底板以及第一絕緣層之間,且輸入端以及輸出 端係位於第一絕緣層以及第二絕緣層之間。掃描線包含一 第一掃描線段以及一第二掃描線段,其中第一掃描線段係 位於第二絕緣層以及第三絕緣層之間,且第二掃描線段係 位於底板以及第一絕緣層之間,並藉由一第一接觸孔連接 第一掃描線段。資料線位於第一絕緣層以及第二絕緣層之 間。晝素電極位於第三絕緣層上,且藉由一第二接觸孔連 接開關元件之輸出端。 根據本發明之另一方面,提出一種窄邊框顯示面板之 晝素陣列結構,其包括一底板、一第一絕緣層、一第二絕 緣層、一第三絕緣層、一開關元件、一掃描線、一資料線 與一晝素電極。第一絕緣層設於底板上,第二絕緣層設於 第一絕緣層上,第三絕緣層設於第二絕緣層上。開關元件 包含一受控端、一輸入端以及一輸出端,其中受控端係位 於第一絕緣層以及第二絕緣層之間,且輸入端以及輸出端 201120548The I /JKA ' T data line is placed along the first edge and is connected to the input of the switching element. Each scan line has a first scan line segment and a second scan line segment connected, wherein the first scan line segment is disposed in parallel with and overlapping with the data line, and the second scan line segment is disposed along the second edge and connected to the controlled end of the switching element . According to another aspect of the present invention, a pixel array structure of a narrow bezel display panel includes a bottom plate, a first insulating layer, a second insulating layer, a third insulating layer, a switching element, and a scan line. , a data line and a halogen electrode. The first insulating layer is disposed on the bottom plate, the second insulating layer is disposed on the first insulating layer, and the third insulating layer is disposed on the second insulating layer. The switching element includes a controlled end, an input end and an output end, wherein the controlled end is located between the bottom plate and the first insulating layer, and the input end and the output end are located between the first insulating layer and the second insulating layer . The scan line includes a first scan line segment and a second scan line segment, wherein the first scan line segment is between the second insulating layer and the third insulating layer, and the second scan line segment is between the bottom plate and the first insulating layer. And connecting the first scan line segment by a first contact hole. The data line is located between the first insulating layer and the second insulating layer. The halogen electrode is located on the third insulating layer, and the output end of the switching element is connected through a second contact hole. According to another aspect of the present invention, a pixel array structure of a narrow bezel display panel includes a bottom plate, a first insulating layer, a second insulating layer, a third insulating layer, a switching element, and a scan line. , a data line and a halogen electrode. The first insulating layer is disposed on the bottom plate, the second insulating layer is disposed on the first insulating layer, and the third insulating layer is disposed on the second insulating layer. The switching element includes a controlled end, an input end and an output end, wherein the controlled end is located between the first insulating layer and the second insulating layer, and the input end and the output end are 201120548

1 · I w^^/jpA 係位於第二絕緣層以及第三絕緣層之間。掃描線包含一第 一掃描線段以及一第二掃描線段,其中第一掃描線段係位 於底板以及第一絕緣層之間,且第二掃描線段係位於第一 絕緣層以及第二絕緣層之間,並藉由一第一接觸孔連接第 一掃描線段。資料線位於第二絕緣層以及第三絕緣層之 間。晝素電極位於第三絕緣層上,且藉由一第二接觸孔連 接開關元件之輸出端。 根據本發明之另一方面,提出一種電子裝置,其包括 • 一窄邊框顯示面板與一控制模組,其中,控制模組連接窄 邊框顯示面板。窄邊框顯示面板包括多個晝素、多個資料 線與多個掃描線。晝素以陣列之形式排列,其中,各晝素 具有一開關元件以及相互垂直之第一邊緣與第二邊緣。各 開關元件具有輸入端與受控端。資料線沿著第一邊緣設 置,並連接開關元件之輸入端。各掃描線具有相連接之第 一掃描線段與第二掃描線段,其中,第一掃描線段與資料 線平行且重疊設置,第二掃描線段沿著第二邊緣設置,並 • 連接開關元件之受控端。 為讓本發明之上述内容能更明顯易懂,下文特舉較佳 實施例,並配合所附圖式,作詳細說明如下: 【實施方式】 本實施例提出一種窄邊框顯示面板,其掃描線用以連 接至驅動電路之走線是直接與資料線平行且重疊設置,因 此可以省去掃描線於顯示面板邊緣所佔據之面積,藉此達 到窄邊框之目的。 , *1 201120548 請參照第以圖,其係依照本發明較佳實施例的窄邊 框顯示面板之示意圖。窄邊框顯示面板1包括多個以陣列 形式排列之晝素、多個資料線與多個掃描線,於圖式中僅 以數個晝素Ρ以及數條資料線U 13與掃描線21至23 說明本實施例之顯示面板設計。各晝素?具有一開關元件 30以及相互垂直之第—邊緣u與第二邊緣[2。開關元件 30具有輸^端、受控端與輸出端。本實施例中,各開關元 件3〇係以薄膜電晶體(thin film加也⑽,㈣為例,開關 几件之輸人端可以是源極或汲極,輸出端亦可以是源 極或汲極,但不同於輸人端,受控端是以閘極為例。 窄邊框顯示面板〗争由4χ τ· I 一 义更包括一面板驅動電路40,其連 接資料線11至13盘播給ο 1 7- μ 描線21至23,以透過資料線U至 13與掃描線21至23玆g 1 .^ 致動開關凡件30。較佳地,面板驅 動電路40是與書素P、:^ y ^ ^ 貝枓、,泉11至13與掃描線21至23 έ 又置在同一基板上。 # 料線-U至13是沿著晝素Ρ之第一邊緣L1設置, :開關兀件30之輸入端。並請參照第IB目,其係第 且A圖的掃描線配置之示意圖。如第ΐβ圖所示,掃描線η ^連接之第—知描線段2U與第二掃描線段21b,掃 2^b,搞^有相連接之第—掃描線段22a與第二掃描線段 掃則具有相連接之第—掃描線段23a與第二 田'•、又23b。第一掃描線段21a、22a、23a分別與資料 板驅動(見ΐ以圖)平行且重疊設置’並連接面 著 “ 〇。而第二掃描線段21b、22b、23b則分別沿 5列晝素P之第二邊緣L2設置,並連接開關元件30 2011205481 · I w^^/jpA is between the second insulating layer and the third insulating layer. The scan line includes a first scan line segment and a second scan line segment, wherein the first scan line segment is between the bottom plate and the first insulating layer, and the second scan line segment is between the first insulating layer and the second insulating layer. And connecting the first scan line segment by a first contact hole. The data line is located between the second insulating layer and the third insulating layer. The halogen electrode is located on the third insulating layer, and the output end of the switching element is connected through a second contact hole. According to another aspect of the present invention, an electronic device is provided, comprising: a narrow bezel display panel and a control module, wherein the control module is coupled to the narrow bezel display panel. The narrow bezel display panel includes a plurality of pixels, a plurality of data lines, and a plurality of scan lines. The halogens are arranged in an array, wherein each element has a switching element and a first edge and a second edge perpendicular to each other. Each switching element has an input end and a controlled end. The data line is placed along the first edge and is connected to the input of the switching element. Each scan line has a first scan line segment and a second scan line segment connected, wherein the first scan line segment is parallel and overlapping with the data line, the second scan line segment is disposed along the second edge, and • the connection switch element is controlled end. In order to make the above description of the present invention more obvious, the following detailed description of the preferred embodiments, together with the drawings, will be described in detail as follows: [Embodiment] This embodiment provides a narrow bezel display panel with scan lines. The traces for connecting to the driving circuit are directly parallel and overlapping with the data lines, so that the area occupied by the scanning lines at the edge of the display panel can be omitted, thereby achieving the purpose of narrow borders. 1, 1 201120548 Please refer to the drawings, which are schematic diagrams of a narrow side frame display panel in accordance with a preferred embodiment of the present invention. The narrow bezel display panel 1 includes a plurality of pixels arranged in an array, a plurality of data lines and a plurality of scanning lines. In the drawing, only a plurality of pixels and a plurality of data lines U 13 and scanning lines 21 to 23 are included in the drawing. The display panel design of this embodiment will be described. Various elements? There is a switching element 30 and a first edge u and a second edge [2] perpendicular to each other. The switching element 30 has a switching terminal, a controlled terminal and an output terminal. In this embodiment, each of the switching elements 3 is a thin film transistor (thin film plus (10), (4), for example, the input end of the switch may be a source or a drain, and the output may also be a source or a drain. Extremely, but different from the input end, the controlled end is a gate example. The narrow bezel display panel contends 4χ τ· I also includes a panel drive circuit 40, which is connected to the data lines 11 to 13 for broadcast. 1 7- μ traces 21 to 23 to transmit the switch member 30 through the data lines U to 13 and the scan lines 21 to 23 g. . Preferably, the panel drive circuit 40 is associated with the pixel P, :^ y ^ ^ Bess, Springs 11 to 13 and scan lines 21 to 23 έ are placed on the same substrate. #料线-U to 13 are arranged along the first edge L1 of the element, : switch element 30 The input end. Please refer to the IB head, which is a schematic diagram of the scanning line configuration of the first and A. As shown in the ΐβ diagram, the scanning line η ^ is connected to the first scanning line segment 2U and the second scanning line segment 21b, Sweeping 2^b, and having the connected first-scanning line segment 22a and the second scanning line segment sweeping have connected first-scanning line segments 23a and second fields '•, 23b. The scanning line segments 21a, 22a, 23a are respectively arranged in parallel with the data sheet driving (see FIG.) and overlapped with 'and connected to the side “. The second scanning line segments 21b, 22b, 23b are respectively along the fifth column of the prime P Two edges L2 are arranged and connected to the switching element 30 201120548

» « WJ3/^rA 之受控端。 掃描線21至23各具有二個相連接之掃描線段,由於 縱向之第一掃描線段21a至23a與資料線n至丨3平行且 重疊設置,同時,考量其他橫向之第二掃描線段2比至2孙 之交錯配置關係,第一掃描線段2la至23 至為位於不㈣位置之平較線,第-抑 至23a與第二掃描線段21b至23b為位在不同層位置之垂 直走線。第一掃描線段21a至23a與第二掃描線段別至 23b分別透過接點N1至N3位置之接觸孔相連接。以下附 圖進-步說明本實施例窄邊框顯示面板j之細部社構。 請參照第2A、2BmA圖係第1A圖窄邊框顯 不面板其單一晝素佈局之示意圖。第2B圖係第2A圖單一 旦素於=同剖面線段之局部示意圖,剖面線段與 ,圖式於同-圖中’以清楚表示出各層元件的對應關 =以第1B圖中畫素p之剖面為例,如第2B圖所示,窄 ^ =面板1之開·件1資料線U與掃描線2!設 $ ^ ^ 5〇上。基板5〇包括—底板51與多個絕緣層52 中’絕緣層52至54依序層疊設置在底板51上。 開關7L件30之受控端Ή r k> 緣 ^ (間極)位在底板51與絕 曰2之間0掃描線21之第-播#綠p ?】 51與絕緣層52之間,並愈受^端3^1 =在 Mu4lL 、, 八又抆知31具有相同的導電或金 顯影製透過ΐ同的製程製作出來,例如,透過黃光 -衣作出第二掃描線段训與受控端31之結構。 位在^St30之輸人端32、輸出端33以及資料線11 …θ與絕緣層53之間。同樣地,輸入端32、輸 201120548 I W3 WA ' ^ 出端33與資料線11亦可透過相同製程製作出來。以TFT 元件為例,開關元件30之輸入端32與輸出端33之間更 具有通道層(channel)、通道與電極之接觸介面(未標示) 等。 絕緣層53用以隔離與保護輸入端32、輸出端33與 資料線11,其材質可為氮化矽(SiNx)。第一掃描線段21a 設置在絕緣層53與絕緣層54之間,且與第二掃描線段2 lb 位在基板50的不同層位置。為連接第一掃描線段21a與 第二掃描線段21b,基板50更包括接觸孔56,其係同時 貫穿絕緣層53與絕緣層52,以達成連接第一掃描線段21a 與第二掃描線段21b之目的。 由於第一掃描線段21a之走線與資料線11平行且重 疊,因此不會在顯示面板之可視區(如第4圖所示之可視 區AA)内佔據任何面積,而可維持顯示面板之開口率。 此外,由於第一掃描線段21a為直接連接面板驅動電路40 之走線,因此無須額外於顯示面板之邊緣配置走線,省下 掃描線於顯示面板邊緣所佔據之面積。 絕緣層54用以隔離與保護第一掃描線段21a。各晝 素之晝素電極57設置在絕緣層54上。為連接晝素電極57 與開關元件30之輸出端33,基板50更包括接觸孔58, 其同時貫穿絕緣層54與絕緣層53,以達成連接晝素電極 57與輸出端33之目的。 上述之開關元件30、資料線11與掃描線21之配置 亦有其他設計。請參照第3A、3B圖,第3A圖係第1A圖 窄邊框顯示面板其單一畫素佈局之另一示意圖。第3B圖 201120548 t · 1 WDJ /JTM. 係第3A圖單一晝素於不同剖面線段之局部示意圖,剖面 線段A’、B’與C,之圖式彙整於同一圖中。開關元件3〇、 貧料線11與掃描線21等元件於第3A、3B圖之基板5〇, 上之構成順序與第2A、2B圖並不相同。 如第3B圖所示,第一掃描線段21a係先形成在底板 51上。第一掃描線段21a之走線係根據預定好之資料線位 置設置,並以絕緣層52保護。開關元件3〇之受控端31 與第二掃描線段21b接著形成在絕緣層52上,並二絕緣 層53保護。基板5〇,具有接觸孔%,,其係貫穿絕緣層 以連接第-掃描線段21a與第二掃描線段训。開關元件 3〇之輸入端32與輸出端33以及資料線u設置在絕緣層 53與絕緣層54之間。晝素電極57設置在絕緣層54上, 亚透過接觸孔58,連接輸出端33。 本實施例之窄邊框顯示面板係可 叫'丨/入丨小j ^ % -f- 置中例如手機、數位相框、相機、液晶電視等。請參» « The controlled end of WJ3/^rA. Each of the scanning lines 21 to 23 has two scanning line segments connected thereto, since the first scanning line segments 21a to 23a in the longitudinal direction are arranged in parallel with and overlapping with the data lines n to 丨3, and at the same time, the second scanning line segments 2 in the other lateral direction are considered. 2 The staggered configuration relationship of the Sun, the first scanning line segments 2la to 23 are flat lines located at the (four) position, and the first to the 23a and the second scanning line segments 21b to 23b are vertical lines positioned at different layer positions. The first scanning line segments 21a to 23a and the second scanning line segments 23b are respectively connected to the contact holes at the positions of the contacts N1 to N3. The detailed structure of the narrow bezel display panel j of this embodiment will be described in the following. Please refer to the 2A, 2BmA diagram, Figure 1A, for a narrow frame to show the layout of a single pixel layout. Figure 2B is a partial schematic diagram of Figure 2A. Once the element is in the same section, the section line and the figure are in the same figure - to clearly show the correspondence of the elements of each layer = the pixel in the 1B figure. As an example, as shown in FIG. 2B, the narrow ^=opening of the panel 1 and the data line U of the member 1 and the scanning line 2! are set at $^^5〇. The substrate 5A includes a bottom plate 51 and a plurality of insulating layers 52. The insulating layers 52 to 54 are sequentially laminated on the bottom plate 51. The controlled terminal Ή r k> of the switch 7L member 30 is located between the bottom plate 51 and the top of the 0 scan line 21 between the first and second layers of the scan line 21 and the insulating layer 52, and The more the end 3^1 = in Mu4lL, the eight and the other 31 have the same conductive or gold development system through the same process, for example, through the yellow light-cloth to make the second scan line training and controlled end Structure of 31. It is located between the input end 32 of the ^St30, the output end 33, and the data lines 11 ... θ and the insulating layer 53. Similarly, the input terminal 32, the input 201120548 I W3 WA ' ^ output 33 and the data line 11 can also be produced through the same process. Taking the TFT element as an example, the input end 32 of the switching element 30 and the output end 33 further have a channel, a contact interface (not labeled) of the channel and the electrode, and the like. The insulating layer 53 is used for isolating and protecting the input end 32, the output end 33 and the data line 11, and the material thereof may be tantalum nitride (SiNx). The first scanning line segment 21a is disposed between the insulating layer 53 and the insulating layer 54, and is located at a different layer position of the substrate 50 from the second scanning line segment 2 lb. In order to connect the first scanning line segment 21a and the second scanning line segment 21b, the substrate 50 further includes a contact hole 56 which penetrates the insulating layer 53 and the insulating layer 52 at the same time to achieve the purpose of connecting the first scanning line segment 21a and the second scanning line segment 21b. . Since the trace of the first scan line segment 21a is parallel and overlaps with the data line 11, it does not occupy any area in the visible area of the display panel (such as the visible area AA shown in FIG. 4), and the opening of the display panel can be maintained. rate. In addition, since the first scanning line segment 21a is a wire directly connecting the panel driving circuit 40, it is not necessary to additionally arrange the wiring at the edge of the display panel, and the area occupied by the scanning line at the edge of the display panel is saved. The insulating layer 54 is used to isolate and protect the first scan line segment 21a. The halogen electrode 57 of each element is disposed on the insulating layer 54. In order to connect the halogen electrode 57 and the output end 33 of the switching element 30, the substrate 50 further includes a contact hole 58 which penetrates through the insulating layer 54 and the insulating layer 53 for the purpose of connecting the pixel electrode 57 and the output terminal 33. The above arrangement of the switching element 30, the data line 11 and the scanning line 21 has other designs. Please refer to Figures 3A and 3B. Figure 3A is another schematic diagram of a single pixel layout of the narrow bezel display panel. Figure 3B 201120548 t · 1 WDJ /JTM. is a partial schematic diagram of a single element in different section lines in Figure 3A. Sections A', B' and C are merged in the same figure. The components such as the switching element 3A, the lean line 11 and the scanning line 21 are on the substrate 5A of the 3A and 3B drawings, and the order of construction is different from that of the 2A and 2B drawings. As shown in Fig. 3B, the first scanning line segment 21a is formed on the bottom plate 51 first. The routing of the first scanning line segment 21a is set according to a predetermined data line position and is protected by an insulating layer 52. The controlled end 31 of the switching element 3 and the second scanning line segment 21b are then formed on the insulating layer 52 and protected by a second insulating layer 53. The substrate 5A has a contact hole % which penetrates through the insulating layer to connect the first scanning line segment 21a with the second scanning line segment. The input terminal 32 and the output terminal 33 of the switching element 3 and the data line u are disposed between the insulating layer 53 and the insulating layer 54. The halogen electrode 57 is disposed on the insulating layer 54, sub-transmissive to the contact hole 58, and connected to the output end 33. The narrow bezel display panel of this embodiment can be called "丨/入丨小 j ^ % -f-", such as a mobile phone, a digital photo frame, a camera, a liquid crystal television, and the like. Please refer to

第4圖,其係依照本發明較佳實施例的電子裝置之示 子裝置200包括一控制模組21(mj^實^ 控制模組21°連接至窄邊框顯示面板 窄邊框顯示面板1之畫素Ρ(見第1 Θ )係位在可視區ΑΑ内,其掃描線 錢過縱__平行且重疊之走線(如== 僅不”d連接至面板驅動電路4〇,因心 ::二 開口率,且不會在顯示面板 實施例之題亦即’不需透過邊框來佈局掃描線。^ 乍邊框顯示面板與應用其之電Μ置可更為有 201120548 1 W /J 厂/Λ ^ * 效地將邊框最小化,更容易符合廠商對顯示面板機構上之 需求,同時增加終端產品的美觀及質感。 綜上所述,雖然本發明已以較佳實施例揭露如上,然 其並非用以限定本發明。本發明所屬技術領域中具有通常 知識者,在不脫離本發明之精神和範圍内,當可作各種之 更動與潤飾。因此,本發明之保護範圍當視後附之申請專 利範圍所界定者為準。 【圖式簡單說明】 第1A圖係依照本發明較佳實施例的窄邊框顯示面板 之示意圖。 第1B圖係第1A圖的掃描線配置之示意圖。 第2A圖係第1A圖窄邊框顯示面板其單一晝素佈局 之示意圖。 第2B圖係第2A圖單一晝素於不同剖面線段之局部 示意圖。 第3A圖係第1A圖窄邊框顯示面板其單一晝素佈局 之另一示意圖。 第3B圖係第3A圖單一畫素於不同剖面線段之局部 示意圖。 第4圖係依照本發明較佳實施例的電子裝置之示意 圖。 【主要元件符號說明】 50、50’ :基板 1 :窄邊框顯示面板 2011205484 is a schematic diagram of a display device 200 for an electronic device according to a preferred embodiment of the present invention. The control module 21 is connected to the narrow bezel display panel of the narrow bezel display panel. Susie (see section 1) is in the visible area, and its scan line is over the vertical __ parallel and overlapping traces (such as == only not) d connected to the panel drive circuit 4〇, due to: Two aperture ratios, and will not be in the display panel embodiment, that is, 'no need to use the border to lay out the scan line. ^ 乍 border display panel and the application of the power can be more 201120548 1 W / J Factory / Λ ^ * Effectively minimize the border, it is easier to meet the manufacturer's demand for the display panel mechanism, and at the same time increase the aesthetics and texture of the terminal product. In summary, although the present invention has been disclosed above in the preferred embodiment, it is not The present invention is intended to be limited to the scope of the invention, and various modifications and changes can be made without departing from the spirit and scope of the invention. The scope defined by the patent scope shall prevail. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1A is a schematic view of a narrow bezel display panel in accordance with a preferred embodiment of the present invention. Fig. 1B is a schematic view of a scan line configuration of Fig. 1A. Fig. 2A is a single frame of a narrow bezel display panel of Fig. 1A. Fig. 2B is a partial schematic view of a single element in different section lines in Fig. 2A. Fig. 3A is another schematic diagram of a single element layout of a narrow frame display panel of Fig. 1A. Fig. 3B is a 3A Figure 4 is a partial schematic view of a different cross-section line. Figure 4 is a schematic diagram of an electronic device in accordance with a preferred embodiment of the present invention. [Main component symbol description] 50, 50': substrate 1: narrow bezel display panel 201120548

I » I W55/3PA 11〜13 :資料線 21〜23 :掃描線 21a〜23a :第一掃描線段 21b〜23b:第二掃描線段 30 :開關元件 31 :受控端 32 :輸入端 33 :輸出端 40 :面板驅動電路 L1 :第一邊緣 L2 :第二邊緣 51 :底板 52〜54 :絕緣層 56、56’、58、58’ :接觸孔 57 :晝素電極 200 :電子裝置 210 :控制模組 AA .可視區 A,、B,、C,:剖面線段 P :晝素 N1〜N3 :接點 11I » I W55/3PA 11 to 13: data lines 21 to 23: scan lines 21a to 23a: first scan line segments 21b to 23b: second scan line segment 30: switching element 31: controlled terminal 32: input terminal 33: output End 40: panel driving circuit L1: first edge L2: second edge 51: bottom plate 52 to 54: insulating layer 56, 56', 58, 58': contact hole 57: halogen electrode 200: electronic device 210: control mode Group AA. Visual area A, B, C,: section line segment P: Alizarin N1~N3: Contact 11

Claims (1)

201120548 I WJJ/JTM * ' 螫 七、申請專利範圍: 1. 一種窄邊框顯示面板,包括: 複數個晝素,以陣列之形式排列,其中,該些晝素各 具有一開關元件以及相互垂直之一第一邊緣與一第二邊 緣,該些開關元件各具有一輸入端與一受控端; 複數個資料線,沿著該些第一邊緣設置,其中,該些 資料線連接該些輸入端;以及 複數個掃描線,各具有相連接之一第一掃描線段與一 第二掃描線段,其中,該些第一掃描線段與該些資料線平 | 行且重豐設置’該些弟二掃描線段沿者該些苐二邊緣設 置,該些第二掃描線段並連接該些受控端。 2. 如申請專利範圍第1項所述之窄邊框顯示面板, 更包括一面板驅動電路,其分別連接該些資料線與該些掃 描線,其中該些資料線與該些掃描線係位於該面板驅動電 路之同一側。 3. 如申請專利範圍第2項所述之窄邊框顯示面板, 更包括一基板,其中,該面板驅動電路、該些晝素、該些 修 資料線與該些掃描線係設置在該基板上。 4. 一種窄邊框顯示面板之晝素陣列結構,包括: 一底板; 一第一絕緣層,設於該底板上; 一第二絕緣層,設於該第一絕緣層上; 一第三絕緣層,設於該第二絕緣層上; 一開關元件,包含一受控端、一輸入端以及一輸出 端,其中該受控端係位於該底板以及該第一絕緣層之間, 12 201120548 * J ' · TW5573PA' 且該輸入端以及該輸出端係位於該第一絕緣層以及該第 二絕緣層之間; 一掃描線,包含一第一掃描線段以及一第二掃描線 段,其中該第一掃描線段係位於該第二絕緣層以及該第三 絕緣層之間,且該第二掃描線段係位於該底板以及該第一 絕緣層之間,並藉由一第一接觸孔連接該第一掃描線段; 一資料線,位於該第一絕緣層以及該第二絕緣層之 間;以及 • 一畫素電極,位於該第三絕緣層上,且藉由一第二接 觸孔連接該開關元件之該輸出端。 5. —種窄邊框顯示面板之晝素陣列結構,包括: 一底板; 一第一絕緣層,設於該底板上; 一第二絕緣層,設於該第一絕緣層上; 一第三絕緣層,設於該第二絕緣層上; 一開關元件,包含一受控端、一輸入端以及一輸出 • 端,其中該受控端係位於該第一絕緣層以及該第二絕緣層 之間,且該輸入端以及該輸出端係位於該第二絕緣層以及 該第三絕緣層之間; 一掃描線,包含一第一掃描線段以及一第二掃描線 段,其中該第一掃描線段係位於該底板以及該第一絕緣層 之間,且該第二掃描線段係位於該第一絕緣層以及該第二 絕緣層之間,並藉由一第一接觸孔連接該第一掃描線段; 一資料線,位於該第二絕緣層以及該第三絕緣層之 間; 13 201120548 w JJ ZJr/Λ 接 一晝素電極,位於該第三絕緣層上,且藉由— 觸孔連接該開關元件之該輸出端。 6. —種電子裝置,包括: 一窄邊框顯示面板,包括: 以陣列之料㈣,其+,該也金 T? I - 複數個畫 =有-開關元件以及相互垂直之—第—邊緣與; 一邊緣,泫些開關凡件各具有_輸入端與—受控端; 複數個資料線,沿著該些第一邊=,甘 該些資料線連接該些輸入端;以及 /、, 複數個掃描線,各具有相連接之一第 =第二掃描線段,其中’該些第一掃描線段與該:資; 線平行且重疊設置,該些第一掃描線段 汁= 受控端:= _二掃描線段並連接該些 一控制模組,連接該窄邊框顯示面板。 7·如申請專利範圍第6項所述之電 該窄邊框顯示面板更包括一面柘 凌置其中, 攸文已祜面扳驅動電路,其分別揸 些資料線與該此掃描線,1中#此次ώ八刀別連接该 一揮彻踝具中5亥些貧料線與該些掃描線係 位於5亥面板驅動電路之同一側。 ’'、 申料利範㈣7韻述之電子裝置,其中, μ乍邊框顯示面板更包括一基板,其中,嗲 路、該些書夸、呤此次十丨& t 〜面板驅動電 上。—^、〜貝料u些掃描線係設置在該基板201120548 I WJJ/JTM * ' 螫 VII, the scope of application for patents: 1. A narrow bezel display panel comprising: a plurality of halogens arranged in an array, wherein each of the elements has a switching element and is perpendicular to each other a first edge and a second edge, each of the switching elements has an input end and a controlled end; a plurality of data lines are disposed along the first edges, wherein the data lines are connected to the input ends And a plurality of scan lines each having a first scan line segment and a second scan line segment, wherein the first scan line segments are flat with the data lines and are set to be 'two scans The line segments are disposed along the second edge of the second scanning line segment and are connected to the controlled ends. 2. The narrow bezel display panel of claim 1, further comprising a panel driving circuit respectively connecting the data lines and the scan lines, wherein the data lines and the scan lines are located The same side of the panel drive circuit. 3. The narrow bezel display panel of claim 2, further comprising a substrate, wherein the panel driving circuit, the pixels, the repairing data lines, and the scanning lines are disposed on the substrate . 4. A pixel array structure of a narrow bezel display panel, comprising: a bottom plate; a first insulating layer disposed on the bottom plate; a second insulating layer disposed on the first insulating layer; a third insulating layer Provided on the second insulating layer; a switching element comprising a controlled end, an input end and an output end, wherein the controlled end is located between the bottom plate and the first insulating layer, 12 201120548 * J a TW5573PA' and the input end and the output end are located between the first insulating layer and the second insulating layer; a scan line comprising a first scan line segment and a second scan line segment, wherein the first scan a line segment is disposed between the second insulating layer and the third insulating layer, and the second scanning line segment is located between the bottom plate and the first insulating layer, and the first scanning line segment is connected by a first contact hole a data line between the first insulating layer and the second insulating layer; and a pixel electrode on the third insulating layer, and the output of the switching element is connected by a second contact hole end. 5. A pixel array structure of a narrow bezel display panel, comprising: a bottom plate; a first insulating layer disposed on the bottom plate; a second insulating layer disposed on the first insulating layer; a third insulating layer a layer disposed on the second insulating layer; a switching element including a controlled end, an input end, and an output end, wherein the controlled end is between the first insulating layer and the second insulating layer And the input end and the output end are located between the second insulating layer and the third insulating layer; a scan line includes a first scan line segment and a second scan line segment, wherein the first scan line segment is located Between the bottom plate and the first insulating layer, the second scanning line segment is located between the first insulating layer and the second insulating layer, and the first scanning line segment is connected by a first contact hole; a wire between the second insulating layer and the third insulating layer; 13 201120548 w JJ ZJr/Λ connected to a pixel electrode, located on the third insulating layer, and connected to the switching element by a contact hole Output. 6. An electronic device comprising: a narrow bezel display panel comprising: an array of materials (four), a +, the same gold T? I - a plurality of paintings = with - switching elements and mutually perpendicular - first - edge and An edge, some of the switches have _ input and - controlled end; a plurality of data lines, along the first side =, the data lines are connected to the input; and /,, plural Scan lines, each having one of the second and second scan line segments, wherein the first scan line segments are parallel to and overlap with the line; the first scan line segments are juiced = controlled end: = _ Two scanning line segments are connected to the one control module to connect the narrow bezel display panel. 7. As claimed in the scope of claim 6 of the patent, the narrow bezel display panel further includes a side of the display, the 攸文 has a 扳 扳 drive circuit, respectively, these data lines and the scan line, 1 in # The ώ 刀 别 连接 连接 连接 连接 挥 挥 挥 挥 挥 挥 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 The electronic device of the 韵 利 四 四 四 四 四 四 四 四 四 四 四 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍 乍—^,~Before, some scanning lines are set on the substrate.
TW98142791A 2009-12-14 2009-12-14 Slim border display panel and electronic device using the same TW201120548A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107799533A (en) * 2016-08-31 2018-03-13 鸿富锦精密工业(深圳)有限公司 TFT substrate and apply its display panel
CN113471222A (en) * 2020-07-08 2021-10-01 友达光电股份有限公司 Pixel array substrate
TWI764516B (en) * 2020-07-08 2022-05-11 友達光電股份有限公司 Pixel array substrate

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107799533A (en) * 2016-08-31 2018-03-13 鸿富锦精密工业(深圳)有限公司 TFT substrate and apply its display panel
US10141385B2 (en) 2016-08-31 2018-11-27 Hon Hai Precision Industry Co., Ltd. Thin film transistor substrate and display panel using same
TWI650596B (en) * 2016-08-31 2019-02-11 鴻海精密工業股份有限公司 Tft substrate and display panel using the same
CN113471222A (en) * 2020-07-08 2021-10-01 友达光电股份有限公司 Pixel array substrate
TWI764516B (en) * 2020-07-08 2022-05-11 友達光電股份有限公司 Pixel array substrate
CN113471222B (en) * 2020-07-08 2023-06-13 友达光电股份有限公司 Pixel array substrate

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