TW200947656A - Lead frame, electronic component with the same, and manufacturing method thereof - Google Patents

Lead frame, electronic component with the same, and manufacturing method thereof Download PDF

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Publication number
TW200947656A
TW200947656A TW097131717A TW97131717A TW200947656A TW 200947656 A TW200947656 A TW 200947656A TW 097131717 A TW097131717 A TW 097131717A TW 97131717 A TW97131717 A TW 97131717A TW 200947656 A TW200947656 A TW 200947656A
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TW
Taiwan
Prior art keywords
terminal
lead frame
electronic component
connection terminal
terminal portion
Prior art date
Application number
TW097131717A
Other languages
Chinese (zh)
Inventor
Toshiyuki Fukuda
Yoshihiro Tomita
Hisashi Umeda
Yasutake Yaguchi
Original Assignee
Panasonic Corp
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Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Publication of TW200947656A publication Critical patent/TW200947656A/en

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    • H01L23/495Lead-frames or other flat leads
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

The invention relates to a lead frame, an electronic device having the same and a method for manufacturing the same. The electronic device comprises a bare chip connection plate for loading components, a first connector part, a second connector part, a bending part and an outer frame, wherein the first connector part is arranged around the bare chip connection plate and the bottom surface of the first connector part becomes an outer terminal, the second connector part is arranged around the bare chip connection plate and electrically insulated with the bare chip connection plate and the top surface of the second connector part becomes an outer terminal, and the bending part is installed between the first connector part and the second connector part to connect the first connector part, the second connector part and the outer frame. The bending part is bent in the vertical direction relative to the surface of the bare chip connection plate and a plurality of adjacent electronic device regions are formed inside the outer frame. The electronic device regions comprise regions of the bare chip connection plate, the first connector part and the second connector part. The adjacent electronic device regions are connected by the first connector part and the second connector part. No separation frame surrounding, connecting and fixing the electronic device regions is formed at the lead frame.

Description

200947656 九、發明說明: 【發明所屬之技術區域j 技術領域 本發明係有關於一種導線框、具有該導線框之電子零 5 件及其製造方法,特別係有關於使用於元件之封震件之内 部配線以連接前述元件與外部配線的導線框、具有該導線 框之電子零件及其製造方法。 【先前技術3 背景技術 10 近年來,隨著行動電話、DVD機器及數位!^等數位家 電製品的小型化、高性能化、及多機能化,正在尋求數位 家電製品所使用之半導體裝置或電子零件的薄型化、小型 化、及高密度化,與半導體裝置或電子零件所使用之封裝 件的低成本化。 15 半導體裝置或電子零件所使用之封裝件,可舉例如, _ 使用數層地積層半導體晶片或電子零件的多層配線基板之 封裝件。 第1圖係使用積層有元件之多層配線基板的封裝件8〇〇 的截面圖。 20 封裝件800係由金屬細線806、密封樹脂807、元件809、 配線基板813、及外部端子816所構成。 配線基板813係由多層構成,内層具有複數層之内部配 線層817及複數通孔819。此處,内部配線層817與經導通之 孔,即通孔819連接。 5 200947656 配線基板813於其上面積層有元件809。 外部端子816形成於配線基板813之表面作為上下端 子。外部端子816係例如,焊料凸塊(solder bump)。又,外 部端子816透過通孔819與内部配線層817電連接。 5 元件809係例如,半導體晶片。元件809透過金屬細線 806與内部配線層817電連接。又,配線基板813表面之元件 809與金屬細線806被密封樹脂807覆蓋。密封樹脂8〇7周圍 之配線基板813表面,形成有成為上端子之外部端子816。 然而,當為有機基板時,配線基板813配線之配設自由 10 度佳,但相較於導線框,因耐濕性等而連接可靠性不佳。 又’當使用多層配線基板時,則因成本高等而無法期待低 成本化。 因此,有人提出了各種使用導線框之具有上下外部端 子的封裝件(例如,專利文獻1〜3)。 15 專利文獻1中,提出了使用導線框或配線基板,於封裝 件之下面形成成為外部端子之端子,並於端子之上面形成 柱狀凸塊(stud bump),並且,因形成於封裝件上面之柱狀 凸塊的前端露出,故柱狀凸塊之前端成為封裝件上面的外 部端子,此種具有上下端子之半導體裝置的封裝及製造方 20 法。 專利文獻2中,提出了於接著膠帶上配置L形導線部並 固疋,於該導線部上裝載有半導體晶片,且以樹脂密封導 線部及半導體晶片,並且,具有藉將導線之上部與下部自 密封樹脂露出,而成為封裝件上下端子的外部端子之半導 200947656 體裝置的封裝件。 專利文獻3中,提出了使用導線框,並具有上下端子之 半導體裝置的封裝件。又’封裝件上側之外部端子係於相 - 當於半導體裝置的區域切下端子後加工之構造。 ^ 5 【專利文獻1】特開2007-27526號公報 【專利文獻2】專利3388609號公報 【專利文獻3】特開2007-141994號公報 C發明内容3 0 發明揭示 10 發明所欲解決之課題 然而,習知封裝件有以下問題。 專利文獻1中,柱狀凸塊形成於半導體裝置封裝件之下 面侧所形成之端子的上面。然而,柱狀凸塊所形成之端子 上面的面積小。又,控制柱狀凸塊之高度,使自封裝件上 15面露出之外部端子面積均勻是困難的。因此,封裝件上部 之外部端子面積變得不均勻。於是,連接於封裝件上部之 〇 外部端子的基板或元件的連接可靠性降低,且強度不穩 定。此外’使用基板之實施例中,於基板内部形成有用以 電導通之基板内配線與通孔墊⑽land)。然而該實施例 20自具有連接基板内配線與通孔墊之複數連接部,而有可靠 性T降的疑慮。 專利文獻2巾,L科線部在㈣職置之封裝件内於 鉛直方向上直線地貫通而形成,且封裝件上積層有複數封 裝件或兀件。封裝件與其上複數之封裝件或元件透過L形導 7 200947656 線部積層,並且,透過L形導線部電連接。由於積層封震件 或凡件並將該等電連接者係冰導線部,故L形導線部係由 金屬等堅硬材質所形成。因此,無《和絲於[形導線部 5之弯曲應力或熱應力’故積層有封裝件或元件之製品的冑 接可靠性顯著地下降。又,由於積層之封袭件的[形導線部 之積層方向均配置於相同位置,故改變積層之封裝件的°l - 形導線部’即端子位置之設計是困難的。 工專利文獻3中,揭示了成為上下端子之外部端子的加 ;而,封裝件上侧之外部端子係於相當於半導體裝置 ◎ 1〇的區域中由導線框切下後加工而成。加工後,封裝件上側 端子會懸浮於半空中,由於上側端子之端係開放端,故 組裝疋困難的。即’不易製造。又’由於成為被樹脂密封 之封裝件的外部端子之上側端子並未固定,而有被埋入樹 脂的疑慮。又,由被樹脂密封之點來看,尚未詳細揭示實 15際之製造方法。 此處’使用 QFN(Quad Flat Non-Lead Package :四面扁 平無導線封裝)說明一般之導線框。 〇 第2圖係顯示集體密封(c〇uective seaHng)成形用qfn 所使用之一般導線框的圖。此處,QFN係指以焊線接合…丨代 bond)將半導體晶片等元件連接於金屬導線且模製後之來 自本體的導線於封裝件之4個側面、底面、或底面之各邊僅 . 有1列以作為安裝用之外部端子的半導體裝置之封裝件。 第2(a)圖係qfn所使用之一般導線框的平面圖。第2(b) 圖係經樹脂密封、分離前之QFN的戴面圖。 8 200947656 分離前之QFN係由晶片塾903、金屬細線906、密封樹 脂907、及元件909構成。 導線框900係由晶片墊903、分離框914、懸吊導線915、 及端子916構成。 第2(a)圖中以1點鏈線顯示之區域係成為1半導體裝置 的區域。 鲁 10 導線框900係使用集體密封成形用q F N,並縱橫向地配 置複數個在成為半導體裝置之區域中。 分離框914形成於鄰接之半導體裝置區域間的邊界附 近,作成金屬區域。分離框914連接固持晶片墊903之懸吊 導線915、及端子916等。 第2(b)圖對應導線框9〇〇之A-A,截面的圖。 分離前之QFN中’晶片墊903上裝載有元件909,且元 件909之電極係以端子916與金屬細線906電連接。 又’分離前之QFN中,在端子916連接金屬細線906之 〇 側’元件909與金屬細線906被密封樹脂907覆蓋。 QFN中,沿著分離線9〇8,以刀片切斷分離框914。然 而’當以刀片切斷分離框914時,因分離框914均為金屬, 會施加負載於刀片。因此,有產生刀片破損等刀片壽命減 20短、及浪費無謂之成本的問題。又,於以刀片切斷分離框 914之切斷面會產生金屬毛邊(metal burr)。於是,有於鄰接 之端子916產生接觸不良等可靠性下降的問題。 本發明係有鑑於前述問題而作成者,目的係提供可防 止可靠性下降,且製造簡易、可低成本化之導線框、電子 200947656 零件及其製造方法。 解決課題之手段 為解決前述課題,本發明之導線框係使用於元件之 裝件之内部配線,用卩連接前述元件與外部酉己線之線 框丄本發明之導線框包含有:外框;及電子轉區域,係 於前述外框内鄰接者,且各電子零件區域包含有.曰 ' 係裝載前述元件者;第1連接端子部,佩置於^ 10 15 周圍,並與前述晶片墊電絕緣,且下面成為外部端:者. 第2連接端子部’係配置於前述晶#糾圍,並與前述晶片 墊電絕緣,且上面成為外部端子者;及彎曲部係於^前述 第1連接端子部與前述第2連接端子部之間,連接前述第= 接端子部與前述第2連接端子部者,又,前述彎㈣係在相 對前述晶片墊之面’於垂直方向上經彎曲加工且鄰接之 複數前述電子零件區域透過第丨或第2連接端子部連接,並 且前述導線框巾縣職包圍前述電子零龍域且連結固 定之分離框。 又’前述第2連接端子部之上面亦可位於較前述第崎 接端子部及前述晶片塾上面高的位置。 藉由此構造具有彎曲部,並藉將彎曲部彎曲加工,可 2〇輕易地調節成為外部端子之第2連接端子部的高度,故不需 使用配線基板,即可則片導線框,實現具有上下外部端子 的導線框。又,因可自由設計外部端子的位置、面積,故 可碟保設計之多樣性。又,複數電子零件區域之邊界無分 離框,故可大幅削減於各電子零件區域切斷導線框時施加 200947656 5 Ο 10 15 20 之刀片負載,可延長刀片壽命。又,因複數電子零件區域 之邊界並無分離框’故與具有分離框之習知導線框不同, 可大幅消除因刀片產生之金屬切斷面,並可防止因於切斷 鄰接之電子零件區域之截面產生的金屬毛邊造成接觸不 良。藉此,可防止可靠性下降,並可實現製造簡易,可低 成本化之導線框。 又,前述彎曲部之厚度較前述第2連接端子部薄,且前 述彎曲部亦可形成為連接前述第2連接端子部之下部。 又,前述彎曲部之厚度亦可為前述第2連接端子部之一 半以下。 藉由該構造,連接於第2連接端子之彎曲部可輕易地被 彎曲加工,故可輕易地調節成為外部端子之第2連接端子的 高度。 又,前述彎曲部之厚度較前述第丨連接端子部薄,且前 述彎曲部亦可形成為連接前述第〗連接端子部之上部。 又,前述彎曲部之厚度亦可為前述第1連接端子部之一 半以下。 藉由該構造,連接於第1連接端子之f曲料輕易地被 =曲加工,故可輕易地調節成為外部端子之第2連接端子的 入 科弟1連接端子部之下面與前述外框之下面接著 於膠帶並固定。 按者 藉由該構造,因以固定膠帶固持並固定導線框之下 面,即’第1連接端子部之下叫外框之下面,不僅可穩定 11 200947656 地運送導_,村财地騎電子零件之㈣步驟。 又,為解決前述課題,本發明電子零件包含有··申請 5 專㈣1〜7項中任1項之導線框;及裝载於前述導線框 之則述曰曰片墊’且具有電極之元件’ χ,前述電極以金屬 配線與前述第!連接端子部之上面電連接,前述導線框與前 述元件被樹脂覆蓋而密封,且前述第!連接端子部之下面自 前述樹脂露出。200947656 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD The present invention relates to a lead frame, an electronic zero-piece having the lead frame, and a method of manufacturing the same, and in particular to a vibration-sealing member for use in an element The internal wiring is a lead frame connecting the aforementioned element and the external wiring, an electronic component having the lead frame, and a method of manufacturing the same. [Prior Art 3] In recent years, with the miniaturization, high performance, and multi-function of digital home appliances such as mobile phones, DVD devices, and digital devices, semiconductor devices or electronic devices for digital home appliances are being sought. The thickness, size, and density of the components are reduced, and the cost of the package used for the semiconductor device or the electronic component is reduced. The package used for the semiconductor device or the electronic component is, for example, a package using a multilayer wiring board in which a plurality of layers of semiconductor wafers or electronic components are laminated. Fig. 1 is a cross-sectional view of a package 8A using a multilayer wiring board in which components are laminated. The package 800 is composed of a thin metal wire 806, a sealing resin 807, an element 809, a wiring substrate 813, and an external terminal 816. The wiring board 813 is composed of a plurality of layers, and the inner layer has a plurality of inner wiring layers 817 and a plurality of through holes 819. Here, the internal wiring layer 817 is connected to the via hole, that is, the via hole 819. 5 200947656 The wiring substrate 813 has an element 809 on its upper area. The external terminal 816 is formed on the surface of the wiring substrate 813 as an upper and lower terminal. The external terminal 816 is, for example, a solder bump. Further, the external terminal 816 is electrically connected to the internal wiring layer 817 through the through hole 819. 5 Element 809 is, for example, a semiconductor wafer. The element 809 is electrically connected to the internal wiring layer 817 through the thin metal wires 806. Further, the element 809 and the thin metal wire 806 on the surface of the wiring board 813 are covered with a sealing resin 807. An external terminal 816 serving as an upper terminal is formed on the surface of the wiring substrate 813 around the sealing resin 8A. However, when it is an organic substrate, the wiring of the wiring board 813 is freely provided at 10 degrees, but the connection reliability is poor due to moisture resistance or the like compared to the lead frame. Further, when a multilayer wiring board is used, it is not expected to be low in cost due to high cost. Therefore, various packages having upper and lower outer terminals using a lead frame have been proposed (for example, Patent Documents 1 to 3). In Patent Document 1, it is proposed to use a lead frame or a wiring substrate to form a terminal to be an external terminal on the lower surface of the package, and to form a stud bump on the upper surface of the terminal, and to form a bump on the package. Since the front end of the stud bump is exposed, the front end of the stud bump is an external terminal on the upper surface of the package, and the semiconductor device having the upper and lower terminals is packaged and manufactured. Patent Document 2 proposes disposing an L-shaped lead portion on a tape and fixing it, mounting a semiconductor wafer on the lead portion, sealing the lead portion and the semiconductor wafer with a resin, and having the upper portion and the lower portion of the lead The self-sealing resin is exposed, and becomes a package of the semiconductor device of the semiconductor device of the external terminal of the upper and lower terminals of the package. Patent Document 3 proposes a package using a lead frame and a semiconductor device having upper and lower terminals. Further, the external terminal on the upper side of the package is a structure in which the terminal is processed after the terminal is cut in the region of the semiconductor device. [Patent Document 1] Japanese Laid-Open Patent Publication No. Hei. No. 2007-28526 [Patent Document 2] Patent No. 3,388, 609, and the like. The conventional package has the following problems. In Patent Document 1, a columnar bump is formed on the upper surface of a terminal formed on the lower side of the semiconductor device package. However, the area on the terminal formed by the stud bumps is small. Further, it is difficult to control the height of the stud bumps to make the external terminal area exposed from the 15 faces of the package uniform. Therefore, the external terminal area of the upper portion of the package becomes uneven. Therefore, the connection reliability of the substrate or the element connected to the external terminal of the upper portion of the package is lowered, and the strength is unstable. Further, in the embodiment in which the substrate is used, the wiring in the substrate and the via pad (10) which are electrically conductive are formed inside the substrate. However, this embodiment 20 has a problem that the reliability T drop is caused by having a plurality of connection portions connecting the wiring in the substrate and the via pad. In the patent document 2, the L-line portion is formed in a straight line in the vertical direction in the package of the (4) position, and a plurality of packages or components are laminated on the package. The package and its upper plurality of packages or components are laminated through the L-shaped conductor and are electrically connected through the L-shaped conductor portion. The L-shaped wire portion is formed of a hard material such as metal due to the build-up of the vibration-insulating member or the piece and the electric connector to the ice wire portion. Therefore, the reliability of the splicing of the article in which the package or the component is laminated is remarkably lowered without the "bending stress or thermal stress" of the wire portion 5. Further, since the laminated layers of the laminated members are arranged at the same position in the stacking direction, it is difficult to change the design of the terminal position of the laminated package, i.e., the terminal portion. Patent Document 3 discloses that the external terminals of the upper and lower terminals are applied, and the external terminals on the upper side of the package are formed by cutting out the lead frame in a region corresponding to the semiconductor device ◎1〇. After processing, the upper terminal of the package will be suspended in the air, and the assembly is difficult because the end of the upper terminal is open. That is, it is not easy to manufacture. Further, since the upper terminal of the external terminal which is a package sealed with the resin is not fixed, there is a fear that the resin is buried. Further, from the viewpoint of being sealed by the resin, the manufacturing method of the actual one has not been disclosed in detail. Here, the general lead frame is described using QFN (Quad Flat Non-Lead Package). 〇 Fig. 2 is a view showing a general lead frame used for forming a collective seal (c〇uective seaHng) for qfn. Here, QFN refers to bonding a component such as a semiconductor wafer to a metal wire by wire bonding, and the wire from the body after molding is on each side of the four sides, the bottom surface, or the bottom surface of the package. There is one column of a package for a semiconductor device as an external terminal for mounting. Figure 2(a) is a plan view of a general lead frame used by qfn. Figure 2(b) is a front view of the QFN sealed by resin and separated. 8 200947656 The QFN before separation is composed of a wafer cassette 903, a thin metal wire 906, a sealing resin 907, and an element 909. The lead frame 900 is composed of a wafer pad 903, a separation frame 914, a suspension wire 915, and a terminal 916. The area shown by the one-dot chain line in Fig. 2(a) is a region of one semiconductor device. The Lu 10 lead frame 900 uses q F N for collective sealing molding, and a plurality of longitudinally and laterally disposed portions in the semiconductor device. A separation frame 914 is formed adjacent the boundary between adjacent semiconductor device regions to form a metal region. The separation frame 914 is connected to the suspension wire 915 holding the wafer pad 903, the terminal 916, and the like. Figure 2(b) corresponds to the A-A of the lead frame 9A, a cross-sectional view. In the QFN before separation, the wafer pad 903 is loaded with the element 909, and the electrode of the element 909 is electrically connected to the metal thin wire 906 by the terminal 916. Further, in the QFN before the separation, the element side 909 and the metal thin wire 906 which are connected to the metal thin wires 906 at the terminal 916 are covered with the sealing resin 907. In the QFN, the separation frame 914 is cut by a blade along the separation line 9〇8. However, when the separation frame 914 is cut by a blade, since the separation frame 914 is made of metal, a load is applied to the blade. Therefore, there is a problem that the blade life is reduced by 20 short, and the unnecessary cost is wasted. Further, a metal burr is generated on the cut surface of the separation frame 914 by the blade. As a result, there is a problem that the reliability of the contact failure such as contact failure occurs in the adjacent terminal 916. The present invention has been made in view of the above problems, and an object of the present invention is to provide a lead frame, an electronic 200947656 part, and a method of manufacturing the same, which are capable of preventing a decrease in reliability and which are easy to manufacture and can be reduced in cost. Means for Solving the Problems In order to solve the above problems, the lead frame of the present invention is used for the internal wiring of the component, and the wire frame for connecting the component to the external wire is used. The lead frame of the present invention includes: a frame; And the electron transfer region is adjacent to the outer frame, and each electronic component region includes a device that carries the component; the first connection terminal portion is placed around the ^10 15 and is electrically padded with the aforementioned wafer Insulation, and the lower end is an external end: the second connection terminal portion ′ is disposed in the crystal #纠, and is electrically insulated from the wafer pad, and the upper surface is an external terminal; and the curved portion is connected to the first connection The terminal portion and the second connection terminal portion are connected to the second connection terminal portion and the second connection terminal portion, and the bend (four) is bent in a vertical direction with respect to a surface of the wafer pad The plurality of adjacent electronic component regions are connected to each other through the second or second connection terminal portion, and the wire frame towel county surrounds the electronic zero-long field and is connected to the fixed separation frame. Further, the upper surface of the second connection terminal portion may be located higher than the first satin terminal portion and the upper surface of the wafer cassette. By having the bent portion and bending the bent portion, the height of the second connection terminal portion that becomes the external terminal can be easily adjusted. Therefore, the lead frame can be realized without using the wiring substrate. The wire frame of the upper and lower external terminals. Moreover, since the position and area of the external terminals can be freely designed, the diversity of the disc design can be achieved. Further, since the boundary of the plurality of electronic component areas is not separated, the blade load of 200947656 5 Ο 10 15 20 can be significantly reduced when the lead frame is cut in each electronic component area, and the blade life can be extended. Moreover, since there is no separation frame at the boundary of the plurality of electronic component regions, unlike the conventional lead frame having the separation frame, the metal cut surface generated by the blade can be largely eliminated, and the adjacent electronic component region can be prevented from being cut off. The metal burrs generated by the cross section cause poor contact. Thereby, it is possible to prevent the reliability from being lowered, and it is possible to realize a lead frame which is easy to manufacture and can be reduced in cost. Further, the thickness of the curved portion is thinner than the second connection terminal portion, and the curved portion may be formed to be connected to the lower portion of the second connection terminal portion. Further, the thickness of the curved portion may be one half or less of the second connection terminal portion. According to this configuration, the bent portion connected to the second connection terminal can be easily bent, so that the height of the second connection terminal serving as the external terminal can be easily adjusted. Further, the thickness of the bent portion is thinner than the second connecting terminal portion, and the bent portion may be formed to connect the upper portion of the first connecting terminal portion. Further, the thickness of the curved portion may be one half or less of the first connection terminal portion. According to this configuration, the f-clip connected to the first connection terminal is easily subjected to the sine processing, so that the lower portion of the connection terminal portion of the second connection terminal serving as the external terminal can be easily adjusted to the lower frame and the outer frame. The following is followed by tape and fixed. According to this configuration, the fixing member is held and fixed under the lead frame, that is, 'below the first connecting terminal portion below the outer frame, which can not only stabilize the transportation guide _ 200947656, the village electronic riding electronic parts (4) steps. Further, in order to solve the above-described problems, the electronic component of the present invention includes a lead frame of any one of the items (4) 1 to 7 of the application 5; and a component of the die pad which is mounted on the lead frame and has an electrode ' χ, the aforementioned electrodes are wired with metal and the above! The upper surface of the connection terminal portion is electrically connected, and the lead frame and the above-mentioned element are covered with a resin and sealed, and the foregoing! The lower surface of the connection terminal portion is exposed from the resin.

藉由該構造具有彎曲部,並藉將彎曲部彎曲加工,可 輕易地調節成為外部端子之第2連接端子部的高度,故不需 Π)使用配線基板’即可以丨片導線框,實現包含有具上下外部 端子之導線框的電子零件。又,因可自由設計外部端子的 位置面積故可確保设計之多樣性。又,複數電子零件 區域之邊界無分離框,故可大幅削減於各電子零件區域切 斷具有導線框之電子零件時施加的刀片負載,可延長刀片 15壽命。又’因複數電子零件區域之邊界並無分離框,故與 具有分離框之習知導線框不同’可大幅消除因刀片產生之 金屬切斷面,並可防止因於切斷鄰接之電子零件之截面產 生的金屬毛邊造成接觸不良。藉此,可防止可靠性下降, 並可實現製造簡易,可低成本化之電子零件。 又A述第2連接端子部之上面亦可自前述樹脂露出。 藉由該構造’利用對彎曲部之彎曲加工,第2連接端子 部之上面會自樹脂露出,成為上側之外部端子。 又’透過第2連接端子部連接鄰接之複數前述電子零件 區域的連接部係被切斷,且被切斷之前述連接部的截面亦 12 200947656 可自前述樹脂露出。 此時,前述彎曲部亦可經彎曲加工成使自前述樹脂露 出且被切斷之前述連接部的截面高度為前述電子零件之一 半南度。 5 藉此,以密封樹脂挾持與經切斷之第2連接端子連接之 連接4上下產生夾心效果,藉此可防止樹脂裂縫或連接部 截面產生之金屬毛邊到達電子零件之上下面。 φ 又,為解決4述課題,本發明之導線框之製造方法係 形成使用於元件之封褒件之内部配線,用以連接前述元件 10與外部配線之導線框的導線框之製造方法,包含有:形成 步驟,係藉由切割金屬板,形成外框、裝載前述元件之晶 片塾、及於前述晶片墊之周圍與前述晶片墊一體連接成為 外部端子的第1及第2連接端子部;薄化步驟,係使連接前 述第1連接端子部及前述晶片墊之連結部、及在前述第m 15接端子與前述第2連接端子部之間一體連接於前述W連接 ® 端子與前述第2連接端子部之彎曲部的厚度變薄;f曲加工 步驟,係將前述薄化步驟中厚度變薄之前述彎曲部相對於 .前述晶片墊之面,於垂直方向上彎曲加工;固定步驟係 ' α膠帶㈣前述外框與前述第1連接端子部之下端部;及切 20斷步驟,係於前述固定步驟後,切斷在前述薄化步驟中厚 度變薄之前述連結部’使前述第1連接端子部與前述晶片勢 電絕緣。 藉此,可防止可靠性下降,並可實現製造簡易,可低 成本化之製造方法。 13 200947656 此時,前述薄化步驟令,前述彎曲部亦可經薄化且連 接於前述第2連接端子部之下部。 此時’别述薄化步驟中,前述弯曲部亦可經薄化且連 接於前述第1連接端子部之上部區域。 5 此時’則述彎曲加卫步驟中,藉由將經薄化後之前述 f曲部管曲加工,使前述第2連接端子部之上面亦可位於較 月'J述第1連接端子部及前述晶片墊上面高之位置。 此時,前述固定步驟中,前述第2連接端子部亦可在與 前述膠帶分離並懸浮於空中之狀態下固定。 10 此時,前述導線框係複數,且前述形成步驟中,前述 導線框更形成有具複數個鄰接之以前述晶片墊前述第1連 接端子部及前述第2連接端子部作為丨個電子零件區域的外 框,在前述外框内,形成複數個鄰接之包含前述晶片墊、 前述第1連接端子部及前述第2連接端子部之區域的電子零 15件區域,且鄰接之複數前述電子零件區域亦可透過第1或第 2連接端子部連接,而前述導線框中並未形成有包圍前述電 子零件區域且連結固定之分離框。 發明效果 依據本發明,可提供可防止可靠性下降,且製造簡易、 20可低成本化之導線框、電子零件及其製造方法。 圖式簡單說明 第1圖係使用習知積層有元件之多層配線基板的封裝 件之截面圖。 第2(a)〜(b)圖係顯示習知集體密封成形用QFN所使用 200947656 之一般導線框的圖。 第3(a)〜(c)圖係顯示本發明第1實施形態完成前之導線 框。 ' 第4(a)〜(c)圖係概念地顯示本發明第1實施形態之彎曲 5 部11的彎曲加工程序之圖。 第5(a)〜(c)圖係顯示本發明第1實施形態組裝步驟完成 前之導線框1的圖。 ^ 第6(a)〜(d)圖係用以說明本發明第1實施形態使用導線 框組裝電子零件之組裝步驟的圖。 苐7(e)〜(g)圖係用以說明本發明第1實施形態使用導線 框組裝電子零件之組裝步驟的圖。 第8(a)〜(c)圖係顯示本發明第丨實施形態組裝步驟後完 成之電子零件的圖。 第9(a)〜(d)圖係顯示本發明第丨實施形態組裝步驟後完 15 成之電子零件外形的圖。 〇 第10(a)〜(c)圖係顯示本發明第2實施形態完成前之導 線框的圖。 第11(a)〜(c)圖係顯示本發明第2實施形態組裝步驟前 完成之導線框的圖。 2〇 第12⑻〜⑻圖係用以說明本發明第2實施形態導線框 之製造步驟的圖。 第13(a)〜(c)圖係、顯示本發明第2實施形態組裂步驟後 完成之電子零件的圖。 第H(a)〜(d)圖係顯示本發明第2實施形態組裝步驟後 15 200947656 完成之電子零件外形的圖。 c資施方式j 實施發明之最佳形態 以下、參照圖式說明本發明之實施形態。 5 然而,本發明並未受以下實施形態所限定。 (第1實施形態) 第3圖係顯示本發明第1實施形態完成前之導線框丨的 圖。 第3(a)圖係連接完成前之端子的狀態下導線框丨之平面 幻 1〇圖。第3(b)圖係第3(a)圖A-A,之導線框1的截面圖。第3(e) 圖係第3(a)圖B-B,之導線框1的截面圖。 如第3(a)圖所示,導線框丨係由外框2、晶片墊3、第工 端子4 '及第2端子5所構成。導線和之下面接著有用以固 持導線框1之膠帶13。 15 外框2係為金屬,且為形成於導雜1最外周之框。 外框2之内部形成有複數電子零件區域21。此處,形成 有鄰接之2列χ2行的4個電子零件區域2卜分別之電子零件 q 區域21於其_央形成有晶片墊3,並形成有包圍晶片塾3外 周之框狀的伽義。獅棒31之周圍形成有連接於獅 2〇棒31之第1端子4及第2端子5。此處,外框2内鄰接之電子零 件區域21係例如,透過第2端子5以連接部連接。 _ 另外,電子零件區域21雖以2列χ2行鄰接地形成,但只 要是Ν列ΧΜ列,且Ν、Μ=2以上的話,以任何組合形成= 為有效係自不待言。又’鄰接之電子零件區域21亦可為例 16 200947656 5 Ο 15 鲁 20 如,透過第1端子4以連接部連接。 第1端子4於各外框2内部之電子零件區域別,形成於 包圍晶片墊3外周之辅助棒31的周圍。第】端子4之下面於封 裝後會成為外部端子。如第3(a)圖之圓形區域所示,第】端 子4於各電子零件區域21中,在辅助棒31與電子零件區_ 之邊界之間,开彡成錢數之列。又,各⑽由2個第】端子4 構成,且2個第1端子4係連接地形成。 此處,將各列之内側,即,將晶片墊3側之第!端子4 記為内側第1端子41,並將各列之外側,即,電子零件區域 21之邊界側之第i端子4記為外側第i端子43。 另外’各列之2個第1端子4,即,内侧仏端子41與外 侧第i端子43 ’於以後之步驟中,會使用打孔機等,切斷連 接内側第1端子41與外㈣1端子43的部分,使其分離。 又,外側第1端子43並未與外框2連接,且電絕緣。 於各外框2内部之電子零件區域以中,第2端子5形成於 包圍晶片墊则之輔助棒3丨的。第2端子5與第i端子4 同樣地如第3(a)圖之圓形區域所示,於各電子零件區域^ 中,在輔助棒31與電子零件區域21之邊界之間形成有複數 J又各列係由2個第2端子5構成,且2個第2端子$係 連接地形成。 …此處,將各列之内侧,即,將晶片墊3側之第2端子5 為内侧第2端子5卜並將各列之外侧即,電子零件區域 之邊界側之第2端子5記為外側第2端子53。又,將内側第 端子51與外側第2端子53連接之部分記為彎曲部U。 17 200947656 又’外框2與外㈣2端子53透過連結部12連接。另外, =接但鄰接之電子零件區域21透過外側第2端子加 "端子53則作為封裝後之==内部連接’而外側第 將連接各列内側第2端子51與外侧幻端子批彎曲部 及連接外側第2端子53與外框2之連結部12彎曲加工。 料經彎曲加工後之彎曲部u與連結和,職後成為外Since the structure has a bent portion and the bending portion is bent, the height of the second connection terminal portion that becomes the external terminal can be easily adjusted. Therefore, it is not necessary to use the wiring substrate, that is, the wire lead frame can be used to realize the inclusion. An electronic component having a lead frame with upper and lower external terminals. Moreover, since the positional area of the external terminal can be freely designed, the diversity of the design can be ensured. Further, since the boundary of the plurality of electronic component regions has no separation frame, the blade load applied when the electronic component having the lead frame is cut in each electronic component region can be drastically reduced, and the life of the blade 15 can be prolonged. In addition, since there is no separation frame at the boundary of the complex electronic component area, it is different from the conventional lead frame having a separation frame, which can largely eliminate the metal cut surface generated by the blade and prevent the adjacent electronic components from being cut off. Metal burrs from the cross section cause poor contact. Thereby, it is possible to prevent the reliability from being degraded, and it is possible to realize an electronic component which is easy to manufacture and can be reduced in cost. Further, the upper surface of the second connection terminal portion may be exposed from the resin. According to this structure, the upper surface of the second connection terminal portion is exposed from the resin by the bending process of the bent portion, and becomes the upper external terminal. Further, the connection portion of the plurality of electronic component regions adjacent to each other through the second connection terminal portion is cut, and the cross section of the connected portion that is cut is also exposed from the resin. In this case, the curved portion may be bent so that the height of the cross section of the connecting portion exposed from the resin and cut is half a degree of the electronic component. 5 Thereby, the sandwiching effect is obtained by the sealing resin holding the connection 4 connected to the cut second connecting terminal, thereby preventing the resin crack or the metal burr generated in the cross section of the connecting portion from reaching the upper and lower sides of the electronic component. Further, in order to solve the above-mentioned problems, the method for manufacturing a lead frame according to the present invention is to form a method for manufacturing a lead frame for connecting a lead frame of the element 10 and an external wiring, and a method for manufacturing a lead frame for use in a sealing member of the device, including a forming step of forming a frame, a wafer cassette on which the element is mounted, and a first and a second connection terminal portion which are integrally connected to the wafer pad as external terminals by cutting a metal plate; And a step of connecting the first connection terminal portion and the connection portion of the wafer pad, and integrally connecting the W connection terminal and the second connection between the m 15th connection terminal and the second connection terminal portion The thickness of the bent portion of the terminal portion is reduced, and the bending portion is formed by bending the curved portion having a reduced thickness in the thinning step in a vertical direction with respect to the surface of the wafer pad; the fixing step is 'α The tape (4) the outer frame and the lower end portion of the first connection terminal portion; and the step of cutting 20, after the fixing step, cutting the aforementioned thickness of the thinning step The junction portion 'electrically insulates the first connection terminal portion from the wafer. As a result, it is possible to prevent a decrease in reliability, and it is possible to realize a manufacturing method which is easy to manufacture and can be reduced in cost. 13 200947656 In this case, the thinning step may cause the bent portion to be thinned and connected to the lower portion of the second connection terminal portion. At this time, in the thinning step, the curved portion may be thinned and connected to the upper portion of the first connection terminal portion. (5) In the case of the bending and lifting step, the thinned portion of the f-curved portion is bent, so that the upper surface of the second connecting terminal portion may be located at the first connecting terminal portion of the moon. And the position above the wafer pad is high. In this case, in the fixing step, the second connection terminal portion may be fixed in a state of being separated from the tape and suspended in the air. In this case, the lead frame is plural, and in the forming step, the lead frame is formed with a plurality of adjacent ones, and the first connection terminal portion and the second connection terminal portion of the wafer pad are used as one electronic component region. In the outer frame, a plurality of electronic zero-fitting regions including a plurality of adjacent regions including the wafer pad, the first connection terminal portion, and the second connection terminal portion are formed in the outer frame, and the plurality of electronic component regions are adjacent to each other The first or second connection terminal portion may be connected to each other, and the lead frame is not formed with a separation frame that surrounds and secures the electronic component region. Advantageous Effects of Invention According to the present invention, it is possible to provide a lead frame, an electronic component, and a method of manufacturing the same, which are capable of preventing a decrease in reliability and which are easy to manufacture and can be reduced in cost. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view showing a package using a multilayer wiring board having a conventional laminated device. Figs. 2(a) to 2(b) are views showing a general lead frame of 200947656 used in the conventional collective seal forming QFN. The third (a) to (c) drawings show the lead frame before the completion of the first embodiment of the present invention. The fourth (a) to (c) drawings conceptually show a bending process of the bending portion 51 of the first embodiment of the present invention. Figs. 5(a) to 5(c) are views showing the lead frame 1 before the assembly step of the first embodiment of the present invention is completed. ^ (a) to (d) are diagrams for explaining an assembly procedure of assembling an electronic component using a lead frame according to the first embodiment of the present invention. Figs. 7(e) to 7(g) are views for explaining an assembly procedure of assembling an electronic component using a lead frame according to the first embodiment of the present invention. Figs. 8(a) to 8(c) are views showing electronic components which are completed after the assembly step of the embodiment of the present invention. Figs. 9(a) to 9(d) are views showing the outline of an electronic component which is completed after the assembly step of the third embodiment of the present invention. 〇 10(a) to (c) are diagrams showing a wire frame before completion of the second embodiment of the present invention. Fig. 11 (a) to (c) are views showing a lead frame completed before the assembly step of the second embodiment of the present invention. 2(a) to 12th are diagrams for explaining the steps of manufacturing the lead frame of the second embodiment of the present invention. Fig. 13 (a) to (c) are diagrams showing electronic components completed after the splitting step in the second embodiment of the present invention. Figs. H(a) to (d) are diagrams showing the outline of the electronic component completed after the assembly procedure of the second embodiment of the present invention 15 200947656. c. The best mode for carrying out the invention Hereinafter, an embodiment of the present invention will be described with reference to the drawings. 5 However, the present invention is not limited by the following embodiments. (First Embodiment) Fig. 3 is a view showing a lead frame 前 before completion of the first embodiment of the present invention. Figure 3(a) shows the plane of the lead frame in the state of the terminal before the connection is completed. Fig. 3(b) is a cross-sectional view of the lead frame 1 of Fig. 3(a), Fig. A-A. Fig. 3(e) is a cross-sectional view of the lead frame 1 of Fig. 3(a) and Fig. B-B. As shown in Fig. 3(a), the lead frame is composed of the outer frame 2, the wafer pad 3, the working terminal 4', and the second terminal 5. The wire and the underside of the wire 13 are then used to hold the wire frame 1. 15 The outer frame 2 is made of metal and is formed in the outermost periphery of the guide. A plurality of electronic component regions 21 are formed inside the outer frame 2. Here, four electronic component regions 2 are formed in two adjacent rows and two rows. The electronic component q region 21 is formed with a wafer pad 3 at its center, and is formed with a frame-like gamma surrounding the periphery of the wafer cassette 3. . A first terminal 4 and a second terminal 5 connected to the lion 2 〇 31 are formed around the lion stick 31. Here, the electronic component area 21 adjacent to the outer frame 2 is connected to the connecting portion via the second terminal 5, for example. Further, although the electronic component region 21 is formed adjacent to each other in two rows and two rows, it is needless to say that it is an effective system in any combination of Ν and Μ = 2 or more. Further, the adjacent electronic component region 21 may be an example. 16 200947656 5 Ο 15 Lu 20 If the first terminal 4 is connected by a connecting portion. The first terminal 4 is formed around the auxiliary rod 31 surrounding the outer periphery of the wafer pad 3 in the electronic component region inside each of the outer frames 2. The lower part of the terminal 4 will become an external terminal after the package. As shown by the circular area in Fig. 3(a), the first terminal 4 is opened in the electronic component area 21 between the auxiliary bar 31 and the boundary of the electronic component area _. Further, each (10) is composed of two first terminals 4, and two first terminals 4 are connected to each other. Here, the inside of each column, that is, the side of the wafer pad 3 side! The terminal 4 is referred to as the inner first terminal 41, and the outer side of each column, that is, the i-th terminal 4 on the boundary side of the electronic component region 21 is referred to as the outer i-th terminal 43. Further, in the subsequent steps of the two first terminals 4 of the respective columns, that is, the inner side 41 terminal 41 and the outer ith terminal 43', the first inner terminal 41 and the outer (four) one terminal are connected by using a punching machine or the like. Part of 43 to separate it. Further, the outer first terminal 43 is not connected to the outer frame 2 and is electrically insulated. In the electronic component area inside each of the outer frames 2, the second terminal 5 is formed in the auxiliary bar 3A surrounding the wafer pad. Similarly to the i-th terminal 4, the second terminal 5 is formed as a circular area in the third (a) diagram, and a plurality of J are formed between the auxiliary bar 31 and the electronic component region 21 in each electronic component region. Further, each of the rows is composed of two second terminals 5, and two second terminals are connected to each other. Here, the inner side of each column, that is, the second terminal 5 on the wafer pad 3 side is the inner second terminal 5, and the second terminal 5 on the boundary side of the electronic component region, which is the outer side of each column, is referred to as The outer second terminal 53. Further, a portion where the inner first terminal 51 and the outer second terminal 53 are connected is referred to as a curved portion U. 17 200947656 Further, the outer frame 2 and the outer (four) 2 terminal 53 are connected via the connecting portion 12. In addition, the adjacent electronic component area 21 is connected to the outer second terminal and the terminal 53 is used as the package ==internal connection', and the outer side is connected to the inner second terminal 51 and the outer magic terminal bending portion. And the connecting portion 12 connecting the outer second terminal 53 and the outer frame 2 is bent. After bending, the bent part u and the joint are turned into

,子之外側第2端子53被固定於較晶片塾3上面更高之位 10 置。The second terminal 53 on the outer side of the sub-mount is fixed to a position higher than the upper surface of the wafer cassette 3.

又’將透過外側第2端子53連接外框2⑽接之電子零 件區域21的連接部彎曲加工。藉由經寶曲加工之連接部與 彎曲部11,封裝後成為外部端子之電子零件區域u側的外 側第2端子53被蚊於較晶片墊3上面更高之位置。此處, Μ内側第2端子51因經弯曲加工之.彎曲部u而未改變位置,且 被固定於與第1端子4大致相同之高度。又,外側第2端子53 之高度可藉由施加於彎曲部u之彎曲加工程度任意調節。 例如,外側第2端子53之高度可藉由經彎曲加工之 彎曲部 U,調節成封裝後自封裝件露出之高度。 2〇 第3(b)圖係第3(a)圖A-A’之截面圖,顯示第1端子4的截 面。第3(c)圖係第3〇)圖3_丑’之截面圖,顯示第2端子5截的 面圖。 由第3(b)圖可知’第3(a)圖之分離線8的部分,即,鄰 接電子零件區域21之邊界附近的區域係完全「無」金屬之 18 200947656 區域。未於分離線8形成金屬,不僅於以後之組裝步驟中, 不會對用以分離鄰接之電子零件區域21進行切斷之切割刀 (dicing blade)81有負載’且於切斷後不會產生金屬毛邊,故 可發揮很大的效果。 5 又,由第3(c)圖可知,位於電子零件區域21侧與外框2 側,即,位於分離線8側之外側第2端子53係呈懸浮於空中 之狀態。外側第2端子53之上面位於較晶片墊3上面高的位 0 置’並未接觸外側第2端子53之下面。 又,導線框1之下面,即,外框2之下面、晶片墊3之下 10面、第1端子4之下面、内侧第2端子51之下面被固持並固定 於膠帶13上。如此,因導線框丨之下面被膠帶13強力地支 持,故於以後之組裝步驟中,即使外側第2端子53懸浮於空 中’仍可穩定地進行運送或組裝。 此處,雖未圖示,但膠帶13係由膠帶基材與其表面之 15接著層所構成。膠帶13藉由接著層與導線框1之下面接著。 Ο 又,膠帶13之膠帶基材係由具有可承受組裝步驟之熱經歷 的耐熱性(具體而言係15(rc〜23(rc)之材料構成,係由例 如,環氧樹脂、聚醯亞胺等構成。 ' 另外,導線框1中,於其表面形成有例如,鍍鎳(Ni)層、 20鍍鉑(Pd)層、及閃鍍金(Au)層構成之3層電鍍層。 又,亦可於晶片墊3、第1端子4及内侧第2端子51,部 分地施行例如,Ag電鍍,於成為外部端子之外側第2端子53 部分地施行例如,錫·銀(Sn-Ag)、錫-鉍(sn_Bi)等焊錫電鍍。 又,電鍍之厚度,以例如,Au閃鍍為〇.2μϊη以下,Pd 19 200947656 電鍍為Ιμηι以下、及Ag電鍍為數μηι以下為佳。導線框1之 厚度’以例如,50μιη~200μιη為佳。 第4圖係概念地顯示彎曲部η的彎曲加工程序的圖。第 4(a)圖係與第3(c)圖Β-Β,截面圖相同。第4(a)圖特別以外側 5第2端子53、内侧第2端子51、連接外側第2端子53與内側第 2端子51之彎曲部u、及連接外側第2端子53與外框2之連結 4 12作為AQ域部。第4(b)圖係顯不包含彎曲加工前之彎曲 部11的A區域之狀態的圖,第4(b)係顯示包含彎曲加工後之 彎曲部11的A區域之狀態的圖。 ° 第4(a)圖之狀態中,為可輕易彎曲加工連接外側第2端 子53與内側第2端子51之彎曲部丨丨,與連接外侧第2端子53 與外框2之連結部12,將彎曲部〗〗與連結部12之厚度變薄 (以下,S己為薄化。)。具體而言,如第4(a)圖所示,彎曲部 $ 11連接於封裝後成為外部端子之外侧第2端子兄的下部。 5又,彎曲部11連接於内側第2端子51之上部。連結部12連接 於封裝後成為外部端子之外側第2端子Μ的下部。又,連結 12連接於外框2之上部。 2〇Further, the connecting portion of the electronic component area 21 to which the outer frame 2 (10) is connected via the outer second terminal 53 is bent. By the connection portion and the curved portion 11 which are processed by the treble, the outer second terminal 53 on the side of the electronic component region u which becomes the external terminal after being packaged is placed higher than the upper surface of the wafer pad 3. Here, the inner second terminal 51 of the crucible is not changed in position due to the bent portion u, and is fixed to substantially the same height as the first terminal 4. Further, the height of the outer second terminal 53 can be arbitrarily adjusted by the degree of bending applied to the curved portion u. For example, the height of the outer second terminal 53 can be adjusted to a height exposed from the package after being packaged by the bent portion U. 2〇 Fig. 3(b) is a cross-sectional view of Fig. 3(a) and Fig. A-A' showing the cross section of the first terminal 4. Fig. 3(c) is a cross-sectional view of Fig. 3_ugly', showing the second terminal 5 cutaway. As can be seen from Fig. 3(b), the portion of the separation line 8 of Fig. 3(a), i.e., the region adjacent to the boundary of the adjacent electronic component region 21, is the region of the "None" metal 18 200947656. The metal is not formed on the separation line 8, and not only in the subsequent assembly step, the dicing blade 81 for cutting the adjacent electronic component region 21 is not loaded, and no metal is generated after the cutting. The burrs are so great that they can be used. Further, as is clear from the third (c) diagram, the second terminal 53 is suspended in the air on the side of the electronic component region 21 and the side of the outer frame 2, that is, on the side other than the separation line 8. The upper surface of the outer second terminal 53 is located at a position higher than the upper surface of the wafer pad 3, and does not contact the lower surface of the outer second terminal 53. Further, the lower surface of the lead frame 1, i.e., the lower surface of the outer frame 2, the lower surface of the wafer pad 3, the lower surface of the first terminal 4, and the lower surface of the inner second terminal 51 are held and fixed to the tape 13. Thus, since the lower surface of the lead frame is strongly supported by the tape 13, in the subsequent assembly step, the outer second terminal 53 can be stably transported or assembled even if it is suspended in the air. Here, although not shown, the tape 13 is composed of a tape substrate and a surface layer of 15 layers. The tape 13 is followed by a lower layer and a lower side of the lead frame 1. Further, the tape substrate of the tape 13 is composed of a material having a heat history capable of withstanding the assembly step (specifically, 15 (rc~23 (rc)), for example, epoxy resin, polyphthalamide Further, in the lead frame 1, a three-layer plating layer composed of, for example, a nickel plating (Ni) layer, a 20 platinized platinum (Pd) layer, and a flash gold (Au) layer is formed on the surface of the lead frame 1. For example, Ag plating may be partially performed on the wafer pad 3, the first terminal 4, and the inner second terminal 51, and the second terminal 53 may be partially tin-silver (Sn-Ag), for example, outside the external terminal. Solder plating such as tin-bismuth (sn_Bi). The thickness of the plating is, for example, Au flash plating of 〇.2μϊη or less, Pd 19 200947656 plating of Ιμηι or less, and Ag plating of several μηι or less. 'For example, 50 μm to 200 μm is preferable. Fig. 4 is a view conceptually showing a bending process of the bending portion η. Fig. 4(a) is the same as the third (c) figure Β-Β, the same. In the fourth diagram (a), the outer portion 5 second terminal 53 and the inner second terminal 51 are connected, and the outer second terminal 53 and the inner second terminal 51 are bent. u and the connection 4 12 connecting the outer second terminal 53 and the outer frame 2 as the AQ domain. The fourth figure (b) shows a state in which the state of the A region of the curved portion 11 before the bending process is not included, and the fourth (4) b) shows a state including the A region of the curved portion 11 after the bending process. ° In the state of Fig. 4(a), the bending of the outer second terminal 53 and the inner second terminal 51 can be easily bent. In the connecting portion 12, the connecting portion 12 connecting the outer second terminal 53 and the outer frame 2 thins the thickness of the curved portion and the connecting portion 12 (hereinafter, S is thinned). Specifically, As shown in Fig. 4(a), the bent portion $11 is connected to the lower portion of the second terminal brother on the outer side of the external terminal after the package is attached. 5 Further, the bent portion 11 is connected to the upper portion of the inner second terminal 51. The connecting portion 12 is connected to the package. Then, it becomes a lower part of the second terminal 之外 on the outer side of the external terminal. Further, the connection 12 is connected to the upper portion of the outer frame 2.

另外’將彎曲部U之厚度薄化,使寶曲部此厚度較 夕山卜側第2端子53及内側第2端子叫度更薄,並成為外側第] +及内側第2端子51厚度之—半以下。將連結部12之厚 度4化’使連結部12之厚度較外側第2端子^及外框2厚度 更薄’並成為外側第2端子53及外框2厚度之 一半以下。藉 i b〜十,於以後之組裝步驟中以密封樹脂覆蓋後,成 4端子之外側第2端子53之上面會完整地露出。 20 200947656 第4 (b)圖係顯示彎曲部11與連結部丨2彎曲加工後的狀 態。 於由第4(a)圖之狀態彎曲加工成第4(b)圖之狀態時,因 彎曲部11及連結部12係如前述業經薄化,故可較輕易地彎 5 曲加工。 此處,彎曲加工後導線框丨之厚度係設計為配合成為樹 脂密封後電子零件之厚度。即,彎曲部11及連結部12可配 合樹脂密封後電子零件之厚度來調節彎曲加工之程度。此 處,例如,於形成導線框1之前,原先之金屬板厚度為200μιη 10時,彎曲加工後之導線框1的厚度可於其1〜3倍之 200μιη〜600μιη的厚度範圍内調節彎曲加工的程度。換言 之’可於樹脂密封後電子零件之厚度為2〇〇μηι〜600μηι之間 自由地設計上下之外部端子的位置。 第5圖係顯示本發明第1實施形態組裝步驟前完成之導 15線框1的圖。第5(a)圖係對電子零件進行組裝前之組裝步驟 前的導線框1之平面圖。第5(b)圖係第5(a)圖A-A’之導線框1 的截面圖。第5(c)圖係第5(a)圖B-B,之導線框1的截面圖。 第5圖中,去除了第3圖顯示之輔助棒31。又,第5圖中,去 除了連接内側第1端子41與外側第1端子43的部分,且内側 2〇第1端子41與外側第1端子43係電絕緣。 至第5圖之步驟係如下述。 首先,將彎曲部11與連結部12彎曲加工。 其次,將導線框1之下面,即外框2之下面、晶片墊3 之下面、第1端子4之下面、及内側第2端子51之下面固持並 21 200947656 固定於膠帶13(第3圖)。 接著,去除輔助棒31、及連接内側第1端子41與外側第 1端子43之部分’以成為第5圖之端子分離狀態。 另外,於不去除輔助棒31且與導線框1内一部分之端子 . 5連接之狀態下,辅助棒31亦可活用作為電源環(power ―)。此時,輔助棒31與導線框〗内之複數或單數的任意端 子連接,之後與元件9及金屬細線6、或元件9之裡面電極(與 晶片墊3 <{:連接之側)電連接即可。 又,由第5(b)圖可知,第5(a)圖之分離線8的部分,即, 〇 1〇鄰接電子零件區域21之邊界附近的區域均為「無」金屬區 域。又,由第5(c)圖可知,於電子零件區域21側與外框2側, 即分離線8侧,外側第2端子53係為懸浮於空中之狀態。外 側第2端子53之上面係位於較晶片墊3上面高之位置,且並 未接觸外側第2端子53之下面。 15 第6圖與第7圖係用以說明本發明第1實施形態中使用 導線框1組裝電子零件之組裝步驟的圖。第6圖與第7圖於左 側顯示第1端子4,右侧顯示第2端子5之組裝步驟。 © 第6⑻圖係顯示第5圖電子零件區域21之導線框!的平 面圖。 2〇 第吵)圖〜第6⑷圖與第化)圖〜第7(g)圖係第3⑷圖 A-A’與Β·Β’之截面圖’並顯示第丨端子4與第2端子5之喊 步驟。 如第5圖所說明,第6剛係顯示彎曲加工與端子分離 完成後之狀態的導線框1固定於膠帶13的狀離。 22 200947656 接著,第6(c)圖之步驟中,元件9被裴載於晶片墊3並固 定接著。元件9與晶片墊3係以DAF(Die Attach Film)、Ag 糊、環氧樹脂系之絕緣接著材、矽氧樹脂接著材、Au_Si共 晶、及焊料等固定接著。 5 ❹ 10 15 20 DAF(Die Attach Film)係用以安裝、積層元件之特殊黏 著薄膜元件。又,元件9係主動元件、被動元件、半導體元 件、MEMS及電池等,此處可舉例如,半導體晶片。又, 元件9之厚度係30μιη〜150μηι,特別是當為半導體元件時係 50μηι 〜ΙΟΟμιη 左右。 接著,第6(d)圖之步驟中,元件9與導線框丨之端子内部 連接。即,以金屬細線6電連接元件9之電極部(未圖示)、第 1端子4之上面、内側第2端子51之上面。 此處,金屬細線6係由Α卜An、或Cu等材料構成之線。 當金屬細線6之材料係由Au構成時,金屬細線6係使用經超 曰波熱壓接合方法球形結著(baii bonding)且直徑為φ 18μιη〜φ30μιη之線。當金屬細線6之材料係由A1構成時,金 屬細線6係使用經常溫、超音波方法楔結合(wedge bonding)’並使用直徑為03〇卿〜01〇〇哗之線。當金屬-細 線6之材料係由Cu構成時’可使用於氧化還原環境氣體内被 覆蓋之Cu線。料,亦可使用义或以帶代替金屬細線6電 連接兀件9與導線框1之端子,以内部連接元件9與導線幻 之端子。 然後’第7(e)圖之步驟中,以密封樹脂7樹脂密封導線 框1、元件9及金屬細線6。樹脂密封為成為外部端子之第[ 23 200947656 5 10 15 20 端子4下面與外側第2端子53上面自密封樹脂?露出。 此處’藉由調整彎曲部此彎曲加 η之厚度薄化程度,使蠻曲邱以心度或考曲部 出。 a ”曲仙不會自密封樹脂7表面露 此處,亦可適當地露出晶片塾3之下面。又 線6連接於第2端子5之區域的對向面,即,内㈣= 之下面雖自密封樹腊7之表面露出,但只要將内側第2端子 51之下面薄化並以樹脂覆蓋内賺端子51之下面的話 可以密封樹脂7覆蓋不需要之端子。 然而’ -般之LGA(Land Grid Array :基板柵格陣列) 多為圓形端子。因此,導線框1之端子,即,第1端子4與第 2端子5之上下面係圓形。以刻加工或壓印加工等,將非 外部端子部之”端子4與第2端子5薄化,使非外部端子邛 面之第1端子4與第2端子5於厚度方向上產生高度差,再以 密封樹脂7覆蓋。樹脂密封後之電子零件(半導體裝置)中, 由外部可見之端子’只有成為外部端子之第1端子4與第2端 子5之上面或下面的圓形。又,藉將第1端子4與第2端子5之 上下面作為圓形,可增大其上下面之面積。因此,有可穩 定地進行經内部連接之元件9與導線框1之端子的金屬細線 6之連接的優點,且成為外部端子之第丨端子4與第2端子5之 上面或下面側的安裝,因用於安裝之焊料的連接面積變 大’亦有增強安裝強度之效果。 接著’第7(f)之步驟中’將於前步驟中經密封樹脂7集 體後封之導線框1、元件9及金屬細線6之密封體,隨各電子 〇 ❹ 24 200947656 零件區域2i切割成各個電子零件。一般係使用以黏合材固 定鑽石顆粒之切割刀81切斷密封體。如前述,本發明中於 切割刀81切割之分離線8並未存在帶狀之分離框。即,如第 7_所示,第丨端子4之分割線並未存在「金屬部分」(只 • 5 #在樹脂),故可大幅降低切割刀81之破裂或磨損。 另外,密封體之切割方法亦可為不使用切割刀81之切 斷方法。例如,當電子零件之厚度為20_以下時,亦可 ❹ 使用㈣(YAG、⑽)靖㈣體,科離成各個電子零件。 又外框2内透過外侧第2端子53連接之鄰接電子零件 1〇區域21的連接部、及連接外側第2端子53與外框2之連結部 12被切割刀81切斷。被切割刀81切斷,而殘留於外側第城 子53之連接部與連結部12之殘料分,自電子零件之侧面 路出然而’即使於外側第2端子53殘留有連接部與連結部 12之殘渣部分,對改變相第2端子53高度之電子零件完成 15度並無任何問題。其係因,藉於電子零件侧面之中心附近 〇 露出殘留於外側第2端子53之連接部與連結部12的殘渣部 分,於外側第2端子53殘留之連接部與連結部12的殘渣部分 之上下有密封樹脂7造成的炎心效果,可使樹脂之裂縫或金 屬毛邊不會到達電子零件之上下面。 2〇 然後,第7(幻圖之步驟中,由各電子零件區域21之電子 零件,即,由以切割刀81分離成為電子零件之以密封樹脂7 密封的各電子零件區域21之導線框卜元件9及金屬細線6剝 除膠帶13。 此處,膠帶13之接著層係使用例如,熱硬化型之uv硬 25 200947656 化型接著材。熱硬化型之uv硬化型接著材因可藉由照射 UV使黏著力下降’故可輕易地自電子零件剝離膠帶13。 第8圖係顯示本發明第1實施形態之組裝步驟後完成的 電子零件之圖。第8(a)圖係組裝步驟後完成之電子零件的密 5封樹脂7為透明時之平面圖。第8(b)圖係第8(a)圖之組裝步 驟後完成的電子零件A-A,戴面圖。第8(c)係第8(a)圖之組裝 步驟後完成的電子零件B-B,截面圖。特徵在於第8(b)圖。換 言之,外側第1端子43外側之侧面,即電子零件之側面側並 無金屬被切斷之痕跡。其係因導線框丨之構造階段中,設計 10成無透過第1端子4連接鄰接之電子零件區域21之故。 第9圖係顯示本發明第丨實施形態之組裝步驟後完成的 電子零件之外形的圖。第9(a)圖係由組裝步驟後完成之電子 零件上方所見之外形圖。第9(b)圖係第9(a)圖之組裝步驟後 凡成的電子零件A-A,截面圖。第9(c)圖係第9(a)圖之組裝步 I5驟後疋成的電子零件B B,截面圖。第9⑷圖係由組裝步驟後 完成之電子零件下方所見之外形圖。 由第9(a)圖與第9(d)圖之外形圖、及第9(b)圖與第9(c) 圖=截面圖可知,由電子零件表裡面露出之部分係設計成 卜端子之。卩分,即僅第1端子4之下面與外侧第2端子53之 20 上面。 另外’可配合制變更設計上下端子之端子數或構造。 又亦可將内側第2端子51之下面設計成由電子零件裡 面露出之外部端子。 、 本發明之第1實施形態中,具有彎曲部11及連結 26 200947656 部12,且藉由將彎曲部11及連結部12彎曲加工,可輕易地 調節成為外部端子之外側第2端子53的高度。因此,不需使 用配線基板,即可以1片導線框,實現具有上下外部端子的 導線框。又,因可自由設計成為外部端子之外側第2端子53 - 5 的位置、面積,故可確保設計之多樣性。即,製造變得簡 易。又,複數電子零件區域21之邊界無分離框,故可大幅 削減切斷導線框1時施加於各電子零件區域21之切割刀81 的負載’可延長切割刀81之壽命。又,因複數電子零件區 域21之邊界並無分離框’故相較於具有分離框之習知導線 10框,可大幅減少因切割刀81產生之金屬切斷面,並可防止 因於具有導線框1之電子零件產生的金屬毛邊造成的接觸 不良。 藉此,可防止可靠性的下降’且實現製造簡易、可低 成本化之導線框。 15 另外,本發明之第1實施形態中,第1端子4與第2端子5 φ 雖交互地配置’但並未被限定。第1端子4與第2端子5之位 置即使為例如’連續、或跳躍之位置關係,仍適用於本發 明。 又,因可自由設計成為外部端子之外側第2端子53之位 20置、面積,故可充分設計成為外部端子之外側第2端子53的 面積。藉此,可提升並穩定成為外部端子之外侧第2端子53 的上面與積層於其上部之電子零件的電極連接可靠性。 (第2實施形態) 第10圖係顯示本發明第2實施形態完成前之導線框1〇 27 200947656 的圖。第10(a)圖係於連接完成前端子之狀態下導線框1〇的 平面圖。第10(b)圖係第10(a)圖A-A’之導線框1〇的截面圖。 第10(c)圖係第10(a)圖B-B’之導線框1〇的截面圖。本發明之 第1實施形態中顯示了以多列端子(2〇〜2〇〇銷(pin))為對象, 5 即適合LGA(Land Grid Array)或BGA(Ball Grid Array)封震 之實施形態’第2實施形態中則顯示以小銷(2銷〜6〇銷)為對 象之適合SON或QFN形態封裝的實施形態。第丨實施形態之 導線框1中第1端子4及第2端子5雖與辅助棒31連接,但因本 第2實施形態中端子數較少,故如第1〇圖所示,導線框1〇中 0 10不形成輔助棒而直接將第1端子60及第2端子70連接於晶片 塾 30。另外、SON(Small Outline Non-l.eaded Package)或 QFN(Quad Flat Non-leaded Package)等外部端子之形狀— 般係砲彈形、橢圓、四角、或長方形。因此、作為外部端 子之自密封樹脂1〇〇露出之第1端子60及第2端子70的面係 15配置成试周邊(邊緣tC 1列)或鑛齒狀配置。 如第11(a)圖所示,導線框1〇係由外框2〇、晶片墊3〇、 第1端子60、及第2端子70構成。導線框1〇之下面接著有用 〇 以固持導線框10之朦帶13〇。 外框20係金屬’且為形成於導線框1〇最外周之框。 20 外框20之内部形成有複數電子零件區域210。此處,形 成有鄰接之2列χ2行的4個電子零件區域21〇。各電子零件區 _ 域210於其中央形成有晶片墊30,並於晶片墊30之周圍形成 有連接於晶片墊3〇之第1端子60及第2端子70 。此處,外框 20内鄰接之電子零件區域210係例如,透過第2端子70以連 28 200947656 接部連接。 5 ❹ 10 15 20 =外框20内部之電子零件區咖,第㈣子卿成 於曰曰片墊3〇周圍,端子60之下面於封錢會成為外部端 子。如第10⑻圖之長方形區域所示’第丨端子6〇於電子零件 區域2H)中,在晶片墊3績電子零件區域训之邊 成複數之列。又,各㈣叫目第i端子的構成。1 又’第1端子6G並未與外框2G連接,絕緣。 於各外框20内部之電子零件區域21()中第2端子獅 成於晶片墊30之周圍。如第1()⑷圖之長方形區域所示第2 端子7〇於各電子零件區域2附,在晶片㈣與電子零件區 域210之邊界之間形成複數之列。又,各列係由2個第2端子 70構成,且2個第2端子观連接地形成。 此處,將各列之内側,即,將晶片墊30側之第2端子7〇 記為内側第2端子71 ’並將各列之外側,即,電子零件區域 210之邊界側的第2端子7〇記為外側第2端子73。又將連接 内侧第2端子71與外側第2端子73之部分記為彎曲部11〇。 又’外框20與外側第2端子73透過連結部120連接。另 外’雖已提及’但鄰接之電子零件區域2iQ透過外側第2端 子73以連接部連接。 又内側第2端子71主要用以作為内部連接,而外側第 2端子则作為料後之外部端子使用。 將連接各列内側第2端子71與外側第2端子73之彎曲部 110及連接外側第2端子b與外框2〇之連結部u〇彎曲加 工。藉由經彎曲加工之青曲部11〇與連結部12〇,封裝後成 29 200947656 為外部端子之外側第2端子73被固定於較晶片墊3〇上面更 高之位置。 第11圖係顯示本2發明第實施形態組裝步驟前完成之 導線框10的圖。第11 (a)圖係對電子零件進行組裝前之組裝 · 5步驟刚導線框的平面圖。第11(b)圖係第1丨⑷圖八_八,之導 線框10的截面圖。第11(c)圖係第11(a)圖B-B,之導線框1〇的 截面圖。與第10圖不同的是,晶片替30與第1端子6〇及内側 第2端子71分離。 第12圖係用以說明本發明第2實施形態導線框1〇之製 © 10造步驟的圖。為易於理解,第12圖中於左側顯示第丨端子 60、右側顯示第2端子70之製造步驟。 第12(a)圖係顯示第n圖電子零件區域21〇之導線框⑺ 的平面圖與其截面圖。 首先,準備作為導線框10之金屬板l〇a(第12(b)圖)。金 15屬板10a係由例如,Cu合金' Fe-Ni材(例如:42alloy)、A1 材·#構成,且板厚係5〇μιη〜200μηι。可依電子零件之厚产、 或用途,適當地選擇金屬板1〇3之材料或板厚。 ◎ 其次,準備導線框10(第12(c)圖)。具體而言,藉由蝕 刻等,由金屬板l〇a形成晶片墊3〇、第丨端子6〇、第2端子%、 2〇及外框2〇等。該步驟中,與第4⑷中之說明同樣地,將成為 連接晶片墊30與第1端子60之連接部的部分下面、或連接晶 片墊30與内側第2端子71之連接部分的下面薄化。又,將: 接内側第2端子71與外側第2端子73而成為f曲部11〇之部 分、或連接外側第2端子73與外框20而成為連結部12〇之^ 30 200947656 分薄化。之後,以下個步驟將經薄化之彎曲部11〇與連結部 120彎曲加工。 5 ❹ 10 15 ❹ 20 此處,與第1實施形態同樣地,彎曲部110連接封裝後 成為外部端子之外侧第2端子73之下部、及内侧第2端子71 之上部。又,連結部120連接封裝後成為外部端子之外側第 2端子73的下部、及外框20之上部。 另外’彎曲部110之厚度係薄化成較外側第2端子73及 内侧第2端子71之厚度薄,且成為外侧第2端子73及内側第2 端子71厚度之一半以下。連結部丨2〇之厚度係薄化成較外側 第2端子73及外框20之厚度薄,且成為外侧第2端子73及外 框20厚度之一半以下。 又’薄化可藉由姓刻加工施行,亦可藉由壓印加工施 行0 接著’將經金屬鑄模薄化之彎曲部11〇與連結部12〇彎 曲加工(第12(d)圖)。 換言之,由第12(c)圖之第2端子7〇(右圖)的狀態加工成 第12(d)圖(右圖)的狀態。_曲部11〇及連結部,因薄化成 前述,故可輕易_曲加工。又,彎曲加工後之導線框1〇 的厚度可配合樹脂密封後電子零件之厚錢計。 此處例如虽原、先之金屬板l〇a的板厚為80μιη時, 彎曲加工後導線框1G之厚度可於其U倍即卿W卿爪 之厚度範圍内輕易地調節彎曲加工之程度。換言之,可於 Γ密封後電子零件之厚度為^之間自由地設 °十上下之外部端子的位置。. 31 200947656 接著,將導線框ίο貼附於膠帶130(第12(幻圖)。 '、體而s,將導線框10之下面,即,將外框2〇之下面、 晶片墊30之下面、第丨端子6〇之下面固持並固定於膠帶13〇 上。 5 其次,以打孔機18切斷晶片墊30與第!端子60、及晶片 墊30與第2端子70之經薄化的連接部分(第12⑴圖)。 此處,被打孔機18之4端切斷的經薄化之連接部分的 截面形狀係如第12(f)圖所示之「屋層」或「菌傘」的形狀。 另外,當以打孔機18等金屬鑄模進行切斷時,其截面雖會 1〇形成為前述,但當以雷射等進行切斷時,會於切斷之處殘 留熔斷之痕跡(浮渣)。 之後,於電子零件區域210形成導線框1〇(第12(g)圖)。 第13圖係顯示本發明第2實施形態組裝步驟後完成之 電子零件的圖。第13(a)圖係組裝步驟後完成之電子零件的 15密封樹脂100為透明時之平面圖。第13(b)圖係第13(a)圖組 裝步驟後完成之電子零件的A-A,截面圖。第13(c)圖係第 13(a)圖組裝步驟後完成之電子零件的Β·Β,截面圖。與第12 圖不同的是’元件90裝載於晶片墊3〇上,且以金屬細線80 内部連接元件90與導線框1〇之端子,並以密封樹脂1〇〇覆蓋 20全體。此處,内部連接係指以金屬細線80電連接元件90之 電極部、第1磚子60之上面、及内側第2端子71之上面。此 處,特徵在於第13(b)圖。換言之,第1端子6〇外側之侧面, 即電子零件之侧面側並未有經金屬切斷的痕跡。其係因於 導線框10之構成階段中,並未設計有透過第1端子60鄰接之 32 200947656 電子零件區域210之故。 另外’第2實施形態中,元件9〇雖為較晶片塾3〇小的構 造,但亦可為較晶片塾30大之構造,亦適用於元件9〇之主 面的電極透過凸塊(未圖示)直接連接於端子的叱型。 ' 5 帛14圖係顯示本發明第2實施形態組裝步職完成之 電子零件的外形之圖。第14⑻圖係由組裝步驟後完成之電 子零件上方所見的外形圖。 β 第14(b)圖係第14(相裝步驟後完成之電子零件的 Α-Α’截面圖。第14(c)圖係第14(a)圖組裝步驟後完成之電子 1〇零件的B-B’截面圖。第14⑷圖係由組裝步驟後完成之電子 零件下所見的外形圖。 由第14(a)與第14(d)圖之外形圖、及第丨4(b)圖與第丨4(c) 圖之截面圖可知,於電子零件之表裡面露出之部分係設計 成為外部端子的部分,即僅為第丨端子6〇之下面,與外侧第 15 2端子73之上面。 φ 另外’可配合應用變更設計上下端子之端子數或構造。 又,亦可將内側第2端子71之下面設計成由電子零件裡 面露出之外部端子。 又,第14(d)圖中’成為外部端子之第丨端子6〇與外側第 20 2端子73之配置雖為鋸齒狀配置但亦可為並列或排成丨列。 又,外部端子之形狀,即,第1端子6〇之下面,與外側第2 端子73之上面的形狀亦可適當地選擇砲彈形、橢圓、四角、 長方形、或圓形等。 以上,本發明之第2實施形態中,具有彎曲部u及連結 33 200947656 部12,且藉由將彎曲部11及連結部12彎曲加工,可ι 調節成為外部端子之外側第2端子73的高度。因此, 不需使 用配線基板,即可以1片導線框’實現具有上下外者15# 喂子的 導線框10及具備該導線框10之電子零件。又,因可自由^ 5 計成為外部端子之外側第2端子73的位置、面積,故可確保 設計之多樣性。換言之’製造具有上下外部端子之導線框 10及具有該導線框10之電子零件變得簡易。 又,複數電子零件區域210之邊界無分離框,故可大幅 削減在切斷導線框10時施加於各電子零件區域21〇之切割 10刀81的負載’可延長切割刀81之壽命。又,因複數電子零 件區域210之邊界並無分離框,故相較於具有分離框之習知 導線框,可大幅減少因切割刀81產生之金屬切斷面,並可 防止因於具有導線框10之電子零件產生的金屬毛邊造成的 接觸不良。藉此,可防止可靠性下降,且實現製造簡易、 I5可低成本化之導線框、具有該導線框之電子零件及其製造 方法。 又,因本發明之導線框及具有該導線框之電子零件可 自由選擇作為上下外部端子之外側第2端子乃的位置,故可 設計成用以緩和施加於本發明之導線框及具有該導線框之 2〇電子零件的各種應力。 又In addition, the thickness of the curved portion U is thinned, and the thickness of the curved portion is made thinner than the second terminal 53 and the inner second terminal of the sacred side, and becomes the thickness of the outer side + and the inner second terminal 51. - Half or less. The thickness of the connecting portion 12 is reduced to 4, and the thickness of the connecting portion 12 is made thinner than the thickness of the outer second terminal ^ and the outer frame 2, and is equal to or less than half the thickness of the outer second terminal 53 and the outer frame 2. By i b to ten, after covering with a sealing resin in the subsequent assembly step, the upper surface of the second terminal 53 which is outside the four terminals is completely exposed. 20 200947656 The fourth (b) diagram shows the state in which the bent portion 11 and the joint portion 丨2 are bent. When the state of the fourth (b) is bent in the state of Fig. 4(a), since the curved portion 11 and the connecting portion 12 are thinned as described above, the bending can be easily performed. Here, the thickness of the lead frame after bending is designed to match the thickness of the electronic component after the resin is sealed. That is, the curved portion 11 and the connecting portion 12 can adjust the degree of bending processing in accordance with the thickness of the electronic component after resin sealing. Here, for example, before the lead frame 1 is formed, when the thickness of the original metal plate is 200 μm 10, the thickness of the lead frame 1 after the bending process can be adjusted in the thickness range of 1 to 3 times 200 μm to 600 μm. degree. In other words, the position of the upper and lower external terminals can be freely designed between the thickness of the electronic component after the resin sealing is 2 〇〇μηι to 600 μηι. Fig. 5 is a view showing a lead frame 1 completed before the assembly step of the first embodiment of the present invention. Fig. 5(a) is a plan view of the lead frame 1 before the assembly step of assembling the electronic component. Fig. 5(b) is a cross-sectional view of the lead frame 1 of Fig. 5(a) of Fig. A-A'. Fig. 5(c) is a cross-sectional view of the lead frame 1 of Fig. 5(a) and Fig. B-B. In Fig. 5, the auxiliary rod 31 shown in Fig. 3 is removed. Further, in Fig. 5, the portion connecting the inner first terminal 41 and the outer first terminal 43 is removed, and the inner second port first terminal 41 and the outer first terminal terminal 43 are electrically insulated. The steps up to Figure 5 are as follows. First, the bending portion 11 and the connecting portion 12 are bent. Next, the lower surface of the lead frame 1, that is, the lower surface of the outer frame 2, the lower surface of the wafer pad 3, the lower surface of the first terminal 4, and the lower surface of the inner second terminal 51 are fixed and 21 200947656 is fixed to the tape 13 (Fig. 3). . Then, the auxiliary bar 31 and the portion connecting the inner first terminal 41 and the outer first terminal 43 are removed to be in the terminal separated state of Fig. 5. Further, the auxiliary bar 31 can also be used as a power supply ring in a state where the auxiliary bar 31 is not removed and is connected to a part of the terminal 5 of the lead frame 1. At this time, the auxiliary rod 31 is connected to any of the plurality or singular terminals in the lead frame, and then electrically connected to the element 9 and the metal thin wire 6, or the inner electrode of the element 9 (to the side of the wafer pad 3 < {: connection) Just fine. Further, as is clear from Fig. 5(b), the portion of the separation line 8 of Fig. 5(a), i.e., the region near the boundary of the adjacent electronic component region 21, is a "none" metal region. Further, as is clear from the fifth (c) diagram, the electronic component region 21 side and the outer frame 2 side, that is, the separation line 8 side, and the outer second terminal 53 are suspended in the air. The upper surface of the outer second terminal 53 is located higher than the upper surface of the wafer pad 3 and does not contact the lower surface of the outer second terminal 53. Fig. 6 and Fig. 7 are views for explaining an assembly procedure for assembling an electronic component using the lead frame 1 in the first embodiment of the present invention. Figs. 6 and 7 show the first terminal 4 on the left side and the second terminal 5 on the right side. © Figure 6(8) shows the lead frame of the electronic part area 21 in Figure 5! Flat view. 2〇No.) Figure~6(4) and 第)) Figure 7(g) is a section 3(4)A-A' and Β·Β' and shows the third terminal 4 and the second terminal 5 Shout steps. As described in Fig. 5, the sixth rigid type shows that the lead frame 1 in the state after the bending process and the terminal separation are completed is fixed to the tape 13 in a state of separation. 22 200947656 Next, in the step of Fig. 6(c), the element 9 is carried on the wafer pad 3 and fixed. The element 9 and the wafer pad 3 are fixed by DAF (Die Attach Film), Ag paste, epoxy-based insulating material, epoxy resin material, Au_Si eutectic, solder, or the like. 5 ❹ 10 15 20 DAF (Die Attach Film) is a special adhesive film element for mounting and stacking components. Further, the element 9 is an active element, a passive element, a semiconductor element, a MEMS, a battery, etc., and may be, for example, a semiconductor wafer. Further, the thickness of the element 9 is 30 μm to 150 μm, and particularly when it is a semiconductor element, it is about 50 μm to ΙΟΟμιη. Next, in the step of Fig. 6(d), the element 9 is connected to the inside of the terminal of the lead frame. That is, the electrode portion (not shown) of the element 9, the upper surface of the first terminal 4, and the upper surface of the inner second terminal 51 are electrically connected by the thin metal wires 6. Here, the thin metal wires 6 are wires made of a material such as An, or Cu. When the material of the fine metal wires 6 is made of Au, the fine metal wires 6 are made of a line which is spherically bonded by a super-chopper thermocompression bonding method and having a diameter of φ 18 μm to φ30 μm. When the material of the thin metal wires 6 is composed of A1, the metal thin wires 6 are subjected to a regular temperature, ultrasonic method, wedge bonding, and a wire having a diameter of 03 〇 〜 〜 01 。 is used. When the material of the metal-filament 6 is composed of Cu, the Cu wire covered in the redox atmosphere can be used. For the material, the terminal of the wire 9 and the wire frame 1 may be electrically connected or replaced by a metal wire 6 to connect the component 9 and the wire terminal. Then, in the step of Fig. 7(e), the lead frame 1, the element 9, and the thin metal wires 6 are sealed with a sealing resin 7 resin. The resin is sealed as the external terminal [23 200947656 5 10 15 20 Terminal 4 underside and outside 2nd terminal 53 self-sealing resin? Exposed. Here, by adjusting the degree of thinning of the curvature of the curved portion and the thickness of η, the curvature is made by the heart or the test. a" Qu Xian does not expose from the surface of the sealing resin 7, but may also expose the underside of the wafer cassette 3. The line 6 is connected to the opposite surface of the region of the second terminal 5, that is, the inner (four) = below The surface of the self-sealing tree wax 7 is exposed, but the resin 7 can be sealed to cover the unnecessary terminals by thinning the lower surface of the inner second terminal 51 and covering the underside of the terminal 51 with a resin. However, the LGA (Land) Grid Array: The substrate grid array is mostly a round terminal. Therefore, the terminals of the lead frame 1, that is, the upper and lower ends of the first terminal 4 and the second terminal 5 are rounded, and are processed by etching or imprinting. The terminal 4 and the second terminal 5 of the non-external terminal portion are thinned, and the first terminal 4 and the second terminal 5 of the non-external terminal have a height difference in the thickness direction, and are covered with the sealing resin 7. In the electronic component (semiconductor device) after resin sealing, the terminal ′ visible from the outside has only a circular shape which is the upper surface or the lower surface of the first terminal 4 and the second terminal 5 which are external terminals. Further, by making the upper and lower surfaces of the first terminal 4 and the second terminal 5 circular, the area of the upper and lower surfaces can be increased. Therefore, there is an advantage that the connection between the internally connected element 9 and the metal thin wires 6 of the terminals of the lead frame 1 can be stably performed, and the upper terminal 4 of the external terminal and the upper or lower side of the second terminal 5 are mounted. As the connection area of the solder for mounting becomes larger, the effect of the mounting strength is also enhanced. Then, in the step of the seventh step (f), the sealing body of the lead frame 1, the element 9 and the thin metal wire 6 collectively sealed by the sealing resin 7 in the previous step is cut with the respective electronic 〇❹ 24 200947656 part area 2i. Various electronic parts. Generally, the sealing body is cut by a cutting blade 81 which fixes the diamond particles with an adhesive. As described above, in the present invention, the separation line 8 cut by the cutter 81 does not have a strip-shaped separation frame. That is, as shown in the seventh step, the "metal portion" (only 5 # in the resin) is not present in the dividing line of the second terminal 4, so that the cracking or abrasion of the cutting blade 81 can be greatly reduced. Further, the cutting method of the sealing body may be a cutting method in which the cutting blade 81 is not used. For example, when the thickness of the electronic component is 20_ or less, the (4) (YAG, (10)) Jing (four) body may be used to separate the electronic components. Further, the connection portion of the adjacent electronic component 1 to the region 21 connected to the outer second terminal 53 and the connection portion 12 connecting the outer second terminal 53 and the outer frame 2 are cut by the cutter 81. When the cutting blade 81 is cut, the remaining portion of the connecting portion of the outer wall portion 53 and the connecting portion 12 is separated from the side surface of the electronic component. However, even in the outer second terminal 53, the connecting portion and the connecting portion 12 remain. In the residue portion, there is no problem in completing the electronic component of the height of the second terminal 53 of the phase change by 15 degrees. In the vicinity of the center of the side surface of the electronic component, the connection portion remaining in the outer second terminal 53 and the residue portion of the connection portion 12 are exposed, and the connection portion remaining on the outer second terminal 53 and the residue portion of the connection portion 12 are exposed. The inflammatory effect caused by the sealing resin 7 on the upper and lower sides allows the crack or metal burr of the resin to not reach above and below the electronic component. 2〇 Then, in the step of the magic map, the electronic components of the electronic component regions 21, that is, the lead frames of the respective electronic component regions 21 sealed by the sealing resin 7 by the cutting blade 81 are sealed by the sealing resin 7. The element 9 and the metal thin wire 6 are stripped of the tape 13. Here, the adhesive layer 13 is formed of, for example, a thermosetting type uv hard 25 200947656 type of bonding material. The thermosetting type uv hardening type material is irradiated by irradiation. Since the UV reduces the adhesive force, the tape 13 can be easily peeled off from the electronic component. Fig. 8 is a view showing the electronic component completed after the assembly step of the first embodiment of the present invention. The eighth figure (a) is completed after the assembly step. The plan view of the sealed resin 7 of the electronic component is transparent. The figure 8(b) is the electronic component AA, which is completed after the assembly step of Fig. 8(a). Fig. 8(c) is the 8th (a) A cross-sectional view of the electronic component BB, which is completed after the assembly step of the figure, is characterized by a figure 8(b). In other words, the side of the outer side of the outer first terminal 43, that is, the side of the electronic component, is not cut by metal. Traces. Because of the construction stage of the wire frame, the design is 10%. The adjacent electronic component region 21 is connected through the first terminal 4. Fig. 9 is a view showing the appearance of the electronic component completed after the assembly step of the embodiment of the present invention. Fig. 9(a) is after the assembly step Figure 9(b) is a cross-sectional view of the electronic component AA after the assembly step of Figure 9(a). Figure 9(c) is the 9th (a) diagram The electronic component BB after the assembly step I5 is cut, and the sectional view is shown in Fig. 9(4). Fig. 9 and Fig. 9(c) and Fig. 9(c) are sectional views showing that the portion exposed from the inside of the electronic parts list is designed as a terminal. The minute, that is, only the lower side and the outer side of the first terminal 4 The number of terminals of the upper and lower terminals can be changed and the number of terminals of the upper and lower terminals can be changed. The lower surface of the inner second terminal 51 can also be designed as an external terminal exposed from the inside of the electronic component. In the embodiment, the bending portion 11 and the connecting portion 26 200947656 portion 12 are provided, and the bending portion 11 and the connecting portion 1 are provided (2) The bending process can easily adjust the height of the second terminal 53 which is the outer side of the external terminal. Therefore, it is possible to realize a lead frame having upper and lower external terminals without using a wiring board, and it is freely designed. Since the position and the area of the second terminal 53 - 5 on the outer side of the external terminal are provided, the design diversity can be ensured. That is, the manufacturing is simplified. Further, since the boundary of the plurality of electronic component regions 21 has no separation frame, the cutting can be greatly reduced. The load 'applied to the cutting blade 81 of each electronic component area 21 at the time of the lead frame 1 can extend the life of the cutting blade 81. Moreover, since there is no separation frame at the boundary of the plurality of electronic component areas 21, it is compared with the practice of having a separation frame. Knowing the wire 10 frame can greatly reduce the metal cut surface generated by the cutter 81, and can prevent contact failure due to metal burrs generated by the electronic component having the lead frame 1. As a result, it is possible to prevent a decrease in reliability, and to realize a lead frame which is easy to manufacture and can be reduced in cost. Further, in the first embodiment of the present invention, the first terminal 4 and the second terminal 5 φ are arranged alternately, but are not limited. The position of the first terminal 4 and the second terminal 5 is suitable for the present invention even if it is in a positional relationship such as "continuous or jump". Further, since the position and the area of the second terminal 53 on the outer side of the external terminal can be freely designed, the area of the second terminal 53 which is the outer side of the external terminal can be sufficiently designed. Thereby, the electrode connection reliability of the upper surface of the second terminal 53 on the outer side of the external terminal and the electronic component laminated on the upper portion can be improved and stabilized. (Second Embodiment) Fig. 10 is a view showing a lead frame 1〇 27 200947656 before the completion of the second embodiment of the present invention. Fig. 10(a) is a plan view of the lead frame 1〇 in a state in which the terminal is connected before completion. Fig. 10(b) is a cross-sectional view of the lead frame 1A of Fig. 10(a) of Fig. A-A'. Fig. 10(c) is a cross-sectional view of the lead frame 1A of Fig. 10(a) and Fig. B-B'. In the first embodiment of the present invention, a multi-row terminal (2〇~2 pin) is used, and 5 is an embodiment suitable for LGA (Land Grid Array) or BGA (Ball Grid Array) gauze suppression. In the second embodiment, an embodiment suitable for a SON or QFN package having a small pin (2 pin to 6 pin) is shown. In the lead frame 1 of the first embodiment, the first terminal 4 and the second terminal 5 are connected to the auxiliary bar 31. However, since the number of terminals is small in the second embodiment, the lead frame 1 is as shown in the first figure. The first terminal 60 and the second terminal 70 are directly connected to the wafer cassette 30 without forming an auxiliary bar. In addition, the shape of an external terminal such as a SON (Small Outline Non-l. eaded Package) or a QFN (Quad Flat Non-leaded Package) is generally a bullet shape, an ellipse, a square, or a rectangle. Therefore, the first terminal 60 and the surface 15 of the second terminal 70, which are exposed from the outer terminal of the self-sealing resin 1A, are arranged in a test periphery (edge tC 1 column) or a tooth-tooth arrangement. As shown in Fig. 11(a), the lead frame 1 is composed of a frame 2, a wafer pad 3, a first terminal 60, and a second terminal 70. Next to the lead frame 1 is a 〇 to hold the 〇 tape 13 of the lead frame 10. The outer frame 20 is made of metal ' and is a frame formed on the outermost circumference of the lead frame 1〇. A plurality of electronic component regions 210 are formed inside the outer frame 20. Here, four electronic component areas 21A having two adjacent rows and two rows are formed. Each of the electronic component areas _ field 210 has a wafer pad 30 formed therein, and a first terminal 60 and a second terminal 70 connected to the wafer pad 3 are formed around the wafer pad 30. Here, the electronic component region 210 adjacent to the outer frame 20 is connected to the connecting portion via the second terminal 70, for example. 5 ❹ 10 15 20 = The electronic parts area inside the outer frame 20, the fourth (4) child is formed around the cymbal pad 3 ,, and the bottom of the terminal 60 will become the external terminal at the seal. As shown in the rectangular area of Fig. 10 (8), the "the second terminal 6 is in the electronic component area 2H", and the wafer pad 3 is in the plural of the electronic component area. Moreover, each (four) is called the structure of the i-th terminal. 1 Further, the first terminal 6G is not connected to the outer frame 2G and is insulated. The second terminal lion is formed around the wafer pad 30 in the electronic component region 21 () inside each of the outer frames 20. The second terminal 7 is attached to each of the electronic component regions 2 as shown in the rectangular region of the first () (4) figure, and a plurality of rows are formed between the wafer (four) and the boundary of the electronic component region 210. Further, each of the rows is composed of two second terminals 70, and the two second terminals are formed to be connected to each other. Here, the inner side of each column, that is, the second terminal 7 on the wafer pad 30 side is referred to as the inner second terminal 71', and the outer side of each column, that is, the second terminal on the boundary side of the electronic component region 210 7〇 is the outer second terminal 73. Further, a portion connecting the inner second terminal 71 and the outer second terminal 73 is referred to as a bent portion 11A. Further, the outer frame 20 and the outer second terminal 73 are connected to each other via the connecting portion 120. Further, although it has been mentioned, the adjacent electronic component regions 2iQ are connected to each other through the outer second terminal 73 by a connecting portion. Further, the inner second terminal 71 is mainly used for internal connection, and the outer second terminal is used as an external terminal after the material. The bending portion 110 connecting the second inner terminal 71 of each row and the outer second terminal 73 and the connecting portion u of the outer second terminal b and the outer frame 2 are bent. The second curved portion 73 on the outer side of the external terminal is fixed to a position higher than the upper surface of the wafer pad 3 by the bent portion 11c and the connecting portion 12A. Fig. 11 is a view showing the lead frame 10 completed before the assembly step of the first embodiment of the present invention. Figure 11 (a) is the assembly of the electronic components before assembly. Fig. 11(b) is a cross-sectional view of the wire frame 10 of Fig. 1(4) Fig. 8-8. Figure 11(c) is a cross-sectional view of the lead frame 1〇 of Figure 11(a) and Figure B-B. The difference from Fig. 10 is that the wafer 30 is separated from the first terminal 6A and the inner second terminal 71. Fig. 12 is a view for explaining a manufacturing process of the lead frame 1 according to the second embodiment of the present invention. For the sake of easy understanding, the manufacturing steps of the second terminal 70 and the second terminal 70 on the right side are shown on the left side in Fig. 12. Figure 12(a) is a plan view and a cross-sectional view showing the lead frame (7) of the electronic part area 21 of the nth figure. First, a metal plate 10a as a lead frame 10 is prepared (Fig. 12(b)). The gold 15-plate 10a is composed of, for example, a Cu alloy 'Fe-Ni material (for example, 42alloy), A1 material·#, and a plate thickness of 5 〇μηη to 200 μηι. The material or thickness of the metal plate 1〇3 can be appropriately selected depending on the thick production or use of the electronic component. ◎ Next, prepare the lead frame 10 (Fig. 12(c)). Specifically, the wafer pad 3, the second terminal 6A, the second terminals %, 2, and the outer frame 2 are formed from the metal plate 10a by etching or the like. In this step, similarly to the description in the fourth (4), the lower surface of the portion connecting the connection portion between the wafer pad 30 and the first terminal 60 or the lower portion of the connection portion connecting the wafer pad 30 and the inner second terminal 71 is thinned. Further, the inner second terminal 71 and the outer second terminal 73 are connected to the f-curved portion 11A, or the outer second terminal 73 and the outer frame 20 are connected to each other and become the connecting portion 12〇. . Thereafter, in the next step, the thinned bent portion 11A and the joint portion 120 are bent. 5 ❹ 10 15 ❹ 20 Here, as in the first embodiment, the bent portion 110 is connected to the package, and becomes the lower portion of the second terminal 73 on the outer side of the external terminal and the upper portion of the inner second terminal 71. Further, after the connection portion 120 is connected to the package, the lower portion of the second terminal 73 on the outer side of the external terminal and the upper portion of the outer frame 20 are formed. Further, the thickness of the curved portion 110 is thinner than the thickness of the outer second terminal 73 and the inner second terminal 71, and is one-half or less of the thickness of the outer second terminal 73 and the inner second terminal 71. The thickness of the connecting portion 〇2〇 is thinner than the thickness of the outer second terminal 73 and the outer frame 20, and is one-half or less of the thickness of the outer second terminal 73 and the outer frame 20. Further, the thinning can be performed by the surname processing, and the embossing can be performed by 0. Then, the curved portion 11A thinned by the metal mold and the connecting portion 12 are bent (Fig. 12(d)). In other words, the state of the second terminal 7〇 (right figure) of the 12th (c)th drawing is processed into the state of the 12th (d)th (right figure). Since the curved portion 11〇 and the joint portion are thinned into the above, they can be easily processed. Further, the thickness of the lead frame 1〇 after the bending process can be matched with the thickness of the electronic component after the resin sealing. Here, for example, when the thickness of the original and the first metal plate 10a is 80 μm, the thickness of the lead frame 1G after the bending can be easily adjusted to the extent of the U by the thickness of the cleavage. In other words, the position of the external terminal can be freely set between the thickness of the electronic component after the sealing of the crucible. 31 200947656 Next, the wire frame ίο is attached to the tape 130 (12th (phantom). ', body s, under the wire frame 10, that is, under the outer frame 2, under the wafer pad 30 The lower end of the second terminal 6〇 is held and fixed on the tape 13〇. 5 Next, the wafer pad 30 and the !! terminal 60, and the wafer pad 30 and the second terminal 70 are thinned by the puncher 18. Connecting portion (Fig. 12(1)) Here, the cross-sectional shape of the thinned connecting portion cut by the four ends of the punching machine 18 is a "street" or "bacterial umbrella" as shown in Fig. 12(f) In addition, when the metal mold is cut by a metal mold such as the puncher 18, the cross section is formed as described above. However, when the laser is cut by a laser or the like, the fuse is left at the cut position. Trace (scum). Then, the lead frame 1 is formed in the electronic component region 210 (Fig. 12(g)). Fig. 13 is a view showing the electronic component completed after the assembly step of the second embodiment of the present invention. (a) A plan view of the case where the sealing resin 100 of the electronic component completed after the assembly step is transparent. The figure 13(b) is assembled in the 13th (a) figure. AA, cross-section of the electronic component completed after the completion. Figure 13 (c) is a cross-sectional view of the electronic component completed after the assembly step of Figure 13 (a). Unlike the 12th figure, the component 90 It is mounted on the wafer pad 3, and is internally connected to the terminal of the lead frame 1 by the metal thin wire 80, and covers the entire 20 with a sealing resin 1〇〇. Here, the internal connection means electrically connecting the element with the thin metal wire 80. The electrode portion of 90, the upper surface of the first brick 60, and the upper surface of the inner second terminal 71. Here, the feature is in Fig. 13(b). In other words, the side of the outer side of the first terminal 6 is the side of the electronic component. There is no trace of metal cutting on the side. This is because the electronic component region 210 that is adjacent to the first terminal 60 is not designed because of the configuration of the lead frame 10. In the second embodiment, Although the element 9 is a structure smaller than the wafer, it may be a structure larger than the wafer 30, and is also suitable for the electrode of the main surface of the element 9 to be directly connected to the terminal through a bump (not shown).叱 。 ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' Figure 14 (8) is an outline drawing seen above the electronic component completed after the assembly step. β Figure 14(b) is the 14th (Α-Α' of the electronic component completed after the phase loading step Section 14(c) is a B-B' cross-section of an electronic 1〇 part completed after the assembly step of Figure 14(a). Figure 14(4) shows the shape seen under the electronic part completed after the assembly step. Fig. 14(a) and 14(d) are externally shaped, and the cross-sectional views of Fig. 4(b) and Fig. 4(c) show that the part exposed in the surface of the electronic part is Designed to be part of the external terminal, that is, only the lower side of the second terminal 6〇, and the upper surface of the outer 15th terminal 73. φ In addition, the number of terminals or the structure of the upper and lower terminals can be changed in accordance with the application. Further, the lower surface of the inner second terminal 71 may be designed as an external terminal exposed from the inside of the electronic component. Further, in the fourteenth (d), the arrangement of the second terminal 6A and the outer terminal 20 of the external terminal is arranged in a zigzag manner, but may be arranged in parallel or in a line. Further, the shape of the external terminal, that is, the shape of the upper surface of the first terminal 6〇 and the upper surface of the outer second terminal 73 may be appropriately selected from a bullet shape, an ellipse shape, a quadrangular angle, a rectangular shape, a circular shape, or the like. As described above, in the second embodiment of the present invention, the bending portion u and the connecting portion 33 200947656 portion 12 are provided, and the bending portion 11 and the connecting portion 12 are bent, whereby the height of the second terminal 73 outside the external terminal can be adjusted. . Therefore, it is possible to realize the lead frame 10 having the upper and lower outer 15# feeds and the electronic parts including the lead frame 10 without using the wiring board. Further, since the position and the area of the second terminal 73 outside the external terminal can be freely determined, the diversity of the design can be ensured. In other words, it has become easy to manufacture the lead frame 10 having the upper and lower external terminals and the electronic component having the lead frame 10. Further, since the boundary of the plurality of electronic component regions 210 has no separation frame, the load applied to the cutting 10 knives 81 of the respective electronic component regions 21 when the lead frame 10 is cut can be greatly reduced, and the life of the dicing blade 81 can be extended. Moreover, since there is no separation frame at the boundary of the plurality of electronic component regions 210, the metal cut surface generated by the cutter 81 can be greatly reduced compared to the conventional lead frame having the separation frame, and the lead frame can be prevented. Poor contact caused by metal burrs from 10 electronic parts. Thereby, it is possible to prevent the reliability from being lowered, and to realize a lead frame which is easy to manufacture, can reduce the cost of I5, an electronic component having the lead frame, and a method of manufacturing the same. Further, since the lead frame of the present invention and the electronic component having the lead frame can be freely selected as the position of the second terminal on the outer side of the upper and lower external terminals, it can be designed to alleviate the lead frame applied to the present invention and have the lead Box 2 各种 various stresses of electronic parts. also

因本發明之導線框及具有該導線框之電子零件可 自由選擇作為上下外部端子之外側第㈣子⑽面積故可 明之導線框及具有該導線框之電子零件所積載的 電子零件的連接強度,並可防止可靠性下降。 34 200947656 ,可撓曲導線框以自由地設計組裝後電子零件上下 端子之位置’藉此可緩和各種應力,並可確保連接可 靠性 ❹ 10 15 ❹ 20 又’本發明之具有導線框的電子零件之製造方法,因 於習知集體成形用導線框中所需之電子零件區域間 、刀框,故可改善品質與低成本化。 、又本發明之導線框及具有該導線框之電子零件,係 ^下形成外部端子時不需使用配線基板,而使用導線框 ^ 不需於電子零件之組裝步驟後對上部的外 Ρ端子面進行研肖彳步驟或研磨步驟。 又’以1片導線框可實現具有上下外部端子之導線框 可降低不需之材料費,並可低成本化。 又,因以1片導線框可輕易地製作具有上下端子之電子 零件或半導體裝置,故於電子料裝載零件之 容易的 ^ π °又’亦具有安裝基板上之設計多樣性,亦可於低 成本下進行安裝。 又’具有本發明導線框之電子零件的應用例,可廣泛 應用於例如:2銷、3銷之電池、二極體、機能零件或被動 零件、4銷至200銷之MEMS、或半導體裝置。 又’於具有本發明導線框之電子零件的封裝件形狀方 藉由改變端子形狀或位置,可廣泛使用於TO或MINI 等離散封裝、S0N、QFN、LGA、BGA等。又,使用本發 明之製造方法,亦可將外部端子外部端子3列化或4列化。 又,藉於具有本發明之導線框的電子零件直上部設置 35 200947656 複數被動或主動晶片,相較於以往,於電子零件周圍配置 被動或主動晶片之情形,可改善電子零件之電特性。又, 例如,安裝母板等電子零件之安裝基板的安裝面積亦可縮 小化。又,藉由上下區分被動及主動晶片之電連接,可改 5 善電子零件内複雜之配線等,亦具有穩定機器等製造產率 的效果。 以上,依據實施型態說明本發明之導線框、具有該導 線框之電子零件及其製造方法,但本發明並未受該實施形 態限定。只要不脫離本發明旨趣,發明所屬技術領域中具 10 通常知識者將所想之各種變形施行於本實施形態者、或於 不同實施形態中組合構造要素所構築之形態,亦包含於本 發明範圍内。 產業上利用之可能性 本發明可利用於導線框、具有該導線框之電子零件及 15 其製造方法,特別可利用於,行動電話、個人數位助理、 DVD機器、數位TV等數位家電製品。 E:圖式簡單說明3 第1圖係使用習知積層有元件之多層配線基板的封裝 件之截面圖。 20 第2(a)〜(b)圖係顯示習知集體密封成形用QFN所使用 之一般導線框的圖。 第3 (a)〜(c)圖係顯示本發明第1實施形態完成前之導線 框。 第4(a)〜(c)圖係概念地顯示本發明第1實施形態之彎曲 36 200947656 部11的彎曲加工程序之圖。 第5(a)〜(c)圖係顯示本發明第1實施形態組裝步驟完成 前之導線框1的圖。 第6(a)〜(d)圖係用以說明本發明第1實施形態使用導線 5 框組裝電子零件之組裝步驟的圖。 第7(e)〜(g)圖係用以說明本發明第1實施形態使用導線 框組裝電子零件之組裝步驟的圖。 第8(a)〜(c)圖係顯示本發明第1實施形態組裝步驟後完 成之電子零件的圖。 10 第9(a)〜(d)圖係顯示本發明第1實施形態組裝步驟後完 成之電子零件外形的圖。 第10(a)〜(c)圖係顯示本發明第2實施形態完成前之導 線框的圖。 第11(a)〜(c)圖係顯示本發明第2實施形態組裝步驟前 15 完成之導線框的圖。 第12(a)〜(g)圖係用以說明本發明第2實施形態導線框 之製造步驟的圖。 第13(a)〜(c)圖係顯示本發明第2實施形態組裝步驟後 完成之電子零件的圖。 20 第14(a)〜(d)圖係顯示本發明第2實施形態組裝步驟後 完成之電子零件外形的圖。 【主要元件符號說明】 1,10,900. ·.導線框 3,30,903...晶片墊 2,20…外框 4,60…第1端子 37 200947656 5,70...第2端子 43...外側第1端子 6,80,806,906…金屬細線 51,71...内側第2端子 7,100,807,907…密封樹脂 53,73…外側第2端子 8,908…分離線 81...切割刀 9,90,809,嫩"元件 800...封裝件 10a...金屬板 813…配線基板 11,110...彎曲部 816...外部端子 12,120".連結部 817...内部配線層 13,130...膠帶 819...通孔 18".打孔機 914…分雑 21210...電子零件區域 915...懸吊導線 31…輔助棒 916...端子 41...内侧第1端子 930...懸吊晶片墊 〇 38The lead frame of the present invention and the electronic component having the lead frame can be freely selected as the (4) sub- (10) area on the outer side of the upper and lower external terminals, so that the connection strength of the lead frame and the electronic component stowed by the electronic component having the lead frame can be selected. And can prevent the reliability from falling. 34 200947656 , Flexible wire frame to freely design the position of the upper and lower terminals of the assembled electronic parts 'This can alleviate various stresses and ensure the reliability of the connection ❹ 10 15 ❹ 20 and the electronic component with lead frame of the present invention The manufacturing method is improved in quality and cost by the conventional electronic component regions and the knives required for the collective forming lead frame. Moreover, the lead frame of the present invention and the electronic component having the lead frame do not need to use the wiring substrate when forming the external terminal, but use the lead frame ^ without the outer peripheral terminal surface of the upper part after the assembly step of the electronic component Carry out the grinding step or the grinding step. Further, the lead frame having the upper and lower external terminals can be realized by one lead frame, which can reduce the unnecessary material cost and can be reduced in cost. Moreover, since the electronic component or the semiconductor device having the upper and lower terminals can be easily fabricated by using one lead frame, the ease of mounting the components in the electronic material also has a design diversity on the mounting substrate, and can also be low. Install at cost. Further, an application example of the electronic component having the lead frame of the present invention can be widely applied to, for example, a 2-pin, 3-pin battery, a diode, a functional component or a passive component, a 4-pin to a 200-pin MEMS, or a semiconductor device. Further, the shape of the package having the electronic component of the lead frame of the present invention can be widely used in discrete packages such as TO or MINI, SON, QFN, LGA, BGA, etc. by changing the shape or position of the terminal. Further, according to the manufacturing method of the present invention, the external terminal external terminals 3 may be arranged in series or in four rows. Further, by means of the electronic component having the lead frame of the present invention, a plurality of passive or active wafers can be provided, and the electrical characteristics of the electronic component can be improved as compared with the case where a passive or active wafer is disposed around the electronic component. Further, for example, the mounting area of the mounting substrate on which electronic components such as the mother board are mounted can be reduced. Moreover, by electrically distinguishing the passive and active wafers from the top and bottom, it is possible to change the complicated wiring in the electronic parts, and also to stabilize the manufacturing yield of the machine. The lead frame of the present invention, the electronic component having the wire frame, and the method of manufacturing the same have been described above based on the embodiment, but the present invention is not limited by the embodiment. The present invention is not limited to the scope of the present invention, and various modifications described in the technical field of the present invention may be applied to the present embodiment or the configuration of the combined structural elements in different embodiments. Inside. INDUSTRIAL APPLICABILITY The present invention is applicable to a lead frame, an electronic component having the lead frame, and a method of manufacturing the same, and is particularly useful for digital home appliances such as mobile phones, personal digital assistants, DVD devices, and digital TVs. E: Brief description of the drawing 3 Fig. 1 is a cross-sectional view showing a package using a multilayer wiring board having a conventional laminated component. 20 Figures 2(a) to 2(b) are diagrams showing a general lead frame used in a conventional QFN for collective seal forming. The third (a) to (c) drawings show the lead frame before the completion of the first embodiment of the present invention. The fourth (a) to (c) drawings conceptually show a bending process of the bending portion 36 of the first embodiment of the present invention. Figs. 5(a) to 5(c) are views showing the lead frame 1 before the assembly step of the first embodiment of the present invention is completed. 6(a) to 6(d) are views for explaining an assembly procedure of assembling an electronic component using a wire 5 frame in the first embodiment of the present invention. The seventh (e) to (g) drawings are views for explaining the assembly procedure of assembling the electronic component using the lead frame in the first embodiment of the present invention. Figs. 8(a) to 8(c) are views showing electronic components which are completed after the assembly step of the first embodiment of the present invention. 10(a) to 9(d) are views showing the outline of an electronic component which is completed after the assembly step of the first embodiment of the present invention. Fig. 10 (a) to (c) are views showing a wire frame before completion of the second embodiment of the present invention. Fig. 11 (a) to (c) are views showing a lead frame completed before the assembly step of the second embodiment of the present invention. Fig. 12 (a) to (g) are views for explaining the steps of manufacturing the lead frame of the second embodiment of the present invention. Fig. 13 (a) to (c) are views showing electronic components which are completed after the assembly step of the second embodiment of the present invention. Fig. 14 (a) to (d) are views showing the outline of an electronic component which is completed after the assembly step of the second embodiment of the present invention. [Description of main component symbols] 1,10,900. · Lead frame 3, 30, 903... Wafer pad 2, 20... Frame 4, 60... 1st terminal 37 200947656 5, 70... 2nd terminal 43... Outer first terminal 6, 80, 806, 906... metal thin wires 51, 71... inner second terminal 7, 100, 807, 907... sealing resin 53, 73... outer second terminal 8, 908... separation line 81... cutting blade 9, 90, 809, tender &quot Component 800: Package 10a... Metal plate 813: Wiring substrate 11, 110... Bending portion 816... External terminal 12, 120 " Connecting portion 817... Internal wiring layer 13, 130... Tape 819...through hole 18" puncher 914...minutes 21210...electronic part area 915...suspended wire 31...auxiliary rod 916...terminal 41...inside first terminal 930. .. hanging wafer pad 38

Claims (1)

200947656 十、申請專利範圍·· 導線框’係使帛於元件之封I件之内部配線,用以 連接前述元件與外部配線者,該導_包含有: 外框;及 5 電子零件區域,係於前料㈣鄰接者, 且各電子零件區域包含有: 晶片墊,係裝載前述元件者; ® 第1連接端子部,係配置於前述晶片墊周圍,與前 述曰B片塾電絕緣,且下面成為外部端子者; 10 第2連接端子部,係配置於前述晶片塾周圍,虚前 述晶片塾電絕緣,且上面成為外部端子者;及 彎曲部’係於前述第1端子部與前述第2連接端子部 間連接則述第1連接端子部與前述第2連接端子部 者, 15 又’前述料部係在相對前述晶片墊之©,於垂直 〇 方向上經彎曲加工,且鄰接之複數前述電子零件區域透 過第1或第2連接料部連接,並且前料線框中並未形 成包圍前述電子零件區域且連結固定之分離框。 2·如申請專利範圍第1項之導線框,其中前述第2連接端子 20 部之上面位於較前述第1連接端子部及前述晶片 塾上面 南的位置。 3.如申請專利範圍第1項之導線框,其中前述彎曲部之厚 二較則述帛2料端子部冑且前述料料成為連接 前述第2連接端子部之下部。 39 200947656 4. 如申請專利範圍第3項之導線框,其中前述彎曲部之厚 度為前述第2連接端子部之一半以下。 5. 如申請專利範圍第3項之導線框,其中前述彎曲部之厚 度較前述第1連接端子部薄,且前述彎曲部形成為連接 5 前述第1連接端子部之上部。 6. 如申請專利範圍第5項之導線框,其令前述彎曲部之厚 度為前述第1連接端子部之一半以下。 7. 如申請專利範圍第1項之導線框,其中前述第1連接端子 部之下面與前述外框之下面接著於膠帶並固定。 10 8. —種電子零件,包含有: 申請專利範圍第1〜7項中任1項之導線框;及 裝載於前述導線框之前述晶片墊,且具有電極之元 件, 又,前述電極以金屬配線與前述第1連接端子部之 15 上面電連接,前述導線框與前述元件被樹脂覆蓋而密 封,且前述第1連接端子部之下面自前述樹脂露出。 9. 如申請專利範圍第8項之電子零件,其中前述第2連接端 子部之上面自前述樹脂露出。 10. 如申請專利範圍第9項之電子零件,其中透過第2連接端 20 子部連接鄰接之複數前述電子零件區域的連接部係被 切斷,且被切斷之前述連接部的截面自前述樹脂露出。 11. 如申請專利範圍第10項之電子零件,其中前述彎曲部係 經彎曲加工成使自前述樹脂露出且被切斷之前述連接 部的截面高度為前述電子零件之一半高度。 200947656 12. —種導線框之製造方法,係形成使用於元件之封裝件之 内部配線,用以連接前述元件與外部配線之導線框的導 線框之製造方法,包含有: 形成步驟,係藉由切割金屬板,形成外框、裝載前 5 述元件之晶片墊、及於前述晶片墊之周圍與前述晶片墊 一體連接成為外部端子的第1及第2連接端子部; 薄化步驟,係使連結前述第1連接端子部及前述晶 片墊之連結部、及在前述第1連接端子與前述第2連接端 子部之間一體連接於前述第1連接端子與前述第2連接 10 端子部之彎曲部的厚度變薄; 彎曲加工步驟,係將前述薄化步驟中厚度變薄之前 述彎曲部相對於前述晶片墊之面,於垂直方向上彎曲加 工; 固定步驟,係以膠帶固定前述外框與前述第1連接 15 端子部之下端部;及 切斷步驟,係於前述固定步驟後,切斷在前述薄化 步驟中厚度變薄之前述連結部,使前述第1連接端子部 與前述晶片墊電絕緣。 13. 如申請專利範圍第12項之配線框之製造方法,其中前述 20 薄化步驟中,前述彎曲部係經薄化且連接於前述第2連 接端子部之下部。 14. 如申請專利範圍第13項之導線框之製造方法,其中前述 薄化步驟中,前述彎曲部係經薄化且連接於前述第1連 接端子部之上部區域。 41 200947656 15.如申請專利範圍第12項之配線框之製造方法,其中前述 彎曲加工步驟中,藉由將經薄化之前述彎曲部彎曲加 工,使前述第2連接端子部之上面位於較前述第1連接端 子部及前述晶片墊上面高之位置。 5 16.如申請專利範圍第12項之配線框之製造方法,其中前述 固定步驟中,前述第2連接端子部係在與前述膠帶分離 並懸浮於空中之狀態下固定。 17.如申請專利範圍第12項之配線框之製造方法,其中前述 導線框有複數個, 10 且前述形成步驟中,前述導線框更形成具有複數個 鄰接之以前述晶片墊、前述第1連接端子部及前述第2 連接端子部作為1個電子零件區域的外框, 在前述外框内,形成複數個鄰接之包含前述晶片 墊、前述第1連接端子部及前述第2連接端子部之區域的 15 電子零件區域, 且鄰接之複數前述電子零件區域透過第1或第2連 接端子部連接,而前述導線框中並未形成包圍前述電子 零件區域且連結固定之分離框。200947656 X. Patent application scope · The lead frame is used to connect the internal wiring of the component I to connect the components and external wiring. The guide contains: the outer frame; and 5 the electronic component area. In the front material (four) adjacent, and each electronic component area includes: a wafer pad, which is loaded with the above components; ® a first connection terminal portion disposed around the wafer pad, electrically insulated from the 曰B piece, and below The second connection terminal portion is disposed around the wafer cassette, the dummy wafer is electrically insulated, and the upper surface is an external terminal; and the curved portion is connected to the first terminal portion and the second connection When the connection between the terminal portions is the first connection terminal portion and the second connection terminal portion, the material portion of the first connection terminal portion and the second connection terminal portion are bent in the vertical direction with respect to the wafer pad, and the plurality of electrons are adjacent to each other. The part area is connected through the first or second connecting material portion, and the separation frame that surrounds the electronic component area and is fixedly connected is not formed in the front feed line frame. 2. The lead frame of claim 1, wherein the upper surface of the second connecting terminal 20 is located above the first connecting terminal portion and the upper side of the wafer top. 3. The lead frame of claim 1, wherein the thickness of the bent portion is greater than that of the second terminal portion, and the material is connected to the lower portion of the second connecting terminal portion. 39. The wire frame of claim 3, wherein the thickness of the bent portion is one half or less of the second connection terminal portion. 5. The lead frame of claim 3, wherein the thickness of the bent portion is thinner than the first connection terminal portion, and the bent portion is formed to connect the upper portion of the first connection terminal portion. 6. The lead frame of claim 5, wherein the thickness of the bent portion is one half or less of the first connection terminal portion. 7. The lead frame of claim 1, wherein the lower surface of the first connection terminal portion and the lower surface of the outer frame are attached to the tape and fixed. 10: An electronic component comprising: a lead frame of any one of claims 1 to 7; and a component of the wafer pad mounted on the lead frame and having an electrode, wherein the electrode is made of metal The wiring is electrically connected to the upper surface of the first connection terminal portion 15, the lead frame and the element are covered with a resin and sealed, and the lower surface of the first connection terminal portion is exposed from the resin. 9. The electronic component of claim 8, wherein the upper surface of the second connecting terminal portion is exposed from the resin. 10. The electronic component of claim 9, wherein the connecting portion of the plurality of electronic component regions adjacent to each other through the second connecting end 20 is cut, and the cross section of the connected connecting portion is from the foregoing The resin is exposed. 11. The electronic component of claim 10, wherein the curved portion is bent so that a height of a cross section of the connecting portion exposed from the resin and cut is one half height of the electronic component. 200947656 12. A method for manufacturing a lead frame, which is a method for manufacturing a lead frame for connecting a lead frame of the component and the external wiring, which comprises: forming a step by Cutting a metal plate to form an outer frame, a wafer pad on which the components described above are mounted, and first and second connection terminal portions integrally connected to the wafer pad as external terminals around the wafer pad; The connection portion between the first connection terminal portion and the wafer pad, and the first connection terminal and the second connection terminal portion are integrally connected between the first connection terminal and the bent portion of the second connection terminal portion The bending process is performed by bending the curved portion having a reduced thickness in the thinning step in a vertical direction with respect to the surface of the wafer pad; and fixing the outer frame and the foregoing by tape 1 connecting the lower end portion of the terminal portion; and the cutting step, after the fixing step, cutting off the aforementioned thickness thinning in the thinning step Junction portion, so that the first portion and the connection terminal pad electrically insulated wafer. 13. The method of manufacturing a wiring frame according to claim 12, wherein in the thinning step, the bent portion is thinned and connected to a lower portion of the second connection terminal portion. 14. The method of manufacturing a lead frame according to claim 13, wherein in the thinning step, the bent portion is thinned and connected to an upper portion of the first connection terminal portion. The method of manufacturing a wiring frame according to claim 12, wherein in the bending processing step, the thinned portion of the bent portion is bent, so that the upper surface of the second connecting terminal portion is located earlier The first connection terminal portion and the upper surface of the wafer pad are elevated. The method of manufacturing a wiring frame according to claim 12, wherein in the fixing step, the second connection terminal portion is fixed in a state of being separated from the tape and suspended in the air. 17. The method of manufacturing a wiring frame according to claim 12, wherein the plurality of lead frames are plural, and in the forming step, the lead frame is further formed with a plurality of adjacent wafer pads and the first connection. The terminal portion and the second connection terminal portion are outer frames of one electronic component region, and a plurality of adjacent regions including the wafer pad, the first connection terminal portion, and the second connection terminal portion are formed in the outer frame. In the 15 electronic component region, the plurality of adjacent electronic component regions are connected through the first or second connection terminal portion, and the lead frame does not have a separation frame that surrounds and overlaps the electronic component region.
TW097131717A 2007-10-04 2008-08-20 Lead frame, electronic component with the same, and manufacturing method thereof TW200947656A (en)

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