200938985 九、發明說明： 【發明所屬之技術領域】 本發明係-種電壓調變電路，尤指一種具輕載效率提 升功能的電壓調變電路’具有於負載輕載狀態下將電源轉 換效率提高的功能。 【先前技術】 Ο200938985 IX. Invention: The invention relates to a voltage modulation circuit, in particular to a voltage modulation circuit with a light load efficiency improvement function, which has a power conversion under a light load condition The ability to improve efficiency. [Prior Art] Ο
一般如中央處理器使用的電壓調變電路，必須提供穩 定工作電壓予中央處理器’因此對於電壓調變電路來說: 中央處理器即為其負載，而中央處理器視使用者操作情況 而處於運算繁忙或閒置的狀態，&此-負載會在不同時間 、見重載或輕载用電狀態；是以，對於電壓調變電路來 說，：須依據目前負載的狀態，而提供穩定的工作電麼。 .般來說既有單電壓輸出的電μ調變電路係應用於低 壓負載之電源電路’可概區分成二種類型，其中一種為非 式電源電路’另一種為隔離式電源電路。纟中非隔離 式電源電路係有如降壓型電源電路或升降壓型電源電路， 至於離式電源電路則如返馳式電源轉換電路。 月/閱第五圖所示，為—以降壓型電源轉換電路實現 的，變電路，纟包含有-脈寬調變控制器(50)、一開 I ’動盗（60)、複數主動開關電感⑹及電容（〇 ; 其中脈寬調變控制器取得電壓輸出端之電壓回授訊號，以 =斷負載端（Load)電壓（乂㈣高低變化，藉由該開關驅動 。（6〇)交替控制主動開關(Q1)(Q2)的導通週期，·又請參閱 200938985 ❹ ❹ 第圖所7F係、為上述開關驅動器（6〇)的電路方塊圖，其 包含有-邏輯電路單元（61)、二功率放大器（62)(63)及一相 位調整電路（64);其中該邏輯電路單元（61)的輸人端係為一 脈寬調變信號端(PWM)，以連接至脈寬調變控制器⑽的 輸出端，又該邏輯電路單元（61)包含有二輸出端，分別透 過邏輯元件及相位調整電路（64)連接至二功率放大器 (62)(63) ’以依據脈寬調變控制器(5〇)輸出脈寬調變信號， 調整功率放大器(62)(63)輸出驅動訊號之脈寬寬度，決定各 主動開關導通週期。又’該二功率放大器（62)(63)的高電位 上限端（UVCX^LVCC)係分別連接二外部㈣，—般電路 設計會將此二高電位上限端（uvcc)(LVcc)連接至外部直 流電源的最高電位端（VCC)。 上述既有降壓型電壓調變電路雖可依據負載輕載及重 載用電電壓升降狀態’提供負載穩定的工作電壓，具有穩 壓之功能；但不論在重載或輕載的供電卻因為主動開關特 性，使得整體電源轉換效能不佳，而易生廢熱而提高中央 處理器附近溫度’造成中央處理器運算穩定性增加變數。、 因為主動開關所造成轉換效能不佳的原因，主要可分 為切換損失（Switching Loss)、導通損失（c〇nducti〇n 及驅動損失（Driver Loss)，其中切換損失為主動開關 啟閉切換瞬間，由於其端電壓非零電壓或1诚 士 、 \ 嘴电流非零電 流的狀態下進行啟閉而產生的。導通損失為主動開關導通 時，由於主動開關内部係存在有一導通電阻，故導通損失 即在電流流經主動開關之導通電阻時所產 貝 土 主於驅動損 200938985 失，即是主動開關被驅動開啟及關閉的瞬間所產生的；是 以，主動開關整體功率損失可由下式表示之·Generally, a voltage modulation circuit used by a central processing unit must provide a stable operating voltage to the central processing unit. Therefore, for a voltage modulation circuit: the central processing unit is the load, and the central processing unit regards the user's operation. In the state of busy or idle operation, & this load will see the heavy load or light load power state at different times; therefore, for the voltage modulation circuit, it must be based on the current load state, and Provide a stable working power. Generally, an electric μ modulation circuit having a single voltage output is applied to a power supply circuit of a low voltage load, and can be divided into two types, one of which is a non-power supply circuit and the other of which is an isolated power supply circuit. The non-isolated power supply circuit in the middle is like a step-down power supply circuit or a buck-boost power supply circuit, and the off-type power supply circuit is like a flyback power conversion circuit. Month / read the fifth figure, as the - step-down power conversion circuit to achieve, the variable circuit, including - pulse width modulation controller (50), an open I 'robbery (60), complex initiative The switching inductor (6) and the capacitor (〇; wherein the pulse width modulation controller obtains the voltage feedback signal of the voltage output terminal, and the voltage of the load terminal (Load) is changed by 开关(4), and is driven by the switch. (6〇) Alternately control the on-period of the active switch (Q1) (Q2), see also the circuit block diagram of the above-mentioned switch driver (6〇), which includes the - logic circuit unit (61) And a power amplifier (62) (63) and a phase adjustment circuit (64); wherein the input end of the logic circuit unit (61) is a pulse width modulation signal terminal (PWM) for connecting to the pulse width modulation The output of the variable controller (10), the logic circuit unit (61) further comprising two output terminals respectively connected to the two power amplifiers (62) (63) through the logic element and the phase adjustment circuit (64) to adjust according to the pulse width Variable controller (5〇) output pulse width modulation signal, adjust power amplifier (62) (63) output drive The pulse width of the signal determines the on-period of each active switch. The upper limit of the high potential (UVCX^LVCC) of the two power amplifiers (62) (63) is respectively connected to the external (four), and the circuit design will The high-potential upper limit terminal (uvcc) (LVcc) is connected to the highest potential terminal (VCC) of the external DC power supply. The above-mentioned existing step-down voltage modulation circuit can be provided according to the load light load and heavy load power voltage rise and fall state. The load is stable and the operating voltage has the function of voltage regulation. However, the power supply under heavy load or light load is not good because of the active switching characteristics, which makes the overall power conversion performance poor, and it is easy to generate waste heat and increase the temperature near the central processor. The stability of the processor is increased. Because of the poor conversion performance caused by the active switch, it can be divided into switching loss (Switching Loss), conduction loss (c〇nducti〇n and driver loss (Driver Loss), where switching The loss is the moment when the active switch is switched on and off, and is turned on and off due to the non-zero voltage of the terminal voltage or the non-zero current of the 1st and the nozzle current. When the active switch is turned on, since there is an on-resistance inside the active switch, the conduction loss is that when the current flows through the on-resistance of the active switch, the shell soil is lost to the drive loss 200938985, that is, the active switch is driven to open and The moment of closing is generated; that is, the overall power loss of the active switch can be expressed by the following formula.
Floss = Psw + Pcon + Pdriver 以下再進步3兒明當負载於中、重載與輕載情況下的 各種轉換損失佔整體功率損失的比例： 當負載於中、重載時，流經主動開關之電流提高，故 導通損失佔整體損失比較其它兩者高；是以，欲於中、重Floss = Psw + Pcon + Pdriver The following three improvements are made: the ratio of various conversion losses in the case of medium, heavy and light load to the total power loss: when the load is medium and heavy, it flows through the active switch. The current is increased, so the conduction loss accounts for the overall loss compared to the other two;
載情況下降低整體損失’則可調整主動開關導通電阻，使 之降低以達到降低損失之目的，其中該導通損失公式以 MOSFET主動開關為例說明之：Under the condition of reducing the overall loss, the active switch on-resistance can be adjusted to reduce the loss to reduce the loss. The conduction loss formula is exemplified by the MOSFET active switch:
'dsrds(〇N) 其中上述的4為導通損失功率，^為主動開關的導通 電流，而〜⑽)則為導通電阻。 請配合參閱第七圖所示，係為—型號為irf663i的 MOSFET主動„的導通特性曲線圖，其中主動開關的驅 動電壓L與導通電阻係呈反比關係；是以，欲降低導 通電阻’可在中、重載狀態下，《高驅動電壓，以降低導 通損失。 當負載於輕載時，由於流經主動開關之電流降低，故 驅動損失及切換損失佔整體損失比導通損失為冑，而驅動 損失及if換損失可由下式表示之： PG=J；-tv〇s-Ig.dt = fsyGs.^Igjt'dsrds(〇N) where 4 is the conduction loss power, ^ is the conduction current of the active switch, and ~(10)) is the on-resistance. Please refer to the seventh figure, which is the conduction characteristic curve of the MOSFET of the model irf663i. The driving voltage L of the active switch is inversely proportional to the on-resistance. Therefore, the on-resistance can be reduced. In medium and heavy load conditions, "high drive voltage to reduce conduction loss. When the load is light, the current flowing through the active switch is reduced, so the drive loss and switching loss account for the overall loss than the conduction loss, while driving The loss and if exchange loss can be expressed by the following formula: PG=J;-tv〇s-Ig.dt = fsyGs.^Igjt
Pg ~ fs-VasQg M 上式令的々為驅動損失功率’厶為主動開關切換頻率， 6 200938985 ^為主動開關的驅動電壓，A)為主動開關導通所需之電 荷量；是以，若輕载時，可調降驅動電壓，而減少驅動損 失。 Ο 由上述說明反觀目前既有電壓調變電路，如第五、六 圖揭示的開關驅動器的方塊圖可知，不論在輕載或中重載 下，二功率放大器的最高電位端（uvcc) (Lvcc)均連接 固疋外直"IL電壓（vcc)，因此兩功率放大器⑻)(63)輸 出驅動訊號振幅均相同，僅脈寬寬度會予依據輪出回授電 壓加以调變，故二主動開關的驅動電壓均會相同。是以， 目前電壓調變電路並無依據負載的中重載或輕載，而改變 二動開關的驅動電壓大小，對照上述損失主動開關損失 △式可知，該等損失即益法遽卢於¥ Ρ…'法獲侍改善，而僅有穩壓的功能。 【發明内容】 ❹ 皁2鑑於上述缺點本發明主要目的係提供一種具輕載效 ，升功能的電壓調變電路，能依據負載目前為中、重載 4载狀況，調整主動開關之脈寬驅動信號的振幅大小。 雷牧'達上述目的所使用的主要技術手段係令該電I調變 :路包含有-降屢型電源轉換電路及一限位電屢調變電 二中該降壓型電源穩壓電路係包含-脈寬調變控制 :二：開關驅動器、至少一主動開關、一電感性儲能元件 電容’該電容係構成該降❹電源穩歷電路的輸出 :=負載連接；而該限位電盤調變電路則是連接至該 降屋型電源㈣電路的輸出端，以取得輸出電流大小，再 7 200938985 依據電流大小判斷負栽處 . 科延a知戰次中重载，並調整該開關 動益中用以推動主動開關之輪出電壓大小；㈣降壓型 電源穩壓電路輪+雪、、* 击零時，表示目前負載處於 一故該限位電壓調變電路會調降主動開關的驅動 :壓’達到減少驅動損失功能；反之，若降壓型電源穩壓 路輸出電流提高’表示負載處於中重㈣，則該限位電 壓調變電路會調升主動開關的驅動電壓，以減少導通損 失。 ❹ 【實施方式】 «月參閱第一圖所示，係為本發明電壓調變電路第一較 佳實施例，其包含有一降壓型電源轉換電路及一限位電壓 調變電路（3G)，其中該降壓型電源轉換電路包含有： 一脈寬調變控制器（10)，係至少包含有一回授電壓輸 入鈿（Vfeb)及一脈寬調變輸出端（pwM); 一開關驅動器（20)，其包含有一邏輯電路單元及二功 率放大益，該邏輯電路單元包含有一脈寬調變信號端（pWM) 及一輸出端，其中該脈寬調變信號端（PWM)係連接至該脈 寬調變控制器（10)的輸出端（PWM)，而二輸出端則分別連 接至對應功率放大器的輸入端；又，二功率放大器的輪出 端則為開關驅動器（20)的二輸出端； 二主動開關（Q1)(Q2)，係串聯連接，且各主動開關 (Q1)(Q2)的驅動端係對應連接該開關驅動器（2〇)的輪出 端； 200938985 一電感（L)，其一端係連接至二 節點’另一端則透過一電容槿忐 二主動開關（Q1)(Q2)串聯Pg ~ fs-VasQg M The above formula is the driving loss power '厶 is the active switching frequency, 6 200938985 ^ is the driving voltage of the active switch, A) is the amount of charge required for the active switch to conduct; At the time of loading, the driving voltage can be lowered and the driving loss can be reduced. Ο From the above description, in view of the current voltage modulation circuit, as shown in the block diagrams of the switch driver disclosed in the fifth and sixth figures, the highest potential terminal (uvcc) of the two power amplifiers is used under light load or medium heavy load ( Lvcc) is connected to the solid-state direct "IL voltage (vcc), so the amplitudes of the output drive signals of the two power amplifiers (8)) (63) are the same, and only the pulse width is modulated according to the round-trip feedback voltage. The drive voltage of the active switch will be the same. Therefore, at present, the voltage modulation circuit does not change the driving voltage of the two-way switch according to the medium-heavy load or light load of the load, and the loss of the active switch loss Δ can be known as the loss. ¥ Ρ...'The method is improved, but only the voltage regulation function. SUMMARY OF THE INVENTION In view of the above disadvantages, the main object of the present invention is to provide a voltage modulation circuit with a light load effect and a rising function, which can adjust the pulse width of the active switch according to the current load condition of the medium and heavy load. The amplitude of the drive signal. The main technical means used by Lei Mu 'to achieve the above purpose is to make the electric I modulation: the road includes a -down type power conversion circuit and a limit electric power adjustment circuit 2 in the step-down power supply voltage regulator circuit Including - pulse width modulation control: two: a switch driver, at least one active switch, an inductive energy storage element capacitor 'this capacitance constitutes the output of the cooling power supply stability circuit: = load connection; and the limit electric disk The modulation circuit is connected to the output of the down-converter type power supply (4) circuit to obtain the output current, and then 7 200938985 judges the negative plant according to the current magnitude. Ke Yan a knows the heavy load in the war, and adjusts the switch In the Motivation, the voltage of the active switch is used to push the voltage of the active switch; (4) The step-down power supply voltage regulator circuit wheel + snow, * when hitting zero, indicating that the current load is in a state, the limit voltage modulation circuit will reduce the active Switch drive: pressure 'to reduce the drive loss function; conversely, if the step-down power supply regulator output current increase ' indicates that the load is at medium weight (four), then the limit voltage modulation circuit will increase the drive voltage of the active switch To reduce conduction loss .实施 [Embodiment] «The first embodiment of the voltage modulation circuit of the present invention is shown in the first figure, which includes a step-down power conversion circuit and a limit voltage modulation circuit (3G). The buck type power conversion circuit includes: a pulse width modulation controller (10) comprising at least one feedback voltage input port (Vfeb) and a pulse width modulation output terminal (pwM); The driver (20) includes a logic circuit unit and two power amplifiers. The logic circuit unit includes a pulse width modulation signal terminal (pWM) and an output terminal, wherein the pulse width modulation signal terminal (PWM) is connected. To the output (PWM) of the pulse width modulation controller (10), and the two outputs are respectively connected to the input terminals of the corresponding power amplifiers; and the wheel outputs of the two power amplifiers are the switch drivers (20) Two output terminals; two active switches (Q1) (Q2) are connected in series, and the driving end of each active switch (Q1) (Q2) corresponds to the wheel end of the switch driver (2〇); 200938985 an inductor ( L), one end is connected to the two nodes 'the other end is transparent Pass a capacitor 槿忐 two active switch (Q1) (Q2) in series
供該脈寬調變控制器（10)目前負載用電電壓大小。 、又，上述限位電壓調變電路（30)的輸入端係取得該電 感（L)的電流（I〇ut)大小，並取得該電流對應的電壓， 又該限位電壓調變電路（30)的可變限制電壓端（v〇 )係連 接至該開關驅動器（2〇)中之一功率放大器之高電位上限端 (LVCC);該限位電壓調變電路（3〇)係依據該降壓型電源轉 換電路輸出電流大小’調整開關驅動器（2〇)之外部電壓輸 入端（PVCC)的電壓大小；亦或可一併調整該開關驅動器（2〇) 的二功率放大器的高電位上限端（UVCC)(LVCC)。 ’以提 上述限位電壓調變電路（30)可與該開關驅動器（20)整合 成單一積體電路，又該限位電壓調變電路（30)及開關驅動 器（20)可與該脈寬調變控制器（10)整合成單一積體電路，或 是兩主動開關（Q1)(Q2)係與該開關驅動器（20)整合成單一 積體電路。 請配合參閱第二圖所示，上述限位電壓調變電路（30) 一較佳實施例，係包含有： 一運算放大器（31)，其包含二輸入端及一輸出端，其 中非反向輸入端係透過二電阻（Ra)(Rb)分別連接至一固定 參考電壓（Vref)及降壓型電源轉換電路輸出電流（I〇ut)所對 應的電壓信號（VI(3ut) ’即可以一比流器麵合至降墨型電源 轉換電路之輸出端取得輸出電流所對應的電壓（Vi〇ut);於 200938985 本實施例中，該固定參考電壓（Vref)係可為一稽納二極體 (ZD)或一穩壓器（Shunt Regulator); 一電子開關（32)，其控制端係連接至該運算放大器（3 1) 的輸出端，由運鼻放大器（31)控制其啟閉，而電子開關（32) 其中一端係連接至外部直流電源高電位端（+5v至+ 12V)， 而另一端則為該可變限制電壓端（v〇);於本實施例中該 電子開關（32)係採用一 NPN型BJT電晶體，而控制端為基 〇極，另兩端分別為集極及射極，與外部直流電源高電位端 連接者乃為集極，而射極為可變限制電壓端；又該電子開 關亦可為一 M0SFET ;及 一分壓電路（33)，係由二電阻（R1)(R2)串聯而成，其一 鈿係連接至該電子開關（32)另一端，另一端接地，而串聯 即點係連接至該運算放大器（31)的反向輸入端。 由上述電路架構可知，該運算放大器（31)係構成一正 向放大電路，由正向放大電路的可變限制電壓端（v〇)公式 + + 可知，負載端電流（lout)與 可變限制電壓（Vo)端電壓呈線性的正比關係。 舉一實施來說，當調整各電阻的電阻值且Vref=2.5V， 即$令正向放大電路可變限制電壓端（v〇)公式為 =iX(5 + D，當負載端呈輕載（即電壓調變電路輸出端的 電流接近0)時，令I〇ut=0，則Vl(>u=0代入上述公式，則 可變限制電壓端（Vo)輸出8.3V，若負載端電電流上升，其 對應電壓（VUut)增加至1.5V，則可變限制電壓端（ν〇)輸出 1 〇. 8 V ’又電流持續上升’即負載進入重載時，以電流增加 200938985 此時可變限制電壓端（Vo) 至其對應的電星到達可知 將輸出13.3 可头本發明的限位電壓調變電路（3〇)確實可提 供開關驅動器（2〇)功率放大器之高電位上限端（lvcc)，一 隨降£型電源轉換電路輸出端電流大小調變的限制電壓丨 =因為輸出端電流大小即能反應負載在輕載或中重載，故 田負載（Load)處於輕載狀態時，該限位電壓調變電路 會同步調降輸出至該開關驅動器（30)之功率放大器之高電 位上限端（LVCC/PVCC)的電壓，令連接該外部電壓輸入端 (PVCC)的功率放大器所輸出的脈寬驅動信號振幅得以被降 低；是以，在輕載時驅動電壓端（LGATE)輸出之驅動訊號 之電£會被降低’即對應主動開關的驅動電壓下降，而能 減少主動開關的驅動損冑。反之，當負載為中重載時，該 限位電壓調變電路（30)會提高驅動電壓，以減少導通損失。 請參閱第三圖所示，係為本發明降壓型電源轉換電路 第一較佳實施例，其與第一較佳實施例大多相同，惟僅包 含有單一主動開關，另一主動開關（Q2)則由一二極體⑴）取 代之，該二極體陽極係接地，而陰極則連接至該主動開關 (Q1)的源極’構成一飛輪二極體。 請參閱第四圖所示，係為本發明降壓型電源轉換電路 第二較佳實施例，係為一返驰式電源轉換電路，其主要包 含有： 一脈寬調變控制器（1〇)，係至少包含有一回授電壓輸 入端（Vfeb)及一脈寬調變輸出端（PWM); 11 200938985 一開關驅動器（20)，其包含有一邏輯電路單元及至少 一功率放大器，該邏輯電路單元包含有一脈寬調變信號端 (PWM)及至少一輸出端，其中該脈寬調變信號端（PWM)係 連接至該脈寬調變控制器的輸出端（PWM)，而各功率 放大器的高電位上限端（PVCC/LVCC)係連接至該限位電壓 調變電路（30)的可變限制電壓端（v〇)，而各功率放大器 的輸出端即為開關驅動器（2〇)的輸出端； 一變壓器（τι)，其一次側連接至直流電源（+12V)，又 一次側則與一電容（c)連接，為降壓型電源轉換電路的輸出 端（Vout)，供負載連接，以及供脈寬調變控制器（1〇)的回授 電壓端（VFEB)耦接，以提供脈寬調變控制器（1〇)目前負載用 電電壓大小； 二初同關（gi)，係串接於變壓器（T1)一次側與直流 電源迴路，其驅動端（G)係連接至該開關驅動器（2〇)的其中 ❹ 之〜輸出端（LGATE)，α受該開關驅動器（2〇)控制啟閉， 決定導通週期。 由上述各實施例的說明可知’本發明的限位 電路確實可提供開關驅動器之 端雷mi徽认 心外。卩輸入端壓端一個隨負載 T電㈣變的限制電麼，可分別於輕載及、中重载不同狀 態下，15]牛抽攸二、一 丨至戟小Η狀 ，調降或調升輸出至該開 入端的雷懕入由 Χ间關驅動态之外部電壓輸 輪屮 ’ 7連接該外部電麼輸人端的功率放大器， :的脈寬驅動信號振幅得以被 - 有效減少驅動損失，^ 低次馮阿，而在輕載時 指中、重載時，亦可降低導通損失。 12 200938985 【圖式簡單說明】 第圖係本發明第一較佳實施例的電路圖。 第一圖：係本發明限位電壓調變電路第一較 的電路圖。 見她例 弟三圖：係本發明第二較佳實施例的電路圖。 第四圖.係本發明第三較佳實施例的電路圖。 第五圖·係既有電壓調變電路的電路圖。The pulse width modulation controller (10) is currently used to load the voltage. Further, the input terminal of the limiting voltage modulation circuit (30) obtains the current (I〇ut) of the inductor (L), and obtains a voltage corresponding to the current, and the limiting voltage modulation circuit The variable limit voltage terminal (v〇) of (30) is connected to a high-potential upper limit terminal (LVCC) of one of the switch driver (2〇); the limit voltage modulation circuit (3〇) is According to the output current magnitude of the step-down power conversion circuit, the voltage of the external voltage input terminal (PVCC) of the switch driver (2〇) is adjusted; or the height of the two power amplifiers of the switch driver (2〇) can be adjusted together. Upper limit of potential (UVCC) (LVCC). The above-mentioned limit voltage modulation circuit (30) can be integrated with the switch driver (20) into a single integrated circuit, and the limit voltage modulation circuit (30) and the switch driver (20) can The pulse width modulation controller (10) is integrated into a single integrated circuit, or the two active switches (Q1) (Q2) are integrated with the switch driver (20) into a single integrated circuit. Referring to the second figure, a preferred embodiment of the limiting voltage modulation circuit (30) includes: an operational amplifier (31) including two inputs and an output, wherein the non-reverse Connected to the input terminal through a two-resistor (Ra) (Rb) connected to a fixed reference voltage (Vref) and the voltage signal corresponding to the output current (I〇ut) of the step-down power conversion circuit (VI(3ut)' A comparator is coupled to the output end of the ink-reduction type power conversion circuit to obtain a voltage corresponding to the output current (Vi〇ut); in the embodiment of 200938985, the fixed reference voltage (Vref) can be one or two a body (ZD) or a regulator (Shunt Regulator); an electronic switch (32) whose control terminal is connected to the output of the operational amplifier (3 1) and controlled by the nose amplifier (31) to open and close And one end of the electronic switch (32) is connected to the external DC power supply high potential end (+5v to +12V), and the other end is the variable limit voltage end (v〇); in the embodiment, the electronic switch (32) An NPN type BJT transistor is used, and the control end is a base buck, and the other ends are divided. The collector and the emitter are connected to the high-potential terminal of the external DC power supply, and the emitter is a variable limit voltage terminal; the electronic switch can also be a M0SFET; and a voltage dividing circuit (33) The two resistors (R1) (R2) are connected in series, one of which is connected to the other end of the electronic switch (32), and the other end is grounded, and the series is connected to the reverse of the operational amplifier (31). According to the above circuit structure, the operational amplifier (31) constitutes a forward amplifying circuit, and the variable limiting voltage terminal (v〇) formula of the forward amplifying circuit + + knows that the load terminal current (lout) and The variable limit voltage (Vo) terminal voltage has a linear proportional relationship. In one implementation, when the resistance value of each resistor is adjusted and Vref=2.5V, that is, the forward amplification circuit variable limit voltage terminal (v〇) The formula is =iX(5 + D, when the load terminal is lightly loaded (that is, the current at the output of the voltage modulation circuit is close to 0), let I〇ut=0, then Vl(>u=0 is substituted into the above formula, then The variable limit voltage terminal (Vo) outputs 8.3V. If the load current increases, the corresponding voltage (VUut) increases to 1. 5V, the variable limit voltage terminal (ν〇) output 1 〇. 8 V 'the current continues to rise', that is, when the load enters the heavy load, the current increases by 200938985, then the variable limit voltage terminal (Vo) is reached to its corresponding power. Star arrival can be known to output 13.3. The limit voltage modulation circuit (3〇) of the present invention can provide the high-potential upper limit terminal (lvcc) of the switching driver (2〇) power amplifier, and a power-saving conversion circuit The limiting current of the output current is adjustable. 丨=Because the current at the output can reflect the load at light load or medium heavy load, when the load is in the light load state, the limit voltage modulation circuit will synchronize. The voltage output to the upper limit of the high potential (LVCC/PVCC) of the power amplifier of the switch driver (30) is lowered, so that the amplitude of the pulse width drive signal output from the power amplifier connected to the external voltage input terminal (PVCC) is reduced. Therefore, at the light load, the driving signal of the driving voltage terminal (LGATE) output is reduced, that is, the driving voltage of the active switch is decreased, and the driving loss of the active switch can be reduced. Conversely, when the load is medium to heavy, the limit voltage modulation circuit (30) increases the drive voltage to reduce the conduction loss. Referring to FIG. 3, it is a first preferred embodiment of the buck power conversion circuit of the present invention, which is mostly the same as the first preferred embodiment, but only includes a single active switch and another active switch (Q2). ) is replaced by a diode (1)), the diode is grounded, and the cathode is connected to the source of the active switch (Q1) to form a flywheel diode. Please refer to the fourth figure, which is a second preferred embodiment of the step-down power conversion circuit of the present invention, which is a flyback power conversion circuit, which mainly comprises: a pulse width modulation controller (1〇) The system includes at least one feedback voltage input terminal (Vfeb) and a pulse width modulation output terminal (PWM); 11 200938985 a switch driver (20) comprising a logic circuit unit and at least one power amplifier, the logic circuit The unit includes a pulse width modulation signal terminal (PWM) and at least one output terminal, wherein the pulse width modulation signal terminal (PWM) is connected to an output end (PWM) of the pulse width modulation controller, and each power amplifier The high-potential upper limit terminal (PVCC/LVCC) is connected to the variable limit voltage terminal (v〇) of the limit voltage modulation circuit (30), and the output terminal of each power amplifier is a switch driver (2〇) The output of the transformer (τι), the primary side of which is connected to the DC power supply (+12V), and the other side is connected to a capacitor (c), which is the output (Vout) of the step-down power conversion circuit for the load Connection, and pulse width modulation controller (1〇) The feedback voltage terminal (VFEB) is coupled to provide a current width voltage of the pulse width modulation controller (1〇); the second initial connection (gi) is serially connected to the transformer (T1) primary side and the DC power supply. In the loop, the driving end (G) is connected to the ❹ 输出 〜 output terminal (LGATE) of the switch driver (2 〇), and α is controlled to be turned on and off by the switch driver (2 〇) to determine the conduction period. As can be seen from the description of the above embodiments, the limit circuit of the present invention can provide the end of the switch driver.卩The input end of the pressure terminal is limited by the load T electricity (four), can be different under light load and medium and heavy load, 15] cattle twitching two, one 丨 to small Η shape, down or adjust The output of the lightning output to the input terminal is connected to the external power supply of the externally-driven power supply 屮'7, and the amplitude of the pulse width driving signal is effectively reduced to reduce the driving loss. ^ Low-level Feng A, and when the light load is medium and heavy, it can also reduce the conduction loss. 12 200938985 BRIEF DESCRIPTION OF THE DRAWINGS The drawings are circuit diagrams of a first preferred embodiment of the present invention. The first figure is the first comparative circuit diagram of the limit voltage modulation circuit of the present invention. See her example three figures: a circuit diagram of a second preferred embodiment of the present invention. Figure 4 is a circuit diagram of a third preferred embodiment of the present invention. Fig. 5 is a circuit diagram of a voltage modulation circuit.
第圖.係既有驅動暨相位控制電路方塊圖。 第七圖：係既有一型號為IRF663 1的MOSFET主動開 關的導通特性曲線圖。 【主要元件符號說明】 (1〇)脈寬調變控制器 （20)開關驅動器 (30)(30a)(3 0b)限位電壓調變電路Figure. Block diagram of the existing drive and phase control circuit. Figure 7: The turn-on characteristic of a MOSFET active switch with an IRF663 1 model. [Main component symbol description] (1〇) Pulse width modulation controller (20) Switch driver (30) (30a) (3 0b) Limit voltage modulation circuit
(31)運算放大器 (33)分壓電路 (35)第二分壓電路 (50)電壓調變電路 (52)開關驅動器 (522)功率放大器 (524)相位調整電路 (54)電感 (32)電子開關 (34)第一分壓電路 (35a)第二分壓電路 (51)脈寬調變控制器 (521)邏輯電路單元 (523)功率放大器 (53)主動開關 (55)電容 13(31) Operational Amplifier (33) Voltage Dividing Circuit (35) Second Voltage Dividing Circuit (50) Voltage Modulation Circuit (52) Switch Driver (522) Power Amplifier (524) Phase Adjustment Circuit (54) Inductance ( 32) Electronic switch (34) First voltage dividing circuit (35a) Second voltage dividing circuit (51) Pulse width modulation controller (521) Logic circuit unit (523) Power amplifier (53) Active switch (55) Capacitor 13