CN104283415B - Multi-mode electric current dispatching device - Google Patents

Abstract

The present invention is a kind of multi-mode electric current dispatching device, for controlling the DC/DC conversion device of each power supply unit in decentralized power supply system, this multi-mode electric current dispatching device comprises an active equalizing control circuit, an electric current scheduling by-pass flow circuit and hangs down equalizing control circuit；According to each side factors such as the input power aspect of each power supply unit, system load state, system reliabilities, select actively equal stream mode, electric current scheduling method or the equal stream mode that hangs down, to maintain the power supplying efficiency of bulk supply system, reduce non-essential power loss.

Description

Multi-mode current scheduling device

Technical Field

The present invention relates to a multi-mode current scheduling device, and more particularly, to a multi-mode current scheduling device for coordinating and allocating power supply states of power supplies when a plurality of server power supplies are connected in parallel for power supply.

Background

Please refer to the parallel power supply system shown in fig. 12, which is composed of a plurality of power supplies 1 connected in parallel. The power supplies 1 receive an input voltage Vin to generate a rated output voltage Vo to supply to a load, and when any one of the power supplies 1 fails, the other normal power supplies 1 can normally supply power to the load. The advantage of such parallel operation is to provide higher system reliability, efficient operation, and easy individual component maintenance.

Each power supply 1 mainly includes a front stage power circuit 101, a rear stage power circuit 102, and a front stage control circuit and a rear stage control circuit corresponding thereto. The pre-stage power circuit 101 converts the input voltage Vin into a bus voltage V1, and is usually formed by an ac/dc converter with Power Factor Correction (PFC) function. The rear stage power supply circuit 102, which is typically a dc/dc converter, converts the bus voltage V1 into an output voltage Vo.

In order to ensure that the power supplies 1 can properly cooperate with each other, the post-stage control circuit is responsible for performing a current sharing operation to ensure that the power supplies 1 output equal currents. However, the circuit design of each power supply can only execute a single control mode, for example, active current sharing control (active current sharing control) is adopted, the common techniques include automatic master-slave current sharing control (autonomous master current sharing control) and average current sharing control (average current sharing control), and the hardware architecture of the control circuit is only suitable for the adopted control mode. To change the control mode, the design circuit architecture must be re-programmed.

In addition, when the load is in a light load state, if the current sharing control method is still used to make each power supply 1 provide an average current, the power supply efficiency of each power supply is reduced, the power supply operation efficiency of the whole system is also deteriorated, and the total power loss is high.

Disclosure of Invention

In view of the fact that the control circuit of the dc/dc converter of the conventional parallel power supply system can only provide a single control mode, the present invention provides a multi-mode current dispatching device, which can enable the corresponding circuit structure to select the appropriate control mode according to the load status, the type and status of the input power, the operation efficiency, the system reliability, and other considerations.

The invention relates to a multi-mode current dispatching device for controlling a DC/DC converter of a power supply, comprising:

a switch, arranged at the output end of the DC/DC converter, wherein the output voltage of the DC/DC converter is defined as a switch front-end output voltage before passing through the switch, and is defined as a switch rear-end output voltage after passing through the switch;

a feedback circuit connected between the output end and the input end of the DC/DC converter, the feedback circuit comprises an internal feedback circuit and an external feedback circuit for respectively adjusting the weight of the internal feedback voltage and the external feedback voltage, the internal feedback circuit comprises a first resistor and a second resistor which are connected in series, the external feedback circuit is composed of a far-end feedback resistor and a third resistor for compensating the impedance voltage drop of the circuit, and a voltage division circuit composed of the internal feedback circuit and the external feedback circuit divides the voltage to generate a feedback divided voltage so as to set the drooping characteristic of the rated output voltage and the output current to the output voltage;

an active current sharing control circuit, comprising a first diode, a first bypass amplifier circuit, a current sharing controller and a current sharing bus switch, wherein:

the anode of the first diode is connected with a node between the far-end feedback resistor and the third resistor;

the first bypass amplifier circuit is connected between the cathode of the first diode and the output control voltage of the current-sharing controller;

the current-sharing controller exchanges output current information with other parallel power supplies through the current-sharing bus switch, and the other end of the current-sharing bus switch is used for connecting a current-sharing bus;

a first shunt current of the first bypass amplifier circuit can be adjusted through the output control voltage of the current-sharing controller;

a current-scheduling bypass circuit comprising a second diode and a second bypass amplifier circuit, wherein:

the anode of the second diode is connected with a node between the far-end feedback resistor and the third resistor;

the output end of the second shunt amplifier circuit is connected with the cathode of the second diode, and the input end of the second shunt amplifier circuit receives a control voltage through a first switch;

a droop current-sharing control circuit, which comprises a fourth resistor and a voltage amplifier circuit;

one end of the fourth resistor is connected with a feedback voltage division node of the feedback circuit;

the output end of the voltage amplifier circuit is connected with the other end of the fourth resistor, the input end of the voltage amplifier circuit can receive two voltage signals, wherein one voltage signal is the control voltage received by a third switch and a second switch which are connected in series, and the other voltage signal is the control voltage generated by a sensing current through a control circuit and received by a fourth switch, so that the voltage amplifier circuit outputs a droop control voltage.

Based ON the circuit architecture, the invention can control the ON/OFF states of the first to fourth switches and the current sharing bus switch according to the system working requirements, so that the current dispatching device can operate in an active current sharing mode, a droop current sharing mode or an output current dispatching mode to provide composite current control. The correspondence between each switch and the circuit operation mode is shown in the following table:

therefore, when a plurality of power supplies are connected in parallel to form a power supply system, each power supply can control different switches to be switched on/off to enable a proper working mode according to factors such as the AC/DC type and the load state of an input power supply, and the limitation that a single control circuit can only execute a single working mode is avoided.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principles of the invention. In the drawings:

FIG. 1 is a block diagram of a power supply system for two AC power inputs according to the present invention.

Fig. 2 is a detailed circuit diagram of a current dispatching device according to a first embodiment of the present invention.

Fig. 3 is a graph of the output voltage Voai versus the output current Ioi of a typical power supply, with the difference between the solid and dashed lines being the output impedance drop.

Fig. 4 is a graph of the power efficiency of the power supply and the output load current.

FIG. 5 is a block diagram of a power supply system for an AC/DC power input according to the present invention.

Fig. 6 is a block diagram of a power supply system applied to three-phase ac power input according to the present invention.

FIG. 7 is a graph showing the droop characteristics of the output voltage of a single power supply with the load current.

Fig. 8 is a graph of droop characteristics of output voltage versus load current for parallel operation of dual power supplies.

Fig. 9 is a detailed circuit diagram of a current dispatching device according to a second embodiment of the present invention.

Fig. 10 is a detailed circuit diagram of a current dispatching device according to a third embodiment of the present invention.

Fig. 11 is a detailed circuit diagram of a current dispatching device according to a fourth embodiment of the present invention.

Fig. 12 is a circuit block diagram of a conventional distributed power system.

The reference numbers illustrate:

power supply 1

Current scheduling device 100

Front stage power supply circuit 101

The rear stage power supply circuit 102

Switch 103

Feedback circuit 10

Active current sharing control circuit 20

Current sharing controller 21

Current sharing bus switch 22

First bypass amplifier circuit 23

Current dispatch bypass circuit 30

Second bypass amplifier circuit 31

Droop current sharing control circuit 40

Voltage amplifier circuit 41

Droop current sharing controller 42

First switch A1

Second switch A2

Third switch A3

Fourth switch A4

Input voltages AC1, AC2

First diode D1

First diode D2

First resistor R1'

Second resistor R2

Third resistor R3

Fourth resistor R4

Remote feedback resistor RS

First adjusting resistor RS1

Second adjusting resistor RS2

Output current Ioi

Sensing the current Isense

First shunt current Iadj1

Second shunt current Iadj2

Bus DC voltage Vdc

Input voltage Vin and output voltage Vo

Switch front end output voltage Vobi

Switch back end output voltage Voai

Adjusting the voltage Vdr

Reference voltage command Vref

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention are described in further detail below with reference to the accompanying drawings. The exemplary embodiments and descriptions of the present invention are provided to explain the present invention, but not to limit the present invention.

Referring to fig. 1, a redundant power supply system can be formed by connecting a plurality of power supplies 1 in parallel, and each power supply 1 has at least one dc/dc converter therein. In a preferred embodiment, each power supply 1 may comprise a front stage power circuit 101 and a rear stage power circuit 102, the front stage power circuit 101 converts the input voltages AC1 and AC2 into a bus dc voltage Vdc, typically formed by an AC/dc converter with Power Factor Correction (PFC) function, the rear stage power circuit 102 converts the bus dc voltage Vdc into the output voltage, and the rear stage power circuit 102 is typically formed by a dc/dc converter.

The present invention is a multi-mode current scheduling device 100, which is disposed inside each power supply 1, and controls the back-stage power circuit 102 inside each power supply 1, the output terminal of the back-stage power circuit 102 is connected to the power supply bus of the parallel system through a switch (ORing switch)103, the switch 103 can be formed by a Diode (ORing Diode) or a field effect transistor (ORing MOSFET), the output voltage of the back-stage power circuit 102 is defined as a switch front-end output voltage Vobi before the switch 103 is turned off, and is defined as a switch back-end output voltage Voai after passing through the switch 103. And the subscript i indicates the ith power supply 100, i.e. Vobi indicates the switch front output voltage of the ith power supply 100 itself, and the following description is labeled in accordance with the principle.

The switch 103 functions to provide a unidirectional current to the load, and when the voltage Voai at the back end of the switch 103 is higher than the voltage Vobi at the front end of the switch 103, the switch 103 is turned off to prevent a reverse current. When the voltage Vobi at the front end of the switch 103 is higher than the voltage Voai at the back end of the switch 103, the parasitic diode of the switch 103 is naturally turned on to provide the output current, and then the switch 103 is turned on again to reduce the conduction loss.

Referring to fig. 2, the current scheduling apparatus 100 of the present invention includes a Feedback circuit (Feedback circuit)10, an active current-sharing control circuit 20, a current scheduling bypass circuit 30, and a droop current-sharing control circuit 40.

The feedback circuit 10 is connected between the output terminal and the input terminal of the post-stage power circuit 102, and synthesizes a control signal according to the switch front-end output voltage Vobi and the switch rear-end output voltage Voai of the post-stage power circuit 102 itself to feed back the control signal to the post-stage power circuit 102 itself. The feedback circuit 10 includes an internal feedback circuit and an external feedback circuit for adjusting the weights of the internal and external feedback voltages thereof, respectively. The internal feedback circuit comprises a first resistor R1' and a second resistor R2 connected in series, the series node of the two is defined as a feedback voltage dividing node, and the external feedback circuit is composed of a far-end feedback resistor RS and a third resistor R3 for compensating the line impedance voltage drop. The inner feedback circuit and the outer feedback circuit divide the voltage to generate a feedback divided voltage Vf which can be used for setting the rated output voltage and the droop characteristic of the output current to the output voltage.

To achieve multi-mode output current scheduling capability, two current scheduling bypass circuits are added at the connection node between the remote feedback resistor RS and the third resistor R3 to adjust the amount of output current. Furthermore, a fourth resistor R4 is connected to the composite node of the inner and outer feedback circuits to inject a droop control voltage Vdr, which can also adjust the output voltage droop characteristics. The other circuit blocks connected to the feedback circuit 10 will be further described below.

The active current-sharing control circuit 20 includes a first diode D1, a current-sharing controller 21, a first bypass amplifier circuit 23 and a current-sharing bus switch 22; the anode of the first diode D1 is connected to the voltage dividing node of the voltage dividing circuit through the third resistor R3, and the cathode is connected to the output control voltage VS1 of the current sharing controller 21 through the first bypass amplifier circuit 23. The current sharing command of the current sharing controller 21 is connected to one end of the current sharing BUS switch 22, and the other end of the current sharing BUS switch 22 is connected to a current sharing BUS (CS BUS). The current passing through the first diode D1 is defined as a first shunt current Iadj1, which allows a current sharing command to be sent to the current sharing BUS (CS BUS) or receives current sharing commands from other parallel power supplies to adjust the amount of the first shunt current Iadj1 of the first bypass amplifier circuit 23 when the current sharing BUS switch 22 is turned on, so as to achieve the effect of current sharing control of each parallel power supply 1.

The first bypass amplifier circuit 23 is composed of an operational amplifier, a transistor and a first adjusting resistor RS 1. The output of the operational amplifier is connected to the base of the transistor, the inverting input terminal is connected to the emitter of the transistor, the non-inverting input terminal is connected to the output control voltage VS1 of the current sharing controller 21, and the collector of the transistor is connected to the cathode of the first diode D1. The first bypass amplifier circuit 23 functions to directly control the amount of the first shunt current Iadj1 using the output control voltage VS1 of the current sharing controller 21, which is related as follows:

Iadj1=VS1/RS1；

the active current sharing control circuit 20 may be formed by a current sharing control integrated circuit numbered UCC39002 or other equivalent circuits.

The current scheduling bypass circuit 30 includes a second diode D2 and a second bypass amplifier circuit 31. The second bypass amplifier circuit 31 is composed of an operational amplifier, a transistor and a second adjusting resistor RS 2. The output of the operational amplifier is connected to the base of the transistor, the inverting input is connected to the emitter of the transistor, the non-inverting input is connected to a control voltage VS2, and the collector of the transistor is connected to the cathode of the second diode D2. The second bypass amplifier circuit 31 functions to directly control the amount of the second shunt current Iadj2 according to the control voltage VS2, and the relationship is as follows:

Iadj2=VS2/RS2；

the far-end feedback resistor RS is connected between the output voltage Voai at the rear end of the switch and the anode of the first diode D1; the anode of the second diode D2 is connected to the far-end feedback resistor RS and the anode of the first diode D1, and the cathode of the second diode D2 is connected to the second bypass amplifier circuit 31, where the current passing through the second diode D2 is defined as a second shunt current Iadj 2; the second bypass amplifier circuit 31 has an operational amplifier, the non-inverting input of which receives the control voltage VS2 through a first switch a 1. in a preferred embodiment, the control voltage VS2 is an analog voltage signal obtained by a microprocessor outputting a PWM signal and then processing the PWM signal through a low pass filter. The system may pass through the communication interface of FIG. 1, such as I, depending on energy and efficiency requirements²C or PMBus informs the microprocessor to adjust the PWM pulse width and further adjust the second shunt current Iadj2 to achieve the purpose of current scheduling.

The droop current-sharing control circuit 40 includes a droop current-sharing controller 42, second to fourth switches A2, B1, B2 and a voltage amplifier circuit 41. The droop control voltage Vdr generated by the droop current-sharing control circuit 40 is injected into the feedback circuit 10 through the fourth resistor R4, so that the output voltage can be adjusted and decreased with the output current. One end of the fourth resistor R4 is connected to the feedback voltage-dividing node, and the other end is connected to the output end of the voltage amplifier circuit 41, and the input end of the voltage amplifier circuit 41 is connected to the third switch B1 and the fourth switch B2 in parallel. The third switch B1 is connected to the control voltage through a second switch a2, and the other end of the fourth switch B2 receives the droop current sharing control signal from the droop current sharing controller 42. The droop current share control signal is generated based on a sense current Isense.

The present invention can control the on/off states of the first to fourth switches a1, a2, B1 and B2 according to the system working requirements, so that the current dispatching device 100 can operate in an active current sharing mode, a droop current sharing mode or an output current dispatching mode to provide a hybrid current control. Please refer to the following table, which is a table of the relationship between each switch and the circuit operation mode:

A. active current sharing mode:

when the circuit is operating in active current sharing, it can execute the current sharing control methods such as general master-slave type, average current sharing, etc. The current sharing controller 21 generates an output control voltage Vs1 to the first bypass amplifier circuit 23 to adjust the first shunt current Iadj1, wherein:

$\mathrm{Iadj}1=\frac{\mathrm{Vs}1}{\mathrm{Rs}1;}$

the steady-state operating point of the output voltage can be determined by the following equation:

$\mathrm{Vref}=\mathrm{Vobi}\frac{R1//(R3+\mathrm{Rs})}{R2+R1//(R3+\mathrm{Rs})}+\mathrm{Voai}\frac{R1//R2}{R1//R2+R3+\mathrm{Rs}}-\mathrm{Iadj}1\×\mathrm{Rs}\frac{R1//R2}{R1//R2+R3+R2}........\left(1\right)$

wherein R1 is a parallel connection value of the first resistor R1 'and the fourth resistor R4, and R1= R1'// R4, where the droop control voltage Vdr is zero and the control voltage VS2 is also zero.

The output voltage Voai at the rear end of the switch can be obtained by the simultaneous solution of the two formulas (1) and (2).

Further, when the switch 22 is turned ON (ON), substituting (2) into (1) can yield:

$\mathrm{Vref}=\mathrm{Vobi}\frac{R1}{(R2//(R3+\mathrm{Rs}))+R1}+(-\mathrm{Ioi}\×\mathrm{Rds}-\mathrm{Iadj}1\×\mathrm{Rds})\frac{R1//R2}{R1//R2+R3+\mathrm{Rs}}$

$=w1\×\mathrm{Vobi}+W2\×(-\mathrm{Ioi}\×\mathrm{Rds}-\mathrm{Iadj}1\×\mathrm{Rds})....................................\left(3\right)$

wherein, $W1=\frac{R1}{(R2//(R3+\mathrm{Rs}))+R{1}^{,}}$ $W2=\frac{R1//R2}{R1//R2+R3+\mathrm{Rs}};$

the small signal behavior of the control mode is analyzed by disturbance when Iadj1= Iadj1^O+ △ Iadj1, where △ Iadj1 is an incremental incrementThen Vobi = Vobi^O+ △ Vobi, and the reference voltage command Vref is not changed, and the superscript "O" represents the original operating point under the closed feedback control, the above variation is substituted into equation (3) and the stable operating point term is eliminated, and the small variation signal term can be obtained as follows:

$\mathrm{\ΔVobi}=\frac{(\mathrm{\ΔIadj}1\×\mathrm{Rs}+\mathrm{\ΔIoi}\×\mathrm{Rds})\×W2}{W1}...................................\left(4\right)$

as shown in the equation (4), when the first shunt current Iadj1 is increased, the front-end output voltage Vobi is increased, so that the output current Ioi is increased. However, the increase of the output current (Δ Ioi × Rds) in term 2 also increases the front-end output voltage Vobi, and it is known that the far-end feedback itself has a positive feedback characteristic to compensate the line resistance drop, so the decrease of the back-end output voltage Voai with the increase of the output current Ioi can be reduced, as shown in fig. 3. In addition, the term 1 (Δ Iadj1 × Rs) x (W2/W1) in the formula (4) usually provides a voltage adjustment margin of 0-200 mV for changing the magnitude of the output current Ioi.

B1. Current scheduling mode (up-regulation):

by using the first shunt current Iadj1 in cooperation with the active current sharing, the parallel power supplies 1 can achieve the current sharing effect in a steady state, so as to achieve the power supply with high reliability, but the disadvantage is that the overall operation efficiency is not high. Usually, the highest efficiency of a single power supply 1 is when 50% of the rated power supply is output, but in a light load state, the load current is equally divided by the multiple parallel power supply groups 1 through active current sharing control, and the power supply amount is lower than 50%, so that the power supply efficiency is reduced.

When the current dispatching mode is enabled, the current sharing bus switch 22 is first turned off, so that the first shunt current Iadj1= 0. A Microprocessor (MCU) is used to generate a PWM signal, which is passed through a low pass filter to provide a control voltage VS2 at the input terminal of the first bypass amplifier circuit 31 and control a second shunt current Iadj2, where Iadj2= VS2/Rs 2. The steady-state operating point of the output voltage is changed to Iadj2 only by Iadj1 as described above, as follows:

$\mathrm{Vref}=\mathrm{Vobi}\frac{R1//(R3+\mathrm{Rs})}{R2+R1//(R3+\mathrm{Rs})}+\mathrm{Voai}\frac{R1//R2}{R1//R2+R3+\mathrm{Rs}}-\mathrm{Iadj}2\×\mathrm{Rs}\frac{R1//R2}{R1//R2+R3+R2}.....{\left(1\right)}^{\′}$

$\mathrm{\ΔVobi}=\frac{(\mathrm{\ΔIadj}2\×\mathrm{Rs}+\mathrm{\ΔIoi}\×\mathrm{Rds})\×W2}{W1}...............................{\left(4\right)}^{\′}$

according to the equation (4)' when Iadj2 is increased, the switch front end output voltage Vobi is increased, so that the output current Ioi is increased. Therefore, the purpose of up-regulating output voltage and output current can be achieved by outputting the PWM signal through the microprocessor.

B2. Current dispatch mode (down):

since the adjustment of Iadj1, Iadj2 only achieves the effect of up-regulating the output voltage. In order to effectively regulate the output current and maintain the output voltage within a reasonable regulation range, it is necessary to reduce the output current of some power supplies 1 in the parallel configuration. The present invention can utilize the droop current sharing control circuit 40 to achieve the down-regulation function.

When the down mode of current scheduling is enabled, the current share bus switch 22 is also turned off, so that the first current share current Iadj1= 0. Since the first switch a1 is turned off, no control voltage VS2 is input, and the second shunt current Iadj2 is zero. However, after the PWM signal provided by the microprocessor passes through the low pass filter, the PWM signal passes through the turned-on second switch a2 and third switch B1 to generate another voltage signal Vs3 at the non-inverting input terminal of the voltage amplifier circuit 41 of the droop current sharing control circuit 40, so that the output terminal of the voltage amplifier circuit 41 generates a droop control voltage Vdr.

As can be seen from fig. 2:

$\mathrm{Vref}=\mathrm{Vobi}\frac{R1//(R3+\mathrm{Rs})}{R2+R1//(R3+\mathrm{Rs})}+\mathrm{Voai}\frac{R1//R2}{R1//R2+R3+\mathrm{Rs}}+\mathrm{Vdr}\frac{R{1}^{\′}//R2//(R3+\mathrm{Rs})}{R4+(R3+\mathrm{Rs})//R{1}^{\′}//R2}......\left(7\right)$

substitution of Voai gives:

$\mathrm{Vref}=\mathrm{Vobi}\×W1-\mathrm{Ioi}\×\mathrm{Rds}\×\frac{R1//R2}{R1//R2+(R3+\mathrm{Rs})}+\mathrm{Vdrs}\frac{R{1}^{\′}//R2//(R3+\mathrm{Rs})}{R4+(R3+\mathrm{Rs})//R{1}^{\′}//R2;}$

similarly, the control mode small signal behavior is analyzed with perturbations. When the droop control voltage Vdr = Vdr^O+ Δ Vdr, where Δ Vdr represents an increment of increase, then Vobi = Vobi^O+ Δ Vobi, and the reference voltage command Vref,the superscript "O" represents the original operating point. Under closed feedback control, the variable quantity is brought into formula (7) and the stable operating point item is eliminated, and a small variable signal item can be obtained as follows:

0=ΔVobi×W1-ΔIoi×Rds×W2+ΔVdr×W3；

$\mathrm{\ΔVobi}=\frac{1}{W1}(\mathrm{\ΔIoi}\×\mathrm{Rds}\×W2-\mathrm{\ΔVdr}\×W3)......................\left(8\right)$

$W3=\frac{R{1}^{\′}//R2//(R3+\mathrm{Rs})}{R4+(R3+\mathrm{Rs})//R{1}^{\′}//R2;}$

as can be seen from the above equation (8), when the droop control voltage Vdr increases by an increment of Δ Vdr, the output voltage Vobi at the front end of the switch can be reduced to achieve the down-regulation.

Taking the example of parallel connection of two power supplies 1 shown in fig. 1 as an example, when two power supplies 1 are connected in parallel and fully powered, the two power supplies 1 will equally divide the load current, each supplying 50% of current, and at this time, the operating efficiency of the power supply is the highest, usually reaching 93-94%, as shown in the working point a shown in fig. 4. However, when the load is in a light load state, for example, when the load state is 50%, the two power supplies 1 share 50% of the load current, that is, each supplies 25% of the load current, using the current sharing control method, as shown in the operating point B shown in fig. 4, at this time, the overall efficiency of the parallel connection of the two power supplies 1 is worse than the operating efficiency of the single-group power supply 1.

Therefore, in the light load state, the system can be in the light load state through I from the outside²C or PMBUS is input to the microprocessor to inform each power supply 1 that current scheduling is required. Within a reasonable voltage regulation range, the first power supply 1 utilizes the microprocessor to regulate delta Iadj2, so that the output voltage of the first power supply is increased, and an up-regulation mode is executed; the second power supply 1 will adjust Δ Vdr to drop its output voltage, execute the down-regulation mode, and make the output current of the down-regulated second power supply 1 zero, while the first power supply 1 whose output voltage is regulated up bears the whole current and operates in the highest efficiency region. The second power supply 1 waiting in parallel consumes no load loss, which is about 4-5W for the power supply with 500-900W and 12V rated output voltage. The difference in power supply efficiency between the current sharing control method and the current scheduling method is compared below.

Assuming that the rated maximum output power Pout of the single power supply 1 is 800W, the maximum system load of the two parallel supplies is 1600W. The efficiency curve of the single power supply is shown in fig. 4, and the power supply efficiency is 93% at 50% output power, i.e. the working position a in the figure.

However, since the system is loaded at about one-half of the full load, i.e. 50%, when the current sharing technique is used, the two power supplies 1 will share 50% of the total output power (i.e. 200W). The power supply efficiency of each power supply 1 at this time is 91%. The total penalty for using current sharing control is: ploss1=2 × 200W × (1-91%) = 36W.

When the current scheduling method is used in an inverse manner, the first power supply 1 alone supplies 400W, and the total loss in the first parallel waiting is: ploss2=400 × (1-93%) +5= 33W.

Therefore, the current scheduling method can save 36-33= 3W. Furthermore, when the main power supply is powered off or is shut down due to a fault, the 12V bus voltage of the main power supply is reduced, and if the switch 103 is formed by a field effect transistor, a parasitic diode of the switch 103 of another power supply waiting in parallel can be naturally conducted to receive power supply and trigger a field effect transistor (MOSFET) to be conducted, so that the conduction loss is reduced. The current scheduling method described above does provide a compromise control method for the system that combines reliability and operating efficiency.

In practical applications, the system can adjust the output currents of the two sets of power supplies 1 according to various factors such as operation efficiency requirement, power supply requirement, service life, etc., for example, each outputs 50% (i.e., current sharing), respectively outputs 80% and 20%, respectively outputs 70% and 30%, or respectively outputs 100% and 0% (i.e., standby state).

The two power supplies 1 shown in fig. 1 are respectively powered by a first AC power source AC1 and a second AC power source AC2, and the first AC power source AC1 and the second AC power source AC2 may be the same AC power or may be dual-loop power supplies. If the first AC power source AC1 is cheaper per unit of electricity than the second AC power source AC2, or if the first AC power source AC1 generates electricity by using renewable energy, the system can redistribute the ratio of the output currents of the two power supplies 1 according to the lowest electricity cost.

As another application example shown in fig. 5, the two power supplies 1 are respectively powered by a first AC power source AC1 and a DC power source DC, which may be a battery or a solar panel, and the system can schedule the output current according to the power supply amount of the DC power source DC. Generally, when two sets of power supplies 1 respectively provide 50% and 50% of load current, the service life of the two power supplies 1 is about 5 years, and the power supplies are replaced. The current scheduling method can be used to extend the product life cycle, and the system controls one power supply to supply 80% of the load current and the other power supply to supply 20% of the load current by using the current scheduling technique. Through reliability life analysis, the power supply supplying 80% of the load current needs to be replaced after 5 years, while the power supply supplying 20% of the load needs to be replaced after 6 to 7 years. Therefore, compared to two sets of power supplies 1 operating in the current sharing mode to provide 50% of load current and need to be replaced at the same time, the parallel power supply using the current scheduling method only needs to replace one of the power supplies.

Referring to fig. 6, two single-phase power supplies 1 can be connected in parallel to form a three-phase power device, and if the two power supplies 1 are symmetrically arranged, a three-phase balanced operation can be obtained when the input currents are averaged, i.e., Ia + Ib + Ic = 0. If the output currents are equalized by using the equalizing control method due to slight differences of the components of the power supplies 1, the output powers of the two power supplies 1 may be slightly different, which may cause unbalance of the input three phases. At this time, the current dispatching method can be used to utilize an ac voltage and current detection circuit inside the power supply 1 to return the detection information to the current dispatching device 100 of the present invention, so as to adjust the output current of the two power supplies 1, thereby keeping the input current in three-phase balance.

C. Droop current sharing mode:

when the vertical current sharing mode is enabled, the current sharing bus switch 22 is first turned off, so that the first shunt current Iadj1=0, and since the first switch a1 is turned off, the control voltage VS2=0, and the second shunt current Iadj2= 0. At this time, a sensing current Isense may be generated by filtering the output current, the inductor current or the primary side current, and a control circuit generates a control voltage according to the sensing current Isense, and the control voltage is input to the voltage amplifier circuit 41 through the fourth switch B2, so that the output terminal of the voltage amplifier circuit 41 generates a proportional droop control voltage Vdr. The relationship between the output voltage and the droop control voltage Vdr is shown in (7) and (8), except that the droop control voltage Vdr is directly generated by the sense current Isense.

Fig. 7 is a graph showing the droop characteristics of the output voltage varying with the load current. If the designed maximum output voltage of the power supply 1 is Voai, max, and the rated output voltage is V^*oai, the lowest output voltage is Voai, min, and it can be known from the above equations (2) and (7):

$\mathrm{Voai}=\frac{\mathrm{Vref}}{W1}-\mathrm{Vdr}\×\frac{W3}{W1}-\mathrm{Ioi}\×\mathrm{Rds}\×\frac{W2}{W1}.............................................\left(9\right)$

$\mathrm{Voai},\max =\frac{\mathrm{Vref}}{W1},\mathrm{whenIoi}=0......................................\left(10\right)$

$\mathrm{Voai},\min =\frac{\mathrm{Vref}}{W1}-\mathrm{Vdr}\×\frac{W3}{W1}-\mathrm{Ioi},\max \×\mathrm{Rds}\×\frac{W2}{W1}.\mathrm{forIoi}=\mathrm{Ioi},\max .........\left(11\right)$

the output voltage variation amount: Δ Voai is:

$\mathrm{\ΔVoai}=\mathrm{Voai},\max -\mathrm{Voai},\min =\mathrm{Vdr}\×\frac{W3}{W1}-\mathrm{Ioi},\max \×\mathrm{Rds}\×\frac{W2}{W1}..................\left(12\right)$

the effect of equation (12) on the right second page is much less than the first term, so it can be ignored, and becomes:

$\mathrm{\ΔVoai}=\mathrm{Voai},,\max -\mathrm{Voai},\min \≅\mathrm{Vdr}\×\frac{W3}{W1}.......................................\left(13\right)$

therefore, when the output voltage fluctuation Δ Voai is given, it can be derived according to the equation (7).

In addition to the basic droop current sharing mode, the invention can also use the droop current sharing mode and the output current scheduling mode at the same time, and the switches are set as follows:

referring to fig. 8, when two power supplies 1 are connected in parallel and both use the droop current sharing mode, the output voltage and output current curves of the two power supplies 1 can be merged into back-to-back characteristic curves, wherein the characteristic curves A, B correspond to the first and second power supplies respectively in one power supplyUnder the same vertical current sharing mode, the two power supplies can share the load current and output the same current I_O1And I_O2. If different energy requirements and operating efficiencies are considered, the second shunt current Iadj2 of the first power supply may be further enabled to perform current scheduling to shift its characteristic curve up to a', so that the first power supply provides more output current to the load, and the output currents of the first and second power supplies become I_O11、I_O22Output current I of the first power supply_O11Increasing the output current I of the second power supply_O11Reduced, but the total output current is not changed, i.e. I_O1+I_O2=I_O11+I_O22And the output voltage is also improved, so that the droop current-sharing module and the current dispatching mode can be comprehensively applied at the same time.

Fig. 9 is a detailed circuit diagram of a current dispatching device according to a second embodiment of the present invention. In the second embodiment, the current scheduling bypass circuit 30 and the droop current-sharing circuit 40 are included, the microprocessor outputs a single PWM control signal and converts the PWM control signal into an analog control signal through a low pass filter, the analog control signal becomes a first control voltage and a second control voltage through two switches a1 and B1, and the first control voltage and the second control voltage are respectively provided to the current scheduling bypass circuit 30 and the droop current-sharing circuit 40. The second embodiment can basically achieve the function of adjusting the output voltage up and down, and the circuit operation thereof can refer to the first embodiment, which is not described herein again.

Fig. 10 is a detailed circuit diagram of a current dispatching device according to a third embodiment of the present invention. The present embodiment is similar to the second embodiment, but the microprocessor itself outputs two independent PWM control signals PWM1, PWM2, the two PWM control signals PWM1, PWM2 respectively pass through the first filter and the second filter to form the first control voltage and the second control voltage, respectively, and the time for outputting the first control voltage and the second control voltage can be determined by the microprocessor alone, so the present embodiment does not need to use the switches a1, B1.

Referring to fig. 11, the droop current share control circuit 40 further includes a droop current share controller 42, which can perform the droop current share control mode in conjunction with the current scheduling bypass circuit 30 with the voltage regulation function.

In the above embodiments, the microprocessor itself is built with a D/a conversion circuit, and the microprocessor can also directly output the required analog control voltage without using a low-pass filter for D/a conversion.

The multi-mode current dispatching device can control the on/off state of each switch according to the working requirement of the system, so that the multi-mode current dispatching device is operated in an active current sharing mode, a droop current sharing mode or an output current dispatching mode, and composite current control is provided, so that the power supply efficiency of the whole power supply system is maintained, and unnecessary power loss is reduced.

The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are only exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (8)

1. A multi-mode current scheduler for controlling a dc/dc converter of a power supply, the multi-mode current scheduler comprising:

the switch is arranged at the output end of the direct current/direct current converter, wherein the output voltage of the direct current/direct current converter is defined as a switch front-end output voltage before passing through the switch, and is defined as a switch rear-end output voltage after passing through the switch;

a feedback circuit connected between the output and input of the switch, the feedback circuit comprising:

the internal feedback circuit comprises a first resistor and a second resistor which are connected in series, wherein the first end of the second resistor is connected with the output voltage of the front end of the switch, the series node of the first resistor and the second resistor is a feedback voltage division node, and the feedback voltage division node is provided with a feedback voltage division voltage;

the external feedback circuit comprises a far-end feedback resistor and a third resistor, wherein the first end of the far-end feedback resistor is connected with the output voltage at the rear end of the switch, the first end of the third resistor is connected with the second end of the far-end feedback resistor, and the second end of the third resistor is connected with the feedback voltage-dividing node;

a current-scheduling bypass circuit comprising a second diode and a second bypass amplifier circuit, wherein:

the anode of the second diode is connected with the second end of the far-end feedback resistor and the first end of the third resistor;

the output end of the second bypass amplifier circuit is connected with the cathode of the second diode, and the input end of the second bypass amplifier circuit receives a first control voltage;

a droop current-sharing control circuit, which comprises a fourth resistor and a voltage amplifier circuit;

one end of the fourth resistor is connected with the feedback voltage division node of the feedback circuit;

the output end of the voltage amplifier circuit is connected with the other end of the fourth resistor, and the input end of the voltage amplifier circuit receives a second control voltage, so that the voltage amplifier circuit can output a droop control voltage to be injected into the feedback circuit through the fourth resistor;

and the input end of the microprocessor is connected with the switch front-end output voltage, the switch rear-end output voltage and a communication interface, and the microprocessor can provide the first control voltage and the second control voltage.

2. The multi-mode current scheduler of claim 1, wherein the microprocessor outputs two independent control signals as the first control voltage and the second control voltage, respectively.

3. The multi-mode current scheduler of claim 1, wherein the microprocessor outputs a control signal and the control signal is converted into the first control voltage and the second control voltage through two switches.

4. The multi-mode current scheduler of any of claims 1-3, wherein the apparatus further comprises:

an active current sharing control circuit, comprising a first diode, a current sharing controller, a first bypass amplifier circuit and a current sharing bus switch, wherein:

the anode of the first diode is connected with the second end of the far-end feedback resistor and the first end of the third resistor;

the first bypass amplifier circuit is connected between the cathode of the first diode and an output control voltage of the current-sharing controller;

one end of the current-sharing bus switch is connected with the current-sharing controller, and the other end of the current-sharing bus switch is used for being connected with a current-sharing bus.

5. The multi-mode current scheduler of claim 4, wherein the droop current share control circuit further comprises:

and the droop current-sharing controller is connected with the input end of the voltage amplifier circuit, generates a droop current-sharing control signal according to a sensing current, and inputs the droop current-sharing control signal to the voltage amplifier so that the voltage amplifier circuit outputs a droop control voltage.

6. The multi-mode current scheduler of claim 2, wherein the two control signals output by the microprocessor pass through two low pass filters to become the first control voltage and the second control voltage, respectively.

7. The multi-mode current scheduler of claim 3, wherein the control signal output by the microprocessor passes through a low pass filter and then through the two switches.

8. The multi-mode current scheduler of claim 4, wherein the microprocessor is connected to the current share bus.