CN104283415B - Multi-Mode Current Scheduling Device - Google Patents

Abstract

The invention is a multi-mode current scheduling device, is used for controlling the direct current/direct current switching device of every power supply in the distributed power system, the multi-mode current scheduling device includes a initiative current-sharing control circuit, a current scheduling bypass circuit and a droop current-sharing control circuit; according to various factors such as input power supply state, system load state, system reliability and the like of each power supply, an active current sharing mode, a current scheduling mode or a droop current sharing mode is selected to maintain the power supply efficiency of the whole power supply system and reduce unnecessary power loss.

Description

Multi-Mode Current Scheduling Device

technical field

The present invention is a multi-mode current scheduling device, especially a device for coordinating and distributing the power supply status of each power supply when multiple server power supplies are connected in parallel for power supply.

Background technique

Please refer to the parallel power supply system shown in FIG. 12 , which is composed of multiple power supplies 1 connected in parallel. These power supplies 1 receive an input voltage Vin to generate a rated output voltage Vo to supply the load. When any power supply 1 fails, the other normal power supplies 1 can normally provide power to the load. The advantages of this kind of parallel operation are to provide higher system reliability, high-efficiency operation and easy maintenance of individual components.

Each power supply 1 mainly includes a pre-stage power circuit 101 , a post-stage power circuit 102 , and corresponding pre-stage control circuits and post-stage control circuits. The pre-stage power supply circuit 101 converts the input voltage Vin into a bus voltage V1, and is usually composed of an AC/DC converter with a power factor correction (PFC) function. The subsequent power supply circuit 102 converts the bus voltage V1 into an output voltage Vo, and the subsequent power supply circuit is generally constituted by a DC/DC converter.

In order to ensure that the power supplies 1 can properly coordinate with each other, the control circuit in the subsequent stage is responsible for performing current sharing operations to ensure that each power supply 1 outputs an equal current. However, the current circuit design of each power supply can only implement a single control mode, such as the use of active current sharing control (active current sharing control), and its common techniques include automatic master current sharing control (automatic master current sharing control) and For control modes such as average current sharing control, the hardware architecture of the above control circuit is only applicable to the adopted control mode. To change different control methods, the circuit architecture must be redesigned.

In addition, when the load turns to a light load state, if the current sharing control method is still used to make each power supply 1 provide an average current, not only the power supply efficiency of each power supply will be reduced, but the power supply operation of the entire system will also be reduced. Efficiency will also deteriorate, and the overall power loss will be high.

Contents of the invention

In view of the fact that the control circuit of the DC/DC converter of the existing parallel power supply system can only provide a single control mode, the main purpose of the present invention is to provide a multi-mode current scheduling device, which can be based on the load status, input power Type and state, operating efficiency and system reliability and other considerations, use the corresponding circuit structure to select the appropriate control mode.

The multi-mode current scheduling device of the present invention is used to control a DC/DC converter of a power supply, and the multi-mode current scheduling device includes:

A switch is set at the output end of the DC/DC converter, wherein the output voltage of the DC/DC converter is defined as a switch front-end output voltage before passing through the switch, and is defined as a switch rear-end output after passing the switch Voltage;

A feedback circuit, connected between the output end and the input end of the DC/DC converter, the feedback circuit includes an internal feedback circuit and an external feedback circuit to adjust the weights of the internal and external feedback voltages respectively, and the internal feedback circuit includes a series A first resistor and a second resistor, the external feedback circuit is composed of a remote feedback resistor and a third resistor to compensate the line impedance voltage drop, and the voltage is divided by a voltage divider circuit formed by the internal and external feedback circuit. A feedback voltage divider to set the droop characteristics of the rated output voltage and the output current to the output voltage;

An active current sharing control circuit, including a first diode, a first bypass amplifier circuit, a current sharing controller and a current sharing bus switch, wherein:

The anode of the first diode is connected to a node between the remote feedback resistor and the third resistor;

The first bypass amplifier circuit is connected between the cathode of the first diode and the output control voltage of the current sharing controller;

The current sharing controller exchanges output current information with other parallel power supplies through the current sharing bus switch, and the other end of the current sharing bus switch is used to connect to a current sharing bus;

A first shunt current of the first bypass amplifier circuit can be adjusted through the output control voltage of the current sharing controller;

A current regulation bypass circuit, comprising a second diode and a second bypass amplifier circuit, wherein:

The anode of the second diode is connected to a node between the remote feedback resistor and the third resistor;

The output end of the second bypass amplifier circuit is connected to the cathode of the second diode, and the input end of the second bypass amplifier circuit receives a control voltage through a first switch;

A vertical current sharing control circuit, including a fourth resistor and a voltage amplifier circuit;

One end of the fourth resistor is connected to the feedback voltage dividing node of the feedback circuit;

The output end of the voltage amplifier circuit is connected to the other end of the fourth resistor, and the input end of the voltage amplifier circuit can receive two voltage signals, one of which is received by a third switch and a second switch connected in series. The control voltage, another voltage signal is a control voltage generated by a sensing current through a control circuit and received through a fourth switch, so as to output a drooping control voltage in the voltage amplifier circuit.

Based on the aforementioned circuit architecture, the present invention can control the ON/OFF states of the first to fourth switches and the current sharing bus switch according to the working requirements of the system, so that the current scheduling device operates in an active current sharing mode, Drooping current sharing mode or output current scheduling mode provides compound current control. The corresponding relationship between each switch and the circuit working mode is shown in the following table:

Therefore, when multiple power supplies are connected in parallel to form a power supply system, each power supply can control the on/off of different switches according to the AC/DC type of the input power, the load status and other factors to enable the appropriate working mode, no longer Limited by a single control circuit that can only execute a single working mode.

Description of drawings

The drawings described here are used to provide further understanding of the present invention, constitute a part of the application, and do not limit the present invention. In the attached picture:

FIG. 1 is a circuit block diagram of a power supply system applied to two AC power inputs according to the present invention.

FIG. 2 is a detailed circuit diagram of the first embodiment of the current scheduling device of the present invention.

FIG. 3 is a graph showing the relationship between the output voltage Voai and the output current Ioi of a typical power supply, and the difference between the solid line and the dotted line is the output line resistance voltage drop.

FIG. 4 is a graph showing the relationship between the power supply efficiency of the power supply and the output load current.

FIG. 5 is a circuit block diagram of a power supply system applied to an AC/DC power input according to the present invention.

Fig. 6 is a circuit block diagram of a power supply system applied to three-phase AC power input according to the present invention.

FIG. 7 is a graph showing the droop characteristic curve of the output voltage of a single power supply with the load current.

FIG. 8 is a drooping characteristic curve of output voltage versus load current for dual power supplies operating in parallel.

FIG. 9 is a detailed circuit diagram of the second embodiment of the current scheduling device of the present invention.

FIG. 10 is a detailed circuit diagram of the third embodiment of the current scheduling device of the present invention.

FIG. 11 is a detailed circuit diagram of the fourth embodiment of the current scheduling device of the present invention.

Fig. 12 is a circuit block diagram of an existing distributed power supply system.

Explanation of reference numbers:

power supply 1

Current dispatching device 100

Pre-stage power supply circuit 101

Post-stage power supply circuit 102

switch 103

Feedback circuit 10

Active current sharing control circuit 20

Current Sharing Controller 21

Current Sharing Bus Switch 22

The first bypass amplifier circuit 23

Current scheduling bypass circuit 30

Second bypass amplifier circuit 31

Drooping current sharing control circuit 40

Voltage Amplifier Circuit 41

Droop current sharing controller 42

first switch A1

Second switch A2

The third switch A3

Fourth switch A4

Input voltage AC1, AC2

first diode D1

first diode D2

The first resistor R1'

Second resistor R2

The third resistor R3

Fourth resistor R4

Remote feedback resistor RS

The first adjustment resistor RS1

The second adjustment resistor RS2

Output current Ioi

Sensing current Isense

The first shunt current Iadj1

The second shunt current Iadj2

Bus DC voltage Vdc

Input voltage Vin output voltage Vo

Switch front-end output voltage Vobi

Switch back-end output voltage Voai

Adjustment voltage Vdr

Reference voltage command Vref

detailed description

In order to make the object, technical solution and advantages of the present invention clearer, the embodiments of the present invention will be further described in detail below in conjunction with the accompanying drawings. Here, the exemplary embodiments and descriptions of the present invention are used to explain the present invention, but not to limit the present invention.

Please refer to FIG. 1 , multiple power supplies 1 are connected in parallel to form a redundant power supply system, and each power supply 1 has at least one DC/DC converter inside. In a preferred embodiment, each power supply 1 may include a front-stage power supply circuit 101 and a rear-stage power supply circuit 102. The front-stage power supply circuit 101 converts the input voltage AC1, AC2 into a bus DC voltage Vdc, usually It is composed of an AC/DC converter with a power factor correction (PFC) function. The post-stage power supply circuit 102 converts the bus DC voltage Vdc into an output voltage. The post-stage power supply circuit 102 is usually composed of a DC/DC converter. .

The present invention is a multi-mode current scheduling device 100, which is installed inside each power supply 1 and controls the subsequent power supply circuit 102 inside each power supply 1. The output terminal of the subsequent power supply circuit 102 is passed through a switch ( Oringswitch) 103 is connected to the power supply bus of the parallel system, and the switch 103 can be formed by a diode (ORing Diode) or a field effect transistor (ORing MOSFET). The front-end output voltage Vobi is defined as a switch back-end output voltage Voai after passing through the switch 103 . Also, the subscript i represents the i-th power supply 100 , that is, Vobi represents the output voltage of the switching front end of the i-th power supply 100 itself, and the following description is marked according to this principle.

The function of the switch 103 is to provide a unidirectional current to flow to the load. When the voltage Voai at the rear end of the switch 103 is higher than the voltage Vobi at the front end, the switch 103 is turned off to prevent reverse flow. When the front-end voltage Vobi of the switch 103 is higher than the rear-end voltage Voai, the parasitic diode of the switch 103 is naturally turned on to provide an output current, and then the switch 103 is turned on again to reduce the conduction loss.

Please refer to FIG. 2 , the current scheduling device 100 of the present invention includes a feedback circuit (Feedback circuit) 10 , an active current sharing control circuit 20 , a current scheduling bypass circuit 30 and a drooping current sharing control circuit 40 .

The feedback circuit 10 is connected between the output terminal and the input terminal of the subsequent power supply circuit 102, and synthesizes and feeds back a control signal to the subsequent power supply circuit according to the output voltage Vobi of the front end of the switch and the output voltage Voai of the rear end of the switch of the subsequent power supply circuit 102 itself. 102 itself. The feedback circuit 10 includes an internal feedback circuit and an external feedback circuit for adjusting the weights of the internal and external feedback voltages respectively. The internal feedback circuit includes a first resistor R1' and a second resistor R2 connected in series, and the series node of the two is defined as a feedback voltage divider node. The external feedback circuit consists of a remote feedback resistor RS and a third resistor R3 Formed to compensate for line impedance voltage drop. The internal and external feedback circuits divide the voltage to generate a feedback divided voltage Vf, which can be used to set the rated output voltage and the droop characteristic of the output current to the output voltage.

In order to achieve multi-mode output current scheduling capability, two current scheduling bypass circuits will be added at the connection node between the remote feedback resistor RS and the third resistor R3 to adjust the output current. Furthermore, a fourth resistor R4 is connected to the synthesizing node of the internal and external feedback circuits to inject a droop control voltage Vdr, which can also adjust the droop characteristics of the output voltage. Next, other circuit blocks connected to the feedback circuit 10 will be further described.

The active current sharing control circuit 20 includes a first diode D1, a current sharing controller 21, a first side current amplifier circuit 23 and a current sharing bus switch 22; the anode of the first diode D1 passes through the The third resistor R3 is connected to the voltage dividing node of the voltage dividing circuit, and its negative pole is connected to the output control voltage VS1 of the current sharing controller 21 through the first bypass amplifier circuit 23 . The current sharing command of the current sharing controller 21 is connected to one end of the current sharing bus switch 22, and the other end of the current sharing bus switch 22 is connected to a current sharing bus (CS BUS). Here, the current passing through the first diode D1 is defined as the first shunt current Iadj1. When the current sharing bus switch 22 is turned on, it is allowed to send a current sharing command to the current sharing bus (CS BUS) or receive other parallel power supplies. The current sharing command of the power supply is to adjust the first shunt current Iadj1 of the first bypass amplifier circuit 23 to achieve the effect of current sharing control of each parallel power supply 1 .

The first bypass amplifier circuit 23 is composed of an operational amplifier, a transistor and a first adjusting resistor RS1. The output of the operational amplifier is connected to the base of the transistor, the inverting input is connected to the emitter of the transistor, the non-inverting input is connected to the output control voltage VS1 of the current sharing controller 21, and the collector of the transistor is connected to the first diode The negative pole of D1. The function of the first bypass amplifier circuit 23 is to use the output control voltage VS1 of the current sharing controller 21 to directly control the current amount of the first shunt current Iadj1, and its relationship is as follows:

Iadj1=VS1/RS1;

The active current sharing control circuit 20 may be composed of a current sharing control integrated circuit numbered UCC39002 or other equivalent circuits.

The current regulation bypass circuit 30 includes a second diode D2 and a second bypass amplifier circuit 31 . The second bypass amplifier circuit 31 is composed of an operational amplifier, a transistor and a second adjusting resistor RS2. The output of the operational amplifier is connected to the base of the transistor, the inverting input is connected to the emitter of the transistor, the non-inverting input is connected to a control voltage VS2, and the collector of the transistor is connected to the cathode of the second diode D2. The function of the second bypass amplifier circuit 31 is to directly control the current amount of the second shunt current Iadj2 according to the control voltage VS2, and its relationship is as follows:

Iadj2=VS2/RS2;

The remote feedback resistor RS is connected between the output voltage Voai at the rear end of the switch and the anode of the first diode D1; the anode of the second diode D2 is simultaneously connected to the remote feedback resistor RS and the first diode The positive pole of D1 and the negative pole of the second diode D2 are connected to the second bypass amplifier circuit 31, where the current defined through the second diode D2 is the second shunt current Iadj2; the second bypass amplifier circuit 31 has An operational amplifier, the non-inverting input terminal of the operational amplifier receives the control voltage VS2 through a first switch A1. In a preferred embodiment, the control voltage VS2 is output by a microprocessor and then passed through a PWM signal. The analog voltage signal processed by the low-pass filter. According to energy and efficiency requirements, the system can notify the microprocessor through the communication interface in Figure 1 such as I ² C or PMBus to adjust the PWM pulse width and then adjust the second shunt current Iadj2 to achieve the purpose of current scheduling.

The drooping current sharing control circuit 40 includes a drooping current sharing controller 42 , second to fourth switches A2 , B1 , B2 and a voltage amplifier circuit 41 . The droop control voltage Vdr generated by the droop current sharing control circuit 40 is injected into the feedback circuit 10 through the fourth resistor R4, so that the output voltage can be adjusted to decrease with the output current. One end of the fourth resistor R4 is connected to the feedback voltage divider node, and the other end is connected to the output end of the voltage amplifier circuit 41 , and the input end of the voltage amplifier circuit 41 is connected to the third switch B1 and the fourth switch B2 in parallel. The third switch B1 is connected to the aforementioned control voltage through a second switch A2 , and the other end of the fourth switch B2 receives the drooping current sharing control signal from the drooping current sharing controller 42 . The drooping current sharing control signal is generated based on a sensing current Isense.

The present invention can control the on/off states of the aforementioned first to fourth switches A1, A2, B1, and B2 according to the working requirements of the system, so that the current scheduling device 100 operates in an active current sharing mode, a drooping current sharing mode, or an output current Scheduling mode, providing compound current control. Please refer to the table below for the relationship between each switch and the working mode of the circuit:

A. Active current sharing mode:

When the circuit operates in active current sharing, it can implement the existing current sharing control methods such as general master-slave and average current sharing. The current sharing controller 21 generates an output control voltage Vs1 to the first bypass amplifier circuit 23 to adjust the first shunt current Iadj1, wherein:

$\mathrm{<span\; class="notranslate">\; Iadj</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; vs.</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; Rs.</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; ;</span>}$

At this time, the steady-state operating point of the output voltage can be determined by the following formula:

$\mathrm{<span\; class="notranslate">\; Vref</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; Vobi</span>}\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Voai</span>}\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Iadj</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

Wherein, R1 is the parallel connection value of the first resistor R1' and the fourth resistor R4, R1=R1'//R4, at this time, the drooping control voltage Vdr is zero, and the control voltage VS2 is also zero.

The output voltage Voai at the rear end of the switch can be obtained by solving the above two formulas (1) and (2).

In addition, when the switch 22 is turned on (ON), substituting (2) into (1) can obtain:

$\mathrm{<span\; class="notranslate">\; Vref</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; Vobi</span>}\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}{<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span><span\; class="notranslate">\; (</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Ioi</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Rds</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Iadj</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Rds</span>}<span\; class="notranslate">\; )</span>\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}}$

$<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; w</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Vobi</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; \&times;</span><span\; class="notranslate">\; (</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Ioi</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Rds</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Iadj</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Rds</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; )</span>$

in, $W1=\frac{R1}{(R2//(R3+\mathrm{Rs.}))+R{1}^{,}}$ $W2=\frac{R1//R2}{R1//R2+R3+\mathrm{Rs.}};$

Use disturbance to analyze the small signal behavior of this control mode. When Iadj1=Iadj1 ^O + △Iadj1, where △Iadj1 is an increase increment, then Vobi=Vobi ^O + △Vobi, and the reference voltage command Vref remains unchanged, and the superscript "O" represents the original working point. Under closed feedback control, bringing the above variation into equation (3) and eliminating its stable operating point item, the variable small signal item can be obtained as follows:

$\mathrm{<span\; class="notranslate">\; \&Delta;\; Vobi</span>}<span\; class="notranslate">\; =</span>\frac{<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&Delta;Iadj</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; \&Delta;Ioi</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Rds</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; )</span>$

From the formula (4), it can be seen that when the first shunt current Iadj1 is increased, the front-end output voltage Vobi will be increased, and the output current Ioi will increase. However, the increase of the output current in item 2 (△Ioi×Rds) will also increase the front-end output voltage Vobi. It can be seen that the remote feedback itself has positive feedback characteristics and can compensate the line resistance voltage drop, so the rear-end output voltage Voai increases with the output current. Ioi increases and the rate of decline can be slowed down, as shown in Figure 3. And the first item (△Iadj1×Rs)×(W2/W1) in the formula (4) usually provides a voltage adjustment margin of 0-200mV to change the size of the output current Ioi.

B1. Current dispatch mode (up-regulation):

Utilizing the aforementioned first shunt current Iadj1 in combination with the active current sharing method, the power supplies 1 connected in parallel can achieve a current sharing effect in a steady state, thereby achieving highly reliable power supply, but the disadvantage is that the overall operating efficiency is not high. Usually, the highest efficiency of a single power supply 1 is when outputting 50% of the rated power supply. It will be lower than 50%, which will lead to a decrease in power supply efficiency. In this case, the current scheduling mode with an upward regulation effect can be enabled.

When the current dispatching mode is enabled, the current sharing bus switch 22 is first turned off to make the first shunt current Iadj1=0. Then utilize a microprocessor (MCU) to generate a PWM signal, provide a control voltage VS2 at the input end of the first bypass amplifier circuit 31 after passing through the low-pass filter, and control the second shunt current Iadj2, at this moment Iadj2=Vs2 /Rs2. The steady-state operating point of the output voltage is as mentioned above, only change Iadj1 to Iadj2, as follows:

$\mathrm{<span\; class="notranslate">\; Vref</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; Vobi</span>}\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Voai</span>}\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Iadj</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span>{<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>}^{<span\; class="notranslate">\; \&prime;</span>}$

$\mathrm{<span\; class="notranslate">\; \&Delta;\; Vobi</span>}<span\; class="notranslate">\; =</span>\frac{<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&Delta;Iadj</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; \&Delta;Ioi</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Rds</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span>{<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; )</span>}^{<span\; class="notranslate">\; \&prime;</span>}$

According to formula (4)', when Iadj2 is increased, the output voltage Vobi at the front end of the switch will be increased, and the output current Ioi will increase. Therefore, the purpose of increasing the output voltage and output current can be achieved by outputting the PWM signal through the microprocessor.

B2. Current dispatch mode (down-regulation):

Because adjusting Iadj1, Iadj2 can only achieve the effect of increasing the output voltage. In order to effectively adjust the output current and maintain the output voltage within a reasonable adjustment range, it is still necessary to reduce the output current of some power supplies 1 in the parallel structure. The present invention can use the drooping current sharing control circuit 40 to achieve the down-regulation function.

When the down-regulation mode of current scheduling is enabled, the current-sharing bus switch 22 is also turned off, so that the first shunt current Iadj1=0. Since the first switch A1 is turned off and there is no control voltage VS2 input, the second shunt current Iadj2 is zero. But the PWM signal provided by the microprocessor passes through the low-pass filter, passes through the second switch A2 and the third switch B1 that are turned on, and generates another The voltage signal Vs3 makes the output terminal of the voltage amplifier circuit 41 generate a drooping control voltage Vdr.

According to Figure 2, we can see that:

$\mathrm{<span\; class="notranslate">\; Vref</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; Vobi</span>}\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Voai</span>}\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Vdr</span>}\frac{\mathrm{<span\; class="notranslate">\; R</span>}{\mathrm{<span\; class="notranslate">\; 1</span>}}^{<span\; class="notranslate">\; \&prime;</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; +</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}{\mathrm{<span\; class="notranslate">\; 1</span>}}^{<span\; class="notranslate">\; \&prime;</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 7</span>}<span\; class="notranslate">\; )</span>$

Substitute Voai to get:

$\mathrm{<span\; class="notranslate">\; Vref</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; Vobi</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Ioi</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Rds</span>}<span\; class="notranslate">\; \&times;</span>\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Vdrs</span>}\frac{\mathrm{<span\; class="notranslate">\; R</span>}{\mathrm{<span\; class="notranslate">\; 1</span>}}^{<span\; class="notranslate">\; \&prime;</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; +</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}{\mathrm{<span\; class="notranslate">\; 1</span>}}^{<span\; class="notranslate">\; \&prime;</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; ;</span>}$

Likewise, the small-signal behavior of this control mode is analyzed with perturbation. When the drooping control voltage Vdr=Vdr ^O +ΔVdr, where ΔVdr represents the increment, then Vobi=Vobi ^O +ΔVobi, and the reference voltage command Vref remains unchanged, and the superscript “O” represents the original operating point. Under the closed feedback control, the above variation is brought into Equation (7) and its stable operating point item is eliminated, and the variable small signal item can be obtained as follows:

0=ΔVobi×W1-ΔIoi×Rds×W2+ΔVdr×W3;

$\mathrm{<span\; class="notranslate">\; \&Delta;\; Vobi</span>}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&Delta;Ioi</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Rds</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&Delta;Vdr</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; )</span>$

$\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; R</span>}{\mathrm{<span\; class="notranslate">\; 1</span>}}^{<span\; class="notranslate">\; \&prime;</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; +</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Rs.</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}{\mathrm{<span\; class="notranslate">\; 1</span>}}^{<span\; class="notranslate">\; \&prime;</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; ;</span>}$

It can be seen from the aforementioned formula (8) that when the drooping control voltage Vdr increases by an increment of ΔVdr, the output voltage Vobi of the front end of the switch can be lowered to achieve the purpose of lowering.

Take the parallel connection of two power supplies 1 as shown in Figure 1 as an example. When the two power supplies 1 are connected in parallel to supply power at full load, the two power supplies 1 will share the load current equally and each supply 50% of the current. At this time, the power supply The operating efficiency of the inverter is the highest, usually up to 93 to 94%, as shown in Figure 4, working point A. But when the load becomes a light load state, for example, when the load state is 50%, use the current sharing control method to make the two power supplies 1 share 50% of the load current, that is, each supply 25% of the current, as shown in Figure 4 As shown in the working point B, the overall efficiency of the parallel connection of two power supplies 1 is worse than the operating efficiency of a single power supply 1 .

Therefore, in a light-load state, the system can input to the microprocessor through an external I ² C or PMBUS, and notify each power supply 1 to start current scheduling. Within a reasonable voltage adjustment range, the first power supply 1 uses a microprocessor to adjust ΔIadj2 to increase its own output voltage and execute an up-regulation mode; the second power supply 1 will adjust ΔVdr to decrease its own output voltage. The down-regulation mode is executed, and the output current of the second power supply 1 whose output voltage is down-regulated is zero, while the first power supply 1 whose output voltage is up-regulated takes full current and operates in the highest efficiency zone. The second power supply 1 waiting in parallel only consumes no-load loss. Generally, a power supply with a rated output voltage of 12V of 500W to 900W has a no-load loss of about 4-5W. The following compares the difference in power supply efficiency between the current sharing control method and the current scheduling method.

Assume that the rated maximum output power Pout of a single power supply 1 is 800W, and the maximum system load of two power supplies connected in parallel is 1600W. The efficiency curve of a single power supply is shown in Figure 4, and its power supply efficiency is 93% when the output power is 50%, that is, the working position A in the figure.

But because the regular load of the system is about one-half of the full load, that is, 50%, when using current sharing technology control, the two power supplies 1 will share 50% of the power on average, and each supply 25% of the output power (that is, 200W) . At this moment, the power supply efficiency of each power supply 1 is 91%. Therefore, the total loss of current sharing control is: Ploss1=2×200W×(1-91%)=36W.

In contrast, when using the aforementioned current scheduling method, the first power supply 1 alone supplies 400W, and the first power supply is waiting in parallel, then the total loss at this time is: Ploss2=400*(1-93%)+5=33W.

It can be seen that the current scheduling method can save 36-33=3W. Furthermore, when the main power supply is powered off or shuts down due to failure, the 12V bus voltage is reduced. If the switch 103 is made of a field effect transistor, the parasitic diode of the switch 103 of another power supply waiting in parallel can naturally lead to The power supply is passed through, and the field effect transistor (MOSFET) is triggered to be turned on, so as to reduce the conduction loss. The above-mentioned current scheduling method does provide a compromise control method for the system that takes into account both reliability and operating efficiency.

In actual application, the system can adjust the output current of the two sets of power supplies 1 according to various factors such as operation efficiency requirements, power supply requirements, and service life, such as 50% output (current sharing), 80% output and 20% output respectively. %, respectively output 70%, 30% or respectively output 100%, 0% (that is, standby state).

The two groups of power supplies 1 shown in FIG. 1 are respectively powered by a first AC power source AC1 and a second AC power source AC2 . The first AC power source AC1 and the second AC power source AC2 can be powered by the same AC power source or a dual-circuit power source. If the electricity cost per unit of the first AC power source AC1 is cheaper than that of the second AC power source AC2, or if the first AC power source AC1 uses renewable energy to generate electricity, the system can redistribute the power between the two power supplies 1 according to the lowest electricity cost. output current ratio.

In another application example shown in Figure 5, the two power supplies 1 are respectively powered by a first AC power supply AC1 and a DC power supply DC. The DC power supply DC can be a battery pack or a solar panel. The amount of power supply is used to schedule its output current. Generally speaking, when the two sets of power supplies 1 provide 50% and 50% of the load current respectively, the service life of the two power supplies 1 is about 5 years, and the power supplies need to be replaced. The aforementioned current scheduling method can be used to extend the product life cycle. Using the aforementioned current scheduling technology, the system controls one power supply to supply 80% of the load current, and another group of power supplies to supply 20% of the load current. According to reliability life analysis, a power supply supplying 80% load current needs to be replaced after 5 years, while a power supply supplying 20% load needs to be replaced after 6 to 7 years. Therefore, compared to two sets of power supplies 1 operating in current sharing mode to provide 50% of the load current and need to be replaced at the same time, parallel power supplies using the current scheduling method only need to replace one of the power supplies.

Please refer to Figure 6. Two sets of single-phase power supplies 1 can be connected in parallel to form a three-phase power supply device. If the layout of the two power supplies 1 is symmetrical, the three-phase balanced operation can be obtained when the input current is averaged, that is, Ia+Ib+ Ic=0. If the components of each power supply 1 are slightly different and the output current is equalized using the current sharing control law, the output power of the two power supplies 1 may be slightly different, resulting in unbalanced input three-phase. Unbalanced three-phase may lead to the saturation of the power distribution voltage transformer and the increase of harmonic current. At this time, the aforementioned current scheduling method can be used to use an AC voltage and current detection circuit inside the power supply 1 to send the detection information back to the current of the present invention. The scheduling device 100 adjusts the output currents of the two power supplies 1 so as to keep the input currents in three-phase balance.

C. Hanging current sharing mode:

When the drooping current sharing mode is enabled, the current sharing bus switch 22 is first turned off to make the first shunt current Iadj1=0. Since the first switch A1 is turned off, the control voltage VS2=0 and the second shunt current Iadj2=0. At this time, a sense current Isense can be generated after filtering according to the output current, inductor current or primary side current, and a control circuit generates a control voltage according to the sense current Isense, which is input to the voltage amplifier circuit 41 through the fourth switch B2 to make the voltage The output terminal of the amplifier circuit 41 generates a proportional droop control voltage Vdr. At this time, the relationship between the output voltage and the droop control voltage Vdr is as shown in (7) and (8) above, the difference is that the droop control voltage Vdr is directly generated by the sense current Isense.

Please refer to Figure 7, which is the droop characteristic diagram of the output voltage changing with the load current. If the maximum output voltage of the designed power supply 1 is Voai,max, the rated output voltage is V ^* oai, and the minimum output voltage is Voai,min, according to the aforementioned formulas (2) and (7), we can know:

$\mathrm{<span\; class="notranslate">\; Voai</span>}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; Vref</span>}}{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Vdr</span>}<span\; class="notranslate">\; \&times;</span>\frac{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Ioi</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Rds</span>}<span\; class="notranslate">\; \&times;</span>\frac{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 9</span>}<span\; class="notranslate">\; )</span>$

$\mathrm{<span\; class="notranslate">\; Voai</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; Vref</span>}}{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; whenIoi</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; )</span>$

$\mathrm{<span\; class="notranslate">\; Voai</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; min</span>}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; Vref</span>}}{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Vdr</span>}<span\; class="notranslate">\; \&times;</span>\frac{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Ioi</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Rds</span>}<span\; class="notranslate">\; \&times;</span>\frac{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; .</span>\mathrm{<span\; class="notranslate">\; for\; Ioi</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; Ioi</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}<span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 11</span>}<span\; class="notranslate">\; )</span>$

Then the output voltage variation: △Voai is:

$\mathrm{<span\; class="notranslate">\; \&Delta;Voai</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; Voai</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Voai</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; min</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; Vdr</span>}<span\; class="notranslate">\; \&times;</span>\frac{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Ioi</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Rds</span>}<span\; class="notranslate">\; \&times;</span>\frac{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 12</span>}<span\; class="notranslate">\; )</span>$

The effect of the second page on the right side of equation (12) is much smaller than the first term, so it can be ignored and becomes:

$\mathrm{<span\; class="notranslate">\; \&Delta;Voai</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; Voai</span>}<span\; class="notranslate">\; ,</span><span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Voai</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; min</span>}<span\; class="notranslate">\; \&cong;</span>\mathrm{<span\; class="notranslate">\; Vdr</span>}<span\; class="notranslate">\; \&times;</span>\frac{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}{\mathrm{<span\; class="notranslate">\; W</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 13</span>}<span\; class="notranslate">\; )</span>$

Therefore, when the output voltage variation △Voai is given, it can be derived according to (7) formula.

In addition to the aforementioned basic drooping current sharing mode, the present invention can also use the drooping current sharing mode and the output current scheduling mode at the same time, and the switch settings are:

Please refer to Figure 8, when two power supplies 1 are connected in parallel and both use the drooping current sharing mode, the output voltage and output current curves of the two power supplies 1 can be combined and expressed as a back-to-back characteristic curve, where the characteristic curves A and B Corresponding to the first power supply and the second power supply respectively, in the normal drooping current sharing mode, the two power supplies can share the load current equally, and respectively output equal currents I _O1 and I _O2 . If different energy requirements and operating efficiency are considered, the second shunt current Iadj2 of the first power supply can be further used for current scheduling, so that the characteristic curve can be shifted up to A', and the first power supply can provide more output current to the At this time, the output currents of the first and second power supplies become I _O11 and I _O22 , the output current I _O11 of the first power supply increases, and the output current I _O11 of the second power supply decreases, but the total output The current remains unchanged, that is, I _O1 +I _O2 =I _O11 +I _O22 , and the output voltage is also increased. Therefore, the drooping current sharing module and the current scheduling mode can be used comprehensively at the same time.

Please refer to FIG. 9 , which is a detailed circuit diagram of the second embodiment of the current scheduling device of the present invention. In the second embodiment, the current scheduling bypass circuit 30 and the drooping current equalization control circuit 40 are included. The microprocessor outputs a single PWM control signal and converts it into an analog control signal through a low-pass filter. The analog control signal A first control voltage and a second control voltage are formed through the two switches A1 and B1, and the first control voltage and the second control voltage are provided to the current regulation bypass circuit 30 and the drooping current equalization control circuit 40 respectively. The second embodiment can basically achieve the function of up-regulating and down-regulating the output voltage, and its circuit operation can refer to the above-mentioned first embodiment, and will not be repeated here.

Please refer to FIG. 10 , which is a detailed circuit diagram of the third embodiment of the current scheduling device of the present invention. This embodiment is similar to the second embodiment, except that the microprocessor itself outputs two independent PWM control signals PWM1 and PWM2, and the two PWM control signals PWM1 and PWM2 pass through the first filter and the second filter respectively to form the second filter. A control voltage and a second control voltage, and the output time of the first control voltage and the second control voltage can be independently determined by the microprocessor, so the switches A1 and B1 are not required in this embodiment.

Please refer to FIG. 11 , the drooping current sharing control circuit 40 further includes a drooping current sharing controller 42 , which can implement the drooping current sharing control mode in combination with the current regulation bypass circuit 30 with a voltage adjustment function.

In the above embodiments, the microprocessor itself has a built-in D/A conversion circuit, and the microprocessor can directly output the required analog control voltage without using a low-pass filter for D/A conversion.

Through the multi-mode current scheduling device of the present invention, the on/off status of each switch can be controlled according to the working requirements of the system, so that the multi-mode current scheduling device operates in an active current sharing mode, a drooping current sharing mode or an output current scheduling mode, providing Compound current control to maintain the power supply efficiency of the overall power supply system and reduce unnecessary power loss.

The specific embodiments described above have further described the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention and are not intended to limit the scope of the present invention. Protection scope, within the spirit and principles of the present invention, any modification, equivalent replacement, improvement, etc., shall be included in the protection scope of the present invention.

Claims (8)

1. A multi-mode current scheduler for controlling a dc/dc converter of a power supply, the multi-mode current scheduler comprising:

the switch is arranged at the output end of the direct current/direct current converter, wherein the output voltage of the direct current/direct current converter is defined as a switch front-end output voltage before passing through the switch, and is defined as a switch rear-end output voltage after passing through the switch;

a feedback circuit connected between the output and input of the switch, the feedback circuit comprising:

the internal feedback circuit comprises a first resistor and a second resistor which are connected in series, wherein the first end of the second resistor is connected with the output voltage of the front end of the switch, the series node of the first resistor and the second resistor is a feedback voltage division node, and the feedback voltage division node is provided with a feedback voltage division voltage;

the external feedback circuit comprises a far-end feedback resistor and a third resistor, wherein the first end of the far-end feedback resistor is connected with the output voltage at the rear end of the switch, the first end of the third resistor is connected with the second end of the far-end feedback resistor, and the second end of the third resistor is connected with the feedback voltage-dividing node;

a current-scheduling bypass circuit comprising a second diode and a second bypass amplifier circuit, wherein:

the anode of the second diode is connected with the second end of the far-end feedback resistor and the first end of the third resistor;

the output end of the second bypass amplifier circuit is connected with the cathode of the second diode, and the input end of the second bypass amplifier circuit receives a first control voltage;

a droop current-sharing control circuit, which comprises a fourth resistor and a voltage amplifier circuit;

one end of the fourth resistor is connected with the feedback voltage division node of the feedback circuit;

the output end of the voltage amplifier circuit is connected with the other end of the fourth resistor, and the input end of the voltage amplifier circuit receives a second control voltage, so that the voltage amplifier circuit can output a droop control voltage to be injected into the feedback circuit through the fourth resistor;

and the input end of the microprocessor is connected with the switch front-end output voltage, the switch rear-end output voltage and a communication interface, and the microprocessor can provide the first control voltage and the second control voltage.

2. The multi-mode current scheduler of claim 1, wherein the microprocessor outputs two independent control signals as the first control voltage and the second control voltage, respectively.

3. The multi-mode current scheduler of claim 1, wherein the microprocessor outputs a control signal and the control signal is converted into the first control voltage and the second control voltage through two switches.

4. The multi-mode current scheduler of any of claims 1-3, wherein the apparatus further comprises:

an active current sharing control circuit, comprising a first diode, a current sharing controller, a first bypass amplifier circuit and a current sharing bus switch, wherein:

the anode of the first diode is connected with the second end of the far-end feedback resistor and the first end of the third resistor;

the first bypass amplifier circuit is connected between the cathode of the first diode and an output control voltage of the current-sharing controller;

one end of the current-sharing bus switch is connected with the current-sharing controller, and the other end of the current-sharing bus switch is used for being connected with a current-sharing bus.

5. The multi-mode current scheduler of claim 4, wherein the droop current share control circuit further comprises:

and the droop current-sharing controller is connected with the input end of the voltage amplifier circuit, generates a droop current-sharing control signal according to a sensing current, and inputs the droop current-sharing control signal to the voltage amplifier so that the voltage amplifier circuit outputs a droop control voltage.

6. The multi-mode current scheduler of claim 2, wherein the two control signals output by the microprocessor pass through two low pass filters to become the first control voltage and the second control voltage, respectively.

7. The multi-mode current scheduler of claim 3, wherein the control signal output by the microprocessor passes through a low pass filter and then through the two switches.

8. The multi-mode current scheduler of claim 4, wherein the microprocessor is connected to the current share bus.