TW200938019A - Method for manufacturing printed circuit board with on-board resistive element - Google Patents

Method for manufacturing printed circuit board with on-board resistive element Download PDF

Info

Publication number
TW200938019A
TW200938019A TW97138728A TW97138728A TW200938019A TW 200938019 A TW200938019 A TW 200938019A TW 97138728 A TW97138728 A TW 97138728A TW 97138728 A TW97138728 A TW 97138728A TW 200938019 A TW200938019 A TW 200938019A
Authority
TW
Taiwan
Prior art keywords
resistive element
layer
thin film
resistor
metal thin
Prior art date
Application number
TW97138728A
Other languages
Chinese (zh)
Other versions
TWI429349B (en
Inventor
Fumihiko Matsuda
Original Assignee
Nippon Mektron Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Mektron Kk filed Critical Nippon Mektron Kk
Publication of TW200938019A publication Critical patent/TW200938019A/en
Application granted granted Critical
Publication of TWI429349B publication Critical patent/TWI429349B/en

Links

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

The present invention provides a method for manufacturing a resistor-embedded type printed distributing board stably with low cost. The resistor-embedded type printed distributing board can simultaneously realize the thickness reduction of resistor and superfine wiring pattern with high aspect ratio. The method for manufacturing a printed distributing board which is obtained through laminating an organic resin insulating layer (1) and a metal wiring layer (5) and is formed with resistor is characterized in that the surface of organic resin insulating layer (1) is formed with a metal film (3) which covers the organic resin insulating layer and is formed with the surface of resistor through printing and forming a film-shaped resistor (2). The metal wiring layer is formed through electrolyzing and plating while the metal film is taken as an electricity supplying layer.

Description

200938019 九、發明說明 【發明所屬之技術領域】 本發明係關於一種內藏電阻元件之印刷配線板的製造 方法。 . 【先前技術】 近年來,要求電子零件之安裝密度的提升、訊號頻率 0 的提升,並提高搭載在電子機器之印刷配線板的小型化· 高機能化的要求,而增加了將受動零件內藏在印刷配線板 內層之所謂零件內藏印刷配線板的必要性。 第3 A、3B圖係爲顯示習知的電阻元件內藏印刷配線 板之製造方法的剖面工程圖(參照專利文獻1 )。首先,如 第3A(1)圖所示,在聚醯亞胺等絕緣基板51的單面準備 具有銅箔層52之單面覆銅層疊板53。在此之銅箔層52 厚度係由於可以使在之後印刷碳糊時的印刷膜厚度偏差變 φ 小,並且能夠形成細微的電路圖案,因此銅厚度係因爲以 • 薄者爲佳而使用5μπι厚度者。 - 對於單面覆銅層疊板53,藉由利用感光蝕刻加工手 法的蝕刻,形成電阻電極52a及配線圖案52b。 其次,在電阻電極部52 a選擇性形成利用無電解銀電 鍍等貴金屬電鍍之表面處理層54,並且未形成在配線5 2b 之上。藉此,電阻的電極部係能夠確保對於之後形成的碳 糊與電極之間的高溫高濕試驗之耐性。 其次,在電極52a之上利用網版印刷,將片電阻値 -4- 200938019 50Ω之旭化學硏究所(股)製造的碳糊TU-50-8作爲構成電 阻的碳糊進行印刷,並藉由進行熱硬化形成電阻元件 55。之後,因應必要藉由形成焊料光阻層並施加表面處理 再進行外形加工’得到具有電阻元件之印刷配線板56。 第3Β(2)及(3)圖係爲根據印刷方向及電極配置變化上 . 述印刷時的電阻膜厚之模式圖。再者,第3Β(2)圖係顯示 在與印刷方向相同的方向配置電極之例子,在該情況下如 Q Α-Α'剖面所示,使電極間之電阻糊料厚度變薄。 一方面,第3Β(3)圖係顯示在對印刷方向旋轉90度 的方向配置電極之例子,在該情況下如Β-Β·剖面所示, 電極間的電阻糊料厚度係相對性變厚。由此可知,爲了減 低印刷時之厚度偏差,必須抑制電極的厚度。 記載於該專利文獻1之使用低溫煅燒型的電阻糊料之 印刷法,係有電阻糊料之片電阻値的選擇範圍廣泛,可形 成的電阻値之寬幅也廣泛的特徵。 ❹ 在使用低溫煅燒型的電阻糊料之情況下,雖然是利用 ' 網版印刷法形成電阻元件,但是根據在當時所印刷的元件 ' 形狀之偏差,要形成高精確度的電阻値之電阻元件係爲困 難的’在不能滿足被要求的電阻元件之精確度而使電阻値 爲低的情況下,藉由使用雷射等修整進行提高電阻値的調 整。 成爲利用該網版印刷之電阻元件的形狀偏差之要因, 可以得知與形成電阻元件處之電極配置方向與印刷方向有 關。雖然也根據電極形狀,但是由於形成電阻元件處之電 -5- 200938019 極厚度,也就是配線圖案的厚度爲厚,會使前述電阻元件 之厚度偏差變得更大。 就消除該點的方法而言可以舉出使配線圖案的厚度變 薄之方法。藉由將配線圖案的厚度變薄,也有能夠使可形 成的配線圖案之間距更加細微的效果。 . 一方面,當使配線圖案的厚度變薄時,會發生所謂配 線圖案之電阻値上昇的問題。當藉由配線圖案的薄膜化而 ❹ 使導體電阻値上昇時,不僅會增加電流流通時的發熱量, 由於配線圖案爲薄也使放熱性變差。又藉由使電流流通至 電阻元件而發熱,但是也有根據該熱能而使電阻値變動, 或是根據該熱能而使電路整體無法正常運作的情況》 由此可知,在配線圖案中尤其是電極部的導體係以具 有能夠確保放熱性的厚度爲佳。爲此,在設計上係無法提 升通電電流値,或是必須積極採用放熱構造等,就整體而 言成本變高。 〇 一方面,對於近年來高頻化的要求,係藉由電阻元件 內藏而能夠使1C與電阻的距離靠近,也有能夠減低寄生 - 電抗等的影響之優點。然而,當配線圖案變薄,使導體電 阻値提升時,則會增加傳送高頻訊號時的損失。 一般而言,雖然傳送損失係以介電體損失爲支配性考 量,但是因爲在達到數GHz範圍下也無法無視導體損 失,因此在電阻元件內藏基板中,配線圖案的厚度爲厚是 很重要的。 因此,如專利文獻2等所揭示,藉由將配線圖案轉印 -6- 200938019 到絕緣樹脂’可以一面減低由絕緣樹脂所露出的配線圖案 之厚度,一面確保實質上配線圖案的厚度。 然而’根據這樣的轉印之手法,係有配線圖案越高深 寬且細微的話,對絕緣樹脂的轉印就越困難之缺點。又當 將電流流通電阻元件時而發熱,但是因爲將熱傳導差的導 . 電性糊料用在與發熱的電阻元件接觸之電極材料,也會有 使放熱性變差的擔憂。 φ 進一步在專利文獻3等係記載將電阻糊料預先印刷在 絕緣基材’並在其兩端印刷導電性糊料形成電極部的手 法。藉由使用該手法,雖然可以電阻糊料的膜厚形成爲均 勻薄,但是因爲利用導電性糊料形成電極部,而有所謂決 定電阻元件的電阻値之重要參數,也就是電極間距離不穩 定的缺點。 [專利文獻1]日本特開2006-2221 10號公報 [專利文獻2]日本特開200 7-123940號公報 ❹ [專利文獻3]日本實開平6-62566號公報 - 【發明內容】 (發明所欲解決之課題) 結果,在習知之內藏電阻元件的印刷配線板之製造方 法中,要同時達成利用電阻糊料所形成的電阻元件薄膜化 與高深寬且細微的配線圖案爲困難的。由此等可以得知, 期待以低價又穩定製造可同時達成電阻元件厚度減低與高 深寬且細微的配線圖案之電阻元件內藏型印刷配線板的方 200938019 法。 然而,在習知之內藏電阻元件的印刷配線板之製造方 法中,要同時達成利用電阻糊料所形成的電阻元件薄膜化 與高深寬且細微的配線圖案爲困難的。 本發明係考慮上述觀點而開發出來的,並且以提供低 . 價又穩定製造可同時達成電阻元件厚度減低與高深寬且細 . 微的配線圖案之電阻元件內藏型印刷配線板的方法爲目 φ 的。 (解決課題之手段) 爲了達成上述目的,在本發明中, 係針對將電阻元件內藏在層疊有機樹脂絕緣層及金屬 配線層而構成的印刷配線板之印刷配線板的製造方法,其 特徵爲: 利用印刷在前述有機樹脂絕緣層表面形成膜狀的電阻 ❹ 元件, 形成覆蓋前述有機樹脂絕緣膜中之形成有前述電阻元 件的面之金屬薄膜, 將前述金屬薄膜作爲給電層並進行電解電鍍,而形成 前述金屬配線層。 (發明之效果) 根據此等特徵,本發明係達到以下的效果。 若是根據本發明,在具有電阻元件之印刷配線板的製 -8- 200938019 造方法中,因爲在沒有電極部等凹凸的基部絕緣材印刷形 成電阻元件,因此可以將元件形成爲均勻薄。其後,由於 在形成兼具氧化保護層與給電層的金屬薄膜後,再形成電 極及配線圖案,因此可以形成導體電阻値爲低,且在電阻 元件發熱時的放熱性也優之高密度電路。尤其是若是根據 半加性手法的話,可以形成高深寬且細微的配線圖案。 由此等可以得知,本發明能夠提供以低價又穩定製造 可同時達成電阻元件厚度減低與高深寬且細微的配線圖案 之電阻元件內藏型印刷配線板的方法。 【實施方式】 以下,參照添附圖面說明本發明之實施形態。 [實施例1] 第1圖係爲顯示本發明之實施例1的剖面工程圖,首 Q 先,如第1(1)圖所示,在沒露出於聚醯亞胺等絕緣基板1 ' 外部的一面,利用網版印刷法印刷片電阻値50Ω之旭化 - 學硏究所(股)製造的碳糊TU-50-8來作爲構成電阻元件2 的碳糊。 就網版圖樣而言,係使用網目數400,乳劑厚度 ΙΟμιη者。在該狀態下係因爲沒有電極部而形成爲對平坦 場所的印刷,因此使被印刷的碳糊之厚度偏差爲少’也幾 乎沒有由於電極配置及印刷方向之影響。 在用以形成該電阻元件2的碳糊印刷後’將基板固定 -9- 200938019 在2 mm厚度的鋁板(未圖示),利用遠紅外線回流爐在 100°C以上、200°C以下加熱60秒’並以尖峰溫度250°C/維 持時間1 0秒使其熱硬化後形成電阻元件2。在利用遠紅 外線回流爐進行電阻元件2的煅燒•熱硬化之際’當增加 到包含後續的層疊工程之一連串的製造工程中的最高溫度 . 時,可以使電阻元件2的耐熱性變良好。 又在印刷後,藉由利用箱型熱風烘箱進行1 7〇°C、60 0 分鐘的熱硬化也可以成電阻元件2。電阻元件2的尺寸係 構成爲與電極 2b之間的距離爲 〇.5mm ’印刷寬幅爲 1 ·0mm 者。 又,其後由於對利用該工程所形成的電阻元件2進行 定位,形成電極,因此在實際上除了作爲電阻元件2的機 能之外,也可以例如在基板端部的既定位置,利用碳糊同 時形成定位用的標記等。 在形成該電阻元件2之前,以穩定提高絕緣基板 〇 1(在此係爲聚醯亞胺)與電阻元件2(在此係爲碳糊)之密接 ' 性的目的,進行電漿處理或是電暈處理等之不會損傷絕緣 基板1的處理爲佳。 其次,如第1(2)圖所示,在包含已形成電阻元件2的 面之面,形成金屬薄膜3。金屬薄膜3係由於有作爲與之 後形成的電極部之界面的氧化保護層之機能,而且也有必 須作爲利用半加性手法形成配線圖案時之電解電鍍中的給 電用籽層之機能,因此金屬薄膜3的材料係必須爲能夠達 到與構成配線之金屬的選擇性蝕刻。 •10- 200938019 在此,假設利用銅形成配線圖案,並選擇鎳作爲有選 擇性蝕刻機能的金屬。除了鎳以外,鉻亦可以單體或是其 等的複數層而適用。就金屬薄膜3的厚度而言,係以Ιμιη 前後作爲無缺陷又可形成的最小厚度爲佳。當倂用濺鍍與 (電解或是無電解)電鍍而施予Ιμιη厚程度的電鑛作爲形成 . 手法時,就不會發生造成機能性問題的針孔。 _ 在形成該金屬薄膜之前,以穩定提高絕緣基板1(在 0 此係爲聚醯亞胺)、電阻元件2(在此係爲碳糊)與金屬薄膜 3之密接性的目的,進行常溫電漿處理等之不會損傷絕緣 基板1、電阻元件2的處理爲佳。 其次,如第1 (3 )圖所示,利用感光蝕刻加工手法形成 用以進行所謂半加性手法之電鍍光阻4,並使用其而形成 根據電解銅電鍍的配線圖案5。此時之電鍍光阻4厚度係 使用 20μιη厚的乾膜光阻,配線圖案5係形成爲15μπι 厚。 Q 接著,如第1(4)圖所示,剝離電鍍光阻4(未圖示), ' 並利用鎳與銅的選擇性飩刻手法除去金屬薄膜(未圖示)。 • 就該蝕刻液而言,係可以使用對於電阻元件2的材料及銅 之腐蝕性爲低,並選擇性鈾刻鎳的蝕刻液,例如包含過氧 化氫或硝酸的鈾刻液。又就電阻元件2的樹脂而言,雖然 有丙烯、環氧、苯酚等,但是因爲任何一者都有對於上述 藥液的耐性,因此可以使用電阻元件2作爲鈾刻遮罩。 藉由直到目前的工程,配線圖案5係構成爲被分離而 電性獨立者。由於厚度爲15μιη,因此導體電阻値爲低, -11 - 200938019 在電阻元件2發熱時的放熱性也高。當然因應用途,藉由 變更光阻的厚度或銅電鍍的厚度,可以控制導體電阻値或 放熱性。即使在用以得到高精確度的電阻値之雷射修整 時,該實施例1係因爲電阻元件2的膜厚爲均勻薄,因此 能夠穩定進行。 . 其後,因應必要藉由焊料光阻層的形成、施予表面處 . 理’並進行外形加工’得到有電阻元件的印刷配線板6。 ❹ [實施例2] 第2圖係爲顯示本發明之實施例2的工程剖面圖。在 該實施例2中,係如第2(1)圖所示,利用第1(2)圖形成金 屬薄膜3後,在金屬薄膜3上的整面形成全板電鍍層7, 其後如第2(2)圖所示,藉由一般的方法,利用根據減去工 法之蝕刻手法形成包含電極部之配線圖案。配線圖案的厚 度係因爲可以利用全板電鍍層7的厚度控制加以改變,因 φ 此能夠以期望的厚度形成配線圖案。 ' 進一步,在僅利用鎳構成金屬薄膜之情況下,由於在 • 配線圖案的蝕刻時也除去金屬薄膜,因此可以圖取工程的 簡略化。進一步,雖然未圖示,但是此兩者手法都可以利 用一般的方法內藏於多層印刷配線板。 【圖式簡單說明】 第1圖係爲顯示本發明之實施例1工程的槪念剖面 圖。 -12- 200938019 第2圖係爲顯示本發明之實施例2工程的槪念剖面 圖。 第3A圖係爲顯示習知工法的前視圖及剖面圖。 第3 B圖係爲顯示習知工法的前視圖及剖面圖。 【主要元件符號說明】 1 :絕緣基板 Q 2 :電阻元件 3 :金屬薄膜 4 :電鍍光阻 5 :配線圖案 6 :具有電阻元件之印刷配線板 7 :全板電鏟層 5 1 :絕緣基板 52 :銅箔 ❹ 5 2 a :電阻電極 ' 52b :配線圖案 • 53:單面覆銅層疊板 54 :表面處理層 5 5 :電阻元件 5 6 :根據習知方法之具有電阻元件的印刷配線板 -13-BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a printed wiring board incorporating a resistive element. [Prior Art] In recent years, the installation density of electronic components has been increased, the signal frequency has been increased by 0, and the requirements for miniaturization and high performance of printed wiring boards mounted on electronic equipment have been increased. The necessity of hiding a printed wiring board in a so-called part hidden in the inner layer of the printed wiring board. 3A and 3B are cross-sectional drawings showing a method of manufacturing a printed wiring board in a conventional resistive element (see Patent Document 1). First, as shown in Fig. 3A (1), a single-sided copper clad laminate 53 having a copper foil layer 52 is prepared on one surface of an insulating substrate 51 such as polyimide. Here, the thickness of the copper foil layer 52 is such that the thickness of the printed film when the carbon paste is printed later becomes smaller than φ, and a fine circuit pattern can be formed. Therefore, the thickness of the copper is preferably 5 μm thick because it is thin. By. - The single-sided copper clad laminate 53 is formed by etching by a photolithography process to form the resistive electrode 52a and the wiring pattern 52b. Next, a surface treatment layer 54 which is plated with a noble metal such as electroless silver plating is selectively formed on the resistance electrode portion 52a, and is not formed on the wiring 52b. Thereby, the electrode portion of the resistor can ensure the resistance to the high-temperature and high-humidity test between the carbon paste and the electrode which are formed later. Next, by using screen printing on the electrode 52a, a carbon paste TU-50-8 manufactured by Asahi Chemical Research Institute of the sheet resistance 値-4-200938019 50Ω is printed as a carbon paste constituting the resistor, and borrowed. The resistive element 55 is formed by performing thermal hardening. Thereafter, it is necessary to form a printed wiring board 56 having a resistive element by forming a solder resist layer and applying a surface treatment to perform external shape processing. The third (2) and (3) drawings are schematic diagrams showing the thickness of the resistive film at the time of printing according to the printing direction and the electrode arrangement. Further, the third (2) diagram shows an example in which electrodes are arranged in the same direction as the printing direction. In this case, as shown in the Q Α-Α' cross section, the thickness of the resistor paste between the electrodes is made thin. On the one hand, the third (3) diagram shows an example in which electrodes are arranged in a direction rotated by 90 degrees in the printing direction. In this case, as shown by the Β-Β· cross section, the thickness of the resistance paste between the electrodes is relatively thick. . From this, it is understood that in order to reduce the thickness variation at the time of printing, it is necessary to suppress the thickness of the electrode. The printing method using the low-temperature calcination type resistor paste described in Patent Document 1 has a wide selection range of the sheet resistance of the resistor paste, and the wide range of the resistor 値 which can be formed is also widely used. ❹ In the case of using a low-temperature calcination type resistor paste, although a resistive element is formed by the screen printing method, a high-accuracy resistor is formed according to the deviation of the shape of the element printed at that time. It is difficult to adjust the resistance 値 by trimming using laser or the like in the case where the accuracy of the required resistance element is not satisfied and the resistance 値 is low. As a factor of the shape deviation of the resistive element printed by the screen printing, it is known that the electrode arrangement direction at the position where the resistive element is formed is related to the printing direction. Although depending on the shape of the electrode, since the thickness of the electrode at the resistive element is formed, that is, the thickness of the wiring pattern is thick, the thickness deviation of the aforementioned resistive element becomes larger. As a method of eliminating this point, a method of making the thickness of the wiring pattern thin can be cited. By thinning the thickness of the wiring pattern, there is also an effect that the distance between the wiring patterns that can be formed can be made finer. On the other hand, when the thickness of the wiring pattern is made thin, the problem that the resistance 値 of the wiring pattern rises occurs. When the conductor resistance 値 is increased by the thinning of the wiring pattern, not only the amount of heat generated when the current flows, but also the heat dissipation property is deteriorated due to the thin wiring pattern. Further, heat is generated by causing a current to flow to the resistance element. However, the resistance 値 may be changed according to the thermal energy, or the entire circuit may not operate normally according to the thermal energy. Thus, it is understood that the wiring pattern is particularly an electrode portion. The conductive system preferably has a thickness capable of ensuring heat dissipation. For this reason, it is not possible to increase the energizing current 値 in design, or it is necessary to actively adopt an exothermic structure, and the cost is high as a whole.一方面 On the other hand, in recent years, the requirement for high frequency is that the distance between 1C and the resistor can be made close by the inclusion of the resistor element, and the influence of parasitic-reactance or the like can be reduced. However, when the wiring pattern is thinned and the conductor resistance is increased, the loss when transmitting the high frequency signal is increased. In general, although the transmission loss is dominated by dielectric loss, since it is impossible to ignore the conductor loss even in the range of several GHz, it is important that the thickness of the wiring pattern is thick in the built-in substrate of the resistive element. of. Therefore, as disclosed in Patent Document 2, it is possible to ensure the thickness of the wiring pattern substantially while reducing the thickness of the wiring pattern exposed by the insulating resin by transferring the wiring pattern -6-200938019 to the insulating resin. However, according to such a transfer method, the higher the wiring pattern is, the wider and the finer the wiring pattern is, the more difficult it is to transfer the insulating resin. Further, when a current flows through the resistance element, heat is generated. However, since the conductive paste having poor heat conduction is used for the electrode material that is in contact with the heat-generating resistor element, there is a concern that the heat radiation property is deteriorated. Further, in Patent Document 3, a method of printing a resistor paste in advance on an insulating substrate ′ and printing a conductive paste on both ends thereof to form an electrode portion is described. By using this method, although the film thickness of the resistor paste can be formed to be uniform and thin, since the electrode portion is formed by the conductive paste, there is an important parameter for determining the resistance 电阻 of the resistance element, that is, the distance between the electrodes is unstable. Shortcomings. [Patent Document 1] Japanese Laid-Open Patent Publication No. Hei. No. Hei. No. Hei. No. Hei. No. Hei. [Problem to be Solved] As a result, in the method of manufacturing a printed wiring board in which a resistive element is conventionally known, it is difficult to simultaneously achieve a thinning of a resistive element formed by a resistor paste and a high-depth and fine wiring pattern. As a result, it has been found that it is expected to manufacture a resistive element-embedded printed wiring board capable of simultaneously achieving a reduction in thickness of a resistor element and a high-depth and fine wiring pattern at a low cost. However, in the conventional method of manufacturing a printed wiring board in which a resistive element is incorporated, it is difficult to simultaneously achieve thinning of a resistive element formed by a resistor paste and a high-depth and fine wiring pattern. The present invention has been developed in consideration of the above-mentioned viewpoints, and is a method of providing a low-cost and stable manufacturing of a resistive element built-in printed wiring board capable of simultaneously achieving a reduction in thickness of a resistive element and a high-depth and fine wiring pattern. φ. (Means for Solving the Problem) In the present invention, a method of manufacturing a printed wiring board in which a resistive element is incorporated in a printed wiring board in which an organic resin insulating layer and a metal wiring layer are laminated is characterized in that A metal thin film covering a surface on which the resistive element is formed in the organic resin insulating film is formed by forming a film-shaped resistor 元件 element printed on the surface of the organic resin insulating layer, and the metal thin film is used as an electric layer and electrolytically plated. The aforementioned metal wiring layer is formed. (Effects of the Invention) According to these features, the present invention achieves the following effects. According to the invention, in the method of manufacturing a printed wiring board having a resistive element, in the method of manufacturing a printed wiring board having a resistive element, since the resistive element is printed on the base insulating material having no irregularities such as electrode portions, the element can be formed to be uniform and thin. Thereafter, since the electrode and the wiring pattern are formed after forming the metal thin film having both the oxidation protective layer and the power supply layer, it is possible to form a high-density circuit in which the conductor resistance is low and the heat dissipation property of the resistance element is high. . In particular, if it is based on a semi-additive technique, a high-depth and fine wiring pattern can be formed. As can be seen from the above, the present invention can provide a method of manufacturing a resistive element-embedded printed wiring board which can simultaneously achieve a low-width and wide-width wiring pattern with a reduced thickness of a resistor element at a low cost. [Embodiment] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. [Embodiment 1] Fig. 1 is a cross-sectional view showing a first embodiment of the present invention, the first Q first, as shown in Fig. 1 (1), is not exposed to an insulating substrate 1' such as polyimide. On the other hand, a carbon paste TU-50-8 manufactured by Asahi Kasei Co., Ltd., which is a chip resistor of 50 Ω, is used as a carbon paste constituting the resistive element 2 by a screen printing method. For the screen pattern, the mesh number 400 and the emulsion thickness ΙΟμιη are used. In this state, since the printing is performed on the flat place without the electrode portion, the thickness variation of the carbon paste to be printed is made small, and there is almost no influence by the electrode arrangement and the printing direction. After the carbon paste for forming the resistive element 2 is printed, the substrate is fixed -9-200938019 in an aluminum plate (not shown) having a thickness of 2 mm, and heated at 100 ° C or higher and 200 ° C or lower by using a far-infrared reflow furnace. The resistor element 2 is formed after being thermo-hardened at a peak temperature of 250 ° C / a holding time of 10 seconds. When the calcination and thermal hardening of the resistive element 2 are performed by the far-infrared reflow furnace, the heat resistance of the resistive element 2 can be improved when it is increased to the highest temperature in the manufacturing process including one of the subsequent lamination processes. Further, after printing, the resistive element 2 can be formed by thermal hardening at 1 7 ° C for 60 minutes using a box type hot air oven. The size of the resistive element 2 is such that the distance from the electrode 2b is 〇.5 mm 'printing width is 1 · 0 mm. Further, since the electrode is formed by positioning the resistive element 2 formed by the above-described process, in fact, in addition to the function as the resistive element 2, for example, at the predetermined position of the end portion of the substrate, the carbon paste can be simultaneously used. A mark or the like for positioning is formed. Before the formation of the resistive element 2, the plasma treatment is performed for the purpose of stably improving the adhesion between the insulating substrate 〇1 (here, the polyimine) and the resistive element 2 (here, the carbon paste). It is preferable that the treatment such as corona treatment does not damage the insulating substrate 1. Next, as shown in Fig. 1 (2), the metal thin film 3 is formed on the surface including the surface on which the resistive element 2 has been formed. The metal thin film 3 has a function as an oxidative protective layer at the interface with the electrode portion to be formed later, and also has a function as a feed seed layer in electrolytic plating when a wiring pattern is formed by a semi-additive method, and thus the metal thin film The material of 3 must be a selective etch that can reach the metal that constitutes the wiring. • 10-200938019 Here, it is assumed that a wiring pattern is formed using copper, and nickel is selected as a metal having a selective etching function. In addition to nickel, chromium can also be used as a monomer or a plurality of layers thereof. As for the thickness of the metal thin film 3, it is preferable to use a minimum thickness of Ιμιη as a defect-free and formable. When 倂 ι ι ( 溅 ( ( ( ( ( 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 _ Before the formation of the metal thin film, the room temperature is stabilized for the purpose of stably improving the adhesion between the insulating substrate 1 (the polyimine in this case) and the resistive element 2 (here, the carbon paste) and the metal thin film 3 It is preferable that the treatment such as the slurry treatment does not damage the insulating substrate 1 and the resistive element 2. Next, as shown in Fig. 1 (3), a plating resist 4 for performing a so-called semi-additive method is formed by a photosensitive etching process, and a wiring pattern 5 according to electrolytic copper plating is formed using the same. At this time, the thickness of the plating resist 4 was 20 μm thick dry film photoresist, and the wiring pattern 5 was formed to be 15 μm thick. Q Next, as shown in Fig. 1 (4), the plating resist 4 (not shown) is peeled off, and the metal thin film (not shown) is removed by selective etching of nickel and copper. • For the etching liquid, an etching liquid having a low corrosiveness to the material of the resistive element 2 and copper and selectively etching nickel, for example, an uranium engraving liquid containing hydrogen peroxide or nitric acid can be used. Further, in the case of the resin of the resistor element 2, although propylene, epoxy, phenol or the like is present, since either one has resistance to the above-mentioned chemical liquid, the resistive element 2 can be used as the uranium engraved mask. The wiring pattern 5 is configured to be separated and electrically independent by the current work. Since the thickness is 15 μm, the conductor resistance 値 is low, and -11 - 200938019 is also high in heat dissipation when the resistive element 2 generates heat. Of course, depending on the application, the resistance of the conductor or the heat release property can be controlled by changing the thickness of the photoresist or the thickness of the copper plating. Even in the case of laser trimming for obtaining a high-accuracy resistor 该, this embodiment 1 can be stably performed because the film thickness of the resistive element 2 is uniform and thin. Then, the printed wiring board 6 having the resistive element is obtained by the formation of the solder resist layer, the application of the surface, and the outer shape processing.实施 [Embodiment 2] Fig. 2 is a cross-sectional view showing the structure of Embodiment 2 of the present invention. In the second embodiment, as shown in the second (1) diagram, after the metal thin film 3 is formed by the first (2) pattern, the entire plate plating layer 7 is formed on the entire surface of the metal thin film 3, and thereafter As shown in Fig. 2(2), the wiring pattern including the electrode portion is formed by an etching method according to the subtractive method by a general method. The thickness of the wiring pattern can be changed by the thickness control of the full-plate plating layer 7, because the wiring pattern can be formed with a desired thickness. Further, in the case where the metal thin film is formed only of nickel, since the metal thin film is removed during the etching of the wiring pattern, the simplification of the drawing can be performed. Further, although not shown, both methods can be incorporated in a multilayer printed wiring board by a general method. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view showing the construction of the first embodiment of the present invention. -12- 200938019 Fig. 2 is a cross-sectional view showing the construction of the second embodiment of the present invention. Figure 3A is a front view and a cross-sectional view showing a conventional method. Figure 3B is a front view and a cross-sectional view showing a conventional method. [Explanation of main component symbols] 1 : Insulating substrate Q 2 : Resistive element 3 : Metal thin film 4 : Plating photoresist 5 : Wiring pattern 6 : Printed wiring board having a resistive element 7 : Full-plate electric shovel layer 5 1 : Insulating substrate 52 : Copper foil ❹ 5 2 a : Resistance electrode ' 52b : Wiring pattern • 53 : Single-sided copper clad laminate 54 : Surface treatment layer 5 5 : Resistive element 5 6 : Printed wiring board with resistive element according to a conventional method - 13-

Claims (1)

200938019 十、申請專利範園 1 · 一種內藏電阻元件的印刷配線板之製造方法,係 針對在層疊有機樹脂絕緣層及金屬配線層而構成的印刷配 線板’內藏電阻元件之印刷配線板的製造方法,其特徵 爲· . 利用印刷在前述有機樹脂絕緣層表面形成膜狀的電阻 元件; 0 形成覆蓋前述有機樹脂絕緣層中之形成有前述電阻元 件的面之金屬薄膜; 將前述金屬薄膜作爲給電層進行電解電鍍形成前述金 屬配線層。 2 ·如申請專利範圍第1項之內藏電阻元件的印刷配 線板之製造方法,其中, 在前述金屬薄膜上形成電鍍光阻; 使用前述電鍍光阻,將前述金屬薄膜作爲給電層並進 〇 行電解電鍍,而在前述金屬配線層形成圖案; ' 剝離前述電鍍光阻,並除去前述金屬配線層間之露出 * 部份的前述金屬薄膜而形成與前述電阻元件連接之一對電 極及配線圖案。 3 ·如申請專利範圍第1項之內藏電阻元件的印刷配 線板之製造方法,其中, 將前述金屬薄膜作爲給電層進行電解電鍍而全面形成 前述金屬配線層; 在前述金屬配線層上形成蝕刻光阻; -14- 200938019200938019 X. Patent application 1 1. A method of manufacturing a printed wiring board having a built-in resistive element is a printed wiring board in which a resistive element is embedded in a printed wiring board formed by laminating an organic resin insulating layer and a metal wiring layer a manufacturing method characterized by: forming a film-shaped resistive element on the surface of the organic resin insulating layer by printing; 0 forming a metal thin film covering a surface of the organic resin insulating layer on which the resistive element is formed; and using the metal thin film as The electric layer is electrolytically plated to form the aforementioned metal wiring layer. 2. The method of manufacturing a printed wiring board having a built-in resistive element according to the first aspect of the invention, wherein a plating resist is formed on the metal thin film; and the metal thin film is used as a power feeding layer by using the plating resist; Electroplating is performed to form a pattern on the metal wiring layer; 'the plating resist is peeled off, and the metal thin film in the exposed portion of the metal wiring layer is removed to form a counter electrode and a wiring pattern connected to the resistive element. 3. The method of manufacturing a printed wiring board having a built-in resistive element according to the first aspect of the invention, wherein the metal thin film is electrolytically plated as a power supply layer to form the metal wiring layer; and etching is formed on the metal wiring layer. Photoresist; -14- 200938019 對前述金屬配線層及前述金屬薄膜進行蝕刻而形成前 述一對電極及配線圖案。 4.如申請專利範圍第1項之內藏電阻元件的印刷配 線板之製造方法,其中,前述金屬薄膜係利用鎳形成者。 -15-The metal wiring layer and the metal thin film are etched to form a pair of electrodes and a wiring pattern. 4. The method of producing a printed wiring board having a built-in resistive element according to the first aspect of the invention, wherein the metal thin film is formed of nickel. -15-
TW97138728A 2007-10-25 2008-10-08 A manufacturing method of a printed wiring board incorporating a resistive element TWI429349B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007277795A JP4943293B2 (en) 2007-10-25 2007-10-25 Method for manufacturing printed wiring board incorporating resistance element

Publications (2)

Publication Number Publication Date
TW200938019A true TW200938019A (en) 2009-09-01
TWI429349B TWI429349B (en) 2014-03-01

Family

ID=40616603

Family Applications (1)

Application Number Title Priority Date Filing Date
TW97138728A TWI429349B (en) 2007-10-25 2008-10-08 A manufacturing method of a printed wiring board incorporating a resistive element

Country Status (3)

Country Link
JP (1) JP4943293B2 (en)
CN (1) CN101426336B (en)
TW (1) TWI429349B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102573301B (en) * 2010-12-23 2014-08-27 北大方正集团有限公司 Method for making grooves on circuit board and circuit board
CN107466157A (en) * 2017-06-20 2017-12-12 深圳崇达多层线路板有限公司 A kind of method buried baffle-wall and baffle-wall making printed wiring board is buried using this

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6079798A (en) * 1983-10-06 1985-05-07 三洋電機株式会社 Resin circuit board
JPS61185995A (en) * 1985-02-13 1986-08-19 三菱電機株式会社 Making of circuit board with resistor
JPH0680880B2 (en) * 1988-03-15 1994-10-12 松下電工株式会社 Manufacturing method of ceramic circuit board with resistor
JPH0682909B2 (en) * 1988-06-27 1994-10-19 松下電工株式会社 Method for manufacturing ceramic circuit board with resistor
JPH0682908B2 (en) * 1988-06-27 1994-10-19 松下電工株式会社 Method for manufacturing ceramic circuit board with resistor
JP4069787B2 (en) * 2003-04-04 2008-04-02 株式会社デンソー Multilayer substrate and manufacturing method thereof
CN101048036B (en) * 2006-03-30 2010-05-12 财团法人工业技术研究院 Built-in film risitance and its manufacturing method, multi-layer substrate

Also Published As

Publication number Publication date
CN101426336A (en) 2009-05-06
TWI429349B (en) 2014-03-01
JP2009105323A (en) 2009-05-14
CN101426336B (en) 2011-07-27
JP4943293B2 (en) 2012-05-30

Similar Documents

Publication Publication Date Title
TWI569699B (en) Printed circuit board and method for manufacturing the same
TWI621388B (en) Method for manufacturing multilayer printed wiring board and multilayer printed wiring board
CN101188905B (en) Method of producing printed circuit board incorporating resistance element
TW200810657A (en) Method for manufacturing multilayer printed wiring board
TW201427499A (en) Flexible circuit board and method for manufacturing same
TW200917924A (en) Method for manufacturing multilayer printed-wiring board
TW200906264A (en) Method of producing printed circuit board incorporating resistance element
TWI429349B (en) A manufacturing method of a printed wiring board incorporating a resistive element
US8142597B2 (en) Method for manufacturing a printed-wiring board having a resistive element
JP2010016061A (en) Printed wiring board, and manufacturing method therefor
JP4123637B2 (en) Film carrier manufacturing method
TW201946074A (en) Method for producing wiring substrate
TW201446099A (en) Method for manufacturing printed circuit board
JP2004134467A (en) Multilayered wiring board, material for it, and method of manufacturing it
JP4701853B2 (en) Multi-layer wiring board with built-in resistance element and resistance value adjustment method for the resistance element
CN210405831U (en) Multilayer PCB board
JP2007027238A (en) Resistive element and multilayer wiring board incorporating the same, and method of adjusting resistance value of resistive element
JP4626282B2 (en) Manufacturing method of resistance element built-in substrate
JP2007042716A (en) Wiring circuit board with built-in resistive element and its manufacturing method
JP3858765B2 (en) Film carrier and manufacturing method thereof
KR20120026848A (en) The flexible printed circuit board and the method for manufacturing the same
JP2012231159A (en) Printed wiring board and manufacturing method thereof
JP2007066955A (en) Resistive element incorporated in wiring board and its production process
JP2006156631A (en) Wiring board with resistive element, and its manufacturing method
JPH06244549A (en) Manufacture of circuit board