TW200935624A - Light emitting diode device and fabricating method thereof - Google Patents

Light emitting diode device and fabricating method thereof

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Publication number
TW200935624A
TW200935624A TW97105344A TW97105344A TW200935624A TW 200935624 A TW200935624 A TW 200935624A TW 97105344 A TW97105344 A TW 97105344A TW 97105344 A TW97105344 A TW 97105344A TW 200935624 A TW200935624 A TW 200935624A
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Taiwan
Prior art keywords
electrode
semiconductor
substrate
emitting diode
light
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TW97105344A
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Chinese (zh)
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TWI364856B (en
Inventor
Yu-Ju Hsu
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Innolux Display Corp
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Priority to TW97105344A priority Critical patent/TWI364856B/en
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Publication of TWI364856B publication Critical patent/TWI364856B/en

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Abstract

The present invention relates to a light emitting diode (LED) device and a fabricating method thereof. The LED device includes an LED chip and a thermoelectric cooling device. The LED chip includes a substrate and a semiconductor layer provided on the substrate. The thermoelectric cooling device is directly formed at the side of the substrate away from the semiconductor layer.

Description

200935624 .九、發明說明: .【發明所屬之技術領域】 本發明係關於一種發光二極體裝置及其製程。 【先前技術】 發光二極體(Light Emitting Diode, LED)由於具有體積 小、響應快、亮度高、壽命長及發光穩定等優點,已廣泛應 用於顯示裝置及光讀寫裝置中。當發光二極體工作時,其產 ❹生之能量大約20%以光能形式導出,而80%以熱能形式導 出。該熱能將導致發光二極體溫度上升,影響發光效率並減 少元件哥命。 傳統解決方法係採用一散熱器、一致冷晶片 (Thermoelectric cooler,TE cooler)或二者相結合,藉由黏合 或焊接之方式與該發光二極體組裝,對該發光二極體致冷散 熱。致冷晶片由於具有致冷速度快、體積小、無污染、溫度 控制準確度高等優點,逐步取代其他散熱組件,更廣泛應用 ❹於發光^一極體致冷散熱。 該致冷晶片包括-第-基板、—與該第—基板相對設置 之第二基板。該發光二極體與該致冷晶片之第一基板藉由一 黏合材質相黏合固該散熱器亦藉由—黏合材質黏^固定 於該致冷晶片之第二基板。 當施加一預定電流時’該發光二極體發光並產生教量 該,量藉由該致冷晶片吸收並傳導至該散熱器,再藉由則 熱益釋放,從而使得該發光二極體之溫度降低。 惟,當該發光二極體工作時,該黏合處或焊接處會影与 200935624 導熱效率’且黏合或焊接之方式導致組裝過程複雜及製造成 本上升。3 ’該致冷晶片之二基板亦影響導熱效率,從而導 致該發光二極體散熱效果不佳。 【發明内容】 有鑑於此’提供—種散熱絲較隹、成本較低之發光二 極體裝置實為必要。 x 有鑑於此,提供-種上述發光二極體裝置之製程亦為必 要。 -種發光二極體裝置,其包括一發光二極體蠢晶片及一 致冷晶片。該發光二極體磊晶片包括一基板及一設置於城 板表面之半導體層。該致冷晶片直接形成於該基板遠離料 導體層之表面。 -種發光二極體裝置,其包括一發光二極體蟲晶片及一 致冷晶片,該發光二極體遙晶片包括一基板及—設置於職 板表面之半導體層。該致冷晶片之冷端直接吸收該發光二ς ◎體磊晶片產生之熱量,並傳導至熱端。 -種發光二極體裝置之製程’其包括如下步驟:提供一 基板’於該基板上形成一半導體層;於該基板遠離該半導體 層之表面直接形成致冷晶片;提供一散熱器,並與該致冷晶 片黏合固定。 相較於先前技術,本發明發光二極體裝置之致冷晶 接形成於該發光二極體蟲晶片之基板表面,省去該致冷晶片 之二基板,如此不僅可大幅提昇散熱效率,同時亦節 與組裝成本。該發光二極體裝置之製程將該致冷晶片直接形 200935624 •成於該發光二極體磊晶片之基板表面,不需藉由黏合或焊接 •方式連接至該發光二極體磊晶片,從而大幅提昇該發光二極 體裝置之散熱效率。 【實施方式】 請參閱圖1,係本發明發光二極體裝置之第一實施方式 之側面結構不意圖。該發光二極體裝置2包括一發光二極體 磊晶片21、一致冷晶片22及一散熱器23。該致冷晶片22 直接形成於該發光二極體磊晶片21之表面。該散熱器23設 置於该致冷晶片22之遠離該發光二極體磊晶片2丨之表面。 該發光二極體磊晶片21包括一基板211及一半導I#声 犯。該半導體層犯設置於該基板211之表面。該+基 係絕緣基板,其材質係藍寶石(Sapphire)或矽(Si)。 該致冷晶片22包括複數第一電極223a、一絕緣層(圖未 示)、複數第二電極223b、複數P型半導體晶粒224及複數 N型半導體晶粒225。該第一電極223a設置於該基板211之 ❹遠離該半導體層212之表面。該絕緣層設置於該散熱器23 罪近該致冷晶片22之表面。該第二電極223b設置於該絕緣 層之表面,且與該第一電極223 a相對交錯排列設置。每一 該P型半導體晶粒224與該N型半導體晶粒225相互交替間 隔β又置,且夾於该第一電極223a及第二電極223b之間。 母一 5亥P型半導體晶粒224與N型半導體晶粒225之靠 近忒發光二極體磊晶片21之一端定義為冷端,每一該p型 半導體晶粒224與N型半導體晶粒225之靠近該散熱器23 之一端定義為熱端。每一該P型半導體晶粒224設置於該二 200935624 ‘ N型半導體晶粒225之間,該p型半導體晶粒224與—n型 •半導體晶粒225之冷端藉由一第一電極223&電性連接。該p 型半=體晶粒224與另—N型半導體晶粒225之熱端藉由一 第-电極223b電性連接,從而使得複數該p型半導體晶粒 224及複數n型半導體晶粒225相互電性串聯連接。當該發 光二極體裝置2被施加—預定電流時,該致冷晶片22之冷 端吸=錢光二極體蟲晶片21產生之熱量,並將熱量傳導 至熱端。該熱I於熱端藉由該散熱器23及時釋放,從而使 知 δ亥發光二極體磊晶片21之溫度降低。 明麥閱圖2,係圖丨所示發光二極體裝置2之製程圖, 其包括如下步驟: 乂驟81·提供一基板,於該基板表面形成一半導體層; 明併參閱圖3,提供—基板211。該基板211係絕緣 土板’其材質係藍寶石或石夕。於該基板211表面藉由蟲晶技 術形成一半導體層212。 ° 步驟S2:於該基板211遠離該半導體層212之表面直接 形成致冷晶片; 明併參閱圖4,於該基板211之遠離該半導體層212 _面'儿積形成複數第一電極223a。複數該第一電極223a 間隔排列。 藉由電鑄技術於每一該第一電極223a上形成間隔設置 、…P型半導體晶粒224及_ N型半導體晶粒225 ^該p型 j 晶粒224及N型半導體晶粒225之靠近該基板211之 —端藉由該第一電極223a電性連接。 200935624 - 於該基板211 '複數第一電極223a、複數P型半導體日曰 .粒似及複數N型半導體晶粒奶表面沉積一光阻層(圖: 不)’提供一光罩對該光阻層進行曝光顯影形成一預定之光 阻圖案。於複數該P型半導體晶粒224、複數N型半導體晶 粒225及剩餘光阻上沉積一導電金屬層,__餘光^ 其上之導電金屬層,形成複數第二電極咖。該第二電極 223b與該第-電極223a相對交錯排列設置。該第二電極 223b與該第一電極223a分別電性連接該半導體晶粒以、 225之兩端’從而使得該半導體晶粒224、225相互電性串聯 連接。於該第二電極223b表面沉積一絕緣層(圖未示)。 乂驟33.提供一散熱器,並與該致冷晶片黏合固定。 刀請一併參閱圖5,提供一散熱器23,該散熱器23與該 絶緣層相黏合ϋ定。從而職冷晶片22之 23相連接。該發光二 a 狀…g 該散熱器23釋放。體猫曰曰片21發出之熱量於熱端藉由 〇 相較於先前技術,本發明發光二極體裝置2之致冷晶片 =藉由電鑄技術直接形成於該發光二極體蠢晶片21之基板 ^表面’不需藉由黏合材質或焊接之組裂方式,同時亦省 :::冷晶片22之二基板’如此不僅可大幅提昇散熱效率, 同日π亦降低製造與組裝成本。 裝置3包括一第一電極323a及一第 請參_6,係本發明發光二極體裝置第二實施方式之 :面結構示意圖。該發光二極體農置3與第—實施方式之發 ^體裝置2大致相同’其主要區別在於:該發光二極體 極323b。該第 10 200935624 極323a設置於該基板311遠離該半導體層(未標示 該第二電極323b設置於該散熱器(未標示)之表丁面。複數面導 體晶粒324間隔排列並夾於該第_ 々 323b之間。該半導體晶粒324係類型相同之半^及體第日^電, Ο 晶粒或Ν型半導體晶粒。該半導體㈣3二 =電極咖及第二電極伽保持電性並聯連接。 編二極體裝置3之製程與第一實施方式之發光二極體穿 ::之製程大致相同,其主要區別在於:於基板3n遠離該 丰導體層之表面沉積-第一電極323a ’於該第一電極咖 上形成複數間隔排列且類型相同之半導體晶粒324。再於該 半導體晶粒324上沉積—第二電極伽,使得複數該半導體 晶粒324電性並聯連接。 請參閱圖7,係本發明發光二極體褒置第三實施方式之 側面結構示意圖。該發光二極體裝置4與第—實施方式之發 光二極體裝置2大致相同’其主要區別在於:該發光二極體 ❹裝置4之發光二極體蟲晶片41之基板4im系導電基板,其 材質係碳化邦iC)。該發光二極體裝置4進__步包括一設置 於4基板41/表面之絕緣層416及複數間隔設置於該絕緣層 416表面之第-電極423a。每—該p型半導體晶粒424與該 N型半導體晶粒相互交替設置,且夾於該第一電極423a及 第二電極423b之間,並保持電性串聯連接。該發光二極體 裝置4之衣&與第—實施方式之發光二極體裝置2之製程大 致相同’其主要區別在於:提供一基板4u,該基板4ΐι係 導電基板。於4基板411表面形成—絕緣層416,並於該絕 200935624 *緣層416形成複數間隔排列之第—電極423a。 • 請參閱圖8,係本發明發光二極體裝置第四實施方式之 側面結構示意圖。該發光二極體裝置5與第二實施方式之發 光二極體裝置3大致相同,其主要區別在於:該發光二極體 裝置5之發光一極體磊晶片(未標示)之基板“I係導電基 板,其材質係碳切。該基板511表面設置有減間隔排列 且類型,同之半導體晶粒524。該發光二極體裝置5之製程 與第二實施方式之發光二極體裝置3之製程大致相同,其主 要區別在於:該半導體晶粒524係直接形成於該基板5ιι之 表面。 凊參閱圖9,係本發明發光二極體裝置第五實施方式之 底面結構示意圖。該發光二極體裝置6與第四實施方式之發 光二極體裝置5大致相同’其主要區別在^ :該發光二極體 裝置6包括没置於基板(圖未示)表面之一絕緣層Gw及一矩 形導電塊617。該矩形導電塊617位於該基板中心位置,其 ❹匕括垂直j基板之四側面(圖未示)。該絕緣層616覆蓋該基 板之該矩形導電塊617之外圍區域。該絕緣層616表面設置 有複數間隔排列且類型相同之半導體晶粒624。該半導體晶 粒624之一端連接至該四側面,藉由該矩形導電塊Μ?電性 $接’定義該端為冷端。另—端藉由一電極623電性連接, 一義亥鳊為熱鳊。δ亥散熱器(圖未示)與該熱端相連接。該發 光1極體裝置6之製程與第四實施方式之發光二極體裝置$ 之製私大致相同,其主要區別在於:於該基板表面中心位置 形成一矩形導電塊並於該基板及矩形導電塊617表面沉 12 200935624 積一絕緣層616。於該絕緣層6】6表面形成複數間隔排列之 半導體晶粒624 ’且該半導體晶粒624之一端連接至該四側 面。於該半導體晶粒624之另一端沉積一電極623,從而該 半導體晶粒624電性並聯連接。 综上所述,本發明確已符合發明專利之要件,爰依法提 出專利申請。惟,以上所述者僅為本發明之較佳實施方式, 本發明之範圍並不以上述實施方式為限,舉凡熟悉本案技藝 之人士援依本發明之精神所作之等效修飾或變化,皆應涵苗 ❹於以下中請專利範圍内。 〜 【圖式簡單說明】 圖1係本發明發光二極體裝置第一眚 立 肢衣罝又弟貫她方式之側面結構示 意圖。 圖2係圖1發光二極體裝置製程之流程圖。 圖3至^係圖2所示發光二極體裝置之各製程步驟之結 不意圖0 ❹ 圖6係本發明發光二極體 意圖。 茫置之第—貝%方式之側面結構 意圖 圖7係本發明發光二極體裝置之第三實施方式之側面結構示 圖 係本發明發光二極體梦 意圖。 衫置之第四貫施方式之側面結構示 圖9係本發明發光二極體裝 不 意圖。 方式之底面結構 【主要元件符號說明】 13 200935624 , 發光二極體裝置 ^ 基板 發光二極體蟲晶片 致冷晶片 散熱片 半導體層 第一電極 第二電極 ® p型半導體晶粒 N型半導體晶粒 半導體晶粒 絕緣層 矩形導電塊 電極 2、3、4、5、6 11 ' 311 ' 411 ' 511 21、41 22 23 212 、 412 223a 、 323a 、 423a 223b、323b、423b 224 ' 424 225 ' 425 324、524、624 416 ' 616 617 623200935624. Nine, invention description: [Technical field to which the invention pertains] The present invention relates to a light-emitting diode device and a process thereof. [Prior Art] Light Emitting Diode (LED) has been widely used in display devices and optical read/write devices due to its small size, fast response, high brightness, long life and stable illumination. When the light-emitting diode is operated, about 20% of its produced energy is derived in the form of light energy, and 80% is derived as heat. This thermal energy will cause the temperature of the light-emitting diode to rise, affecting the luminous efficiency and reducing the component life. The conventional solution uses a heat sink, a thermo cooler (TE cooler), or a combination of the two, and is assembled with the light-emitting diode by bonding or soldering to cool the light-emitting diode. Due to its advantages of fast cooling speed, small volume, no pollution, and high temperature control accuracy, the cryogenic wafer gradually replaces other heat-dissipating components, and is more widely used for cooling and cooling. The refrigerated wafer includes a -th substrate, and a second substrate disposed opposite the first substrate. The light emitting diode and the first substrate of the cooling chip are bonded by a bonding material, and the heat sink is also adhered to the second substrate of the cooling chip by an adhesive material. When a predetermined current is applied, the light emitting diode emits light and generates a quantity, and the amount is absorbed by the cold film and transmitted to the heat sink, and then released by heat, thereby causing the light emitting diode to be The temperature is lowered. However, when the light-emitting diode is in operation, the bond or weld will affect the thermal conductivity of 200935624 and the manner of bonding or welding causes the assembly process to be complicated and the manufacturing cost to rise. 3' The two substrates of the cooled wafer also affect the heat transfer efficiency, resulting in poor heat dissipation of the light emitting diode. SUMMARY OF THE INVENTION In view of the above, it is necessary to provide a light-emitting diode device having a relatively low heat-dissipating wire and a low cost. x In view of this, it is also necessary to provide a process for the above-described light-emitting diode device. A light-emitting diode device comprising a light-emitting diode stray wafer and a cryogenic wafer. The LED epitaxial wafer includes a substrate and a semiconductor layer disposed on the surface of the panel. The cooled wafer is formed directly on the surface of the substrate away from the conductor layer. A light-emitting diode device comprising a light-emitting diode chip and a cryo-wafer, the light-emitting diode remote chip comprising a substrate and a semiconductor layer disposed on the surface of the board. The cold end of the cooled wafer directly absorbs the heat generated by the light-emitting diode and is conducted to the hot end. - a process for a light-emitting diode device comprising the steps of: providing a substrate to form a semiconductor layer on the substrate; forming a cold-form wafer directly on the surface of the substrate away from the semiconductor layer; providing a heat sink, and The cryostat is bonded and fixed. Compared with the prior art, the cold junction of the light-emitting diode device of the present invention is formed on the surface of the substrate of the light-emitting diode wafer, and the two substrates of the cooled wafer are omitted, so that the heat dissipation efficiency can be greatly improved. Also the cost of assembly and assembly. The process of the light-emitting diode device directly forms the surface of the substrate of the light-emitting diode on the surface of the substrate of the light-emitting diode, and does not need to be bonded or soldered to the light-emitting diode. The heat dissipation efficiency of the light emitting diode device is greatly improved. [Embodiment] Referring to Fig. 1, a side structure of a first embodiment of a light-emitting diode device of the present invention is not intended. The light emitting diode device 2 includes a light emitting diode epitaxial wafer 21, a uniform cold wafer 22, and a heat sink 23. The cooled wafer 22 is directly formed on the surface of the light emitting diode epitaxial wafer 21. The heat sink 23 is disposed on a surface of the refrigerant chip 22 away from the light-emitting diode epitaxial wafer 2 . The light-emitting diode epitaxial wafer 21 includes a substrate 211 and a half-guide. The semiconductor layer is disposed on the surface of the substrate 211. The + base insulating substrate is made of sapphire or bismuth (Si). The chilled wafer 22 includes a plurality of first electrodes 223a, an insulating layer (not shown), a plurality of second electrodes 223b, a plurality of P-type semiconductor dies 224, and a plurality of N-type semiconductor dies 225. The first electrode 223a is disposed on a surface of the substrate 211 away from the semiconductor layer 212. The insulating layer is disposed on the surface of the heat sink 23 to the surface of the refrigerant chip 22. The second electrode 223b is disposed on the surface of the insulating layer and arranged in a staggered manner with the first electrode 223a. Each of the P-type semiconductor crystal grains 224 and the N-type semiconductor crystal grains 225 are alternately spaced apart from each other by β and sandwiched between the first electrode 223a and the second electrode 223b. One end of the P-type semiconductor die 224 and the N-type semiconductor die 225 are adjacent to one end of the light-emitting diode epitaxial wafer 21, which is defined as a cold end, and each of the p-type semiconductor die 224 and the N-type semiconductor die 225 One end adjacent to the heat sink 23 is defined as a hot end. Each of the P-type semiconductor dies 224 is disposed between the two 200935624 'N-type semiconductor dies 225, and the cold ends of the p-type semiconductor dies 224 and -n-type semiconductor dies 225 are passed through a first electrode 223 &; Electrical connection. The p-type half-body die 224 and the other end of the N-type semiconductor die 225 are electrically connected by a first electrode 223b, thereby making the p-type semiconductor die 224 and the plurality of n-type semiconductor grains. 225 are electrically connected in series. When the light-emitting diode device 2 is applied with a predetermined current, the cold end of the refrigerant chip 22 absorbs heat generated by the money photodiode wafer 21 and conducts heat to the hot end. The heat I is released in time by the heat sink 23 at the hot end, thereby lowering the temperature of the epitaxial wafer 21 of the light-emitting diode. FIG. 2 is a process diagram of the LED device 2 shown in FIG. 2, which includes the following steps: Step 81: providing a substrate, forming a semiconductor layer on the surface of the substrate; - Substrate 211. The substrate 211 is an insulating earth plate, and its material is sapphire or sapphire. A semiconductor layer 212 is formed on the surface of the substrate 211 by a silicon crystal technique. Step S2: directly forming a cooling wafer on the surface of the substrate 211 away from the semiconductor layer 212. Referring to FIG. 4, a plurality of first electrodes 223a are formed on the substrate 211 away from the semiconductor layer 212. The plurality of first electrodes 223a are spaced apart. The P-type semiconductor die 224 and the -N-type semiconductor die 225 are formed on each of the first electrodes 223a by electroforming technology. The p-type j-die 224 and the N-type semiconductor die 225 are close to each other. The end of the substrate 211 is electrically connected by the first electrode 223a. 200935624 - depositing a photoresist layer on the surface of the substrate 211 'plural first electrode 223a, plural P-type semiconductor solar cell, grain-like and complex N-type semiconductor die milk surface (Fig.: No) The layer is subjected to exposure development to form a predetermined photoresist pattern. A plurality of conductive metal layers are deposited on the P-type semiconductor die 224, the plurality of N-type semiconductor grains 225, and the remaining photoresist, and the conductive metal layer thereon is formed to form a plurality of second electrode. The second electrode 223b is arranged in a staggered manner with the first electrode 223a. The second electrode 223b and the first electrode 223a are electrically connected to the semiconductor die 225, respectively, such that the semiconductor dies 224, 225 are electrically connected in series with each other. An insulating layer (not shown) is deposited on the surface of the second electrode 223b. Step 33. A heat sink is provided and bonded to the refrigerant chip. Referring to Figure 5, a heat sink 23 is provided which is bonded to the insulating layer. Thus, the 23 of the cold-rolled wafers 22 are connected. The light emitting light is ag...g. The heat sink 23 is released. The heat generated by the body cat slab 21 is hot at the hot end. The chilled wafer of the illuminating diode device 2 of the present invention is directly formed on the luminescent diode 21 by electroforming technology. The substrate ^ surface 'does not need to be bonded by bonding material or welding, and also saves::: the two substrates of the cold wafer 22' can not only greatly improve the heat dissipation efficiency, but also reduce the manufacturing and assembly costs on the same day. The device 3 includes a first electrode 323a and a reference -6, which is a schematic view of a second embodiment of the light-emitting diode device of the present invention. The light-emitting diode farm 3 is substantially the same as the hair unit 2 of the first embodiment. The main difference is the light-emitting diode pole 323b. The 10th 200935624 pole 323a is disposed on the substrate 311 away from the semiconductor layer (the second electrode 323b is not marked on the surface of the heat sink (not labeled). The plurality of surface conductor dies 324 are spaced and sandwiched between the Between 々 323b. The semiconductor die 324 is of the same type and half of the body, the 晶粒 grain or the Ν type semiconductor die. The semiconductor (4) 3 2 = electrode and the second electrode gamma remain electrically connected in parallel The process of fabricating the diode device 3 is substantially the same as that of the first embodiment of the light-emitting diode:: the main difference is that the first electrode 323a is deposited on the surface of the substrate 3n away from the rich conductor layer. Forming a plurality of semiconductor dies 324 arranged at different intervals and of the same type on the first electrode, and depositing a second electrode gamma on the semiconductor dies 324, so that the plurality of semiconductor dies 324 are electrically connected in parallel. 7. The side structure diagram of the third embodiment of the light-emitting diode device of the present invention. The light-emitting diode device 4 is substantially the same as the light-emitting diode device 2 of the first embodiment. The main difference is that the hair is A light emitting diode substrate wafer 41 of the worm 4 ❹ means of diode conductive substrate 4im based, carbide-based material of which the state iC). The LED device 4 includes an insulating layer 416 disposed on the substrate 41/surface and a plurality of first electrodes 423a disposed on the surface of the insulating layer 416. Each of the p-type semiconductor crystal grains 424 and the N-type semiconductor crystal grains are alternately disposed between the first electrode 423a and the second electrode 423b, and are electrically connected in series. The coating &amplifier of the light-emitting diode device 4 is substantially the same as the process of the light-emitting diode device 2 of the first embodiment. The main difference is that a substrate 4u is provided, which is a conductive substrate. An insulating layer 416 is formed on the surface of the 4 substrate 411, and the first electrode 423a is formed at a plurality of intervals in the rim layer 416. • Referring to Fig. 8, a side view of a fourth embodiment of a light-emitting diode device of the present invention is shown. The light-emitting diode device 5 is substantially the same as the light-emitting diode device 3 of the second embodiment, and the main difference is that the light-emitting diode device 5 of the light-emitting diode device 5 is not labeled. The conductive substrate is made of a carbon cut. The surface of the substrate 511 is provided with a spaced-apart type and the same type of semiconductor die 524. The process of the light-emitting diode device 5 and the light-emitting diode device 3 of the second embodiment The process is substantially the same, and the main difference is that the semiconductor die 524 is directly formed on the surface of the substrate 5 ι. Referring to Figure 9, a bottom view of the fifth embodiment of the light-emitting diode device of the present invention. The body device 6 is substantially the same as the light-emitting diode device 5 of the fourth embodiment. The main difference is that the light-emitting diode device 6 includes an insulating layer Gw and a rectangle that are not placed on the surface of the substrate (not shown). a conductive block 617. The rectangular conductive block 617 is located at a center of the substrate, and includes four sides (not shown) of the vertical j substrate. The insulating layer 616 covers the periphery of the rectangular conductive block 617 of the substrate. The surface of the insulating layer 616 is provided with a plurality of semiconductor dies 624 arranged at different intervals and of the same type. One end of the semiconductor die 624 is connected to the four sides, and the end is defined by the rectangular conductive block The other end is electrically connected by an electrode 623, and the heat sink is connected to the hot end. The process of the light-emitting diode device 6 is the same as that of the first end. The manufacturing method of the light-emitting diode device of the fourth embodiment is substantially the same, and the main difference is that a rectangular conductive block is formed at the center of the surface of the substrate and is sunk on the surface of the substrate and the rectangular conductive block 617. 12 200935624 An insulating layer 616 is formed. Forming a plurality of spaced-apart semiconductor dies 624 ′ on the surface of the insulating layer 6 6 and one end of the semiconductor dies 624 is connected to the four sides. An electrode 623 is deposited on the other end of the semiconductor die 624 so that the semiconductor The die 624 is electrically connected in parallel. In summary, the present invention has indeed met the requirements of the invention patent, and the patent application is filed according to law. However, the above description is only a preferred embodiment of the present invention, and the present invention The scope of the invention is not limited to the above-mentioned embodiments, and any equivalent modifications or changes made by those skilled in the art to the spirit of the present invention should be covered by the following patents. 1 is a schematic side view of the first embodiment of the light-emitting diode device of the present invention. FIG. 2 is a flow chart of the process of the light-emitting diode device of FIG. 1. FIG. 3 to FIG. The process of each of the process steps of the illustrated light-emitting diode device is not intended to be 0. FIG. 6 is intended to be a light-emitting diode of the present invention. The side structure of the first embodiment of the present invention is intended to be a light-emitting diode device of the present invention. The side structure diagram of the third embodiment is the dream of the light-emitting diode of the present invention. The side structure of the fourth embodiment of the shirt is shown in Fig. 9. The light-emitting diode of the present invention is not intended. Surface structure of the main method [Description of main components] 13 200935624 , Light-emitting diode device ^ Substrate light-emitting diode wafer cooling film Heat sink semiconductor layer First electrode Second electrode ® p-type semiconductor grain N-type semiconductor grain Semiconductor grain insulating layer rectangular conductive block electrodes 2, 3, 4, 5, 6 11 ' 311 ' 411 ' 511 21, 41 22 23 212 , 412 223a , 323a , 423a 223b , 323b , 423b 224 ' 424 225 ' 425 324 ,524,624 416 ' 616 617 623

Claims (1)

200935624 •十、申請專利範圍 ^ L一種發光二極體裝置,其包括: 設置於該基板表 一發光二極體磊晶片,其包括一基板及一 面之半導體層;及 夂V sa片,其直接形成於该基板之^遠離該半導體層之 面0 2.如申請專利範圍第1項所述之發光二極體裝置,其中,命 基板係絕緣基板。 、 ^ ❾3.如申請專利範圍第2項所述之發光二極體裝置,其中,该 致冷晶片包括複數第-電極,該第一電極間隔設置於該= 板之遠離該半導體層之表面。 4. 如申請專利範圍第3項所述之發光二極體裝置,其中,該 致冷晶片包括複數P型半導體晶粒、複數N型半導體晶= 及複數第二電極,每一該p型半導體晶粒型半導=晶 粒相互交替間隔設置一該第_電極,該第二電極與該第一 ©電極相對交錯排列,其設置於該半導體晶粒遠離該半導體 層之一端,使得該P型半導體晶粒及N型半導體晶粒爽於 该第一電極及第二電極之間。 5. 如申請專利範圍第2項所述之發光二極體裝置,其中,該 致冷晶片包括一第一電極,該第一電極設置於該基板遠= 邊半導體層之表面。 6.如申請專利範圍第5項所述之發光二極體裝置,其中,^ 致冷晶片包括複數類型相同之半導體晶粒及一第二^ 極’該半導體晶粒為P型半導體晶粒或N型半導體晶粒 15 200935624 晶教夾於 該第-電極及第二電極相對設置,使得該半導體 5亥第一電極及第二電極之間。 7·如申請專利範圍第i項所述之發光二極體裝置,其 基板係導電基板。 〃,該 8·如申請專利範圍第7項所述之發光二極體裝置,其中… 致冷晶片包括—絕緣層、複數第—電極、複數第I電極^ 複數半導體晶粒,該絕緣層設置於該基板遠離該半導體層 〇之表面’該第-電極間隔設置於該絕緣層表面,該半導二 晶粒設置於該第一電極表面,該第二電極間隔設置於該半 導體晶粒遠離該半導體層之一端,該第一電極及第二電極 相對交錯排列。 % ° .如申吻專利範圍第8項所述之發光二極體裝置,其中,複 數該半導體晶粒包括複數P型半導體晶粒及複數N型半導 體晶粒’每一該P型半導體晶粒及N型半導體晶粒相互交 替間隔設置,且夾於該第一電極及第二電極之間。 〇 10.如申請專利範圍第7項所述之發光二極體裝置,其中,複 數該半導體晶粒包括複數類型相同之半導體晶粒,該半導 體晶粒為P型半導體晶粒或N型半導體晶粒,該半導體晶 粒間隔設置於該基板遠離該半導體層之表面。 11.如申請專利範圍第7項所述之發光二極體裝置,其中,該 致冷晶片包括一矩形導電塊、一絕緣層、複數電極及複數 半導體晶粒,該矩形導電塊設置於該基板表面中心位置, 該矩形導電塊包括垂直於該基板之四側面,該絕緣層設置 於該基板之該矩形導電塊之外圍區域,該半導體晶粒設置 16 200935624 ' 於该絕緣層表面,且一端連接該四側面,該電極設置於該 、 半導體晶粒遠離該矩形導電塊之一端。 Π.如申請專利範圍第u項所述之發光二極體裝置,複數該 半導體晶粒包括複數類型相同之半導體晶粒,該半導體晶 粒為P型半導體晶粒或N型半導體晶粒。 13·如申請專利範圍第丨項所述之發光二極體裝置,其進一步 包括一散熱器,且該散熱器與該致冷晶片黏合固定。V 0 14. 一種發光二極體裝置,其包括: 一發光二極體蟲晶片’其包括—基板及__設置於該基板表 面之半導體層;及 T致冷晶片,該致冷晶片之冷端直接吸收該發光二極體磊 晶片產生之熱量,並傳導至熱端。 15.如申請專利範圍第14項所述之發光二極體裝置,其中, 該致冷晶片包括至少一第一電極、至少一 ^ ^/ 币一冤極及複數 午導體SB粒,該第一電極設置於該基板遠離該半導體層之 〇 表面’複數該半導體晶粒間隔設置於該第一 曰 兮钕-雨1 不电極之表面, 该第二电極設置於複數該半導體晶粒之表面。 16·如申請專利範圍第14項所述之發光二極體裝置,其進一 步包括一散熱器,且該散熱器與該致冷晶片黏合固/定進 Π·—種發光二極體裝置之製程,其包括如下步驟疋。 si.提供一基板,於該基板表面形成一半導體層. 52. 於該基板遠離該半導體層之表面直接形成 · 及 双令晶片; 53. 提供一散熱器,並與該致冷晶片黏合固定。 17 200935624 .18·如申請專利範圍第π項所述之發光二極體裝置之製程, 、 其中’該基板係絕緣基板。 19.如申請專利範圍第18項所述之發光二極體裝置之製程, 其中,步驟S2 ’於該基板表面形成複數間隔排列之第一電 極,於5亥第一電極表面形成間隔排列之複數半導體晶粒, 再於該半導體晶粒表面形成複數第二電極。 〇.如申叫專利範圍第19項所述之發光二極體裝置之製程, 〇 其中,该第一電極與該第二電極相對交錯排列,複數該半 導體晶粒係間関狀減Ρ型半導體晶粒及複數Ν型半 =體晶粒’每—該?型半導體晶粒及Ν型半導體晶粒相互 人替間隔設置,且夾於該第一電極及第二電極之間。 =申叫專利範圍第17項所述之發光二極體裝置之製程, ^,步驟S2,於該基板遠離該半導體層之表面形成一第 電極’於該第—電極表面形成間隔排列之複料導體曰 粒,再於該半導體晶粒表面形成一第二電極。 曰日 ❹申請專利範圍第21項所述之發光二極體裝置之製程, :中’複數該半導體晶粒係複數類型相同之半導體晶粒, ^導體晶粒為Ρ型半導體晶粒U型半導體晶粒,該半 導體晶粒夾於該第-電極及第二電極之間。 申明專利軌圍第17項所述之發光二極體裝置之製程, 其中,該基板係導電基板。 =申明專利乾圍第23項所述之發光二極體裝置之製程, 緣’步驟S2,於該基板遠離該半導體層之表面形成一絕 緣層,於該絕緣層之表面形成複數間隔交替之電極。 18 200935624 ,25.如申請專利範圍第24項所述之發光二極體裝置之製程, .其中,該致冷晶片包括複數該半導體晶粒係複數p型半導 體晶粒及複數N型半導體晶粒,每—該p型半導體晶粒及 N型半導體晶粒相鄰間隔設置於—該電極,藉由該電極帝 性連接。 26. 如申請專利範圍第23項所述之發光二極體裂置之製程, 其中,该致冷晶片包括複數P型半導體晶粒或複數N型半 導體晶粒。 〇 27. 如申請專利範圍第23項所述之發光二極體裝置之製程, 其中,步驟S2,於該基板遠離該半導體層之表面依序形成 一導電塊、一絕緣層、複數半導體晶粒及一電極,該導電 塊設置於該導電基板表面中心位置,該導電塊包括垂直於 該基板之四側面,該半導體晶粒設置於該絕緣層表面,且 一端連接該四側面,該電極設置於該半導體晶粒遠離該矩 形導電塊之一端。 〇 28.如申請專利範圍第27項所述之發光二極體裝置之製程, 其中’該半導體晶粒係類型相同之半導體晶粒,該半導體 晶粒為P型半導體晶粒或N型半導體晶粒。 19200935624 • X. Patent Application Scope L A light-emitting diode device includes: a light-emitting diode epitaxial wafer disposed on the substrate, comprising a substrate and a semiconductor layer on one side; and a V sa piece directly The light-emitting diode device according to the first aspect of the invention, wherein the substrate is an insulating substrate. The illuminating diode device of claim 2, wherein the chilled wafer comprises a plurality of first electrodes, the first electrodes being spaced apart from the surface of the slab away from the semiconductor layer. 4. The light emitting diode device of claim 3, wherein the refrigerant chip comprises a plurality of P-type semiconductor crystal grains, a plurality of N-type semiconductor crystals, and a plurality of second electrodes, each of the p-type semiconductors a die-type semiconductor = a plurality of dies arranged alternately spaced apart from each other, the second electrode being staggered with respect to the first electrode, disposed at a side of the semiconductor die away from the semiconductor layer, such that the P-type The semiconductor die and the N-type semiconductor die are between the first electrode and the second electrode. 5. The light emitting diode device of claim 2, wherein the chilled wafer comprises a first electrode disposed on a surface of the substrate far side semiconductor layer. 6. The light-emitting diode device of claim 5, wherein the refrigerant chip comprises a plurality of semiconductor dies of the same type and a second electrode, wherein the semiconductor die is a P-type semiconductor die or N-type semiconductor crystal grain 15 200935624 The crystal teaching clip is disposed opposite to the first electrode and the second electrode such that the semiconductor 5 is between the first electrode and the second electrode. 7. The light-emitting diode device of claim i, wherein the substrate is a conductive substrate. The light-emitting diode device of claim 7, wherein the refrigerant chip comprises an insulating layer, a plurality of first electrodes, a plurality of first electrodes, a plurality of semiconductor crystal grains, and the insulating layer is disposed. The second electrode is disposed on the surface of the insulating layer, the second electrode is disposed on the surface of the first electrode, and the second electrode is spaced apart from the semiconductor die away from the surface of the semiconductor layer At one end of the semiconductor layer, the first electrode and the second electrode are relatively staggered. The light-emitting diode device of claim 8, wherein the plurality of semiconductor crystal grains comprise a plurality of P-type semiconductor crystal grains and a plurality of N-type semiconductor crystal grains each of the P-type semiconductor crystal grains. And the N-type semiconductor crystal grains are alternately spaced apart from each other and sandwiched between the first electrode and the second electrode. The illuminating diode device of claim 7, wherein the plurality of semiconductor dies comprise a plurality of semiconductor dies of the same type, the semiconductor dies being P-type semiconductor dies or N-type semiconductor crystals And the semiconductor crystal grains are spaced apart from the surface of the substrate away from the semiconductor layer. The illuminating diode device of claim 7, wherein the chilled wafer comprises a rectangular conductive block, an insulating layer, a plurality of electrodes, and a plurality of semiconductor dies, the rectangular conductive block being disposed on the substrate The rectangular conductive block includes a fourth side perpendicular to the substrate, the insulating layer is disposed on a peripheral region of the rectangular conductive block of the substrate, and the semiconductor die is disposed on the surface of the insulating layer and connected at one end. The four sides, the electrode is disposed at the end of the semiconductor die away from the rectangular conductive block. The illuminating diode device of claim 5, wherein the plurality of semiconductor dies comprise a plurality of semiconductor dies of the same type, the semiconductor granules being P-type semiconductor dies or N-type semiconductor dies. 13. The light emitting diode device of claim 2, further comprising a heat sink, the heat sink being bonded to the cold wafer. V 0 14. A light-emitting diode device comprising: a light-emitting diode wafer comprising: a substrate and a semiconductor layer disposed on a surface of the substrate; and a T-cooled wafer, the cold of the cooled wafer The end directly absorbs the heat generated by the light-emitting diode epitaxial wafer and is conducted to the hot end. The illuminating diode device of claim 14, wherein the chilled wafer comprises at least one first electrode, at least one ^^/coin-dip pole, and a plurality of mid-conductor SB particles, the first The electrode is disposed on the surface of the substrate away from the semiconductor layer. The plurality of semiconductor crystal grains are spaced apart from the surface of the first 曰兮钕-rain 1 electrode, and the second electrode is disposed on the surface of the plurality of semiconductor dies . The illuminating diode device of claim 14, further comprising a heat sink, and the heat sink and the chilled wafer are bonded and fixed to the luminescent device. It includes the following steps. Si. providing a substrate, forming a semiconductor layer on the surface of the substrate. 52. The substrate is directly formed away from the surface of the semiconductor layer and the double wafer; 53. A heat sink is provided and bonded to the cold wafer. 17 200935624.18. The process of the light-emitting diode device of claim π, wherein the substrate is an insulating substrate. 19. The process of the light-emitting diode device according to claim 18, wherein the step S2' forms a plurality of first electrodes arranged at intervals on the surface of the substrate, and the plurality of first electrode surfaces are arranged at intervals on the surface of the first electrode. The semiconductor crystal grains further form a plurality of second electrodes on the surface of the semiconductor crystal grains. The process of the light-emitting diode device of claim 19, wherein the first electrode and the second electrode are alternately staggered, and the plurality of semiconductor inter-systems are reduced in size. Grain and complex Ν type half = body grain 'every? The semiconductor die and the germanium-type semiconductor die are spaced apart from each other and sandwiched between the first electrode and the second electrode. The process of the light-emitting diode device according to claim 17 of the patent scope, ^, step S2, forming a first electrode on the surface of the substrate away from the surface of the semiconductor layer to form a spacer arranged on the surface of the first electrode The conductor particles are formed on the surface of the semiconductor die to form a second electrode.曰 ❹ ❹ ❹ ❹ ❹ ❹ ❹ ❹ 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光 发光a die, the semiconductor die being sandwiched between the first electrode and the second electrode. The process of the light-emitting diode device according to Item 17 of the patent track, wherein the substrate is a conductive substrate. = the process of the light-emitting diode device according to Item 23 of the patent application, in the step S2, forming an insulating layer on the surface of the substrate away from the semiconductor layer, and forming a plurality of electrodes alternately spaced on the surface of the insulating layer . The process of the light-emitting diode device of claim 24, wherein the refrigerant chip comprises a plurality of semiconductor crystal-system plural p-type semiconductor grains and a plurality of N-type semiconductor grains Each of the p-type semiconductor crystal grains and the N-type semiconductor crystal grains are adjacently disposed at intervals to the electrode, and the electrodes are connected by virtue. 26. The process of light emitting diode sputtering according to claim 23, wherein the refrigerant chip comprises a plurality of P-type semiconductor grains or a plurality of N-type semiconductor grains. The process of the light-emitting diode device of claim 23, wherein, in step S2, a conductive block, an insulating layer, and a plurality of semiconductor grains are sequentially formed on the surface of the substrate away from the semiconductor layer. And an electrode disposed at a center of the surface of the conductive substrate, the conductive block includes four sides perpendicular to the substrate, the semiconductor die is disposed on the surface of the insulating layer, and one end is connected to the four sides, and the electrode is disposed on the fourth side The semiconductor die is remote from one end of the rectangular conductive block. The process of the light-emitting diode device according to claim 27, wherein the semiconductor crystal grain is of the same type of semiconductor crystal grain, and the semiconductor crystal grain is a P-type semiconductor crystal grain or an N-type semiconductor crystal. grain. 19
TW97105344A 2008-02-15 2008-02-15 Light emitting diode device and fabricating method thereof TWI364856B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102315379A (en) * 2010-07-01 2012-01-11 晶元光电股份有限公司 Photoelectric element with thermoelectric structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102315379A (en) * 2010-07-01 2012-01-11 晶元光电股份有限公司 Photoelectric element with thermoelectric structure
CN102315379B (en) * 2010-07-01 2013-11-06 晶元光电股份有限公司 Photoelectric element with thermoelectric structure

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