200934333 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種載板之製造方法，尤指本發明埋入元件的 電路板之製造方法。 【先前技術】 所謂“埋入式被動元件”（EmbeddedPassives)，係利用多層板之 内層板製程，採行餘刻或印刷方式，將電容器或電阻器直接製做在内 ❸層板上’再經壓合成多層板後，將可取代掉板面上組裝時所焊接的零 散（Discrete)被動元件’以節省板面讓給主動元件及其佈線者。 埋入式植入式或藏入式技術’.最早是Ohmega-ply公司利用内層 板面原有銅箔的毛面（MattSide)上，另外處理上薄膜之碟鎳合金層， t成電阻性成份（ResistiveElement)而壓合成為Thinc〇re，然後再利 ❹用兩次光阻與三次餘刻的技術，於特定位置上形成所需的薄膜“電阻 器”。由於是埋入在内層中，故商名稱之為BuriedResist〇r(BR)。 在這之後，於1992年美國的PCB製造廠商一Zycon，曾在高階的 多層板中，在原有Vcc/GND内層之外，另加入極薄（2_4mil)的介質 層的内層板，利用其廣大面積的平行金屬銅板面，製作成為整體性的 電容器，此商名稱為Buried Capacit〇r(BC)。其優點為基頻操作下避免 雜訊、提供電荷能量、穩壓。Zycoii公司也曾為此申請了數篇關於0〇 的專利(即美國專利號 5,079,069、5,161，086、5，155,655)。 200934333 目前已有射人將上述埋人被動元件的觀念制來埋入主動元 件等電子元件，以提高鍾的聽密度。在這魏錢财，主要是 在絕緣材料中挖出凹穴，然後在凹穴中安裝電子元件。然而，在這種 做法中’在電子元件的下方仍不免會存在有絕緣材料的部分，這使得 整體厚度或密度仍非最佳狀態。 【發明内容】 ❹本判之主要目的在提供-種本發明埋人元件的電路板之製造方 法，其主要在可麟的可導電承驗上錄電子元件，使得電子元件 的下方元全沒有絕緣層，而實現最佳密度的埋入式電子板。 基於上述目的，在本發明埋入元件的電路板之製造方法中，主要 先在電鑛有電鏡金屬層⑽的承載板⑽之上，安裝電子元件⑽(安裝 在電錄金屬層(I2)上）’然後再藉著介電膠膜(18)將金屬層⑽壓合至已 ❹安裳有電子元件⑽的電鍍金屬層⑽與承載板⑽之上，並在脫除承 載板(10)之後’在被曝露出的電鑛金屬層⑽之上進行圖案化程序，而 使金屬層(20)和/或電錢金屬層⑽被圖案化成線路層(24)。 到進優點與精神可以藉由以下的發明詳述及所附圖式得 【實施方式】 4翔第1A〜1H圖’第1A〜1H圖為本發明埋人元件的電路板之 製4方法的示意圖。如第1A圖所示，首先提供電鍍有電鍍金屬層⑽ 200934333 的承載板(10) ’而承載板(ίο)的材質為可導電材料、電锻金屬層(12)的 材質為銅。 簡單來說，在本發明埋入元件的電路板之製造方法中，主要先如 第1C圖所示在電鍍有電鍍金屬層(12)的承載板(10)之上，安裝電子元 件(16)(安裝在電鍍金屬層(12)上），然後再如第m圖所示藉著介電膠 膜(18)將金屬層(2〇)壓合至已安裝有電手元件(16)的電鍍金屬層(12)與 承載板(10)之上’並在脫除承載板(1〇)之後，在被曝露出的電鐘金屬層 (12)之上進行圖案化程序，而使金屬層(2〇)和/或電鑛金屬層(12)被圖案 化成線路層(24) ’如第1H騎示。如此-來，在電子元件(16)的下方 凡全沒有絕緣層，僅具有對外作訊號傳輸的線路層(24，進而實現最佳 密度的埋入式電子板。 ❹ 需特耻意岐’上述電子元件(16)可駐動元件或被動元件， 而被動元件可為電容、電阻或電感。為了強化金顧(12)與承載 板(10)之間的結合力，承載板⑽具有粗經表面。 /、體來說’如第圖所示，為了定位目的，可先在電鑛金屬層(12) 上形成SMT對位基準叫她咖腿幻。然後，如第冗圖所示在電 錢金屬層(12)上安裝電子元件⑽。接著，如第1D〜m圖所示藉著介 電膠膜(18)將金屬層(2〇)壓合至已安裝有電子元件⑽的電鍍金屬層 )…承載板(10)之上。然後，脫除承載板(1〇)，而曝露出電鍍金屬層 200934333 (12)，如第1G圖所示。不過，在脫除承載板(10)之前，可如IF圖所示， 對著電子元件(16)形成開口(22)，以便後續製程中可製作電子元件(16) 對外訊號傳輸的通孔(未描繪)。最終，使金屬層(20)和/或電鍍金屬層(12) 被圖案化成線路層(24)，如第1H圖所示。 在將金屬層(20)壓合至已安裝有電子元件(16)的電鍍金屬層(12)與 承載板(10)之上時’除了如第1D〜1E圖所示之手段以外’還有其他手 段可運用。 請參閱第2A〜2B圖，第2A〜2B圖為本發明埋入式電路板埋入元 件的電路板之製造方法的另一示意圖^如第2A圖所示，在電子元件(16) 底下增加絕緣層(13)，以強化電性絕緣效果，然後才如第1E圖所示完 成壓合。如第2B圖所示，在電子元件(16)的周圍先放入絕緣層 (26a〜26b) ’然後才如第1E圖所示完成壓合。絕緣層(2如〜2你)可為具 有開口的絕緣材料層，而開口大小相對於電子元件(16)。 藉由以上較佳具體實施例之詳述，係希望能更加清楚描述本發明 之特徵與精神，鱗以上騎揭⑽錄频餘絲對本發明之 =可力乂限制。相反地，其目的是希望能涵蓋各種改變及具相等性的 文排於本糾所欲巾狀專職_範鳴内。 【圖式簡單說明】 1A〜1H®為本發明埋人元件的電路板之製造方法的示意圖。 200934333 第2A〜2B圖為本發明埋入式電路板埋入元件的電路板之製造方 法的另一示意圖。 【主要元件符號說明】 10承載板 12電鍍金屬層 13、26a、26b 絕緣層 14對位基準 ❹ 16電子元件 18介電膠膜 20金屬層 22開口 24線路層BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a carrier board, and more particularly to a method of manufacturing a board in which an element is embedded in the present invention. [Prior Art] The so-called "Embedded Passive" (Embedded Passives) uses the inner layer process of the multi-layer board to adopt the residual engraving or printing method to directly form the capacitor or resistor on the inner layer. After being laminated into a multi-layer board, it will replace the discrete passive components soldered during assembly on the board surface to save the board surface to the active components and their routers. Buried implantable or hidden technology '. The earliest is Ohmet-ply's use of the inner surface of the original copper foil on the matte surface (MattSide), in addition to the upper film of the nickel alloy layer, t into a resistive component (ResistiveElement) and press-compressed into Thinc〇re, and then use the technique of two photoresists and three times of remnant to form the desired film "resistor" at a specific position. Because it is buried in the inner layer, the trade name is called BuriedResist〇r (BR). After that, in 1992, Zycon, a PCB manufacturer in the United States, used a very thin (2_4 mil) inner layer of the dielectric layer in the high-order multilayer board outside the original Vcc/GND inner layer, using its large area. The parallel metal copper plate is made into a monolithic capacitor. The trade name is Buried Capacit〇r (BC). The advantage is that it avoids noise, provides charge energy, and regulates voltage at the fundamental frequency. Zycoii has also applied for several patents on 0〇 (ie US Patent Nos. 5,079,069, 5,161,086, 5,155,655). 200934333 At present, the shooting system has embedded the concept of buried passive components to embed electronic components such as active components to improve the listening density of the clock. In this Wei Qiancai, the holes are mainly dug in the insulating material, and then the electronic components are mounted in the pockets. However, in this practice, the portion of the insulating material is still present under the electronic component, which makes the overall thickness or density still not optimal. SUMMARY OF THE INVENTION The main purpose of the present invention is to provide a method for manufacturing a circuit board embedding a component of the present invention, which mainly records electronic components on the conductive test of Kellin, so that the lower elements of the electronic components are not insulated. Layers, while achieving the best density of buried electronic boards. Based on the above object, in the manufacturing method of the circuit board embedding the component of the present invention, the electronic component (10) (mounted on the electroless metal layer (I2) is mainly mounted on the carrier plate (10) of the electroscope metal layer (10). ' Then the metal layer (10) is pressed onto the plated metal layer (10) and the carrier plate (10) of the electronic component (10) by means of a dielectric film (18), and after removing the carrier plate (10) 'A patterning process is performed over the exposed layer of electro-mineral metal (10), and the metal layer (20) and/or the electromoney metal layer (10) are patterned into a wiring layer (24). The advantages and spirits of the present invention can be obtained by the following detailed description of the invention and the accompanying drawings. [Embodiment] 4A1 to 1HFig. 1A to 1H are diagrams of the method for manufacturing a circuit board of the invention. schematic diagram. As shown in Fig. 1A, first, a carrier plate (10)' on which an electroplated metal layer (10) 200934333 is plated is provided, and the material of the carrier plate is a conductive material, and the material of the electrically forged metal layer (12) is copper. Briefly, in the manufacturing method of the circuit board in which the component is embedded in the present invention, the electronic component (16) is mainly mounted on the carrier plate (10) on which the plated metal layer (12) is plated as shown in FIG. 1C. (Installed on the electroplated metal layer (12)), and then press-bonded the metal layer (2〇) to the electroplated component (16) by the dielectric film (18) as shown in the mth figure. The metal layer (12) is placed on the carrier plate (10) and after the carrier plate (1〇) is removed, a patterning process is performed on the exposed metal layer (12), and the metal layer is formed. 〇) and/or the electromineral metal layer (12) is patterned into a wiring layer (24) 'as shown in the 1H. In this way, there is no insulating layer under the electronic component (16), and only has a circuit layer for external signal transmission (24, thereby achieving an optimal density of the embedded electronic board. 需 Need special shame] The electronic component (16) can be a passive component or a passive component, and the passive component can be a capacitor, a resistor or an inductor. To strengthen the bonding force between the metal (12) and the carrier plate (10), the carrier plate (10) has a rough surface. /, physically speaking, as shown in the figure, for the purpose of positioning, the SMT alignment reference can be formed on the metallurgical metal layer (12) to call her coffee. Then, as shown in the redundancy diagram, the money is shown. The electronic component (10) is mounted on the metal layer (12). Next, the metal layer (2) is pressed by the dielectric film (18) to the plated metal layer on which the electronic component (10) has been mounted, as shown in Figs. 1D to m. )... above the carrier board (10). Then, the carrier plate (1 〇) is removed, and the plated metal layer 200934333 (12) is exposed as shown in Fig. 1G. However, before the carrier board (10) is removed, an opening (22) may be formed opposite the electronic component (16) as shown in the IF diagram, so that the through hole of the external signal transmission of the electronic component (16) can be fabricated in a subsequent process ( Not depicted). Finally, the metal layer (20) and/or the plated metal layer (12) are patterned into a wiring layer (24) as shown in Figure 1H. When the metal layer (20) is pressed onto the plated metal layer (12) and the carrier plate (10) on which the electronic component (16) has been mounted, 'except for the means as shown in Figs. 1D to 1E' Other means are available. Please refer to FIG. 2A to FIG. 2B, and FIG. 2A to FIG. 2B are another schematic diagrams of a method for manufacturing a circuit board in which a buried circuit board is embedded in the device. As shown in FIG. 2A, the electronic component (16) is added under the electronic component (16). The insulating layer (13) is used to enhance the electrical insulation effect, and then the pressing is completed as shown in Fig. 1E. As shown in Fig. 2B, the insulating layers (26a to 26b) are placed first around the electronic component (16) and then the bonding is completed as shown in Fig. 1E. The insulating layer (2, such as ~2) may be a layer of insulating material having an opening with an opening size relative to the electronic component (16). With the above detailed description of the preferred embodiments, it is desirable to more clearly describe the features and spirit of the present invention. On the contrary, the purpose is to hope that it can cover all kinds of changes and equal literary genres. BRIEF DESCRIPTION OF THE DRAWINGS 1A to 1H® are schematic views of a method of manufacturing a circuit board in which a buried component of the present invention is applied. 200934333 2A to 2B are another schematic views showing a method of manufacturing a circuit board in which a buried circuit board is embedded in an element. [Main component symbol description] 10 carrier board 12 plating metal layer 13, 26a, 26b insulation layer 14 alignment reference ❹ 16 electronic components 18 dielectric film 20 metal layer 22 opening 24 circuit layer