200924591 九、發明說明： 【發明所屬之技術領域】 特別是指一種佈設兩頻 本發明係與多層電路板有關 電路之多層印刷電路板。 【先前技術】 10 15 用於晶圓級測試之探針卡中，探針卡電路板周圍上方 的#塾係制試機自的測試概觸，使各銲賴對應連接 之傳輸線路傳送測試機㈣輯訊號至電路板下方近中心 處所密集設置之探針上’當各探針對應點 觸的晶圓電子元 接收測試城後’麟透過料卡回制對賴電氣特 性至測試機台以供分析，如此在整個晶圓級職過程中， 探針卡電路板的傳輸線路設計對電子元件的職結果佔有 ，重要的影響’尤其隨著電子科技越趨複雜且高速之運 i / 則試過程需涵盍晶圓上大量的電路元件且操作於實際 ，應的高速運作條件，故不但探針卡之電路空間利用需為 的設置，傳輸線路之製作更需符合高速訊號的高 頭傳輸條件。 如第-圖所示於多層印刷電路板i上佈設測試線路1〇 時’線路H)由外圍至内圈且由上至下的延伸穿 2電路板觸，製作上，線路1Q之縱向傳輸路 穿設貫孔，然後於貫孔設置金屬材質以形成 二導電性之導孔n，線路1G之水平傳輸路徑為於各^ ^ 1〇〇上對錢接上科孔u以佈設較寬度之導^金 片12，最後將各層電路板1〇〇層疊並經高溫壓合而形成延 20 200924591 伸t多層電路板1内的傳輸線路，因而能料大量且高 ===傳Ϊ需求;當應用於高頻傳輸時，訊號品質 取決於可傳輸頻寬範圍及能量耗損，一旦如上述之多層印 刷=板i將高頻傳輸線路佈設於電路板内部時，不但須 5者重於傳輸線路的長短以及層間電路板的材質，以盡可能 減少訊號反應的延遲時間及傳輸過程的介電耗損，且傳輸 線路於電路板内之縱向與橫向佈設更需著重特性阻抗的匹 配’以盡可能減少訊號特性阻抗不連續導致的介面反射耗 損’才能降低高頻訊號傳輸於整個多層電路板】的穿透耗 H)損而不致影響訊號頻寬範圍，但由於形成水平線路之金屬 片12經高溫壓合後會有線寬延展，因此在佈設金屬片12 時僅能使用有限之寬度及厚度以顧及電路空間利用，然一 旦金屬片12構成於水平線路之特性阻抗大於導孔u於縱 向線路之特性阻抗，反而形成阻抗不匹配之問題，且高頻 15訊號傳輸線路周圍需鄰近設有可連接至接地電位之接地線 路’藉以維持高頻傳輸所需之特性阻抗，因此若為以低特 性阻抗的傳輸線路提供高速反應以及低耗損的高頻傳輸環 境’必定需於單一層電路板上佈設有較寬之水平線路以及 更對應於四周之水平及垂直方向空間並列設置接地線路， 20如此電路空間的利用效率往往無法兼顧大量且高密集度的 高頻測試傳輪需求。 又 縱使已有如美國專利公告第6784674號以及第 7012442號所提供之測試訊號分佈系統，除了於多層印刷電 路板内將特定測試條件之訊號線路展開成多組傳輪線路， 200924591 15 i. 以分，傳遞相同測試條件之傳輸線路至多個待測電子元件 之測试銲當=各展開線路即峰高之特性阻抗相互並 接使亚聯等效阻抗相當;^本單—訊號線路之特性阻抗， 可，免展開端節點之高頻反_損；然在整個高頻測試環 境中，訊號傳送至制電子元件之前的高頻傳輸結構上往 往皆為低躲阻抗，故上勒购罐分佈/钱巾，經展開 後之各傳輸、祕由於具有較原本之單__訊號線路更為增加 之特性阻抗’致使展_路後級連接至其他低特性阻抗之 傳輸結構時’訊龍性阻抗在連接介面上必然存在無法匹 配的問題；即使將展開線路後級所有接設之傳輸結構皆調 整為相匹配的高特性阻抗，卻不但相對延長了高速傳輸的 反應延遲日^•間，且專效直流電阻產生的電路功率消耗會提 升電路傳輸的環境溫度而改變整體電路特性；再者，縱使 盡可能減少高特性阻抗之訊號路徑長度以降低反應延遲時 間以及功率消耗，然測試訊號最終抵達待測晶圓時，由於 曰曰圓上鬲頻電路之線路佈設必為符合特定設計規則之低特 性阻抗傳輸結構，因此測試裝置與待測電子元件的接觸介 面仍然存在訊號阻抗無法匹配的問題，同樣導致降低訊號 傳輸品質。 【發明内容】 因此’本發明之主要目的乃在於提供一種多層印刷電 路板，有效增加高頻傳輸結構之電路空間效率且具有極佳 之阻抗匹配特性。 200924591 為達成前揭目的，本發明所提供一種多層電路板，係 包括有上下相互疊置之多數個基板，以及於該基板上設置 之訊號電路及接地電路，自最上層該基板所設置之上銲點 延伸佈設至最下層該基板所設置之下銲點，訊號於該訊號 包路内部傳輸過程中，鄰近之接地電路設置有接地導孔以 及接地導線以提供訊號於水平及縱向傳輸所需之特性阻 抗，且讯號沿訊號電路之縱向訊號導孔傳至水平訊號導線 日^·，上、下相鄰之二訊號導線所構成之等效並聯特性使特 眭阻抗相當於傳輸於訊號導孔之特性阻抗，有效避免訊號 〇傳輸介面的反射耗損以降低訊號穿透該多層電路板之穿透 耗知，並且能有效善用電路空間以容置高密度的訊號傳輸 需求。 【實施方式】 y 15 以下’茲配合圖示列舉若干較佳實施例，用以對本發 明之結構與功效作詳細說明，其中所用圖示之簡要說明如 下： 第一圖係本發明所提供最較佳實施例之頂視圖； 2〇 第二圖係上述第二圖中A-A連線之剖視圖； 第四圖係上述最較佳實施例之局部分解立體圖。 请麥閱如第二至第四圖所示本發明最較佳實施例所提 之一多層電路板2’為近似積體電路晶圓大小之多層印刷 電路板，用於晶圓測試探針卡上，可單次對大範圍的晶圓 200924591 電路元件作電性測試，係於多數個具良好絕緣特性之基板 20上佈„又夕數個具鬲頻傳輸線特性之訊號電路及接地 電路40,再將該些基板2〇相互層疊壓合而成，該多層電路 板2具有相對之一上、下表面谢、2〇2，該上表面施近 5周圍處設有多數個上鋒點2〇3，該下表面搬近中心處設有 多，個下銲點2G4 ’因此當該多層電路板2應用於測試探針 卡^亥些上銲點203為供測試機台之測試頭點觸以接收測 試訊號，該些下銲點204供測試用探針接設，以藉由探針 觸Ball電路元件而送出測試訊號，再接收回傳測試結果 10至電路板2供測試接台讀取，其中： ^請配合第三及第四圖參照，各該訊號電路30自其中一 及上銲點203延伸佈設至一該下銲點2〇4，具有縱向貫穿各 該基板20之訊號導孔31以及水平延伸之數條訊號導線 &，各該訊號電路3〇之訊號導線32分別水平延伸佈設於 15 、下相鄰之不同基板20上，相鄰二訊號導線32之兩端 分別接設於-該訊號導孔31以形成相聽接之並聯電氣特 性，當中設於該上表面201之上基板21所穿設之訊號導孔 3U與該上銲點203電性連接，再透過夾設於内部之内層基 板22所穿設之訊號導孔312同時與相並接之該二訊號導線 20 32電性連接，經該二訊號導線32延伸至内層基板近中 〜處後透過該訊號導孔312與設於該下表面202之下基板 f所穿6又之訊號導孔313電性連接，因此各該訊號電路3〇 藉由該些訊號導孔31及該二訊號導線32可將訊號自其中 —該上銲點203電性導通至一該下銲點204,由於内層基板 200924591 22所穿設之訊號導孔312抵接於該二訊號導線叫灸 縱向電性連接其餘之訊號導孔312，可使訊號傳輸於該訊號 電路3〇時不至於水平及縱向的銜接路徑上有傳輸介面 續的現象。 5 該些接地電路40鄰近各該訊號電路30而設置，可於 該多層電路板2電性導通後連接至接地電位，藉以維持高 頻訊號於該訊號電路30傳輸時所需之特性阻抗，各該接地 電路40具有縱向貫穿各該基板2〇之數個接地導孔41以及 水平延伸之數個接地導線42,各該訊號導孔31周圍相鄰特 1〇定之間距上並列有數個接地導孔41，使該訊號導孔31傳遞 訊號時具有特定之特性阻抗，各該訊號電路3〇之訊號導線 32四周相鄰並列有該接地導線42於同一層以及上、下鄰接 之該基板20上，以維持該二訊號導線32之並聯等效特性 阻抗與各該说號導孔31之特性阻抗相當。 15 綜合上述可知，本發明所提供該多層電路板2在訊號 於内部傳輸過程中’自該上銲點203經過訊號導孔31至並 聯之該二訊號導線32，再經過訊號導孔31以至該下銲點 204時，鄰近皆設置有接地導孔41以及接地導線42以提供 訊號傳輸所需之特性阻抗，且由於訊號電路3〇自該訊號導 2〇孔31傳至訊號導線32時，上、下相鄰之二該訊號導線32 所構成之等效並聯特性使特性阻抗較單一該訊號導線3 2傳 輸時之特性阻抗為低，可不必加寬單一訊號導線之寬度即 使該訊號導孔31與相鄰二該訊號導線32提供為連續的訊 號傳輸介面以及具有相互匹配之特性阻抗，因此有效避免 200924591 訊號傳輸介面的反射耗損 之穿透耗損’並且能有效善用板2 號傳輸需求。 谷置同费度的訊 诉歹|J 晋方^ 也 電路鄰近 卜又置於喊線路周__訊號傳輸之特性阻抗，本 要保持與贼電路並附目时蚊距離之位置上有 接地電位之錢魏，因此並不蚊祕電路巾如上述接 地導線為相當於訊料収奴狀祕佈郷狀，若盘 訊號電路上、下鄰接之基板上佈設大範圍甚至整層之金屬 層亦可發揮接地祕所欲達成之功效，#蚊祕定如本 發明所提供最佳實施例般僅將接地導線設於電路板之内 層’端視喊電路所佈設之位置而決定接地轉#為設於 内層或上、下表層之基板上。 15200924591 IX. Description of the invention: [Technical field to which the invention pertains] In particular, it relates to a multilayer printed circuit board in which two frequencies of the present invention are related to a circuit of a multilayer circuit board. [Prior Art] 10 15 In the probe card for wafer level test, the test of the #塾 system test machine above the probe card circuit board is used to test the transmission line of each soldering connection. (4) The signal is connected to the densely-positioned probe near the center of the circuit board. 'When the probes correspond to the touched wafers, the electronic components receive the test city'. After the data is returned to the test machine, Analysis, so in the entire wafer level process, the transmission line design of the probe card circuit board possesses the important results of the electronic components, and the important influence' especially with the increasing complexity of electronic technology and high-speed operation i / test process It is necessary to cover a large number of circuit components on the wafer and operate in actual and high-speed operating conditions. Therefore, not only the circuit space of the probe card needs to be set, but also the transmission line needs to meet the high-speed transmission conditions of the high-speed signal. As shown in the first figure, when the test line 1 is placed on the multilayer printed circuit board i, the 'line H' is driven from the periphery to the inner ring and extends from the top to the bottom through the 2 circuit board, and the vertical transmission path of the line 1Q is fabricated. The through hole is pierced, and then the metal material is disposed in the through hole to form the second conductive guide hole n. The horizontal transmission path of the line 1G is to connect the upper hole to the hole on the ^^1〇〇 to arrange the width guide. ^金片12, finally stacking the layers of each layer of the circuit board and pressing it at a high temperature to form a transmission line in the multilayer circuit board 1 of 200924591, so that a large amount of high and high === transmission requirements can be obtained; In high-frequency transmission, the signal quality depends on the transmission bandwidth range and energy consumption. Once the high-frequency transmission line is placed inside the circuit board as described above, it is not only necessary to focus on the length of the transmission line. And the material of the interlayer circuit board to minimize the delay time of the signal reaction and the dielectric loss during the transmission process, and the vertical and horizontal layout of the transmission line in the circuit board needs to emphasize the matching of the characteristic impedance to minimize the signal characteristics. Impedance The interface reflection loss caused by the continuation can reduce the transmission loss of the high-frequency signal transmitted through the entire multilayer circuit board without affecting the signal bandwidth range, but the metal piece 12 forming the horizontal line will be wired after being pressed at a high temperature. Wide extension, so only a limited width and thickness can be used when laying the metal sheet 12 to take into account the circuit space utilization. However, once the characteristic impedance of the metal piece 12 on the horizontal line is greater than the characteristic impedance of the guide hole u in the longitudinal line, the impedance is formed instead. The problem of mismatch, and the high-frequency 15 signal transmission line needs to be adjacent to the ground line that can be connected to the ground potential 'to maintain the characteristic impedance required for high-frequency transmission, so if the high-speed response is provided for the transmission line with low characteristic impedance As well as the low-loss high-frequency transmission environment, it is necessary to arrange a wide horizontal line on a single-layer circuit board and a grounding line corresponding to the horizontal and vertical direction of the surrounding area. 20 The utilization efficiency of the circuit space is often impossible to balance. A large number of high-density high-frequency test transmission requirements. In addition to the test signal distribution system provided by U.S. Patent Nos. 6,784,674 and 7012442, in addition to the signal lines of specific test conditions being spread into a plurality of sets of transmission lines in a multilayer printed circuit board, 200924591 15 i. Test transmission of the transmission line of the same test condition to a plurality of electronic components to be tested = the characteristic impedances of the peaks of each of the unfolded lines are parallel to each other so that the equivalent impedance of the sub-connection is equivalent; ^ the characteristic impedance of the single-signal line, However, the high-frequency inverse _ loss of the unfolding end node is eliminated; however, in the entire high-frequency test environment, the high-frequency transmission structure before the signal is transmitted to the electronic component is often low-impedance impedance, so the distribution of the cans is distributed/money. The towel, after the expansion of each transmission, the secret has a more characteristic impedance than the original single __ signal line, causing the exhibition to connect to other low-impedance transmission structures. There must be a problem of unmatched interface; even if all the transmission structures of the subsequent stages of the expansion line are adjusted to match the high characteristic impedance, it is not only relatively extended. The response delay time of high-speed transmission, and the circuit power consumption generated by the special-purpose DC resistance will increase the ambient temperature of the circuit to change the overall circuit characteristics; in addition, the signal path length of the high-intensity impedance is reduced as much as possible to reduce Reaction delay time and power consumption. When the test signal finally arrives at the wafer to be tested, the test device and the electronic component to be tested are required because the circuit layout of the 鬲-frequency 电路 frequency circuit must be a low-specificity impedance transmission structure conforming to a specific design rule. The contact interface still has the problem that the signal impedance cannot be matched, which also leads to a reduction in signal transmission quality. SUMMARY OF THE INVENTION Therefore, the main object of the present invention is to provide a multilayer printed circuit board which effectively increases the circuit space efficiency of the high frequency transmission structure and has excellent impedance matching characteristics. 200924591 In order to achieve the foregoing, the present invention provides a multi-layer circuit board comprising a plurality of substrates stacked one on top of the other, and a signal circuit and a ground circuit disposed on the substrate, from the uppermost layer of the substrate The solder joint extends to the solder joint disposed under the substrate of the lowermost layer. During the internal transmission of the signal packet, the grounding circuit is provided with a grounding via and a grounding conductor to provide signals for horizontal and vertical transmission. Characteristic impedance, and the signal is transmitted to the horizontal signal wire along the longitudinal signal guide hole of the signal circuit. The equivalent parallel characteristic of the upper and lower adjacent two signal wires makes the special impedance equivalent to the signal guide hole. The characteristic impedance effectively avoids the reflection loss of the signal transmission interface to reduce the penetration of the signal through the multilayer circuit board, and can effectively utilize the circuit space to accommodate the high-density signal transmission requirements. [Embodiment] y 15 The following is a detailed description of several preferred embodiments for illustrating the structure and function of the present invention. The brief description of the drawings is as follows: The first figure is the most provided by the present invention. 2 is a cross-sectional view of the line AA in the second figure; the fourth drawing is a partially exploded perspective view of the above-described most preferred embodiment. Please refer to the second to fourth figures for a preferred embodiment of the present invention. The multilayer circuit board 2' is a multilayer printed circuit board having an approximate integrated circuit wafer size for use in a wafer test probe. On the card, a large number of wafers 200924591 circuit components can be electrically tested in a single time, and are mounted on a plurality of substrates 20 having good insulating properties. A plurality of signal circuits and grounding circuits 40 having a frequency transmission line characteristic are also provided. And the substrate 2 is laminated and laminated to each other, the multilayer circuit board 2 has a pair of upper and lower surfaces, 2〇2, and the upper surface of the upper surface 5 is provided with a plurality of top points 2 〇3, the lower surface is placed near the center, and there are many solder joints 2G4'. Therefore, when the multilayer circuit board 2 is applied to the test probe card, the upper solder joint 203 is used for the test head of the test machine. To receive the test signal, the lower solder joints 204 are connected for the test probes to send the test signals by touching the Ball circuit components, and then receiving the return test results 10 to the circuit board 2 for reading by the test sockets. , where: ^ please refer to the third and fourth figures, each of the signal circuits 30 from The first and upper solder joints 203 are extended to a lower solder joint 2〇4, and have signal vias 31 extending longitudinally through the substrate 20 and a plurality of horizontally extending signal conductors & The wires 32 are horizontally extended and disposed on the lower adjacent substrate 20, and the two ends of the adjacent two signal wires 32 are respectively connected to the signal guiding holes 31 to form a parallel electrical characteristic of the listening device. The signal guiding hole 3U through which the substrate 21 is disposed on the upper surface 201 is electrically connected to the upper soldering point 203, and is further connected to the signal guiding hole 312 which is disposed through the inner substrate 22. The two signal wires 20 32 are electrically connected, and the second signal wires 32 extend to the middle substrate to the middle of the inner substrate, and then pass through the signal guiding holes 312 and the signal guiding holes of the substrate f disposed under the lower surface 202. 313 is electrically connected, so that each of the signal circuits 3 can electrically connect the signal from the upper soldering point 203 to the lower solder joint 204 by the signal conducting holes 31 and the two signal wires 32, due to the inner layer. The signal guiding hole 312 pierced by the substrate 200924591 22 abuts the two signals The line is called the moxibustion to electrically connect the remaining signal guiding holes 312, so that the signal is transmitted to the signal circuit 3〇 without the transmission interface continuing in the horizontal and vertical connecting paths. 5 The grounding circuits 40 are adjacent to each other. The signal circuit 30 is disposed to be connected to the ground potential after the multi-layer circuit board 2 is electrically turned on, so as to maintain the characteristic impedance required for the high-frequency signal to be transmitted by the signal circuit 30, each of the grounding circuits 40 has a longitudinal penetration. a plurality of grounding vias 41 of the substrate 2 and a plurality of grounding conductors 42 extending horizontally, and a plurality of grounding vias 41 are arranged side by side between the adjacent ones of the signal guiding holes 31, so that the signal guiding holes 31 are transmitted The signal has a specific characteristic impedance, and the signal wires 32 of each of the signal circuits 3 are adjacent to each other and the grounding wires 42 are adjacent to the same layer and the upper and lower adjacent substrates 20 to maintain the parallel connection of the two signal wires 32. The equivalent characteristic impedance is equivalent to the characteristic impedance of each of the guide holes 31. In summary, the multi-layer circuit board 2 provided by the present invention passes through the signal guiding hole 31 from the upper soldering point 203 to the parallel two-way conducting wire 32 during the internal transmission of the signal, and then passes through the signal guiding hole 31 to the same. When the solder joint 204 is soldered, the ground via 41 and the ground conductor 42 are disposed adjacent to each other to provide a characteristic impedance required for signal transmission, and when the signal circuit 3 is transmitted from the signal guide 2 to the signal conductor 32, The equivalent parallel characteristic of the lower adjacent two of the signal wires 32 makes the characteristic impedance lower than that of the single signal wire 32, and the width of the single signal wire does not need to be widened even if the signal guiding hole 31 The adjacent signal wires 32 are provided as a continuous signal transmission interface and have matching characteristic impedances, thereby effectively avoiding the penetration loss of the reflection loss of the 200924591 signal transmission interface and effectively utilizing the transmission requirement of the board No. 2. Gu set the same amount of complaints 歹 J J J J J J 也 也 也 J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J The money Wei, therefore, the mosquito-free circuit towel, such as the above-mentioned grounding wire, is equivalent to the material-like slave-like fabric. If a large or even a whole metal layer is placed on the upper and lower adjacent substrates of the signal circuit, In order to achieve the effect that the grounding secret is to achieve, the mosquito cord is set in the inner layer of the circuit board as shown in the preferred embodiment of the present invention, and the grounding turn is determined. The inner layer or the upper and lower layers of the substrate. 15
Cj 唯，以上所述者，僅為本發明之較佳可行實施例而已， 故舉凡應用本發明說明書及申請專利範圍所為之等效結構 變化，理應包含在本發明之專利範圍内。 200924591 【圖式簡單說明】 第一圖係習用多層印刷電路板之結構示意圖； 第二圖係本發明所提供最較佳實施例之頂視圖； 第三圖係上述第二圖中A-A連線之剖視圖； 5 第四圖係上述最較佳實施例之局部分解立體圖。 【主要元件符號說明】 I: 2多層電路板 201上表面 203上銲點 21上基板 23下基板 20基板 ίο 202下表面 204下銲點 22内層基板 30訊號電路 31、311、312、313 訊號導孔 15 32訊號導線 40接地電路 G 41接地導孔 42接地導線 11The above description is only for the preferred embodiment of the present invention, and the equivalent structural changes of the present invention and the scope of the patent application are intended to be included in the scope of the present invention. 200924591 [Simplified description of the drawings] The first figure is a schematic structural view of a conventional multilayer printed circuit board; the second figure is a top view of the most preferred embodiment of the present invention; the third figure is the AA connection in the above second figure Cross-sectional view; 5 The fourth figure is a partially exploded perspective view of the above-described most preferred embodiment. [Main component symbol description] I: 2 multilayer circuit board 201 upper surface 203 solder joint 21 upper substrate 23 lower substrate 20 substrate ί 202 lower surface 204 lower solder joint 22 inner substrate 30 signal circuit 31, 311, 312, 313 signal guide Hole 15 32 signal wire 40 ground circuit G 41 grounding hole 42 grounding wire 11