TWI334323B - - Google Patents

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TWI334323B
TWI334323B TW96129687A TW96129687A TWI334323B TW I334323 B TWI334323 B TW I334323B TW 96129687 A TW96129687 A TW 96129687A TW 96129687 A TW96129687 A TW 96129687A TW I334323 B TWI334323 B TW I334323B
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signal
grounding
hole
layer
adjacent
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TW96129687A
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TW200908850A (en
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Microelectonics Technology Inc
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1334323 九、發明說明: 【發明所屬之技術領域】 本發明係與印刷電路板有關’特別是指用於高頻探針 卡之一種多層印刷電路板。 【先前技術】 用於晶圓級測試之探針卡中,探針卡電路板以具有適 當抗壓性及絕緣性❹層印刷電路板所構成,電路板周圍 上方的銲墊係供測試機台的測試頭點觸,使各銲墊所對應 連接之傳齡路傳送賴機台的職訊號至電路板下方近 中心處所轉設Ϊ之探針上,因此當各探針對應點觸的晶 圓電子兀件接收測試訊號後’則透過探針卡回傳所對應 電,特性至職機台以供分析,如此在整個晶圓級測^過 程中’探針卡電路板的傳輸線路設計對電子元件 15 很^的影響,尤其隨著電子科技越趨複雜且高^ 之運作,職過程需涵蓋晶圓上大量的電路 = 實際對應的高速運作條件,故不但探 私作於 輸線路之製作更需符合高逮訊號 針對高速測試的傳輸環境時,已有 _3號所提供之『低漏電流探針卡』結構国;二= =輸;==:環境,善傳輪線路之= 質及反應速度問題:然:於品 路板表面再與中續直接接設之探針鱗通,;電^= 4 利=僅適合於少量高頻測試需求 不需局頻傳輸條件的訊號線路 ^構儘g其餘 =5,當整個待測為- :輸並無法單一電路板表面的高頻傳 盖所有電子電路讀的高_試需求。 从^旦將高頻傳輸線路佈設於電路板内部時,線路需由 外至内且由上至下的延伸穿設層疊之印刷二線= 著重於層間電路板的材質特性,電 導通 頻傳輸特性的重大因素;== 號所提供之『具電路遮罩與控制阻 =貝孔4』’係於訊號傳輸貫關騎定間距設置接地 15 1;«及^ ί ^ Λ號於多層印刷電路板傳遞時所面臨漏電流 兩頻傳輸所需之特性阻抗,至於若電路板表面 人…、他電路7G件相接設,當然訊號貫孔及鄰近之接地貫 =須接設之電路元件同時電性連接,才能有效於 傳輸環境皆維持其特性阻抗;朗訊號貫孔與周 =地貝孔之間僅設計有微小的狀間距以維持高頻訊號 傳輸之特性阻抗,因此電路板表面欲與其他電路元件相接 设尚須考量與訊號貫孔及接地貫孔分別相接之電路元件的 二寸間距,-旦貫孔間距與電路元件間距無法實際對應的 月况下,往往無法達到有效電性連接的作用甚至發生不 必要的漏電流以及電性短路現象。 以第-圖所示習用之-探針卡1為例,即為將高頻傳 輸線路倚設於一多層印刷電路板10内部的結構電路板1 〇 1334323 於上、下表面101、102分別近外圍及近中心處設有多數個 銲墊11、12,電路板10内佈設有多數個訊號線路13、接地 線路14以及導孔15,其中,上表面1〇1之銲墊u為與測 試機台(圖t未示)之測試頭2間的電性連接介面,且透 5過電路板10外圍之導孔151、152與各訊號線路13及接地 線路14分別電性連接,下表面1〇2之銲墊12為與探針 之間的電性連接介面,且透過電路板1〇近中心之導孔153、 154與各訊號線路13及接地線路14分別電性連接,各接地 線路14為佈設於鄰近訊號線路丨3之上、下電路層,以達 1〇到高頻測試訊號於各訊號線路13傳輸時所需之特性阻抗。 當高頻測試訊號自測試機台之測試頭2送出以至探針 17之傳輸路徑上,除了藉由訊號線路13傳輪外,同時需經 由導孔15卜153傳導於電路板1〇之上、下表面1(n、1〇2 之間,其中上表面101各銲墊11之寬度及相距間隔係設計 15為可供測試機台之各測試頭2對應點觸,同時考量測試頭 2之對準誤差條件,故銲墊11之間距決定於測試機台之測 試頭2間距,進而決定了電路板1〇外圍導孔151、152之 間距,然以向頻訊號傳輸所需具備之特性阻抗條件,各測 s式頭2之間距甚至其截面半徑皆大於訊號線路13與相鄰接 20地線路14所需維持之距離,故使相鄰導孔151、152之設 置距離無法縮減至如相鄰訊號線路13與接地線路14之距 離,造成高頻訊號於各導孔151傳輸時無法維持如同於訊 號線路13中傳輸之特性阻抗;類似問題亦發生於電路板10 近中心之導孔153、154,由於下表面1〇2各銲墊12之寬度 6 1334323 =相距間隔係設計為可供各探針17對應銲接,同時考量接 口強度所需銲錫量及避免銲接過程中錫流或錫漏發生所需 之,隔誤差,故銲墊12之間距往往亦大於訊號線路13與 相鄰接地線路14所需維持之距離,使相鄰導孔ι53、ι54 5 ^間距無法縮減至如相鄰訊號線路13與接地線路14之距 離,同樣造成高頻訊號於各導孔153傳輸時無法維持如同 ^訊,線路13中傳輸之特性阻抗;因而探針卡1於電測過 程:高頻訊號傳輸於導孔151、153及訊號線路13之特性 阻抗不匹配,致使高頻訊號嚴重衰減而降低有效傳輸頻 1〇段’無法達到實際高頻電測之功效。 【發明内容】 因此,本發明之主要目的乃在於提供一種多層印刷電 路板,使用以高頻測試之探針卡可維持有高頻訊號傳輸的 15阻抗匹配特性,並具有最佳的電性測試品質。 為達成剞揭目的,本發明所提供一種多層印刷電路板 係包括有相互疊置之至少一轉接層及多數個高頻電路層, 該轉接層具有一轉接面與該高頻電路層相接合,以及貫穿 有多數個具導電性之第一訊號貫孔及第一接地貫孔,該些 20高頻電路層水平佈設有多數個訊號導線、接地導線,以及 貫穿有多數個第二訊號貫孔及第二接地貫孔;其中,該第 一接地貫孔與該第一訊號貫孔之相鄰距離大於該第二接地 貝孔與該第一訊號貫孔之相鄰距離,該轉接面佈設有一接 、地金屬’位於各該第一訊號貫孔周圍且電性連接該政第一 1334323 及第二接地貫孔,該些第一接地貫孔為電性導通至接地電 位’該接地金屬與該第一訊號貫孔之相鄰距離等於該接地 金屬與該第·一 §凡说貫孔之相鄰距離,亦等於該第二接地貫 孔與該第二訊號貫孔之相鄰距離;因此高頻訊號穿入電路 5板後,可藉轉接面之接地金屬將接地訊號導通至高頻訊號 、 維持特性阻抗所需之特定間距,藉以維持高頻訊號貫穿該 電路板的縱向傳輸過程具有阻抗匹配的特性。 【實施方式】 1〇 以下,茲配合圖示列舉若干較佳實施例,用以對本發 啊之結構與功效作詳細說明,其中所用圖示之簡要說明如 下: 15 2〇 圖; 圖; 第-圖係本發明所提供第—較佳實施例之探針卡頂視 第四圖係上述第—較佳實施例所提供探針卡之底視 第^係上述第三圖中5.5連線之剖視圖; .第'、圖係上述第—㈣實施觸提供上轉接層底視 圖 .第七圖係上述第—較佳實施例所提供下轉接層 頂視 上述第—較佳實闕所提供探針卡之高頻傳 馈。ίΐ號之特性曲線圖; 第九圖係本發明所提供第二較佳實施例之電路板結構 8 1334323 * 示意圖。 請參閱如第二至第五圖所示本發明所提供第一較佳實 施例之一探針卡3,係具有高介電常數特性之一多層印刷^ • 5路板30以及對應接設之多數個探針40結構,可供测試: \ 台(圖中未示)之測試頭2點觸該電路板30並透過該些探 . 針40點觸積體電路晶圓(圖中未示)以做高頻雷性測古十 • 該電路板3〇係區分有上、下相對之-上表^表 面302以及分佈於内、外圍之一探針區3〇3及一測試區 H) 304 ’該電路板30之上、下表面3(H、3〇2分別設有多數個 銲墊31、32,該電路板3〇内設有相互疊置之一上轉接層 33、多數個南頻電路層34及一下轉接層35,且佈設有多數 個自該上轉接層33延伸至下轉接層35之訊號電路36及接 地電路37,配合第五圖參照,其中: 15 該上表面301之銲墊31位於測試區304供測試機台電 • 性連接’相鄰各該銲塾31之間距為第-間距D卜係考量 麟機台之戦頭2 _接_之解餅而設置,故各 • 雜墊31之寬度相當於各該測試頭2之截面寬度,各該銲 塾31之相#第一間足巨m才目當於相鄰各該測試頭2之間 2〇距該二銲塾31區分有用以接收高顯試訊號之訊號鲜塾 頻職傳遞之接地減所需賴接設之接 μ 12,該下表面302之銲墊32位於探針區303供該 電11連接’相鄰各該銲墊32之間距為第二間距 ’”讀各探針40銲接之條件而設置 ,包括考量接合 9 1334323 強度所需銲錫量及避免銲接過程中錫流或錫漏發生所需之 間隔誤差,該些銲墊32區分有對應輸出高頻測試訊號及接 地訊號之訊號銲墊321及接地銲墊322。 該上、下轉接層33、35分別為形成該電路板3〇上、 5下表面301 ' 302之印刷電路層,使該上轉接層33具有該 上表面301及一第一轉接面330,該下轉接層35具有該下 表面302及一第二轉接面350,該些高頻電路層用以延 伸佈設該些訊號電路36及接地電路37’使測試機台之測試 訊號可由上至下、由外至内傳遞至該些探針4〇。 ⑴ 各該机號電路36區分有穿設各該轉接層33、35之第 一 5孔號貫孔361、穿没該些南頻電路層34之第二訊號貫孔 362,以及核向佈设於該南頻電路層34之訊號導線363 ·甘 中,該些第一訊號貫孔361於上、下表面3〇1、3〇2分別電 性連接該些訊號銲墊311、321,鄰接該二轉接面wo、35〇 15之第一说號貝孔362與該第一訊號貫孔361電性連接,該 些第一訊號貝孔362為沿訊號傳遞路徑縱向貫穿該高頻電 路層34至所需對應電性連接之訊號導線363即截止,各該 訊號導線363為自該測試區304水平延伸分佈至探針i 303,於測試區304電性連接上層該高頻電路層34之第二 2〇訊號貫孔362,於探針區303電性連接下層該高頻電路層 34之第二訊號貫孔362 ’使各該訊號電路36為單一連續二 訊號傳輸迴路’避免高頻訊號於縱向傳遞轉至橫向傳遞之 轉折介面時,高頻電磁波於不連續的傳輸路徑發生介面反 射現象而造成訊號耗損。 10 1334323 各該接地電路37區分有穿設各該轉接層33、%之第 一接地貫孔371、水平佈設於各該轉接面33〇、35〇之接地 金屬372、373、穿設該些高頻電路層34之第二接地貫孔 374,以及橫向佈設於該高頻電路層34之接地導線3乃;其 5中,各該第一接地貫孔371於上、下表面301、302分別^ 性連接該接地銲墊312、322,該些第一接地貫孔371相鄰 對應各該第一訊號貫孔361,相鄰間距即受限於所對應該也 銲墊31、32之第一及第二間距〇1、1)2,各該接地金屬372、 373位於各該第一訊號貫孔361周圍,配合第六及第七圖參 1〇照’用以將所對應該轉接面330、350中之第一接地貫孔371 電性導通至相鄰該高頻電路層34之第二接地貫孔374,提 供該些第一接地貫孔371及第二接地貫孔374之共接地平 面,接地金屬與該第一訊號貫孔之相鄰距離等於該接地金 屬與該第二訊號貫孔之相鄰距離且等於該第二接地貫孔與 15該第二訊號貫孔之相鄰距離,各該第二接地貫孔374對應 該第二訊號貫孔362相鄰設置有一第三間距D3,相鄰距離 相當於各該高頻電路層34之厚度,為維持高頻測試訊號特 性阻抗之最佳訊號傳輸結構,該些接地導線375自該測試 區304水平延伸分佈至探針區303,用以電性連接該第二接 20地貫孔374並與該些訊號導線363緊鄰佈設於左右相鄰第 三間距D3處或上下相鄰之高頻電路層34。 該些探針40為一般懸臂式探針結構,為了對應於晶圓 電路上高頻測試元件之接地迴路結構,相鄰二該探針40需 對應點觸測試元件之高頻訊號接點及接地訊號接點,因此 1334323 該電路板30之相鄰各該訊说電路36與接地電路37即分別 透過該訊號銲墊321及接地銲墊322對應電性連接相鄰各 該探針40 ’該些探針40之結構、大小以及與電路板之 接設方式為決定該些鋅墊32之第二間距D2條件。 5 故當測试機台之測試頭2電性連接該上表面301之訊 號銲墊311及接地銲墊312後,各該訊號銲塾311所接收 之高頻測試訊號即透過該上轉接層33之第一訊號貫孔 36卜該高頻電路層34之第二訊號貫孔362與訊號導線363 以及該下轉接層35之第一訊號貫孔361傳輸至下表面3〇2 ίο之訊號知塾321 ’鄰近各該南頻測試訊號之傳輸路徑皆對鹿 有接地訊號自該上表面301之接地銲墊312接收後,導^ 至5亥上轉接層33之第一接地貫孔371 '該上轉接面330之 接地金屬373、該高頻電路層34之第二接地貫孔與之 接地導線375、該下轉接面350之接地金屬373、該下轉接 15層35之第一接地貫孔371以至該下表面302之接地銲墊 322,使各該訊號電路36自上表面301延伸至下表面 之路徑上,除了分別與二表面3〇1、302鄰接之單一電路層 (上、下轉接層33、35)中,第一訊號貫孔361與對應相 鄰的第一接地貫孔371有間隔較遠之第一及第二間距D1、 2〇 D2外,藉由各該接地金屬372、373用以將所對應該轉接 面330、350中之第一接地貫孔371電性連接相^高頻電 路層34之第二接地貫孔374,使其餘第二訊號貫孔及 訊號導線363皆可依照高頻訊號傳輸所需維持特性阻抗之 需求’沿其路徑於鄰近第三間距D3處佈設有該第二接地貫 12 13343231334323 IX. Description of the Invention: [Technical Field] The present invention relates to a printed circuit board, particularly a multilayer printed circuit board for a high frequency probe card. [Prior Art] In the probe card for wafer level testing, the probe card circuit board is composed of a printed circuit board having appropriate pressure resistance and insulation, and the solder pad above the circuit board is used for the test machine. The test head touches, so that the connection age of each pad is transmitted to the probe of the machine to the probe near the center of the circuit board, so when the probe touches the wafer After receiving the test signal, the electronic component transmits the corresponding power through the probe card, and the characteristic machine is used for analysis. Thus, the transmission line design of the probe card circuit board is designed for the entire wafer level measurement process. The influence of component 15 is very important, especially with the increasingly complicated and high operation of electronic technology. The job process needs to cover a large number of circuits on the wafer = the actual corresponding high-speed operating conditions, so it is not only the production of the transmission line. When it is necessary to meet the high-speed test transmission environment for high-speed test, the "Low Leakage Current Probe Card" structure provided by _3 has been constructed; 2 = = lose; ==: environment, good transmission line = quality and Reaction speed problem: Of course: on the surface of the road board The probe is directly connected to the continuous scale of the probe; the electric ^= 4 profit = only suitable for a small number of high-frequency test requirements without the need for local frequency transmission conditions of the signal line ^ construction of the rest = 5, when the entire test is - : The high-frequency transmission of a single board surface cannot be read by all electronic circuits. When the high-frequency transmission line is disposed inside the circuit board, the line needs to be printed from the outside to the inside and extended from top to bottom. The printed two lines are emphasized. The material characteristics of the interlayer circuit board are emphasized, and the conductive transmission characteristics are transmitted. The significant factor; == provided by the "with circuit mask and control resistance = Beikong 4" 'system is connected to the signal transmission distance setting distance 15 1; « and ^ ί ^ Λ on the multilayer printed circuit board The characteristic impedance required for two-frequency transmission of leakage current is transmitted. If the surface of the circuit board is..., the 7G parts of the circuit are connected, of course, the signal through hole and the adjacent ground connection = the circuit components to be connected simultaneously. The connection can effectively maintain its characteristic impedance in the transmission environment; only the small spacing between the Lucent via and the perimeter = ground hole is designed to maintain the characteristic impedance of the high-frequency signal transmission, so the surface of the board is intended to be used with other circuits. It is necessary to consider the two-inch spacing of the circuit components that are connected to the signal through-hole and the ground-through through-hole respectively. If the distance between the through-holes and the circuit component spacing cannot be actually met, the effective electrical properties cannot be achieved. The effect of the connection can even lead to unnecessary leakage currents and electrical short circuits. Taking the probe card 1 as shown in the first figure as an example, the structural circuit board 1 〇 1334323 which is placed on the inner side of a multilayer printed circuit board 10 on the upper and lower surfaces 101 and 102 respectively There are a plurality of pads 11 and 12 near the periphery and near the center, and a plurality of signal lines 13, ground lines 14 and via holes 15 are arranged in the circuit board 10, wherein the pads u of the upper surface 1〇1 are tested. The electrical connection interface between the test heads 2 of the machine (not shown) is electrically connected to the signal lines 151 and 152 of the periphery of the circuit board 10, and the signal lines 13 and the ground lines 14 respectively. The solder pad 12 of the 〇 2 is an electrical connection interface with the probe, and is electrically connected to each of the signal lines 13 and the ground line 14 through the via holes 153 and 154 of the circuit board 1 near the center, and the ground lines 14 are respectively connected. The characteristic impedance required for the transmission of the high frequency test signal to each of the signal lines 13 is provided on the adjacent signal line 丨3 and the lower circuit layer. When the high-frequency test signal is sent from the test head 2 of the test machine to the transmission path of the probe 17, in addition to being transmitted by the signal line 13, it is also transmitted to the circuit board 1 through the via hole 15 The lower surface 1 (n, 1 〇 2, wherein the width and spacing of the pads 11 of the upper surface 101 are designed to be corresponding to each test head 2 of the test machine, and the pair of test heads 2 are considered. The quasi-error condition, so the distance between the pads 11 is determined by the distance between the test heads 2 of the test machine, and then the distance between the peripheral guide holes 151 and 152 of the circuit board 1 is determined, and the characteristic impedance conditions required for the transmission of the frequency signals are required. The distance between the s-shaped heads 2 and even the cross-section radius thereof is greater than the distance required for the signal lines 13 and the adjacent lines 20 to be maintained, so that the set distances of the adjacent guiding holes 151, 152 cannot be reduced to such as adjacent The distance between the signal line 13 and the ground line 14 causes the high-frequency signal to be unable to maintain the characteristic impedance transmitted in the signal line 13 when the conductive holes 151 are transmitted; similar problems also occur in the near-center guiding holes 153, 154 of the circuit board 10. , due to the lower surface 1〇2 each pad 1 2 width 6 1334323 = the spacing interval is designed to be suitable for the welding of each probe 17, while considering the amount of solder required for the interface strength and avoiding the need for tin flow or tin leakage during the soldering process, the error, so the pad 12 The distance between the signal lines 13 and the adjacent ground lines 14 is also often greater than the distance between the adjacent signal lines 13 and the adjacent ground lines 14 so that the distance between the adjacent signal lines 13 and the ground line 14 cannot be reduced. When the frequency signal is transmitted in each of the guiding holes 153, the characteristic impedance transmitted in the line 13 cannot be maintained; therefore, the probe card 1 is in the electrical measurement process: the characteristic impedance of the high frequency signal transmitted to the guiding holes 151, 153 and the signal line 13 The mismatch causes the high-frequency signal to be seriously attenuated and the effective transmission frequency is reduced. The effect of the actual high-frequency electrical measurement cannot be achieved. [Invention] Therefore, the main object of the present invention is to provide a multilayer printed circuit board, which is used. The high frequency test probe card can maintain the 15 impedance matching characteristics of high frequency signal transmission and has the best electrical test quality. To achieve the purpose, the present invention provides a multi-purpose The printed circuit board includes at least one transfer layer and a plurality of high frequency circuit layers stacked on each other, the transfer layer has a transition surface joined to the high frequency circuit layer, and a plurality of conductive layers are penetrated therethrough. a first signal through hole and a first ground through hole, wherein the plurality of high frequency circuit layers are horizontally provided with a plurality of signal wires, ground wires, and a plurality of second signal through holes and second ground through holes; wherein The distance between the first grounding through hole and the first signal through hole is greater than the adjacent distance between the second grounding hole and the first signal through hole, and the transfer surface cloth is provided with a ground metal a first through hole is electrically connected to the first first 1334323 and the second ground through hole, and the first ground through hole is electrically connected to the ground potential 'the adjacent distance between the ground metal and the first signal through hole And the adjacent distance between the grounding metal and the first through hole is equal to the adjacent distance between the second grounding through hole and the second signal through hole; therefore, after the high frequency signal penetrates into the circuit board 5 Grounding can be grounded by the grounding metal of the adapter The number is turned on to the high frequency signal and the specific spacing required to maintain the characteristic impedance, thereby maintaining the impedance matching characteristics of the high frequency signal throughout the longitudinal transmission of the board. [Embodiment] In the following, a number of preferred embodiments are listed with reference to the drawings for a detailed description of the structure and function of the present invention. The brief description of the illustrations used is as follows: 15 2〇图;图;第The present invention provides a probe card according to a first preferred embodiment of the present invention. FIG. 4 is a cross-sectional view of the bottom view of the probe card provided in the above-described first preferred embodiment. The first section is the bottom view of the upper layer of the adapter layer. The seventh diagram is provided by the above-mentioned preferred embodiment. High frequency transmission of the needle card. The ninth diagram is a circuit board structure of the second preferred embodiment of the present invention. 8 1334323 * Schematic. Please refer to the probe card 3 of the first preferred embodiment of the present invention as shown in the second to fifth figures, which is a multilayer printed circuit board having a high dielectric constant characteristic and a corresponding connection. The majority of the probe 40 structure can be tested: \ Test head 2 (not shown) touches the circuit board 30 and passes through the probes. The needle 40 touches the integrated circuit wafer (not shown) Show) to do high-frequency lightning measurement ancient ten • The circuit board 3 〇 is divided into upper and lower relative - upper surface ^ surface 302 and distributed in the inner and outer probe area 3 〇 3 and a test area H 304' above and below the circuit board 30 (H, 3〇2 are respectively provided with a plurality of pads 31, 32, which are provided with one on top of each other, 33 The south frequency circuit layer 34 and the lower switching layer 35 are provided with a plurality of signal circuits 36 and grounding circuits 37 extending from the upper switching layer 33 to the lower switching layer 35, with reference to the fifth figure, wherein: 15 The pad 31 of the upper surface 301 is located in the test area 304 for the test machine to electrically connect the adjacent pads. The distance between the adjacent pads 31 is the first spacing D. The width of each of the mats 31 corresponds to the cross-sectional width of each of the test heads 2, and the phase of each of the solder bumps 31 is the same as the adjacent test heads. The distance between the two pads 2 is different from that of the second pad 31, which is used to receive the signal of the high-intensity test signal. The area 303 is provided for the connection of the adjacent electrodes 12 to the second pitch '', and the conditions of the soldering of each probe 40 are included, including the amount of solder required for bonding the strength of 9 1334323 and avoiding tin during soldering. The spacing error required for the flow or tin leakage occurs. The pads 32 are separated by a signal pad 321 and a ground pad 322 corresponding to the output high frequency test signal and the ground signal. The upper and lower transfer layers 33 and 35 are respectively Forming a printed circuit layer on the lower surface 301 301 of the circuit board 3, the upper switching layer 33 has the upper surface 301 and a first switching surface 330, and the lower switching layer 35 has the lower surface 302 and a second switching surface 350, the high frequency circuit layer is used to extend the signal circuit 36 and ground The path 37' allows the test signal of the test machine to be transmitted from top to bottom and from the outside to the inside of the probe. (1) Each of the machine numbers 36 is distinguished by the first of each of the transfer layers 33, 35. a 5 hole number through hole 361, a second signal through hole 362 through which the south frequency circuit layer 34 is not worn, and a signal line 363 disposed in the south frequency circuit layer 34, the first signal The hole 361 is electrically connected to the signal pads 311 and 321 on the upper and lower surfaces 3〇1 and 3〇2, respectively, adjacent to the first index hole 362 of the two transfer faces wo, 35〇15 and the first The signal through holes 361 are electrically connected, and the first signal holes 362 are cut off in the longitudinal direction of the signal transmission path through the high frequency circuit layer 34 to the corresponding corresponding electrical connection. The test area 304 is horizontally distributed to the probe i 303. The test area 304 is electrically connected to the second 2-channel signal via hole 362 of the upper layer of the high-frequency circuit layer 34, and the lower-layer high-frequency circuit is electrically connected to the probe area 303. The second signal through hole 362' of the layer 34 makes each of the signal circuits 36 a single continuous two-signal transmission circuit 'avoiding high-frequency signals in the vertical direction When the transfer is transferred to the transition interface of the lateral transmission, the high frequency electromagnetic wave is caused by the interface reflection phenomenon in the discontinuous transmission path, resulting in signal loss. 10 1334323 Each of the grounding circuits 37 is divided into a first grounding through hole 371 through which each of the switching layers 33 and % is disposed, and a grounding metal 372, 373 horizontally disposed on each of the switching surfaces 33, 35, and is disposed. a second ground via 374 of the high frequency circuit layer 34, and a ground conductor 3 disposed laterally on the high frequency circuit layer 34; wherein the first ground via 371 is on the upper and lower surfaces 301, 302 The grounding pads 312, 322 are respectively connected to the first signal through holes 361 adjacent to the first signal through holes 361, and the adjacent spacing is limited to the corresponding pads 31 and 32. The first and second spacings 〇1,1)2, each of the grounding metals 372 and 373 are located around each of the first signal through holes 361, and cooperate with the sixth and seventh figures to adjust the corresponding The first ground via 371 of the surface 330, 350 is electrically connected to the second ground via 374 adjacent to the high frequency circuit layer 34, and provides a total of the first ground via 371 and the second ground via 374. The grounding plane, the adjacent distance between the grounding metal and the first signal through hole is equal to the adjacent distance between the grounding metal and the second signal through hole and is equal to The second grounding through hole is adjacent to the second signal through hole, and each of the second grounding through holes 374 is adjacent to the second signal through hole 362 and has a third spacing D3 adjacent to each other. The thickness of the high-frequency circuit layer 34 is the best signal transmission structure for maintaining the characteristic impedance of the high-frequency test signal. The grounding wires 375 are horizontally distributed from the test area 304 to the probe area 303 for electrically connecting the second The grounding holes 374 are connected to the grounding wires 374 and are disposed adjacent to the left and right adjacent third-pitches D3 and the high-frequency circuit layers 34 adjacent to each other. The probes 40 are generally cantilever probe structures. In order to correspond to the ground loop structure of the high frequency test components on the wafer circuit, the adjacent probes 40 need to correspond to the high frequency signal contacts and grounding of the test components. The signal contacts, so that the adjacent each of the signaling circuit 36 and the grounding circuit 37 of the circuit board 30 are electrically connected to the adjacent probes 40 by the signal pads 321 and the ground pads 322 respectively. The structure, size and connection mode of the probe 40 are determined by the second spacing D2 of the zinc pads 32. 5, after the test head 2 of the test machine is electrically connected to the signal pad 311 and the ground pad 312 of the upper surface 301, the high frequency test signal received by each of the signal pads 311 passes through the upper transfer layer. The first signal through hole 36 of the high frequency circuit layer 34 and the signal line 363 of the high frequency circuit layer 34 and the first signal through hole 361 of the lower transfer layer 35 are transmitted to the signal of the lower surface 3〇2 ίο The transmission path of the adjacent 321' adjacent to the south frequency test signal is received by the grounding pad 312 of the upper surface 301 after the deer has a grounding signal, and then leads to the first grounding through hole 371 of the upper layer 33 of the upper layer. 'The grounding metal 373 of the upper switching surface 330, the second grounding via of the high frequency circuit layer 34 and the grounding conductor 375, the grounding metal 373 of the lower switching surface 350, and the fifth layer of the lower switching layer 35 A ground via 371 and a ground pad 322 of the lower surface 302 extend the path of each of the signal circuits 36 from the upper surface 301 to the lower surface except for a single circuit layer adjacent to the two surfaces 〇1, 302, respectively ( In the upper and lower transfer layers 33, 35), the first signal through hole 361 and the corresponding adjacent first ground through hole 371 have Each of the grounding metals 372, 373 is used to electrically connect the first grounding vias 371 of the corresponding switching faces 330, 350, respectively, apart from the first and second pitches D1, 2D2. ^ The second ground via 374 of the high frequency circuit layer 34 enables the remaining second signal vias and signal conductors 363 to maintain the required characteristic impedance in accordance with the high frequency signal transmission ' along the path adjacent to the third pitch D3 The cloth is provided with the second grounding 12 1334323

Pw。吳差條件’需使上、下表面、302之訊號銲塾311、 5 321與接地銲墊312、322設置間距遠大於高頻電路層%Pw. The condition of the difference between the upper and lower surfaces, 302 signal soldering 311, 5 321 and the grounding pads 312, 322 is much larger than the high frequency circuit layer %

中訊號導線363與接地導線375之間距,亦即第一訊號貫 孔361與對應相鄰的第一接地貫孔371設置間距遠大於維 持高頻特性阻抗需求之特性,僅限於單層印刷電路板結構 之上、下轉接層33、35中,其餘高頻訊號傳輸於該些高頻 1〇電路層34中皆可維持所需之特性阻抗,使高頻訊號穿入電 路板30後及穿出電路板3〇前,皆可藉該上、下轉接面33〇、The distance between the middle signal conductor 363 and the grounding conductor 375, that is, the distance between the first signal through hole 361 and the corresponding adjacent first ground through hole 371 is far greater than the requirement of maintaining the high frequency characteristic impedance requirement, and is limited to the single layer printed circuit board. In the upper and lower transfer layers 33, 35, the remaining high frequency signals are transmitted in the high frequency 1 circuit layer 34 to maintain the required characteristic impedance, so that the high frequency signal penetrates the circuit board 30 and passes through Before the circuit board 3 is turned off, the upper and lower transfer surfaces 33,

孔374及接地導線375。 因此無論因測試機台之測試頭對準間距與對準誤差條 件,或者因探針銲接過程中避免錫流或錫漏發生所需之間 15 之接地金屬372、373將接地訊號導通至高頻訊號維持 特性阻抗所需之第三間距D3處,因此維持高頻訊號貫穿該 々電路板如的縱向傳輸過程具有阻抗匹配的特性;請參閱如 第二及第八圖卿,分職㈣聰針卡1及本發明所提 供該探針卡3之高頻量測頻率特性圖,相較兩圖之反射耗 =咖Γη I〇ss)曲,線S11、S11,可知,本發明所提供該探 ^十卡3之反射耗損曲線su’有較低的反射率,顯示於整個 向,頻寬範财鋪雜抗隨雖,另相較兩圖之插入 耗損(insertion l0SS)曲線幻卜S21,更顯示習用該探針卡 1於-3(^B增益之通帶(passband)限制頻率僅約有2% GHZ,遠小於本發明所提供之鋪針卡3可高於1〇GHz, 2該探針卡3具有較f用之探針卡丨為 訊 號傳輸品質。 』门)貝矾 20 1334323 【圖式簡單說明】 第一圖係習用探針卡之結構示意圖; 第二圖係上述習用探針卡之高頻傳輸訊號之特性曲線 圖; 5 第三圖係本發明所提供第一較佳實施例之探針卡頂視 圖; 第四圖係上述第一較佳實施例所提供探針卡之底視 圖, 第五圖係上述第三圖中5-5連線之剖視圖; ίο 第六圖係上述第一較佳實施例所提供上轉接層底視 圖, 第七圖係上述第一較佳實施例所提供下轉接層頂視 圖, 第八圖係上述第一較佳實施例所提供探針卡之高頻傳 15 輸訊號之特性曲線圖; 第九圖係本發明所提供第二較佳實施例之電路板結構 示意圖。 15 1334323 【主要元件符號說明】 2測試頭 3探針卡 30、50電路板 301、501上表面 302、502下表面 303探針區 5 3 04測試區 31、32銲墊 311、321、51訊號銲墊 312、322、52接地銲墊 33上轉接層 330第一轉接面 34高頻電路層 35下轉接層 350第二轉接面 36訊號電路 ίο 361第一訊號貫孔 362第二訊號貫孔 363訊號導線 37接地電路 371第一接地貫孔 372、373接地金屬 374第二接地貫孔 375接地導線 40探針 D1第一間距 15 D2第二間距 D3第三間距 S11、S11’反射耗損曲線 S21、S21’插入耗損曲線 16Hole 374 and grounding wire 375. Therefore, regardless of the test head alignment pitch and alignment error conditions of the test machine, or the need to avoid tin current or tin leakage during the probe soldering process, the grounding metal 372, 373 connects the ground signal to the high frequency. The signal maintains the third pitch D3 required for the characteristic impedance, thereby maintaining the impedance matching characteristic of the high-frequency signal throughout the longitudinal transmission process of the 々 circuit board; see, for example, the second and eighth pictures, the division (four) Congzhen The card 1 and the high-frequency measurement frequency characteristic diagram of the probe card 3 provided by the present invention are compared with the reflection consumption of the two figures, the lines S11 and S11, and the present invention provides the probe. ^The reflection loss curve of ten card 3 has a lower reflectivity, which is displayed in the whole direction, and the bandwidth is more complicated than the other. However, the insertion loss (S0SS) curve is different from the two figures. It is shown that the probe card 1 has a passband limit frequency of about 3% GHZ, which is much smaller than the needle card 3 provided by the present invention, which is higher than 1 GHz. The needle card 3 has a probe card for f signal transmission quality. 『门】贝矾20 1334 323 [Simple diagram of the diagram] The first diagram is a schematic diagram of the structure of the conventional probe card; the second diagram is the characteristic diagram of the high-frequency transmission signal of the conventional probe card; 5 The third diagram is the first comparison provided by the present invention A top view of the probe card of the preferred embodiment; a fourth view is a bottom view of the probe card provided by the first preferred embodiment, and a fifth view is a cross-sectional view of the line 5-5 in the third figure; ίο The bottom view of the upper transfer layer is provided in the first preferred embodiment, and the seventh view is a top view of the lower transfer layer provided in the first preferred embodiment, and the eighth embodiment is the first preferred embodiment. A characteristic diagram of the high frequency transmission 15 transmission signal of the probe card is provided; and the ninth diagram is a schematic structural diagram of the circuit board of the second preferred embodiment provided by the present invention. 15 1334323 [Description of main component symbols] 2 test head 3 probe card 30, 50 circuit board 301, 501 upper surface 302, 502 lower surface 303 probe area 5 3 04 test area 31, 32 pads 311, 321, 51 signal Pad 312, 322, 52 ground pad 33 on the transfer layer 330 first transfer surface 34 high frequency circuit layer 35 under the transfer layer 350 second transfer surface 36 signal circuit ί 361 first signal through hole 362 second Signal through hole 363 signal wire 37 ground circuit 371 first ground through hole 372, 373 ground metal 374 second ground through hole 375 ground wire 40 probe D1 first pitch 15 D2 second pitch D3 third pitch S11, S11 'reflection Wear curve S21, S21' insert loss curve 16

Claims (1)

1334323 十、申請專利範圍: 1 種多層印刷電路板,包括有相互疊置之一轉接 層及多數個南頻電路層,其中: —該轉接層設於該些高頻電路層上,係具有上、下相對 表面 轉接面以及貫穿有多數個具導電性之第一訊 5唬貝孔及第-接地貫孔,該表面設有多數個銲塾,分別對 應設於各該第-訊號貫孔及第一接地貫孔上,該轉接面與 該间,私路層相接合,該轉接面佈設有一接地金屬,位於 各该第-訊號貫孔周圍,該些第一接地貫孔電性導通至接 地電位且電性連接該接地金屬,相鄰於各該第一訊號貫孔 10 °又有至;一該第一接地貫孔,該接地金屬與該第一訊號貫 孔之相鄰雜小於該第—接地貫孔與該第-訊號貫孔之相 鄰距離; 该些南頻電路層係水平佈設有多數個訊號導線、接地 導線以及貫穿有多數個第二訊號貫孔及第二接地貫孔,各 15該訊號導線電性連接該第二訊號貫孔,相鄰於各該訊號導 線並列設有至少一該接地導線,各該接地導線電性連接該 第一接地貫孔,該轉接面上,該第二訊號貫孔電性連接該 第一訊號貫孔且鄰近設有該接地金屬’該接地金屬與該第 二訊號貫孔之相鄰距離小於該第一接地貫孔與該第一訊號 20貫孔之相鄰距離’相鄰於各該第二訊號貫孔設有至少一該 第一接地貫孔’該第二接地貫孔電性連接該接地金屬,該 第二接地貫孔與該第二訊號貫孔之相鄰距離小於該第一接 地貫孔與該第一訊號貫孔之相鄰距離。 2 ·依據申請專利範圍第1項所述之多層印刷電路 17 板,各該訊號導線兩端分购上、τ兩側電性連接該第二 訊號貫孔。 3·依據申請專利範圍第1項所述之多層印刷電路 板,該訊號導線與該接地導線之相鄰離 • 5 .·貫孔與該第-訊號貫孔之轉距離。 接地 4 .依據申請專利範圍第i或第3項所述之多層印刷 _ 电路板,與該訊號導線上、下緊鄰有至少一該接地導線。 5 .依據申請專利範圍第丄項所述之多層印刷電路 板,各該尚頻電路層之厚度約略相當於該轉接層之厚度。 10 6 ·依據申睛專利範圍第1項所述之多層印刷電路 板,該電路板之上、下兩侧分別具有該轉接層及該高頻電 路層,各該訊號導線兩端分別位於該電路板之内、外圍, 該轉接層之銲墊設於該電路板外圍。 7 ·依據申睛專利範圍第1項所述之多層印刷電路 15板,係具有二該轉接層,分別為疊設於該些高頻電路層上、 >下兩側之一上轉接層及一下轉接層,該上轉接層所設置之 銲墊分佈於該電路板之外圍,該下轉接層所設置之銲墊分 佈於該電路板之内圍。 8 · —種探針卡,用以電性連接於測試機台以對積體 20電路晶圓做電性測試,包括有: 一電路板,係具有上、下相對之一上表面及一下表面, 並設有至少一轉接層、多數個高頻電路層、多數個銲墊、 夕數個訊破電路及多數個接地電路,各該鲜塾位於該上表 面用以供上述測試機台點觸,各該訊號電路及接地電路分 18 別電性連接一該銲墊,且自該上表面延伸穿設該至少一轉 接層及該些高頻電路層至該下表面,該些接地電路為電性 導通至接地電位,各該訊號電路相鄰設有至少一該接地電 路,該些接地電路具有一接地金屬,設於該至少一轉接層 5與相鄰該尚頻電路層之間,各該訊號電路與相鄰該接地電 路之最短間距於該轉接層及該些高頻電路層中分別為一第 一及一第二間距,該第二間距小於該第一間距,該接地金 屬與各該訊號電路之相鄰距離小於該第一間距;以及 多數個探針,設於該電路板之下表面,分別電性連接 10該訊號電路及接地電路,用以點觸上述積體電路晶圓。 9 ·依據申請專利範圍第8項所述之探針卡,各該訊 號電路區分有穿設該至少一轉接層之第一訊號貫孔、穿設 该些兩頻電路層之第二訊號貫孔,以及橫向佈設於該高頻 電路層之訊號導線,該接地金屬與該第二訊號貫孔之相鄰 I5距離約略相當於該接地金屬與該第一訊號貫孔之相鄰距 離。 10 ·依據申請專利範圍第9項所述之探針卡,各該 訊號導線兩端分別朝上、下兩側電性連接該第二訊號貫孔。 11 .依據申請專利範圍第9項所述之探針卡,該些 20高頻電路層中,與該訊號導線上、下緊鄰並列有至少一該 接地電路。 12 .依據申請專利範圍第8項所述之探針卡,各該 高頻電路層之厚度相當於該轉接層之厚度。 Λ 13 .依據申請專利範圍第8項所述之探針卡,係具 19 1334323 有二轉接層,分別位於該些高頻電路層上、下兩側,該電 路板之下表面更設有多數個銲墊,各該訊號電路及接地電 路為延伸穿設該二轉接層並電性連接該下表面之銲墊。 201334323 X. Patent application scope: A multi-layer printed circuit board comprising an interposer layer and a plurality of south frequency circuit layers stacked one on another, wherein: - the transfer layer is disposed on the high frequency circuit layers The utility model has an upper surface and a lower surface opposite surface, and a plurality of first conductive 5 boring holes and a first grounding through hole, wherein the surface is provided with a plurality of soldering holes respectively corresponding to the first signal The through hole and the first grounding through hole are joined to the private circuit layer, and the transfer surface is provided with a grounding metal, and is located around each of the first signal through holes, and the first grounding through holes Electrically conducting to the ground potential and electrically connecting the grounding metal, adjacent to each of the first signal through holes 10°; and the first grounding through hole, the grounding metal and the first signal through hole The neighboring impurity is smaller than the adjacent distance between the first grounding through hole and the first signal through hole; the south frequency circuit layer is horizontally provided with a plurality of signal wires, a grounding wire, and a plurality of second signal through holes and a plurality of through holes Two grounding through holes, each of the 15 signal wires Connecting the second signal through hole, adjacent to each of the signal wires, at least one grounding wire is arranged in parallel, and each of the grounding wires is electrically connected to the first grounding through hole, the switching surface, the second signal through hole Electrically connecting the first signal through hole and adjacent to the grounding metal. The adjacent distance between the ground metal and the second signal through hole is smaller than the adjacent distance between the first ground through hole and the first signal through hole. The second ground through hole is electrically connected to the grounding metal adjacent to each of the second signal through holes, and the second ground through hole and the second signal through hole are opposite to each other. The adjacent distance is smaller than the adjacent distance between the first grounding through hole and the first signal through hole. 2. According to the multi-layer printed circuit board 17 described in the first paragraph of the patent application, the two ends of each of the signal wires are separately connected, and the two sides of the τ are electrically connected to the second signal through hole. 3. The multi-layer printed circuit board according to claim 1, wherein the signal wire is adjacent to the ground wire and the distance between the through hole and the first signal hole. Grounding 4. According to the multi-layer printing _ circuit board described in the scope of the patent application, the signal wire is adjacent to the signal wire at least one of the grounding wires. 5. The multilayer printed circuit board of claim 2, wherein the thickness of each of the frequency-frequency circuit layers is approximately equal to the thickness of the transition layer. The multi-layer printed circuit board according to claim 1, wherein the circuit board has the switching layer and the high-frequency circuit layer respectively on the upper and lower sides, and the two ends of the signal wire are respectively located Inside and outside the circuit board, the pads of the switching layer are disposed on the periphery of the circuit board. 7. The multi-layer printed circuit board 15 according to claim 1 of the scope of the patent application has two transfer layers respectively stacked on the high frequency circuit layers and switched on one of the lower sides of the > And a bonding layer disposed on the upper switching layer, wherein the solder pads disposed on the upper switching layer are disposed on the periphery of the circuit board, and the solder pads disposed on the lower switching layer are distributed around the inner periphery of the circuit board. 8 · A probe card for electrically connecting to the test machine to electrically test the integrated circuit 20 wafer, including: a circuit board having upper and lower opposite upper surfaces and a lower surface And having at least one transfer layer, a plurality of high frequency circuit layers, a plurality of solder pads, a plurality of circuit breaking circuits and a plurality of grounding circuits, wherein the fresh sputum is located on the upper surface for the test machine point Each of the signal circuit and the grounding circuit is electrically connected to the bonding pad, and the at least one switching layer and the high frequency circuit layer are extended from the upper surface to the lower surface, and the grounding circuit Each of the signal circuits is adjacent to the at least one grounding circuit, and the grounding circuit has a grounding metal disposed between the at least one switching layer 5 and the adjacent frequency circuit layer. The shortest spacing between each of the signal circuits and the adjacent grounding circuit is a first and a second spacing in the switching layer and the high frequency circuit layers, and the second spacing is less than the first spacing, the grounding The adjacent distance between the metal and each of the signal circuits is less than The first spacing; and a plurality of probes are disposed on the lower surface of the circuit board, and electrically connected to the signal circuit and the grounding circuit respectively for contacting the integrated circuit wafer. According to the probe card of claim 8 , each of the signal circuits has a first signal through hole through which the at least one transfer layer is disposed, and a second signal through which the two frequency circuit layers are disposed. a hole, and a signal wire disposed transversely on the high frequency circuit layer, the distance between the ground metal and the adjacent I5 of the second signal through hole is approximately equal to the adjacent distance between the ground metal and the first signal through hole. According to the probe card of claim 9, the two ends of the signal wires are electrically connected to the second signal through holes at the upper and lower sides. 11. The probe card according to claim 9, wherein at least one of the grounding circuits is juxtaposed with the signal conductors in parallel with the signal conductors. 12. The probe card of claim 8, wherein each of the high frequency circuit layers has a thickness corresponding to a thickness of the transition layer. Λ 13. According to the probe card of the eighth aspect of the patent application, the connector 19 1334323 has two adapter layers respectively located on the upper and lower sides of the high-frequency circuit layer, and the lower surface of the circuit board is further provided. The plurality of solder pads, each of the signal circuits and the grounding circuit are solder pads extending through the two via layers and electrically connected to the lower surface. 20
TW96129687A 2007-08-10 2007-08-10 Multilayer circuit board TW200908850A (en)

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