TW200905643A - Driving apparatus and driving method for liquid crystal display with reduced leakage current - Google Patents
Driving apparatus and driving method for liquid crystal display with reduced leakage current Download PDFInfo
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200905643 94756 19470twf.doc/n 九、發明說明: 【發明所屬之技術領域】 本發明是關於-種消除顯示 動方法,且_是有關於運用在 ,動裝置及驅 及驅動方法。 Μ種_面板之驅動裝置 【先前技術】 Γ 針^多媒體社會之急速進步,多半 或顯示裝置的飛躍性進步。就顯示⑼言, 件 空間=效率佳、低消耗功率、無輻射等優越特性[薄膜 電晶體液晶顯示器(Thin fllm的㈣敵叫⑽灿 display,簡稱TFT-LCD)已逐漸成為市場之主流。 圖1繪不為習知薄膜電晶體液晶顯示器之單— 路的等效電路圖。請參照圖卜在習知tft_lcd之單二書 素電路1GG的等效電路中包括:薄膜電晶體nG、液晶^ 容CLC、儲存電容Cst、共用電極CE、以及寄生電容。 二般而言,以現今TFT_LCD的驅動架構中,通常以交流 模式的共用電壓(AC mode e〇mmQn VGltage)驅動架構(例如 為線反轉顯示技術)應用於現有一般中、小尺寸的 TFT-LCD(即施加交流共用電壓至共用電極CE),而以直流 模式的共用電壓(DC mode common voltage)驅動架構(例如 為點反轉顯示技術)應用於現有一般較大尺寸的 TFT-LCD(即施加直流共用電壓至共用電極CE)。 圖2A繪示為習知在圖1之晝素電路100中,以交流 模式的共用電壓驅動架構下之耦合效應波形圖。圖綠 200905643 94756 iy470twf.doc/n 示為習知在圖l之晝素電路⑽中的掃瞒電壓vG波形。 圖2C繪示為習知在圖1之晝素電路1〇〇中的資料電歷% 波形。® 2D繪不為習知在圖i之晝素電路⑽中的影像 資料電壓VS波形。圖2E繪示為習知在圖丄之晝素電路1〇〇 中的交流共用電壓vC0M波形。請合併參照圖1及圖2A〜圖 2E,在習知若將交流共用電壓Vc〇m施加到TFT_La)之畫 素電路100的共用電極CE時,由於晝素電路1〇〇之等效200905643 94756 19470twf.doc/n IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a method for eliminating display, and _ is directed to an operating device, a driving device, and a driving method. Μ _ panel drive device [Prior Art] Γ Needle ^ rapid progress in the multimedia society, mostly or the dramatic advancement of display devices. As shown in (9), piece space = good efficiency, low power consumption, no radiation and other superior characteristics [Thin-film LCD display (Thin fllm (4) enemy display (10) can display, referred to as TFT-LCD) has gradually become the mainstream of the market. Figure 1 depicts an equivalent circuit diagram of a single-channel of a conventional thin film transistor liquid crystal display. Referring to Figure 2, the equivalent circuit of the single-single circuit 1GG of the conventional tft_lcd includes a thin film transistor nG, a liquid crystal capacitor CLC, a storage capacitor Cst, a common electrode CE, and a parasitic capacitance. In general, in the drive architecture of the current TFT_LCD, the AC mode e〇mmQn VGltage drive architecture (for example, line reversal display technology) is usually applied to existing general-mode small-sized TFTs. The LCD (that is, the AC common voltage is applied to the common electrode CE), and the DC mode common voltage driving architecture (for example, dot inversion display technology) is applied to the existing generally larger TFT-LCD (ie, A DC common voltage is applied to the common electrode CE). FIG. 2A is a diagram showing a coupling effect waveform in a shared voltage driving architecture in an alternating current mode in the pixel circuit 100 of FIG. 1. Figure Green 200905643 94756 iy470twf.doc/n is shown as a broom voltage vG waveform in the pixel circuit (10) of Figure 1. FIG. 2C is a diagram showing the data history % waveform of the conventional pixel circuit 1 in FIG. ® 2D is not an image data voltage vs. waveform that is conventionally used in the pixel circuit (10) of Figure i. FIG. 2E is a diagram showing the AC common voltage vC0M waveform in the conventional pixel circuit 1〇〇. Referring to FIG. 1 and FIG. 2A to FIG. 2E together, it is conventionally known that the equivalent voltage of the pixel circuit 1〇〇 is applied to the common electrode CE of the pixel circuit 100 of the TFT_La).
Ο 電容會引起耦合效應,故而使得薄膜電晶體11〇在相鄰畫 面關閉時’薄膜電晶體11〇之閘源極電壓(Vg§)會有大幅度 的變動範圍’其最大變動量為,而最變動量為 AVmin。 圖3繪示為習知晝素電路1〇〇在交流模式之共用電壓 驅動架構下,其薄膜電晶體m的及極電流v閘源極電壓 VGS曲線示意圖。請合併參照圖卜圖2A及圖3,其中在 圖3中所繪示的虛線為薄膜電晶體110的漏電流極限 (Leakage CUrrenUimitation)Lc。以理論上而言,含書素電 路100之薄膜電晶體110在相鄰晝面,例如晝面^畫面 N+1必須被關_,其_電晶體ιω的汲極電流(lD)應 逐漸變小,以關閉薄膜電晶體n〇。 但由圖3所揭露之薄膜電晶體11〇的 極電壓VGS曲線示意圖可知,當薄膜電晶 小於薄膜電晶體二極 曰Γ:丨Γ電晶體110之汲極電流_ 的特性’且大到_電晶體UG的漏電流極限以以上時, 200905643 y4/5t> iy4/uTwf.doc/n 以使得原本該關閉的晝素電路1〇〇之薄膜電晶體n〇並無 法有效的關閉’而導致晝素電路丨〇〇之薄膜電晶體11〇在 區域A有漏電流產生,如此在TFT_LCD顯示晝面上就會 呈現漏光現象。 【發明内容】Ο The capacitor will cause a coupling effect, so that the thin film transistor 11〇 will have a large variation range of the gate-source voltage (Vg§) of the thin film transistor 11 when the adjacent screen is turned off. The most variable amount is AVmin. FIG. 3 is a schematic diagram showing the curve of the thin film transistor m and the pole current v gate source voltage VGS of the conventional halogen circuit 1〇〇 in the AC mode shared voltage driving architecture. Please refer to FIG. 2A and FIG. 3 together, wherein the broken line shown in FIG. 3 is the leakage current limit Lc of the thin film transistor 110. Theoretically, the thin film transistor 110 of the pixel-containing circuit 100 must be turned off in adjacent pupil planes, for example, the picture N+1, and the drain current (1D) of the transistor ιω should be gradually changed. Small to close the thin film transistor n〇. However, it can be seen from the graph of the extreme voltage VGS curve of the thin film transistor 11 揭 disclosed in FIG. 3 that when the thin film electrocrystal is smaller than the characteristic of the thin film transistor diode 丨Γ transistor 110 transistor current _ and is large _ When the leakage current limit of the transistor UG is above, 200905643 y4/5t> iy4/uTwf.doc/n, so that the thin film transistor n〇 of the halogen circuit 1 which is originally turned off cannot be effectively turned off, resulting in 昼The thin film transistor 11 of the prime circuit has a leakage current generated in the region A, so that light leakage occurs on the surface of the TFT_LCD display. [Summary of the Invention]
有鑑於此,本發明的目的就是提供一種顯示面板之驅 動裝置及驅動方法,其利用本發明所提供之驅動裝置内的 驅動電源產生器,依據顯示面板内第i列(i為正整數)畫素 ,路之薄膜電晶體需要被關閉時,輸出第一低位準閘極電 壓或第二低位準閘極電壓,以將顯示面板内第i列畫素電 路之薄膜電晶體岐極電流限制在其漏電流極限以下之區 域0 口口本發明的另-目的就是提供—種可消除漏電流之顯示 =日根據第i列晝素電路之薄膜電晶體的没極電流—間源極 厥線而決疋第—低位準閘極電壓與第二低位準間極電 日此ί到有效地關閉顯示面板内第1列(丨為正整數)畫 不薄膜電晶體。其中’第—低位準閘極電壓實質上 壓低位極電壓,且第-、第二低位準間極電 極電壓曲線而路之薄膜電晶體的錄電流-閘源 亍第本f明驅動裝置之—實施例中,在顯示面板顯 使驅動‘ϊΐ晶體需要被開啟時,驅動電源產生器會致 動電源為㈣準閘極電壓,而在顯示面板顯示第Ν個 200905643 94756 19470twf.doc/n 晝面期間,當顯示面板内第i列晝素電路之薄膜電晶體需 要被關閉時’驅動電源產生H會致使驅動電源為第一低位 準閘極電壓,此外在顯示面板顯示第N+1個晝面期間,當 顯示面㈣第i列晝素電路之薄_晶體需要被關閉時, 驅動電源產生ϋ會致使鶴麵為第二·料極電壓。 其中,第-低鱗閘極賴不同於第二低辦閘極電壓, 且第-、第二低位準閘極電壓係根據第i列4素電路之薄 膜電晶體的汲極電流-閘源極電壓曲線而決定。 π在上述本發明驅動裝置及方法與可消除漏電流之顯示 益之-實施例中’當第i列晝素電路之共用電屢為交流共 用電壓時’第-、第二低位準閘極電壓係以下列兩公式計 算而得: 〜十;以及 匕—卜△〜也—Δ^-(ίΛ罐—, 其中VGL(N;|與Vgl^+d各為第一低位準閘極電壓與第 二低位準閘極電壓、Δν_與Λν_各為第i列晝素電路 之該薄膜電晶體在第N個與第糾個晝面期間關閉時 的閘源極電壓、VDH為高位準資料電壓、Vdl為低位準資料 電壓、vcomH為高位準交流共用電壓、\。扯為低位 丘 用電壓、AVgs為饋入電壓。 八 〇〇在上述本發明驅動裝置及方法與可消除漏電流之顯示 器之,只把例中,當第i列晝素電路之共用電壓為直流共 用電壓時’第-、第二低位準閘極電壓係以下列兩公式計 算而得: 200905643 94756 19470twf.doc/nIn view of the above, an object of the present invention is to provide a driving device and a driving method for a display panel, which use the driving power generator in the driving device provided by the present invention to draw according to the i-th column (i is a positive integer) in the display panel. When the thin film transistor of the circuit needs to be turned off, the first low level gate voltage or the second low level gate voltage is output to limit the thin film transistor drain current of the i-th column pixel circuit in the display panel to The area below the leakage current limit is 0. The other purpose of the present invention is to provide a display capable of eliminating leakage current = day according to the infinite current of the thin film transistor of the i-th column of the halogen circuit - the source-source line疋 The first low-level gate voltage and the second low-level pole voltage are effectively turned off to effectively close the first column (丨 is a positive integer) of the display panel to draw a thin film transistor. Wherein the 'first-low level quasi-gate voltage substantially lowers the bit voltage, and the first- and second-low-level inter-electrode voltage curves and the path current of the thin-film transistor-gate source 亍In the embodiment, when the display panel shows that the driving 'turning crystal needs to be turned on, the driving power generator will actuate the power supply to (4) the quasi-gate voltage, and display the second 200905643 94756 19470twf.doc/n in the display panel. During the period when the thin film transistor of the i-th column of the display panel needs to be turned off, 'the driving power source generates H, which causes the driving power source to be the first low-level gate voltage, and the N+1th surface is displayed on the display panel. During the display period (4), the thin _ crystal of the i-th column of the i-th column needs to be turned off, the driving power source generates ϋ, which causes the crane surface to be the second material voltage. Wherein, the first-low scale gate is different from the second low gate voltage, and the first and second low-level gate voltages are based on the gate current of the thin film transistor of the ith column of the i-th column-gate source Determined by the voltage curve. π in the above-described driving device and method of the present invention and the display of the elimination of leakage current - in the embodiment - when the common power of the i-th column of the pixel circuit is the alternating current common voltage, the first and second low-level gate voltages Calculated by the following two formulas: ~ ten; and 匕 - △ △ ~ also - Δ ^ - ( Λ Λ -, where VGL (N; | and Vgl ^ + d are the first low-level gate voltage and The two low-level gate voltages, Δν_ and Λν_ are the gate-source voltage and the VDH is a high-level data voltage when the thin-film transistor of the i-th column of the pixel circuit is turned off during the Nth and the second correction periods. Vdl is a low level data voltage, vcomH is a high level AC common voltage, \. is a low hill voltage, and AVgs is a feed voltage. Gossip is in the above-described driving device and method of the present invention and a display capable of eliminating leakage current In the example, when the common voltage of the i-th column of the pixel circuit is the DC common voltage, the 'first and second low-level gate voltages are calculated by the following two formulas: 200905643 94756 19470twf.doc/n
Vgl(n) ~ △ — ;以及 V 〇L{N+x\ = mm+\y dl-^ as\ , 其中’ Vgl(n;)與Vglw+u各為第一低位準閘極電壓與第 二低位準閘極電壓、AYmax與AVmin各為第i列晝素電路 - 之該薄膜電晶體在第N個與第N+1個晝面期間關閉時 的閘源極電壓、vDH為高位準資料電壓、Vdl為低位準資 電壓、AVGS為饋入電壓。 f 本發明所提供的顯示面板之驅動裝置及驅動方法,籍 由依據顯示面板内第i列(i為正整數)晝素電路之薄膜電曰^ 體需要被關閉時,輸出根據第i列晝素電路之薄膜電晶= 的汲極電流-閘源極電壓曲線而決定之第一低位準閘極電 壓或,二低位準閘極電壓,以將顯示面板内第i列晝素電 路之薄膜電晶體的及極電流操作在其漏電流極限以下之區 域,並有效地關閉顯示面板内第i列晝素電路之薄膜電晶 ,二1^此之外’正0本發崎提㈣可消除漏電流之顯示 〇 用本發明之驅動裝置’不但可以有效地關閉顯示 ' _反内第1列晝素電路之薄膜電晶體,並J_可以解決顯示 盗之漏電流問題。 為讓本發明之上述和其他目的、特徵和優點能更明顯 ’下文特舉本發明之較佳實施例,並配式, 作詳細說明如下。 【實施方式】 田♦t發明是為了要解決在習知交流模式與直流模式的共 壓驅動架構下’因顯示面板内畫素電路之等效電容所 200905643 外 /JO 1 外 / vnwidoc/η 造成的耦合效應,^ 路之薄膜電晶體無法該關閉的顯示面板内晝素電 面板之驅動褒置^ 故本發明提供-種顯示 來解決上述之問題。動方法與—種可消除漏電流之顯示器 圖4、.、s示為依照本發明較佳 if;r構下’其顯示面板内畫素電 汲極電流Id_間源極^心曰體的 2A與圖4,推瀑屮了^ 思圖。請同時參照圖 ㈣ί 限制顯示面板内畫素電路之薄膜電曰 體間源極卿一變動範圍’而此t ; =乾圍之臨界值分別為為_,其分別可: AV maxVgl(n) ~ △ — ; and V 〇L{N+x\ = mm+\y dl-^ as\ , where 'Vgl(n;) and Vglw+u are the first low-level gate voltage and the second The low-level quasi-gate voltage, AYmax and AVmin are the i-th column halogen circuit - the gate-source voltage and the vDH are high-level data voltage when the thin film transistor is turned off during the Nth and N+1th kneading periods Vdl is the low-level quasi-capacity voltage, and AVGS is the feed-in voltage. f The driving device and the driving method of the display panel provided by the present invention are output according to the i-th column when the thin film electric device according to the i-th column (i is a positive integer) of the display panel needs to be turned off. The thin film current of the prime circuit = the gate current voltage curve determines the first low level gate voltage or the second low level gate voltage to display the thin film of the i-th column of the display panel The crystal and the pole current operate in the region below the leakage current limit, and effectively close the thin film transistor of the i-th column of the display panel, and the second positive and negative (4) can eliminate the leakage. The display of the current using the driving device of the present invention can not only effectively turn off the thin film transistor of the display of the first column of the pixel circuit, but also solve the leakage current problem of the display. The above and other objects, features and advantages of the present invention will become more apparent <RTIgt; [Embodiment] The field ♦t invention is to solve the problem of the equivalent capacitance of the pixel circuit in the display panel under the common-voltage driving structure of the conventional AC mode and the DC mode. 200905643 /JO 1 outside / vnwidoc/η The coupling effect, the thin film transistor of the circuit cannot be driven by the driving of the halogen panel in the display panel, so the present invention provides a display to solve the above problem. The method and the display capable of eliminating the leakage current are shown in FIG. 4, . , s in accordance with the present invention, and the structure of the pixel in the display panel is in the form of a pixel current Id_ between the source and the core. 2A and Figure 4, push the waterfall and smash it. Please refer to the figure (4) at the same time to limit the variation range of the source between the thin-film electrodes of the pixel in the display panel, and the critical value of the dry-circle is _, which can be: AV max
VV
Cl(N)Cl(N)
Avmin=v ' 'lv~^Zr'Vc〇mA 公式1 =_+1) 公式 2 ,、中’ VDH為純準資料電壓、 電壓、\。_為高位準交流丘 4 交流共用電壓、Vgl(^ v ^ V_L為低位準 第N+1(N為正整數)書t期在ί N個、及 膜雷日㈣門卩士认;1顯板内晝素電路之薄 =體關閉_弟—低位準閘極 Ξ電壓,且第—低鱗閘極電壓残於第二低位準開2 H得-提的是,上述之公式i及公式2中的avgs, ^思“顯不面板晝素電路之薄膜電晶體在晝面N與晝面 二晝素電路之等效液晶電容(。)上的 電堡應疋簡1值,但由於4麵路之等效寄生電容 200905643 94756 iy47Utwf.d〇c/n (CgS)的存在’液晶電容上所簡的電 的變化而有所改變(也就是所謂_合效應;^因貝2壓 =電容上所保持的電壓偏離原先設定之值,而此變^ 稱為饋入電壓(feed-through v〇ltage),其可表示為· 里 AV〇s -afg gsAvmin=v ' 'lv~^Zr'Vc〇mA Formula 1 =_+1) Equation 2, , and 'VDH are pure data voltage, voltage, \. _ is the high level quasi-exchange hill 4 AC common voltage, Vgl (^ v ^ V_L is the low level N+1 (N is a positive integer) book t period in ί N, and membrane Lei Ri (four) door gentleman recognition; 1 display The thinness of the pixel circuit in the board = body off_different - the low level of the gate voltage, and the first - low scale gate voltage residual in the second low level 2 H - is the above formula i and formula 2 In the avgs, ^ thinks that the thin film transistor of the panel is not in the equivalent of the liquid crystal capacitor (. The equivalent parasitic capacitance of the road 200905643 94756 iy47Utwf.d〇c/n (CgS) exists in the simple change of the electric capacitance on the liquid crystal capacitor (also known as the _he effect; ^Beca 2 pressure = capacitor The held voltage deviates from the originally set value, and this change is called feed-through v〇ltage, which can be expressed as · AV〇s -afg gs
Cgs + Cst + CL 其中’ AVg為細電壓Vg之振幅,其包括高 壓vGH與低位準閘極電壓Vgl。 +閘極電Cgs + Cst + CL where 'AVg is the amplitude of the fine voltage Vg, which includes the high voltage vGH and the low level gate voltage Vgl. +gate electric
r下上述公式1及公式2再經換算過後即可 付下列兩公式,其分別可表示為: J V〇^N\ = ^Vm^-\YDH- W〇s + {VcomH~VcomL. GL(n+1) 因△ Vmax與Δν^η係根據第i列晝素電路之 體的汲極電流-閘源極電壓曲線而決定,如此,依/據^電晶 及公式4即可決定了不同晝面顯軸間(例如畫面3 面N+1)所使用的低位準閘極電壓,而如此用意,除了,息 制顯示面板内晝素電路之薄膜電晶體在區域丨:二限 外,亦可有效減少其漏電流現象以提供最佳的顯示品j閉 若依照本發明較佳實施例在直流模式之共用電 架構下,請參照圖8A與圖4 ’其變動範圍之最 助 |值刀別為△ Vmax與△ Vmin,亦可分別可表示為: AV^=\VDH-W〇^\VCLiN\ 公式 5 AV^-\v〇L{N4~\vDL-^vGS\ 公式 6After the above formula 1 and formula 2 are converted, the following two formulas can be paid, which can be expressed as: JV〇^N\ = ^Vm^-\YDH- W〇s + {VcomH~VcomL. GL(n +1) Since ΔVmax and Δν^η are determined according to the drain current-gate source voltage curve of the body of the i-th column of the pixel circuit, the difference between the 电Vmax and the Δ^^^ can be determined according to The low-level gate voltage used between the display axes (for example, screen 3 N+1) is so intentional, except that the thin film transistor of the pixel circuit in the display panel is in the region 丨: second limit, Effectively reduce the phenomenon of leakage current to provide the best display. If the system is in the DC mode under the common electrical architecture according to the preferred embodiment of the present invention, please refer to FIG. 8A and FIG. △ Vmax and △ Vmin can also be expressed as: AV^=\VDH-W〇^\VCLiN\ Equation 5 AV^-\v〇L{N4~\vDL-^vGS\ Equation 6
其中,各符號說明同如上述,且再經過換算可得 兩公式,其分別可表示為: # 于 IJ 11 200905643 /^o /uiwf.doc/n VGL{Nt^Vmax~\YDIi~AyGs\ 公式 7Among them, the description of each symbol is the same as above, and after conversion, two formulas can be obtained, which can be expressed as: #在IJ 11 200905643 /^o /uiwf.doc/n VGL{Nt^Vmax~\YDIi~AyGs\ 7
Vgl{n+\) ~ AVmm+\VDL~^VGs\ 公式 8 如此,依據公式7及公式8,同樣決定了不同晝面顯 示期間(例如晝面N及晝面N+1)適合使用的低位準^極電 壓。 圖5繪示為依照本發明較佳實施例的可消除漏電流之 . 顯示器方塊圖。請參照® 5,顯示器5〇M系應用上述=導 V'公式而推得設計,其中在顯示器500中(例如液晶顯示器) 包括顯示面板501、驅動裝置503、以及源極驅動器5〇f。 顯示面板501具有多數個晝素電路(未繪示)以1陣列方式 排列,其中i、j為正整數,且顯示面板5〇1内之每一書素 電路的等效電路圖與圖1所揭露之晝素電路1〇〇類似,故 在此並不再加以贅述之。 驅動裝置503耦接於顯示面板501,用來輸出掃描電 壓VG至顯示面板501,以決定顯示面板5〇1内第丨列晝素 電路之薄膜電晶體是否開啟。源極驅動器5〇5亦耦接至顯 ? 示面板501,其依據所接收之影像資料,而透過多數條源 極配線輸出資料電壓vD至被開啟的顯示面板5〇1内第; • 列晝素電路之薄膜電晶體。 1 圖6緣示為依照本發明較佳實施例的驅動裝置5〇3方 塊圖。請合併參照圖5及圖6,在圖6所揭露的驅動裝薏 503中包括驅動電源產生器6〇1與閘極驅動器6〇3。其令, 驅動電源產生器601會依據顯示面板5〇1内第丨列晝素電 路之薄膜電晶體是否被開啟,而據以輸出對應的驅動電溽 200905643 94756 19470twf.doc/n DP。閘極驅動器603肋接收—基本時序T_,並且依 據此基本時序TeGn⑽序鱗1極配綠畴描電壓 tm5Gi,而此掃描電壓%會依據驅動電· ί驅動電源dp’叫啟或關_示面板 501内第i列晝素電路之薄膜電晶體。Vgl{n+\) ~ AVmm+\VDL~^VGs\ Equation 8 In this way, according to Equation 7 and Equation 8, the low level of the different face display periods (for example, face N and face N+1) is determined. Extreme voltage. 5 is a block diagram of a display capable of eliminating leakage current in accordance with a preferred embodiment of the present invention. Referring to </ br>, the display 5 〇M system is designed by applying the above formula, where the display panel 501, the driving device 503, and the source driver 5 〇f are included in the display 500 (for example, a liquid crystal display). The display panel 501 has a plurality of pixel circuits (not shown) arranged in an array, wherein i and j are positive integers, and an equivalent circuit diagram of each of the pixel circuits in the display panel 5〇1 is disclosed in FIG. The pixel circuit 1 is similar and will not be described again here. The driving device 503 is coupled to the display panel 501 for outputting the scanning voltage VG to the display panel 501 to determine whether the thin film transistor of the first pixel circuit in the display panel 5〇1 is turned on. The source driver 5〇5 is also coupled to the display panel 501, and outputs the data voltage vD to the opened display panel 5〇1 through the plurality of source wirings according to the received image data; Thin film transistor of a circuit. 1 is a block diagram of a drive unit 5〇3 in accordance with a preferred embodiment of the present invention. Referring to FIG. 5 and FIG. 6 together, the driving device 503 disclosed in FIG. 6 includes a driving power generator 6〇1 and a gate driver 6〇3. Therefore, the driving power generator 601 outputs a corresponding driving power 200905643 94756 19470twf.doc/n DP according to whether the thin film transistor of the first pixel circuit in the display panel 5〇1 is turned on. The gate driver 603 receives the rib--the basic timing T_, and according to the basic timing TeGn(10), the scale 1 is matched with the green-field voltage tm5Gi, and the scan voltage % is called according to the driving power supply dp'. A thin film transistor of the ith column of the 501th pixel circuit.
在本實施财,在第N_為正整數)辭週期,當 顯不面板501内第i列晝素電路之薄膜電晶體接收影像資 後需要被關時,則使閘極驅動器⑽所輸出之掃描 電〇壓vG為第—低位準閘極電壓VGu,以關閉顯示面板 01内弟i列晝素電路之薄膜電晶體,並根據顯示面板5〇1 採用之共同·為直流敍流模式,以選擇公式3或公式 7來決定正確的第一低位準閘極電壓VGLi ;而在第 個顯示週期,當顯示面板501内第i列晝素電路之薄膜電 晶體接收影像詞Vs後需要被咖時,則使閘極驅動器 6〇3所輸出之掃描電壓Vg為第二低位準閘極電壓狐2, 以關閉顯示面板501内第i列晝素電路之薄膜電晶體,並 根據顯示面板501採用之共同電壓為直流或交流模式,以 選擇公式4或公式8來決定正確㈣二低位準閘極電壓 VGL2。 、由上述可知,依此方式決定兩不同低位準閘極電壓可 以同時適祕交流狱的共用電壓驅触構與錢模式的 共用電壓驅動雜,並且可_於多種的顯示技術,、例如 線反轉顯示技術(line inversiGn)與點反轉顯示技術(你 m—) ’且無論採社述哪—難動架構,本實施例 13In the implementation of the present invention, in the N_th positive integer) cycle, when the thin film transistor of the i-th column of the pixel in the panel 501 is required to be turned off after receiving the image resource, the gate driver (10) outputs Scanning voltage vVG is the first-low level gate voltage VGu, to turn off the thin film transistor of the display circuit of the display panel 01, and according to the display panel 5〇1, the common DC current mode is selected. Equation 3 or Equation 7 determines the correct first low-level gate voltage VGLi; and in the first display period, when the thin film transistor of the i-th column of the display panel 501 receives the image word Vs, it needs to be etched. Then, the scan voltage Vg outputted by the gate driver 6〇3 is the second low level gate voltage fox 2 to turn off the thin film transistor of the ith column of the display panel 501, and is used according to the display panel 501. The voltage is in DC or AC mode, and Equation 4 or Equation 8 is selected to determine the correct (four) two low-level gate voltage VGL2. It can be seen from the above that in this way, two different low-level gate voltages can be determined at the same time, and the common voltage driving structure of the shared voltage driving structure and the money mode can be simultaneously combined, and various display technologies can be used, for example, line anti- Turn in display technology (line inversiGn) and dot inversion display technology (your m-) 'and regardless of the mining world - difficult architecture, this embodiment 13
COM 200905643 94756 iy47Utwf.doc/n 所揭露的低位準閘極電壓決定方式皆可#效抑 501内第i列晝素電路之薄膜電晶體的漏現象7、j 保顯示器500的顯示品質。 見象’以確 圖7A繪不為運用本發明之驅動裝置5〇3 T内第i列畫素電财,以交流模式的 =合=應波形圖。圖料示為運用本發= ^ 503在顯示面板則内第丨列晝素電路的掃㈣號 G。圖7C繪不為運用本發明之驅動裝置5〇3在 面二 5〇1内第i列畫素電路的資料電壓Vd。圖7Em會示為 本發明之驅動裝置503在顯示面板501内第丨列金夸 的影像資料電壓Vs。圖7讀示為運用本發明^驅動裝 置503在顯示面板501内第i列畫素電路的交流共用電壓 V----- 請合併參照圖5、圖6,以及圖7A〜圖7E,其中顯示 面板501内每—晝素電路之耗合效應,皆會產生饋入電= △VGS,*以及顯示面板501内每一晝素電路之閘源極電壓 (VGS)有著大幅度的變動範圍,而此變動範圍之最大、最小 臨界值△Vmax與Δνιηίη可由上述公式3、及4可計算出。 由圖7Α所揭露的波形圖中可知,當顯示面板5〇1 ^第i =晝素電路之薄膜電晶體在晝面N(FrameN)顯示期間必 需開、啟時,驅動電源產生器601會致使所輸出的驅動電源 DP為高位準閘極電壓(VGH),而閘極驅動器6〇3則據 以輸出一掃描電壓VG將顯示面板501内第丨列晝素電 之薄膜電晶體開啟,並且接收源極驅動器505 輸 14 200905643 y4 /1/ utwf.doc/n 出的資料電壓vD。 另外,當顯示面板501 β第i列晝I電路在晝面 不期間接收影像資料Vs後需要關閉時,驅動電源產生器 6〇1會依據顯示面板501 β第i列晝素電路在開啟時所接 - 收資,電壓Vd的位準(包括高位準資料電壓ν〇Η與低 位準^料電壓VDL) ’而使得所輸出的驅動電源dj>為第COM 200905643 94756 iy47Utwf.doc/n The low-level gate voltage determination method disclosed can be used to reduce the leakage phenomenon of the thin film transistor of the ith column in the 501. See Figure 7A for the use of the driving device of the present invention 5 〇 3 T in the i-th column of pixels, in the AC mode = combined = should waveform diagram. The picture shows the sweep (four) number G of the second 昼 电路 circuit in the display panel using this method = ^ 503. Fig. 7C shows the data voltage Vd of the pixel circuit of the i-th column in the surface of the driving device 5〇3 of the present invention. Fig. 7Em shows the image data voltage Vs of the driving device 503 of the present invention in the display panel 501. FIG. 7 is a view showing the AC common voltage V of the i-th column pixel circuit in the display panel 501 by using the driving device 503 of the present invention. Referring to FIG. 5, FIG. 6, and FIG. 7A to FIG. 7E, The consumption effect of each of the halogen circuits in the display panel 501 generates a feed frequency = ΔVGS, * and a gate-source voltage (VGS) of each of the pixel circuits in the display panel 501 has a large variation range, and The maximum and minimum critical values ΔVmax and Δνιηίη of the range of variation can be calculated by the above formulas 3 and 4. As can be seen from the waveform diagram disclosed in FIG. 7A, when the thin film transistor of the display panel 5 〇 1 ^ i = 昼 电路 circuit must be turned on and off during the display of the face N (Frame N), the driving power generator 601 causes The output driving power DP is a high level gate voltage (VGH), and the gate driver 6〇3 outputs a scanning voltage VG to turn on the thin film transistor of the first column of the display panel 501, and receives Source driver 505 input 14 200905643 y4 /1/ utwf.doc / n The data voltage vD. In addition, when the display panel 501 β i 昼 昼 I circuit needs to be turned off after receiving the image data Vs during the no-face period, the driving power generator 6 〇 1 according to the display panel 501 β i column of the pixel circuit is turned on. Connected - the level of the voltage Vd (including the high level data voltage ν 〇Η and the low level material voltage VDL) 'and the output drive power dj> is the first
- 一低位準閘極電壓(VGL1)與第二低位準閘極電壓 (VGL2)其中之一,以關閉顯示面板501内第i列晝素 電路之薄膜電晶體。其中,當顯示面板501内第i列書 素電路在開啟時所接收資料電壓VD的位準為高位準資 料電壓VDH時(亦即影像資料電壓vs南於顯示面板5〇 1 之共同電壓)’驅動電源產生器6〇1會致使所輪出的驅動電 源DP為第一低位準閘極電壓(VGL1),亦即由上述公弋 3计算出,而閘極驅動器603則據以輸出一掃描電壓^ =顯示面板501 Μ第i列晝素電路之薄膜電晶體關G • 反之,當顯示面板501内第i列畫素電路在開啟 接收資料電壓Vd的位準為低位準資料電壓v守所 ' 即影像資料電壓Vs低於顯示面板5。1之共同電1^(亦 動電源產生器鎖會致使所輸出的驅動電源、d 驅 位準閘極電壓(VGL2),亦即由上述公式4計算二低 開極驅動器603則據以輸出—掃描電壓v = _ ’而 洲内第i列晝素電路之薄膜電晶體^將心面板 圖8A繪示為運用本發明之驅動裝置5〇3在顯示面才 15 200905643 ΐ7τ/wiwf.doc/n 501内第i列畫素電路中,以直流模式的共用電麗驅動架 構下之耦合效應波形圖。圖8B繪示為運用本發明之驅^ 裝置503在顯示面板401内第i列晝素電路的掃晦 VG。圖8C繪示為運用本發明之驅動裝置5〇3在顯& 501内第i列晝素電路的資料電壓VD。圖8D綠示$運用 本發明之驅動裝置503在顯示面板401内第丨列佥;恭路 的影像資料電壓Vs。圖8E繪示為運用本發明之驅動篆- one of a low level gate voltage (VGL1) and a second low level gate voltage (VGL2) to turn off the thin film transistor of the i-th column of the display panel 501. Wherein, when the level of the received data voltage VD when the i-th column of the display panel 501 is turned on is the high level data voltage VDH (that is, the image data voltage vs. the common voltage of the display panel 5〇1) The driving power generator 6〇1 causes the driving power source DP to be turned on to be the first low level gate voltage (VGL1), that is, calculated by the above-mentioned method 3, and the gate driver 603 outputs a scanning voltage accordingly. ^ = display panel 501 薄膜 the i-th pixel circuit of the thin film transistor is turned off G • Conversely, when the pixel of the i-th column of the display panel 501 is turned on, the level of the received data voltage Vd is a low level data voltage v. That is, the image data voltage Vs is lower than the common voltage of the display panel 5.1. (Also, the power source generator lock causes the output driving power source, the d drive level gate voltage (VGL2), that is, is calculated by the above formula 4. The second low-opening driver 603 is based on the output-scanning voltage v = _ ' and the thin-film transistor of the ith column of the circuit in the continent is shown in FIG. 8A as the driving device 5 〇 3 using the present invention.面才15 200905643 ΐ7τ/wiwf.doc/n 501 in the i-th column In the circuit, the coupling effect waveform diagram in the shared mode of the DC mode is shown in Fig. 8B. Fig. 8B shows the broom VG of the i-th column of the pixel circuit in the display panel 401 by using the driving device 503 of the present invention. It is shown that the data voltage VD of the ith column of the ith column of the driving device 5 〇 3 in the display & 501 is used. Figure 8D green shows the driving device 503 of the present invention in the display panel 401. ; Gong Lu's image data voltage Vs. Figure 8E shows the use of the drive of the present invention
O 置503在顯示面板501内第i列晝素電路的直流共用電^O is set to 503 in the display panel 501 in the i-th column of the halogen circuit of the common circuit ^
Vcom。在本實施例中,顯示面板501内每—蚩冬 旦畜電路之閘 源極電壓(vGS)變動範圍,其最大、最小臨界值Δν_與 Δ Vmin可由上述公式7、及8計算出’故以本發明之精神 同樣的也適用直流模式的共用電壓驅動架構。 圖9緣示為依照本發明另-實施例的可消 顯示器方額。請合併參關5及圖9,在騎器:中 與顯示器之最大不同處在於驅動裳置簡。圖鮮示 =9之驅動裝置烟的方塊圖。請合併參照圖6、、^ 9 3 露的_|置%1中包括驅動電源產 生益601、問極驅動器603、以及共用電壓源_。呈中, 共用電壓源讓用以提供交流⑼電壓(Ae__ =age)至顯示面板5G1 _每—晝素,而依據上述實施例 在此並不再加以贅述驅動電源產生器謝與問極 動為603之減關係,以及其功欵,故在本實施例中, 揭露的驅歸置可以適用於交流模式的共用電 壓驅動架構之顯示器。 200905643 i^H/wiwf.doc/n 在本發明之另一實施例中,共用電壓源1001亦可提供 直“L共用電壓(DC common voltage)至顯示面板501内的每 一晝素’故可知當共用電壓源1〇〇1用以提供直流共用電壓 時’驅動裝置901可以適用於直流模式的共用電壓驅動架 構之顯示器。 為了要達到上述顯示面板5〇1之驅動裝置503所能提 供的功效’以下再舉出三種顯示面板之驅動方法,其包括 交/直流共用電壓驅動架構之顯示面板驅動方法、交流共用 電壓驅動架構之顯示面板驅動方法,以及直流共用電壓驅 動架構之顯示面板驅動方法。其中驅動裝置5〇3藉由顯示 面板501内第i列晝素電路之薄膜電晶體關閉時,輸出第 一低位準閘極電壓(VGL1)或第二低位準閘極電壓 (VGL2),以將顯示面板内第|列晝素電路之薄膜電晶體操 作在其漏電流極㈣下之區域,而能財效地關顯示面 板501内第i列晝素電路之薄膜電晶體,所以不會產生漏 電流的問題,以確保顯示器5〇〇、9〇〇的顯示品質。 圖U為依照本發明之一較佳實施例所繪示的交/直流 共用電壓驅動架構之顯示面板的驅動方法流程圖,苴中顯 示面板具有多數撼《路以,、j為正整數)陣列方式 排列,且每-晝素電路t包括—薄膜電晶體,而此驅動方 法包括下列步驟··首先,在步驟811〇1中,產生一掃描電 屢’用以決定第i列畫素電路之薄膜電晶體是否開啟。接 著,如步驟SU03所述’在顯示面板顯示第N個畫面期間, 當第i列晝素電路之薄膜電晶體需要被開啟時,則使掃描 17 200905643 94756 iy4/Utwf.doc/n 電壓(VGH),並且在顯示面板顯示第n =:4=晝素電路之薄膜電晶體需要被關 、輙描電壓為弟一低位準閛極電壓(VGL1)。 查步驟si 105所述,在顯示面板顯示第n+i個 ί,厂1列晝素電路之薄膜電晶體需要被關閉 =則使純電壓為第二低位準閘極電壓(VGL2)4中, 位準閘極電壓不同於第二低位準閘極電壓,且第 曰曰體極電壓係根據第1列畫素電路之薄膜電 曰曰,的錄電流Id_閘源極電壓Vgs曲線而 =也此顯示面板之驅動方法可以同時適用於交在 式的“用電壓驅動架構之顯示器。 、 電麗=依照本發明之另—實施例所緣示的交流共用 板罝面㈣轉方法流程圖’其中顯示面 “讀個晝素電路以為正整 素電路中包括一薄膜電晶體,而此 Ο S12G1中,提供交流共用電 ,母一晝素電路。接著,在步驟S1203中, 之ΐ ’ 找第i列晝素電路之薄膜電晶體是否開啟^ 間卷第上1205所达:在顯示面板顯示第則固晝面期 掃描i爆旦素電路=電晶體需要被開啟時,則使 :畫面期間,當第丨列畫素電路之薄 ^時,則使掃描電壓為第-低位準閘極電壓⑽ 此外,在步驟咖7令,在顯示面板顯示第_個晝 18 200905643 94756 19470twf.d〇c/n 面期間’當第i列晝素電路之薄 則使掃描麵 =電壓不同於第二低位準閑極電壓,:第-第 閘源極電^曲線而決定。^ ===之驅動方法可以_於交流模式 驅 動条構之顯不器。 •壓ΐ ^健本發明之另—實施酬繪示的直流共用 二不面板的驅動方法流程圖,其中顯示面 ^ ίί i固f素電路以為正整數)陣列方式排 中包括一薄膜電晶體,而此驅動方法 :首先,在步驟S1301,,提供直流共用電 用以H 著,在步驟S1303中,產生一掃描電壓, 如半二:1列晝素電路之薄膜電晶體是否開啟。之後, 笛々·1305所述’在顯示面板顯示第N個晝面期間,當 2 電路之薄膜電晶體需要被開啟時,則使掃描電 準,電壓(VGH),並且在顯示面板顯示第則固 ΐ 1列晝素電路之薄膜電㈣需要被關閉 τ,則使㈣電壓為第—低位準閘極電壓(VGu)。 而细=外、,,在步驟S1307中,在顯示面板顯示第N+1個畫 ^ 1列晝素電路之薄膜電晶體需要被關閉時, 則使知描電壓為第二低位準閘極電壓(VGU)。財,第〆 低位準閘極健不同於第二低位準·電壓,且第一、第 -低位準閘極雜係根據第i列晝素電路之薄膜電晶體的 19 200905643 yn /j〇 /uiwf.doc/n 汲極電流電壓VGS轉而 此顯示面板之,方法可以適用 施例中, 動架構之顯示器。 星机模式的共用電壓驅 在上述步驟S1103、S1205, 板顯示第N個晝面助 Α υ〇5中’在顯示面 需要被關閉,且第;列曰蚩夸田雪J列晝素電路之薄膜電晶體 電壓(包括交/直。路之影像資料電壓高於共用 準閘極電壓,^ f =則使掃描電壓為第—低位 上述步驟嶋^71列晝/電路之薄膜電晶體,而在 第㈣個書面蚧120二以及S1307中’在顯示面板顯示 被關閉,且一 時’則使躲讀姚電壓低於共用電壓 壓為苐一低位準閘極電壓,以p Μ 晝素電路之薄膜電晶體。 U明閉弟α 在上板的驅動方法實施例中,依據上述 3、4、7、8 以士本々々 1 、 o 栋笛.5十异出弟一、弟二低位準閘極電壓,而致 、第1列旦素电路之薄膜電晶體需要被關閉時,其汲極電 被限制在薄膜電晶體之漏電流極限以下之區域,。 η 、’示上所述,本發明是提供一種顯示面板之驅動裝置及 驅動方法。依據本發明驅動裝置及驅動方法的精神,運用 在本發明之可消除漏電流之顯示器中,會有下列幾點優點 來欽述: I無論使用於交流與直流模式的共用電壓驅動架構之 顯示器,皆可使得顯示面板内第i列畫素電路之薄膜電晶 體關閉時,其顯示面板内第i列晝素之薄膜電晶體的操作 20Vcom. In the present embodiment, the maximum and minimum threshold values Δν_ and ΔVmin of the gate-source voltage (vGS) of each of the display panels 501 are calculated by the above formulas 7 and 8. The shared voltage drive architecture of the DC mode is equally applicable to the spirit of the present invention. Figure 9 is a perspective view of an erasable display in accordance with another embodiment of the present invention. Please merge the reference 5 and Figure 9. The biggest difference between the camera and the display is the drive. The figure shows a block diagram of the drive smoke of =9. Please refer to FIG. 6, and the _| set %1 includes the driving power generation benefit 601, the polarity driver 603, and the common voltage source _. In the middle, the common voltage source is used to provide the alternating current (9) voltage (Ae__ = age) to the display panel 5G1 _ per-halogen, and according to the above embodiment, the driving power generator is not described here. The relationship of 603 is reduced, and its merits, so in the present embodiment, the disclosed drive placement can be applied to the display of the shared voltage drive architecture of the AC mode. 200905643 i^H/wiwf.doc/n In another embodiment of the present invention, the common voltage source 1001 can also provide a direct "DC common voltage" to each element in the display panel 501. When the common voltage source 101 is used to provide a DC common voltage, the driving device 901 can be applied to the display of the shared voltage driving architecture of the DC mode. In order to achieve the functions of the driving device 503 of the display panel 5〇1 described above. The following are three driving methods of the display panel, which include a display panel driving method of an AC/DC common voltage driving architecture, a display panel driving method of an AC common voltage driving architecture, and a display panel driving method of a DC common voltage driving architecture. The driving device 5〇3 outputs a first low-level gate voltage (VGL1) or a second low-level gate voltage (VGL2) when the thin film transistor of the ith column of the display panel 501 is turned off, so that The thin film transistor of the first | column pixel circuit in the display panel operates in the region under the drain current pole (four), and can effectively close the ith column of the display panel 501 Thin film transistor, so there is no problem of leakage current to ensure the display quality of the display 5〇〇, 9〇〇. Figure U is an AC/DC common voltage driving architecture according to a preferred embodiment of the present invention. A flowchart of a driving method of a display panel, wherein the display panel has a plurality of arrays of "way, and j is a positive integer", and each of the halogen circuits t includes a thin film transistor, and the driving method includes the following steps. First, in step 811〇1, a scan circuit is generated to determine whether the thin film transistor of the i-th column pixel circuit is turned on. Then, as shown in step SU03, 'the Nth picture is displayed on the display panel. When the thin film transistor of the i-th column of the halogen circuit needs to be turned on, the voltage is turned on (2009), and the voltage is displayed on the display panel, and the nth::4=the pixel circuit is displayed on the display panel. The thin film transistor needs to be turned off, and the voltage is turned into a low-level threshold voltage (VGL1). As shown in step si 105, the n+i ί, the thin film transistor of the factory 1 column of the halogen circuit is displayed on the display panel. Need to be turned off = then make pure voltage In the second low-level gate voltage (VGL2) 4, the level gate voltage is different from the second low-level gate voltage, and the first body voltage is based on the thin film power of the pixel of the first column. The recording current Id_ gate source voltage Vgs curve = also the display panel driving method can be applied to the interchangeable "voltage-driven architecture display. , according to another embodiment of the present invention, the alternating current common plate surface (four) transfer method flow chart 'where the display surface "reads a pixel circuit to include a thin film transistor in the positive integer circuit, and this Ο In S12G1, an AC shared power, a mother-single circuit is provided. Then, in step S1203, the film transistor of the first-order pixel circuit is turned on. Display the first solid-state surface scan i-explosive circuit = when the transistor needs to be turned on, then: during the picture period, when the thin-layer pixel circuit is thin, the scan voltage is made the first-low level gate Voltage (10) In addition, in step 7 of the order, during the display panel display _ 昼 2009 18 200905643 94756 19470 twf.d 〇 c / n face period 'When the i-th column of the halogen circuit is thin, the scanning surface = voltage is different from the second The low level quasi-idle voltage is determined by the first-th gate source electric curve. The driving method of ^=== can be used to drive the strip structure in the AC mode. A flow chart showing the driving method of the DC sharing two non-panel of the remuneration, wherein The display method is a positive integer. The array mode includes a thin film transistor. The driving method is as follows: First, in step S1301, DC common power is supplied for H, and in step S1303, A scan voltage, such as half-two: 1 column of the thin-film transistor of the halogen circuit is turned on. After that, the snapper 1305 said that during the display of the Nth surface of the display panel, when the thin film transistor of the 2 circuit needs to be turned on When the scanning voltage, voltage (VGH) is displayed, and the thin film power (4) of the first solid-state pixel circuit is required to be turned off by τ on the display panel, the (four) voltage is the first-low level gate voltage (VGu). And in the step S1307, when the thin film transistor of the N+1th pixel array of the display panel is required to be turned off, the known voltage is the second low level gate. Extreme voltage (VGU). The first low-order gate is different from the second low level voltage, and the first and the first low-level gates are based on the thin film transistor of the i-th column. Yn /j〇/uiwf.doc/n bungee current and voltage VGS turn this display For the panel, the method can be applied to the display of the movable structure in the embodiment. The shared voltage of the star mode is driven in the above steps S1103, S1205, and the board displays the Nth surface assist υ〇 5 in the display surface needs to be closed, And the first; the 薄膜 曰蚩 曰蚩 田 田 J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J Step 嶋^71 listed 昼/circuit of the thin film transistor, and in the (fourth) written 蚧120 2 and S1307 'display on the display panel is turned off, and one time' makes the read Yao voltage lower than the common voltage voltage as one The low-level quasi-gate voltage is the thin-film transistor of the p 昼 昼 电路 circuit. U Ming closed brother α In the embodiment of the driving method of the upper plate, according to the above 3, 4, 7, 8 to Shiben 々々 1 , o Dong flute . 5 ten different brother 1 , brother 2 low position threshold voltage When the thin film transistor of the first column circuit needs to be turned off, the gate current is limited to the region below the leakage current limit of the thin film transistor. η, ' As indicated above, the present invention provides a driving device and a driving method for a display panel. According to the spirit of the driving device and the driving method of the present invention, in the display capable of eliminating leakage current of the present invention, there are the following advantages: 1. Regardless of the display used in the common voltage driving architecture of the AC and DC modes, When the thin film transistor of the i-th column pixel circuit in the display panel is turned off, the operation of the thin film transistor of the i-th column of the display panel is 20
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波形 200905643 ymjO j^*+/uLwf.doc/n 油線被4呆作限制在漏電流極限以下區域。 2.無論使祕交流與直流模式的共"壓驅動架構之 顯示器,皆可消除顯示器漏電流之問題。 雖然本發明已以較佳實施例揭露如上,然其並非用以 限定本發明,任何熟習此技藝者,在不脫離本發明之精神 和範圍内’當可作些許之更動與潤飾,因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1纷示為習知薄膜電晶體液晶顯示器之單— 路的等效電路圖。 旦I电 圖从緣示為習知在圖!之晝素電路中,以交 的共用電壓驅触構下之叙合效應糾彡圖。 、 形。圖沈繪示為習知在圖1之晝素電路中的掃晦訊號波 形。圖曰不為習知在圖1之晝素電路中的資料電壓波 圖2Dl會示為習知在圖1之晝素電路中的影像資料電壓 波形圖2E%示為f知在圖1之晝素電路中的交流共用電壓 圖3纷示為f知晝素電路在交顏式之共 =下,其薄膜電晶體的㈣電流·閘源極電麵線示意 圖4纷示為依照本發明較佳實施例在交流模式之共用 200905643 jo i^/uLwf.doc/n 電壓驅動架構下,1鹿+品4r_ 淡極電流__、極素電路之賴電晶體的 之 顯示依照本發明較佳實施例的可消除漏電流 圖6繪示為依照本發明較佳實施例的驅動裝置方塊 圖。Waveform 200905643 ymjO j^*+/uLwf.doc/n The oil line is limited by 4 to the area below the leakage current limit. 2. Regardless of the display of the common-quote and voltage-driven architecture of the AC and DC modes, the leakage current of the display can be eliminated. While the invention has been described above by way of a preferred embodiment, it is not intended to limit the invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic diagram showing an equivalent circuit of a conventional thin film transistor liquid crystal display. Once the I chart is shown as a familiar figure! In the pixel circuit, the common mode voltage is used to drive the rectification effect of the rectification effect. Shape. The figure is shown as a broom signal waveform in the conventional circuit of Figure 1. Figure 2Dl is not a known data voltage wave in the pixel circuit of Figure 1. Figure 2Dl will show the image data voltage waveform in the pixel circuit of Figure 1. Figure 2E% is shown as f knowing Figure 1 The AC common voltage in the prime circuit is shown in Fig. 3. The schematic diagram of the (4) current and gate source electric power line of the thin film transistor is shown in Fig. 3 as a preferred embodiment according to the present invention. Embodiments in the AC mode sharing 200905643 jo i^/uLwf.doc/n voltage driving architecture, 1 deer + product 4r_ light current __, the display of the circuit of the galvanic circuit in accordance with a preferred embodiment of the present invention Can Eliminate Leakage Current FIG. 6 is a block diagram of a driving device in accordance with a preferred embodiment of the present invention.
圖7Α繪示為運用本發明之驅動裝置在顯示面板内第i 列晝素電路中,以交流模式的共用電壓驅動架構下之搞合 姝應波形圖。 圖7B繪示為運用本發明之驅動裝置在顯示面板内第i 列晝素電路的掃瞄訊號。 圖7C繪示為運用本發明之驅動裝置在顯示面板内第1 列晝素電路的資料電壓。 圖7D繪示為運用本發明之驅動裝置在顯示面板内第i 列晝素電路的影像資料電壓。 十. 圖7E繪示為運用本發明之驅動裝置在顯示面板内第1 列晝素電路的交流共用電壓。 圖8场示為運用本發明之驅動裝置在顯示面板内第i 列晝素電路中,以直流模式的共用電壓驅動架構下之耦合 效應波形圖。 圖祕!會示為運用本發明之驅動裝置在顯示面板内第1 列晝素電路的掃猫訊號。 圖甿續示為運用本發明之驅動裝置在顯示面板内第1 列晝素電路的資料電壓。 22 200905643 IDO /ULWf.d〇C/n 圖8D繪示為運用本發明之驅動裝置在顯示面板内第i 列晝素電路的影像資料電壓。 圖8E繪示為運用本發明之驅動裝置在顯示面板内第i 列晝素電路的直流共用電壓。 圖9繪示為依照本發明另一實施例的可消除漏電流之 顯示器方塊圖。 圖10繪示為圖9之驅動裝置的方塊圖。 圖11為依照本發明之一較佳實施例所繪示的交/直流 共用電壓驅動架構之顯示面板的驅動方法流程圖。 圖12為依照本發明之另一實施例所繪示的交流共用 電壓驅動架構之顯示面板的驅動方法流程圖。 圖13為依照本發明之另一實施例所繪示的直流共用 電壓驅動架構之顯示面板的驅動方法流程圖。 【主要元件符號說明】 100 :晝素 110 :薄膜電晶體 Clc .液晶電容 Cst :儲存電容 Cgs :寄生電容 CE :共用電極 500、900 :可消除漏電流之顯示器 501 :顯示面板 503、901 :驅動裝置 505 :源極驅動器 23 200905643 y4/D〇 iy^/uiwf.doc/η 601 :驅動電源產生器 603 :閘極驅動器 1001 :共模電壓源 S1101〜S1105 :依照本發明之一較佳實施例所繪示的 交/直流共用電壓驅動架構之顯示面板的驅動方法流程圖 各步驟 S1201〜S1207 :依照本發明之一較佳實施例所繪示的 交流共用電壓驅動架構之顯示面板的驅動方法流程圖各步 驟 S1301〜S1307 :依照本發明之一較佳實施例所繪示的 直流共用電壓驅動架構之顯示面板的驅動方法流程圖各步 驟 1. 24FIG. 7 is a waveform diagram of the coupling voltage in the AC mode of the shared voltage driving structure in the i-th pixel circuit in the display panel by using the driving device of the present invention. FIG. 7B is a view showing a scanning signal of the i-th pixel circuit in the display panel by using the driving device of the present invention. 7C is a diagram showing the data voltage of the first column of the pixel circuit in the display panel using the driving device of the present invention. FIG. 7D is a diagram showing the image data voltage of the ith column of the pixel circuit in the display panel using the driving device of the present invention. 10. Figure 7E illustrates the AC common voltage of the first column of the pixel circuit in the display panel using the driving device of the present invention. Fig. 8 is a view showing a coupling effect waveform diagram of a common voltage driving structure in a DC mode in the i-th pixel circuit of the display panel by the driving device of the present invention. Figure: It shows the sweeping cat signal of the first column of the halogen circuit in the display panel using the driving device of the present invention. The figure continuation is the data voltage of the first column of the halogen circuit in the display panel using the driving device of the present invention. 22 200905643 IDO /ULWf.d〇C/n FIG. 8D illustrates the image data voltage of the ith column of the pixel circuit in the display panel using the driving device of the present invention. FIG. 8E illustrates the DC common voltage of the ith column of the pixel circuit in the display panel using the driving device of the present invention. Figure 9 is a block diagram of a display capable of eliminating leakage current in accordance with another embodiment of the present invention. FIG. 10 is a block diagram of the driving device of FIG. 9. FIG. 11 is a flow chart showing a driving method of a display panel of an AC/DC shared voltage driving architecture according to a preferred embodiment of the present invention. FIG. 12 is a flow chart showing a driving method of a display panel of an AC shared voltage driving architecture according to another embodiment of the present invention. FIG. 13 is a flow chart showing a driving method of a display panel of a DC shared voltage driving architecture according to another embodiment of the present invention. [Description of main components] 100: Alizarin 110: Thin film transistor Clc. Liquid crystal capacitor Cst: Storage capacitor Cgs: Parasitic capacitance CE: Common electrode 500, 900: Display that can eliminate leakage current 501: Display panel 503, 901: Drive Device 505: source driver 23 200905643 y4/D〇iy^/uiwf.doc/η 601: drive power generator 603: gate driver 1001: common mode voltage source S1101 to S1105: in accordance with a preferred embodiment of the present invention The flow chart of the driving method of the display panel of the AC/DC common voltage driving structure is shown in the steps S1201 to S1207: the driving method of the driving panel of the AC common voltage driving architecture according to the preferred embodiment of the present invention The steps S1301 to S1307 are shown in the flowchart of the driving method of the display panel of the DC common voltage driving structure according to a preferred embodiment of the present invention.
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102087839A (en) * | 2009-12-02 | 2011-06-08 | 乐金显示有限公司 | Device and method for driving liquid crystal display device |
TWI489346B (en) * | 2013-06-19 | 2015-06-21 | 奇景光電股份有限公司 | In-cell touch screen and apparatus of driving the same |
CN113948051A (en) * | 2021-10-28 | 2022-01-18 | 合肥鑫晟光电科技有限公司 | Display driving circuit, display driving method and display device |
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2007
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102087839A (en) * | 2009-12-02 | 2011-06-08 | 乐金显示有限公司 | Device and method for driving liquid crystal display device |
CN102087839B (en) * | 2009-12-02 | 2013-07-03 | 乐金显示有限公司 | Device and method for driving liquid crystal display device |
TWI489346B (en) * | 2013-06-19 | 2015-06-21 | 奇景光電股份有限公司 | In-cell touch screen and apparatus of driving the same |
CN113948051A (en) * | 2021-10-28 | 2022-01-18 | 合肥鑫晟光电科技有限公司 | Display driving circuit, display driving method and display device |
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