CN113948051A - Display driving circuit, display driving method and display device - Google Patents

Display driving circuit, display driving method and display device Download PDF

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Publication number
CN113948051A
CN113948051A CN202111266025.2A CN202111266025A CN113948051A CN 113948051 A CN113948051 A CN 113948051A CN 202111266025 A CN202111266025 A CN 202111266025A CN 113948051 A CN113948051 A CN 113948051A
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switch
signal
voltage signal
control chip
electrically connected
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CN202111266025.2A
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CN113948051B (en
Inventor
聂春扬
胡胜华
李瑞莲
戴珂
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0209—Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

The embodiment of the application provides a display driving circuit, a display driving method and a display device. The display driving device comprises a grid signal output end, a power supply control chip, a time sequence control chip and a switch conversion module. The power control chip is configured to generate a first off voltage signal and a second off voltage signal lower than the first off voltage signal; the time sequence control chip is configured to detect an image to be displayed and generate a control signal according to a detection result; the switch conversion module is configured to output the first off-voltage signal or the second off-voltage signal to the gate signal output terminal according to the received control signal. In the embodiment, when the frame to be displayed has a vertical Crosstalk risk, the value of the gate turn-off voltage is reduced to reduce the leakage current of the TFT, so that the problem of V Crosstalk of the display screen can be solved; and the gate-off voltage is only reduced when there is a risk of VCrosstalk, without affecting the characteristics of the TFT device.

Description

Display driving circuit, display driving method and display device
Technical Field
The present application relates to the field of display, and in particular, to a display driving circuit, a display driving method, and a display device.
Background
The driving method of the conventional liquid crystal display is generally a GOA driving, and the driving principle of the GOA is that a gate driving pulse is output by a GOA unit to drive a gate of a TFT (thin film transistor) of a pixel in a display area to be turned on, so that data of a data line can be written into the pixel to drive liquid crystal to deflect, thereby completing picture display.
For the GOA cell, VGL (gate off voltage) is an important voltage signal, and the magnitude of VGL voltage directly determines the magnitude of TFT device leakage, which has a great influence on the operating characteristics of the TFT. Especially for large-sized liquid crystal display products such as TV products, a Crosstalk phenomenon often occurs, wherein the most direct cause of the V Crosstalk is the leakage current of the TFT device.
Disclosure of Invention
The present application provides a display driving circuit, a display driving method, and a display device, which can effectively reduce the leakage current of a TFT device, thereby improving the poor display caused by V cross.
In a first aspect, an embodiment of the present application provides a display driving circuit for driving a display screen, the display driving circuit including:
the grid signal output end is electrically connected with the display screen;
a power control chip configured to generate a first off voltage signal and a second off voltage signal, the second off voltage signal being lower than the first off voltage signal;
the timing control chip is configured to detect an image to be displayed and generate a control signal according to a detection result, wherein the control signal generated when the detection result indicates that the image to be displayed does not have a vertical crosstalk risk is a first level, and the control signal generated when the image to be displayed does have a vertical crosstalk risk is a second level;
and the switch conversion module is respectively electrically connected with the power control chip, the timing control chip and the grid signal output end and is configured to output the first turn-off voltage signal to the grid signal output end when the control signal is received to be at a first level and output the second turn-off voltage signal to the grid signal output end when the control signal is received to be at a second level.
Optionally, the power control chip includes a first output terminal for outputting the first off-voltage signal and a second output terminal for outputting the second off-voltage signal; the switch conversion module includes:
a first switch conversion unit electrically connected to first output terminals of the timing control chip and the power control chip, respectively, the first switch conversion unit being configured to be turned on when receiving the control signal at a first level to output the first off-voltage signal to the gate signal output terminal;
and the second switch conversion unit is electrically connected with the second output ends of the timing control chip and the power control chip respectively, and is configured to be switched on when the control signal is received to be at a second level so that the second off voltage signal is output to the grid signal output end.
Optionally, the power control chip further includes a third output end for outputting a constant voltage signal, and the first switch conversion unit includes a first switch tube and a second switch tube;
the grid electrode of the first switch tube is electrically connected with the time sequence control chip, the first pole of the first switch tube is electrically connected with the third output end of the power supply control chip, and the second pole of the first switch tube is electrically connected with the grid electrode of the second switch tube;
and the first pole of the second switch tube is electrically connected with the first output end of the power supply control chip, and the second pole of the second switch tube is electrically connected with the grid signal output end.
Optionally, the second switching conversion unit comprises a third switching tube and a fourth switching tube; the grid electrode of the third switching tube is electrically connected with the timing sequence control chip, the first pole of the third switching tube is electrically connected with the third output end of the power supply control chip, the second pole of the third switching tube is electrically connected with the grid electrode of the fourth switching tube, and the third switching tube and the first switching tube are not turned on simultaneously; the first pole of the fourth switch tube is electrically connected with the second output end of the power control chip, and the second pole of the fourth switch tube is electrically connected with the grid signal output end.
Optionally, the first switch conversion unit further includes a fifth switch tube, a gate of the fifth switch tube is electrically connected to the timing control chip, a first pole of the fifth switch tube is electrically connected to the third output terminal of the power control chip and the gate of the first switch tube, a second pole of the fifth switch tube is grounded, a channel type of the first switch tube is different from a channel type of the fifth switch tube, and a channel type of the third switch tube is different from a channel type of the fifth switch tube; and/or the second switch conversion unit further comprises a sixth switch tube, a grid electrode of the sixth switch tube is electrically connected with the timing control chip, a first pole of the sixth switch tube is respectively electrically connected with a third output end of the power control chip and a grid electrode of the third switch tube, a second pole of the sixth switch tube is grounded, a channel type of the sixth switch tube is different from that of the first switch tube T, and the channel type of the sixth switch tube is different from that of the third switch tube T.
Optionally, the switch converting module further comprises: and the first pole of the first capacitor is respectively and electrically connected with the second pole of the first switching tube and the grid signal output end, and the second pole of the first capacitor is grounded.
Optionally, the switch converting module further comprises: and the first pole of the second capacitor is electrically connected with the second pole of the fourth switch tube and the grid signal output end respectively, and the second pole is grounded.
In a second aspect, an embodiment of the present application provides a display device, including:
in the above-described display driving circuit,
and the display screen is electrically connected with the display driving circuit.
In a third aspect, an embodiment of the present application provides a display driving method for driving a display screen to display, where the display driving method includes:
the power control chip generates a first turn-off voltage signal and a second turn-off voltage signal, wherein the second turn-off voltage signal is lower than the first turn-off voltage signal;
the method comprises the steps that a time sequence control signal is used for detecting an image to be displayed and generating a control signal according to a detection result, wherein the control signal generated when the detection result indicates that the image to be displayed does not have a vertical crosstalk risk is a first level, and the control signal generated when the image to be displayed has the vertical crosstalk risk is a second level;
when the received control signal is at a first level, the switch conversion module outputs the first turn-off voltage signal to the gate signal output end, and when the received control signal is at a second level, the switch conversion module outputs the second turn-off voltage signal to the gate signal output end.
Optionally, the switch conversion module includes a first switch conversion unit, and the first switch conversion unit includes a first switch tube and a second switch tube; when the received control signal is at the first level, the switch conversion module outputs the first turn-off voltage signal to the gate signal output end, including:
when the first level of the control signal bit is received, the first switch tube and the second switch tube are conducted so that the first turn-off voltage signal is output to a grid signal output end through the second switch tube.
Optionally, the switch conversion module includes a second switch conversion unit, and the second switch conversion unit includes a third switch tube and a fourth switch tube; when the received control signal is at the second level, the switch conversion module outputs the second off-voltage signal to the gate signal output terminal, including:
when the received control signal is at the second level, the third switching tube and the fourth switching tube are conducted so that the second turn-off voltage signal is transmitted to the grid signal output end through the fourth switching tube.
The technical scheme provided by the embodiment of the application has the following beneficial technical effects:
according to the display driving circuit, the display driving method and the display device, when a to-be-displayed picture has a vertical Crosstalk risk, the value of the grid turn-off voltage is reduced, so that the leakage current of a TFT (thin film transistor) is reduced, and the V Crosstalk problem of a display screen is improved. And because the value of the gate turn-off signal is reduced only when the frame to be displayed has the risk of V Cross, the characteristics of the TFT device cannot be influenced, and the reliability of the display screen cannot be influenced.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
The foregoing and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a diagram of a display with vertical crosstalk in the prior art;
fig. 2 is a schematic connection diagram of a display driving circuit and a display panel according to an embodiment of the present disclosure;
fig. 3 is a schematic diagram illustrating a connection between another display driving circuit and a display panel according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of a display driving circuit according to an embodiment of the present disclosure;
fig. 5 is a schematic structural diagram of another display driving circuit provided in the embodiment of the present application;
fig. 6 is a schematic structural diagram of another display driving circuit according to an embodiment of the present disclosure;
FIG. 7 is a timing diagram of the display driving circuit shown in FIG. 5;
FIG. 8 is a timing diagram of the display driver circuit shown in FIG. 6;
fig. 9 is a characteristic curve of TFTs in a display panel using a display driver circuit of the related art and a display driver circuit provided by the present application;
fig. 10 is a schematic flowchart of a display driving method according to an embodiment of the present disclosure;
fig. 11 is a flowchart of a display driving method according to an embodiment of the present application.
Reference numerals:
1-power control chip;
2-a time sequence control chip;
3-a switch conversion module; 31-a first switching conversion unit; t1a/T1b/T1 c-first switch tube; t2-second switch tube; t5-fifth switch tube; r1 — first resistance; r1 — first resistance; r2 — second resistance; r4-fourth resistor; 32-a second switching conversion unit; t3a/T3b/T3 c-third switch tube; t4-fourth switching tube; t6-sixth switching tube; r3 — third resistance; r5-fifth resistor; c1 — first capacitance; c2 — second capacitance; r6-sixth resistance; r7 — seventh resistor;
4-a gate signal output;
5-display screen.
Detailed Description
Reference will now be made in detail to the present application, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar parts or parts having the same or similar functions throughout. In addition, if a detailed description of the known art is not necessary for illustrating the features of the present application, it is omitted. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.
It will be understood by those within the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
The most direct cause of the occurrence of the V cross is leakage current of a TFT device, and the leakage current may cause a change in voltage of a pixel electrode in an upper and lower adjacent region, thereby causing a change in display luminance of the upper and lower adjacent regions.
In particular, VGL is the turn-off voltage of the TFT, and the selected value of VGL directly determines the magnitude of the leakage current of the TFT device, and has a great influence on the operating characteristics of the TFT.
As shown in fig. 1, the TV display apparatus includes a display screen 5, a control board 100, and a flexible circuit board 6 for connecting the display screen 5 and the control board 100. The V cross phenomenon occurs when the display 5 displays some special pictures, for example, when the display 5 displays the image shown in fig. 1, i.e. the gray level of the middle area L0 is L255, and the gray level of the periphery is L127. In an ideal situation, the luminance of the area LA and the area LB should be the same, but actually, the luminance of the area LA is significantly greater than that of the area LB due to the influence of the V cross phenomenon. Therefore, when the quality grade evaluation is performed on the display screen, the influence of the V cross is used as one of the reference factors, and the display screen grade can be evaluated specifically by adopting the following formula:
Figure BDA0003327019660000071
that is, the closer the brightness of the display area LA and the brightness of the area LB are, the better the quality of the display is, and the larger the difference between the brightness of the display area LA and the brightness of the area LB is, the worse the quality of the display is.
In order to improve the problem of V cross, in the prior art, the selected value of VGL is changed to reduce the leakage current, but the changed selected value of VGL may affect the characteristics of the TFT device, thereby the reliability of the display screen.
The present application provides a display driving circuit, a display driving method and a display device, which are intended to solve the above technical problems in the prior art.
The embodiment of the present application provides a display driving circuit, which is used for driving a display screen 5, as shown in fig. 2, the display driving circuit provided by the embodiment includes:
a grid signal output end 4 electrically connected with the display screen 5;
a power control chip 1 configured to generate a first off voltage signal VGL1 and a second off voltage signal VGL2, the second off voltage signal VGL2 being lower than the first off voltage signal VGL 1;
the timing control chip 2 is configured to detect an image to be displayed and generate a control signal CS according to a detection result, where the control signal CS generated is a first level when the detection result indicates that the image to be displayed does not have a risk of vertical crosstalk, and the control signal CS generated is a second level when the detection result indicates that the image to be displayed does not have a risk of vertical crosstalk;
and a switch conversion module 3 electrically connected to the power control chip 1, the timing control chip 2 and the gate signal output terminal 4, respectively, and configured to output a first off voltage signal VGL1 to the gate signal output terminal 4 when the received control signal CS is at a first level, and output a second off voltage signal VGL2 to the gate signal output terminal 4 when the received control signal CS is at a second level.
Specifically, the first off voltage signal VGL1 and the second off voltage signal VGL2 referred to in this application are both used for the gate-off voltage for turning off the TFT in the display panel 5. In a specific embodiment, the selected value of the first off voltage signal VGL1 is the VGL selected value of the prior art display device, and the selected value of the second off voltage signal VGL2 is a voltage value lower than the gate off voltage VGL selected value of the prior art display device. That is, when the frame to be displayed has the risk of vertical Crosstalk, the value of the gate turn-off voltage VGL is reduced, so as to reduce the leakage current of the TFT, and further improve the V cross problem of the display screen 5. And because the value of the gate turn-off signal VGL0 is reduced only when the frame to be displayed has a risk of V cross, the characteristics of the TFT device are not affected, and the reliability of the display screen 5 is not affected.
The gate-off signal VGL0 is a signal having the same voltage value as the second gate-off voltage signal VGL2 when the screen to be displayed is at risk of vertical crosstalk, and having the same voltage value as the first gate-off voltage signal VGL1 when there is no risk of vertical crosstalk.
Alternatively, as shown in fig. 3, in the display driving circuit provided in this embodiment, the power control chip 1 includes a first output terminal for outputting the first off-voltage signal VGL1 and a second output terminal for outputting the second off-voltage signal VGL 2; based on this, the switch changeover module 3 includes:
a first switch converting unit 31 electrically connected to the first output terminals of the timing control chip 2 and the power control chip 1, respectively, the first switch converting unit 31 being configured to be turned on when the received control signal CS is at the first level to output the first off-voltage signal VGL1 to the gate signal output terminal 4;
and a second switch converting unit 32 electrically connected to the second output terminals of the timing control chip 2 and the power control chip 1, respectively, the second switch converting unit 32 being configured to be turned on when the received control signal CS is at the second level to output the second off-voltage signal VGL2 to the gate signal output terminal 4.
In the display driving circuit provided by the present embodiment, the switch converting circuit includes the first switch converting unit 31 and the second switch converting unit 32 to control the output of the first off voltage signal VGL1 and the second off voltage signal VGL2, respectively.
Further, as shown in fig. 4, in the display driving circuit provided in this embodiment, the power control chip 1 further includes a third output terminal for outputting the constant voltage signal DVDD, and the first switch converting unit 31 includes a first switch transistor T1a and a second switch transistor T2; the grid electrode of the first switch tube T1a is electrically connected with the time sequence control chip 2, the first pole of the first switch tube T1a is electrically connected with the third output end of the power control chip 1, and the second pole of the first switch tube T1a is electrically connected with the grid electrode of the second switch tube T2; a first pole of the second switch tube T2 is electrically connected to the first output terminal of the power control chip 1, and a second pole of the second switch tube T2 is electrically connected to the gate signal output terminal 4.
It should be noted that the constant voltage signal DVDD output by the third output terminal can be adjusted according to the specific application requirement, for example, in a specific embodiment, DVDD is 3.3V.
Further, as shown in fig. 4, the present embodiment provides a display driving circuit in which the second switching unit 32 includes a third switching tube T3a and a fourth switching tube T4; the gate of the third switching tube T3a is electrically connected to the timing control chip 2, the first pole of the third switching tube T3a is electrically connected to the third output terminal of the power control chip 1, the second pole of the third switching tube T3a is electrically connected to the gate of the fourth switching tube T4, wherein the third switching tube T3a and the first switching tube T1a are not turned on simultaneously; a first pole of the fourth switch tube T4 is electrically connected to the second output terminal of the power control chip 1, and a second pole of the fourth switch tube T4 is electrically connected to the gate signal output terminal 4.
In the display driving circuit provided in this embodiment, the switch converting module 3 controls the first off-voltage signal VGL1 or the second off-voltage signal VGL2 to be output to the gate signal output terminal 4 according to the control signal CS generated by the detection result and the plurality of switching tubes, that is, whether to reduce the VGL voltage value is controlled according to whether the image to be displayed has the vertical crosstalk risk, so as to achieve the purpose of reducing the leakage current to improve the vertical crosstalk problem when the image to be displayed has the vertical crosstalk risk.
Further, as shown in fig. 5, in the display driving circuit provided in this embodiment, the first switch converting unit 31 further includes a fifth switch T5, a gate of the fifth switch T5 is electrically connected to the timing control chip, a first pole of the fifth switch T5 is electrically connected to the third output terminal (outputting the constant voltage signal DVDD) of the power control chip 1 and the gate of the first switch T1b, respectively, and a second pole of the fifth switch T5 is grounded, wherein a channel type of the first switch T1b is different from a channel type of the fifth switch T5, and a channel type of the third switch T3b is different from a channel type of the fifth switch T5.
Further, as shown in fig. 6, in the display driving circuit provided in this embodiment, the second switch converting unit 32 further includes a sixth switch T6, a gate of the sixth switch T6 is electrically connected to the timing control chip 2, a first pole of the sixth switch T6 is electrically connected to the third output terminal (outputting the constant voltage signal DVDD) of the power control chip 1 and the gate of the third switch T3c, respectively, a second pole of the sixth switch T6 is grounded, a channel type of the sixth switch T6 is different from a channel type of the first switch T1c, and a channel type of the sixth switch T6 is different from a channel type of the third switch T3 c.
It should be noted that, in the display driving circuit provided in this embodiment, the first switch converting unit 31 may include a fifth switching tube, and the second switch converting unit 32 may also include a sixth switching tube T6, and the channel type of the switching tubes in the display driving circuit may be as long as it is ensured that the first switching tube and the third switching tube are not turned on simultaneously.
Specifically, referring to fig. 4 to 6, in practical applications, since the rising edge and the falling edge of the square wave signal are not vertical rising and vertical falling, and it usually takes a certain time to complete the voltage rising or falling, in the process, the control voltage CS risks to make the first switching transistor T1 and the third switching transistor T3 in the on state at the same time, so that the second switching transistor T2 and the fourth switching transistor T4 may be turned on at the same time, which may cause the first off-voltage signal VGL1 and the second off-voltage signal to be transmitted to the gate signal output terminal 4 at the same time. The addition of the fifth switching transistor T5 in the first switching conversion unit 31 and/or the sixth switching transistor T6 in the second switching conversion unit 32 can avoid the above risk, so that the first and second off-voltage signals VGL1 and VGL2 are not transmitted to the gate signal output terminal 4 at the same time.
Specifically, as shown in fig. 5, in the display driving circuit provided in this embodiment, the first switch converting unit 31 further includes a first resistor R1 connected between the fifth switch T5 and the output terminal (for outputting the control signal CS) of the timing control chip, a second resistor R2 connected between the first pole of the fifth switch T5 and the gate of the first switch T1, a third resistor R3 connected between the first pole of the fifth switch T5 and the third output terminal (for outputting the constant voltage signal DVDD) of the power control chip 1, and a fourth resistor R4 connected between the second pole of the first switch T1 and the first output terminal (outputting the first off voltage signal VGL1) of the power control chip 1.
Specifically, as shown in fig. 6, the present embodiment provides the display driving circuit in which the second switch converting unit 32 further includes a fifth resistor R5 connected between the sixth switch tube T6 and the output terminal (for outputting the constant voltage signal DVDD) of the timing control chip, a sixth resistor R6 connected between the first pole of the sixth switch tube T6 and the gate of the third switch tube T3, and a seventh resistor R7 connected between the second pole of the third switch tube T3 and the second output terminal (outputting the second off voltage signal VGL2) of the power control chip 1.
In the display driving circuit provided by this embodiment, the resistors mainly play a role of protecting other elements in the circuit or a role of dividing voltage to ensure normal operation of the display driving circuit, and in specific implementation, the resistance values of the resistors are selected according to specific requirements.
Further, as shown in fig. 5 and fig. 6, in the display driving circuit provided in this embodiment, the switch converting module 3 further includes a first capacitor C1, a first pole of the first capacitor C1 is electrically connected to a second pole of the second switch transistor T2 and the gate signal output terminal 4, respectively, and a second pole of the first capacitor C1 is grounded.
Further, as shown in fig. 6, in the display driving circuit provided in this embodiment, the switch converting module 3 further includes a second capacitor C2, a first pole of the second capacitor C2 is electrically connected to a second pole of the fourth switch T4 and the gate signal output terminal 4, respectively, and a second pole of the second capacitor C2 is grounded.
Specifically, as shown in fig. 5 and 6, the switching transistors used in the figures are divided into a common transistor and a metal-oxide-semiconductor field effect transistor (i.e., MOS transistor), wherein the first switching transistor T1, the third switching transistor T3, the fifth switching transistor T5 and the sixth switching transistor T6 are common transistors, and the second switching transistor T2 and the sixth switching transistor T6 are MOS transistors.
In the display driving circuit provided in this embodiment, the first capacitor C1 and the second capacitor C2 function as a filter to ensure that the output gate-off voltage signal can be kept stable, and in implementation, the capacitance values of the first capacitor C1 and the second capacitor C2 are selected according to specific requirements.
In order to facilitate understanding of the display driver circuit provided in the present application, the following description will be made of an operation principle of the display driver circuit provided in the present application, with reference to the display driver circuit shown in fig. 5 and the timing chart shown in fig. 7, and with reference to the display driver circuit shown in fig. 6 and the timing chart shown in fig. 8.
Specifically, the timing control chip 2 has an image detection function, for example, some timing control chips have a PDF picture detection function, and when receiving image data input to the timing control chip, the timing control chip starts the PDF picture detection function and generates the control signal CS according to the detection result. In the time ranges shown in fig. 7 and 8, the display image at time t1 has a risk of vertical crosstalk, and the display images at times other than time t1 do not have a risk of vertical crosstalk. Therefore, the control signal CS is at the second level in the time range of t1, and is at the first level in the time range other than the time of t 1.
Specifically, in the display driving circuit shown in fig. 5, the first switching transistor T1b and the third switching transistor T3b are PNP transistors, the fifth switching transistor T5 is an NPN transistor, and the second switching transistor T2 and the fourth switching transistor T4 are both NMOS transistors.
As shown in fig. 5 and 7, when the control signal CS is at the first level (high level), that is, the gate of the fifth switching tube T5 is at the high level, the fifth switching tube T5 is turned on to turn on the first pole of the fifth switching tube T5 and ground, and at this time, the gate of the first switching tube T1b is at the ground level GND (low level) to turn on the first switching tube T1b, so that the constant voltage signal DVDD (high level) is written into the gate of the second switching tube T2, so that the second switching tube T2 is turned on to output the first off-voltage signal VGL1 from the gate signal output terminal 4. In this process, the third switching tube T3b, which is opposite to the channel type of the fifth switching tube T5, is in an off state when the control signal CS is at the first level (high level).
As shown in fig. 5 and 7, when the control signal CS is at the second level (low level), that is, the gate of the third switching transistor T3b is at the low level, so that the third switching transistor T3b is turned on, and the constant voltage signal DVDD (high level) is written into the gate of the fourth switching transistor T4, so that the fourth switching transistor T4 is turned on, and the second off-voltage signal VGL2 is output from the gate signal output terminal 4. In the process, the fifth switch tube T5, which is opposite to the channel type of the third switch tube T3b, is in an off state when the control signal CS is at the second level (low level), so that the first switch tube T1b and the second switch tube T2 are also in the off state.
Specifically, in the display driving circuit shown in fig. 6, the first switching transistor T1c and the third switching transistor T3c are PNP transistors, the sixth switching transistor T6 is an NPN transistor, and the second switching transistor T2 and the fourth switching transistor T4 are both NMOS transistors.
As shown in fig. 6 and 8, when the control signal CS is at the first level (low level), the gate of the first switch transistor T1 is at the first level (low level) to turn on the first switch transistor T1c, so that the constant voltage signal DVDD (high level) is written into the gate of the second switch transistor T2, and the second switch transistor T2 is turned on, so that the first off voltage signal VGL1 is output from the gate signal output terminal 4. In this process, the sixth switching tube T6, which is opposite to the channel type of the first switching tube T1c, is in an off state, so that the third switching tube T3c and the fourth switching tube T4 are in an off state when the control signal CS is at the first level (low level).
As shown in fig. 6 and 8, when the control signal CS is at the second level (high level), that is, the gate of the sixth switching tube T6 is at the second level (high level), so that the sixth switching tube T6 is turned on, so that the first pole of the sixth switching tube T6 is turned on with the ground, and at this time, the gate of the third switching tube T3c is at the ground level GND (low level), so that the third switching tube T3c is turned on, and then the constant voltage signal DVDD (high level) is written into the gate of the fourth switching tube T4, so that the fourth switching tube T4 is turned on, so that the second off voltage signal VGL2 is output from the gate signal output terminal 4. In the process, the first switch tube T1c, which is opposite to the channel type of the sixth switch tube T6, is in an off state when the control signal CS is at the second level (high level), so that the second switch tube T2 is also in an off state.
As can be seen from the above description, the on condition of the switching conversion circuit is controlled by the control signal CS generated according to the detection result, and the output gate-off voltage signal can be controlled to be at the first off voltage or the second off voltage, so that the leakage current of the display image with the risk of vertical crosstalk is reduced, the influence of vertical crosstalk on the display is improved, the gate-off voltage of the display image without the risk of vertical crosstalk is not changed, and the reliability of the display screen is not affected.
Specifically, as shown in fig. 9, in a specific embodiment, the applicant conducted a test on a display panel 5 using an existing display driving circuit and the display driving circuit provided in the present application. In fig. 9, a curve a is a characteristic curve during normal display in the prior art, a curve b is a characteristic curve during display of an image having a V Crosstalk phenomenon due to a leakage current in the prior art, and a curve c is a characteristic curve during display of an image having a V Crosstalk risk improved by using the display driving circuit provided in the present application.
As shown in FIG. 9, the current I of the TFTDSVoltage V corresponding to minimum valueGSThe value is V0 when VGSBelow V0, the TFT in the display is in the off-region, i.e., the TFT is considered to be in the off-state, but the TFT still has leakage current. As can be seen from the curves shown in fig. 9, the display screen driven by the display driving circuit provided by the present application has the advantages that the leakage current of the image with the risk of V Crosstalk is significantly reduced, the phenomenon of V Crosstalk can be significantly improved, and the display effect is improved.
Based on the same inventive concept, an embodiment of the present application further provides a display device, as shown in fig. 2 or fig. 3, the display device includes the display driving circuit in the above embodiment, which has the beneficial effects of the display driving circuit in the above embodiment, and is not described herein again.
Specifically, as shown in fig. 2 or fig. 3, the display device provided in this embodiment further includes a display screen 5, and the display screen 5 is electrically connected to the gate signal output terminal 4 of the display driving circuit.
In some specific embodiments, the display device provided by the present application is a computer, a tablet computer, a TV product, or the like, and the technical solution provided by the present application has a significant effect of improving the problem of V Crosstalk in a large-sized display device.
Based on the same inventive concept, the embodiment of the present application further provides a display driving method for driving the display screen 5 to display, as shown in fig. 10 and fig. 2, the display driving method for the lens of the present embodiment includes:
s1: the power control chip 1 generates a first off voltage signal VGL1 and a second off voltage signal VGL2, the second off voltage signal VGL2 being lower than the first off voltage signal VGL 1;
s2: the time sequence control chip 2 detects an image to be displayed and generates a control signal CS according to a detection result, wherein the control signal CS is at a first level when the detection result indicates that the image to be displayed does not have a vertical crosstalk risk, and the control signal CS is at a second level when the image to be displayed has the vertical crosstalk risk;
s3: the switch converting module 3 outputs the first off-voltage signal VGL1 to the gate signal output terminal 4 when the received control signal CS is at the first level, and the switch converting module 3 outputs the second off-voltage signal VGL2 to the gate signal output terminal 4 when the received control signal CS is at the second level.
Specifically, the first off voltage signal VGL1 and the second off voltage signal VGL2 referred to in this application are both used for the gate-off voltage for turning off the TFT in the display panel 5. In a particular embodiment, the selected value of the first off voltage signal VGL1 is the VGL selected value of the prior art display device and the selected value of the second off voltage signal VGL2 is a voltage value lower than the VGL selected value of the prior art display device.
The display driving method provided by this embodiment reduces the value of the gate turn-off voltage when the to-be-displayed picture has a risk of vertical Crosstalk, thereby reducing the leakage current of the TFT and further improving the V Crosstalk problem of the display screen 5. And because the value of the gate turn-off signal VGL0 is reduced only when the frame to be displayed has a risk of V cross, the characteristics of the TFT device are not affected, and the reliability of the display screen 5 is not affected.
Optionally, referring to fig. 3 and fig. 4, the switch converting module 3 in the display driving circuit includes a first switch converting unit 31, and the first switch converting unit 31 includes a first switch transistor T1 and a second switch transistor T2; based on this, in the display driving method provided in this embodiment, when the received control signal CS is at the first level, the switch converting module 3 outputs the first off-voltage signal VGL1 to the gate signal output terminal 4, which includes:
when the received control signal CS is at the first level, the first switch transistor T1 and the second switch transistor T2 are turned on, so that the first off voltage signal VGL1 is output to the gate signal output terminal 4 through the second switch transistor T2.
Alternatively, please refer to fig. 3 and fig. 4, the switch converting module 3 in the display driving circuit includes a second switch converting unit 32, and the second switch converting unit 32 includes a third switch transistor T3 and a fourth switch transistor T4; based on this, in the display driving method provided in this embodiment, when the received control signal CS is at the second level, the switch converting module 3 outputs the second off-voltage signal VGL2 to the gate signal output terminal 4, which includes:
when receiving the second control signal CS, the third switch transistor T3 and the fourth switch transistor T4 are turned on to transmit the second off voltage signal VGL2 to the gate signal output terminal 4 through the fourth switch transistor T4.
Specifically, in order to facilitate understanding of the display driving circuit provided in the present application, the operation principle of the display driving method provided in the present application will be described below with reference to the display driving circuit shown in fig. 5, the timing chart of the display driving circuit shown in fig. 7, and the flowchart of the display driving method shown in fig. 11.
Specifically, a VBO Pattern signal (a data signal of an image to be displayed) is input to a TCON IC (timing control chip 2), and the TCON IC performs PDF detection on the VBO Pattern signal by using a PDF picture detection function, and determines whether an image to be displayed corresponding to the VBO Pattern signal is a V cross Pattern, that is, determines whether the image to be displayed corresponding to the VBO Pattern signal has a V cross risk. If the detection result is that the image to be displayed has the risk of V Cross, the TCON IC outputs CS: h signal (i.e. the control signal CS is the second level) to the VGL Switch module (gate voltage Switch module), if the detection result indicates that the image to be displayed does not have the risk of V cross, the TCON IC outputs CS: the L signal (i.e., the control signal CS is at the first level) to the VGL Switch block.
In addition, the PMIC (power supply control module) outputs a first off voltage signal VGL1 and a second off voltage signal VGL2, and the VGL Switch module is CS: l signal or CS: the H signal outputs the corresponding VGL2 or VGL1 as VGL0 (gate-off voltage) to panel (display panel 5).
By applying the embodiment of the application, at least the following beneficial effects can be realized:
according to the display driving circuit, the display driving method and the display device, when a to-be-displayed picture has a vertical Crosstalk risk, the value of the grid turn-off voltage is reduced, so that the leakage current of a TFT (thin film transistor) is reduced, and the V Crosstalk problem of a display screen is improved. And because the value of the gate turn-off signal is reduced only when the frame to be displayed has the risk of V Cross, the characteristics of the TFT device cannot be influenced, and the reliability of the display screen cannot be influenced.
Those of skill in the art will appreciate that the various operations, methods, steps in the processes, acts, or solutions discussed in this application can be interchanged, modified, combined, or eliminated. Further, other steps, measures, or schemes in various operations, methods, or flows that have been discussed in this application can be alternated, altered, rearranged, broken down, combined, or deleted. Further, steps, measures, schemes in the prior art having various operations, methods, procedures disclosed in the present application may also be alternated, modified, rearranged, decomposed, combined, or deleted.
In the description of the present application, it is to be understood that the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the present application and simplifying the description, but do not indicate or imply that the referred device or element must have a particular orientation, be constructed in a particular orientation, and be operated, and thus should not be construed as limiting the present application.
The terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless otherwise specified.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
In the description herein, particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.
It should be understood that, although the steps in the flowcharts of the figures are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and may be performed in other orders unless explicitly stated herein. Moreover, at least a portion of the steps in the flow chart of the figure may include multiple sub-steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, which are not necessarily performed in sequence, but may be performed alternately or alternately with other steps or at least a portion of the sub-steps or stages of other steps.
The foregoing is only a partial embodiment of the present application, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present application, and these modifications and decorations should also be regarded as the protection scope of the present application.

Claims (11)

1. A display driving circuit for driving a display panel, the display driving circuit comprising:
the grid signal output end is electrically connected with the display screen;
a power control chip configured to generate a first off voltage signal and a second off voltage signal, the second off voltage signal being lower than the first off voltage signal;
the timing control chip is configured to detect an image to be displayed and generate a control signal according to a detection result, wherein the control signal generated when the detection result indicates that the image to be displayed does not have a vertical crosstalk risk is a first level, and the control signal generated when the image to be displayed does have a vertical crosstalk risk is a second level;
and the switch conversion module is respectively electrically connected with the power control chip, the timing control chip and the grid signal output end and is configured to output the first turn-off voltage signal to the grid signal output end when the control signal is received to be at a first level and output the second turn-off voltage signal to the grid signal output end when the control signal is received to be at a second level.
2. The display driving circuit according to claim 1, wherein the power control chip includes a first output terminal for outputting the first off voltage signal and a second output terminal for outputting the second off voltage signal;
the switch conversion module includes:
a first switch conversion unit electrically connected to first output terminals of the timing control chip and the power control chip, respectively, the first switch conversion unit being configured to be turned on when receiving the control signal at a first level to output the first off-voltage signal to the gate signal output terminal;
and the second switch conversion unit is electrically connected with the second output ends of the timing control chip and the power control chip respectively, and is configured to be switched on when the control signal is received to be at a second level so that the second off voltage signal is output to the grid signal output end.
3. The display driving circuit according to claim 2, wherein the power control chip further comprises a third output terminal for outputting a constant voltage signal, and the first switching unit comprises a first switching tube and a second switching tube;
the grid electrode of the first switch tube is electrically connected with the time sequence control chip, the first pole of the first switch tube is electrically connected with the third output end of the power supply control chip, and the second pole of the first switch tube is electrically connected with the grid electrode of the second switch tube;
and the first pole of the second switch tube is electrically connected with the first output end of the power supply control chip, and the second pole of the second switch tube is electrically connected with the grid signal output end.
4. The display driving circuit according to claim 3, wherein the second switching conversion unit comprises a third switching tube and a fourth switching tube;
the grid electrode of the third switching tube is electrically connected with the timing sequence control chip, the first pole of the third switching tube is electrically connected with the third output end of the power supply control chip, the second pole of the third switching tube is electrically connected with the grid electrode of the fourth switching tube, and the third switching tube and the first switching tube are not turned on simultaneously;
the first pole of the fourth switch tube is electrically connected with the second output end of the power control chip, and the second pole of the fourth switch tube is electrically connected with the grid signal output end.
5. The display drive circuit according to claim 4,
the first switch conversion unit further comprises a fifth switch tube, a grid electrode of the fifth switch tube is electrically connected with the time sequence control chip, a first pole of the fifth switch tube is electrically connected with a third output end of the power control chip and the grid electrode of the first switch tube respectively, a second pole of the fifth switch tube is grounded, a channel type of the first switch tube is different from that of the fifth switch tube, and a channel type of the third switch tube is different from that of the fifth switch tube; and/or
The second switch conversion unit further comprises a sixth switch tube, a grid electrode of the sixth switch tube is electrically connected with the timing sequence control chip, a first pole of the sixth switch tube is electrically connected with a third output end of the power control chip and a grid electrode of the third switch tube respectively, a second pole of the sixth switch tube is grounded, a channel type of the sixth switch tube is different from that of the first switch tube T, and the channel type of the sixth switch tube is different from that of the third switch tube T.
6. The display driver circuit according to claim 5, wherein the switching converter module further comprises:
and the first pole of the first capacitor is respectively and electrically connected with the second pole of the first switching tube and the grid signal output end, and the second pole of the first capacitor is grounded.
7. The display driver circuit according to claim 5, wherein the switching converter module further comprises:
and the first pole of the second capacitor is electrically connected with the second pole of the fourth switch tube and the grid signal output end respectively, and the second pole is grounded.
8. A display device, comprising:
the display driver circuit according to any one of claims 1 to 7,
and the display screen is electrically connected with the display driving circuit.
9. A display driving method for driving a display screen to display, the display driving method comprising:
the power control chip generates a first turn-off voltage signal and a second turn-off voltage signal, wherein the second turn-off voltage signal is lower than the first turn-off voltage signal;
the method comprises the steps that a time sequence control signal is used for detecting an image to be displayed and generating a control signal according to a detection result, wherein the control signal generated when the detection result indicates that the image to be displayed does not have a vertical crosstalk risk is a first level, and the control signal generated when the image to be displayed has the vertical crosstalk risk is a second level;
when the received control signal is at a first level, the switch conversion module outputs the first turn-off voltage signal to the gate signal output end, and when the received control signal is at a second level, the switch conversion module outputs the second turn-off voltage signal to the gate signal output end.
10. The display driving method according to claim 9, wherein the switching conversion module comprises a first switching conversion unit comprising a first switching tube and a second switching tube;
when the received control signal is at the first level, the switch conversion module outputs the first turn-off voltage signal to the gate signal output end, including:
when the first level of the control signal bit is received, the first switch tube and the second switch tube are conducted so that the first turn-off voltage signal is output to a grid signal output end through the second switch tube.
11. The display driving method according to claim 9, wherein the switching conversion module comprises a second switching conversion unit comprising a third switching tube and a fourth switching tube;
when the received control signal is at the second level, the switch conversion module outputs the second off-voltage signal to the gate signal output terminal, including:
when the received control signal is at the second level, the third switching tube and the fourth switching tube are conducted so that the second turn-off voltage signal is transmitted to the grid signal output end through the fourth switching tube.
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