200901174 九、發明說明： 【發明所屬之技術領域】 本發明是有關於—種邏蛆 # 邏輯控制之電路及方法，且特別 疋有關於一種控制硬碟顯 且K邏輯電路及方法。 【先前技術】 H冑用者在利用硬碟進行存取資料的動作 ：! ’若是當硬碟處Μ常操作的狀態，其U正《作狀 悲、的正常燈號會因而動作，若是當硬碟處於故障（fan则)或 建㈣uild)的狀態，則其表示故障或資料重建狀態 的故p早燈號亦會因而動作。然而，由於當硬碟的故障燈號 啟動時’其正常燈號的動作_般並不會因此停止；亦即， 當硬碟處於故障或是資料重建的狀態時，其正常燈號以及 故障燈號可能會同時動作’導致使用者無法分辨硬碟者前 的操作狀態，不利使用者㈣對於硬碟進行存取:工 作。 、 因此，有必要S出-種控制電路，解決硬碟的正常燈 號及故障燈號同時動作的問題’讓操作者不會因為硬碟二 顯示燈號不明確而受到混淆，以致影響後續存取資料的工 作。 【發明内容】 種控制硬碟顯示燈號之 硬碟在正常操作以及在 依照本發明一實施例，提出— 邏輯電路。此邏輯電路係用以使— 200901174 故障或資料重建時，分別僅顯示單一燈號以供判別，並包 含一正反器、一邏輯閘以及一緩衝器。正反器接收一時序 號 重置彳5號以及用以表示硬碟狀態之—資料信藥，200901174 IX. Description of the Invention: [Technical Field] The present invention relates to a circuit and method for logic control, and in particular to a control and hard disk display and K logic circuit and method. [Prior Art] H user is using the hard disk to access data: ! 'If the hard disk is in a state of normal operation, its U is "sorry, the normal light will act, if it is If the hard disk is in the state of failure (fan) or construction (four) uild, then the indicator light indicating the fault or data reconstruction status will also act accordingly. However, since the operation of the normal light signal is not stopped when the faulty light of the hard disk is activated; that is, when the hard disk is in a fault or data reconstruction state, its normal light and fault light The number may act at the same time', causing the user to be unable to distinguish the operating state before the hard disk player, and the unfavorable user (4) accessing the hard disk: work. Therefore, it is necessary to take out a kind of control circuit to solve the problem that the normal light number and the fault light number of the hard disk move at the same time. 'The operator will not be confused because the hard disk 2 display light is not clear, so as to affect the subsequent storage. The work of taking information. SUMMARY OF THE INVENTION A hard disk for controlling a hard disk display light is proposed in a normal operation and in accordance with an embodiment of the present invention. This logic circuit is used to make -200901174 fault or data reconstruction, only display a single signal for identification, and include a flip-flop, a logic gate and a buffer. The flip-flop receives a timing number, resets the number 5, and is used to indicate the status of the hard disk.
並根據時序信號、重置信號以及資料信號產生一輸出°作 號。邏輯閘電性_接於正反器，並根據資料信號及輸出^ 號^生一邏輯信號。緩衝器電性耦接於邏輯閘，並接收邏 輯l號以及用以表示硬碟正常操作之一動作信號。其中"， 當硬碟在正常操作狀態時，邏輯信號啟動緩衝器以使動作 信號通過緩衝器而驅動一正常燈號’當硬碟在故障或資料 重建狀態時，資料信號驅動一故障燈號。 、 依照本發明另一實施例’提出一種控制硬碟顯示燈號 ^方法。此方法係用以使一硬碟在正常操作以及在故障或° 資料重建時，分別僅顯示單—燈號以供判別，纟包含藉由 一正反器根據一時序信號、一重置信號以及用以表示^碟 狀態之-資料信號產生一輸出信號；將輸出信號以及資料 信號作邏輯運算處理，讀得—邏輯信號；判別邏輯信號 之位準；以及根據邏輯信號之位準驅動一正常燈號或一故u 障燈號，以表示硬碟在正常操作狀態，抑或在故障或資料 藉由本發明上述之實施例，可讓使用者不會在操作時 對於硬碟的顯7F燈號感到混淆，能清楚且明白地判別硬碟 的燈號，瞭解硬碟目前的操作狀態，以利工作的進行。 【實施方式】 7 200901174 睛參照第1圖，係繪示依照本發明一實施例之邏輯電 路的不忍圖。此邏輯電& 1GG係用以控制—硬碟的顯示燈 號，並使得硬碟能夠在正常操作狀態以及在故障（㈣或資 料重建（rebuild)狀怨，分別僅顯示正常燈號以及故障燈號來 告知操作者。邏輯電路100中包含一 D型正反器ι〇2、—And generating an output ° according to the timing signal, the reset signal, and the data signal. The logic gate is connected to the flip-flop and generates a logic signal according to the data signal and the output ^. The buffer is electrically coupled to the logic gate and receives the logic number 1 and an action signal for indicating normal operation of the hard disk. Where ", when the hard disk is in the normal operating state, the logic signal activates the buffer to cause the action signal to drive a normal light through the buffer. 'When the hard disk is in a fault or data reconstruction state, the data signal drives a fault light. . According to another embodiment of the present invention, a method of controlling a hard disk display lamp number is proposed. The method is for causing a hard disk to display only a single-light number for discriminating during normal operation and during fault or data reconstruction, and includes a timing signal, a reset signal, and a flip-flop according to a flip-flop. The data signal used to represent the state of the disc produces an output signal; the output signal and the data signal are logically processed, the logic signal is read; the level of the logic signal is discriminated; and a normal lamp is driven according to the level of the logic signal. No. or a faulty light signal to indicate that the hard disk is in a normal operating state, or in a fault or data by the above-described embodiments of the present invention, so that the user does not be confused with the hard disk display of the hard disk. , can clearly and clearly identify the hard disk light number, understand the current operating state of the hard disk, in order to facilitate the work. [Embodiment] 7 200901174 Referring to Fig. 1, there is shown a diagram of a logic circuit in accordance with an embodiment of the present invention. This logical power & 1GG is used to control the display light of the hard disk, and enables the hard disk to be in the normal operating state and in the fault ((4) or rebuild), only the normal light and the fault light are displayed respectively. The number informs the operator that the logic circuit 100 includes a D-type flip-flop ι〇2,
NAND邏輯閘1Q4以及—緩衝器1Q6〇d型正反器ι〇2電性 耦接於硬碟（未繪示），並分別由時脈輸入端c、重置信號輸 入端HS以及資料輸入端D接收一時序信號clk、一重°置 信號RS以及-資料信號⑽，且根據時序信號clk、重置 信號RS以及資料信㈣之運作由輪出端輸出一輸出信號 ㈨。其中’時序信號CLK以及重置信號Rs係藉由將資料 信號DS進行一時序處理之後而得，而〇型正反請係 為一正緣觸發的正反器。 上此外，資料信號D S係表示目前硬碟的操作狀態，而時 序仏號CLK以及重置信號RS則分別藉由延遲資料信號的 而獲得。其中’當硬碟在正常操作狀態時，資料信號的 係為高位準狀態’ #硬碟在故障狀態時，資料信號⑽係為 低位準狀態，而當硬碟在資料重建狀態時，資料信號Ds 則係為一方波信號。 NAND邏㈣104具有兩輸入端與一輸出端，而以勒 ^閑丨〇4之兩輸入端均電性㈣於D型正反器脱，並 接收及根據資料信號DS及輸出信冑〇s產生—邏輯信號 LS。然後’财_邏_ 1〇4即透過輸出端輪出邏輯信號匕 200901174 緩衝器106則是電性轉赫NAND邏_ 1〇4之輸出 端’並接收NAND邏輯閘1〇4所產生的邏輯信號ls。此外， 緩衝器⑽更電性輕接至硬碟，且接收硬碟於正常操作時 職生之-動作信號ACTd其中，#硬碟在正常操作狀離 % ’邏輯㈣LS會致能缓衝器1〇6，使得動作信號ACT 通過緩衝盜106而驅動一正常燈號，如藍色咖燈⑽； ^之，當硬碟在故障或資料重建狀態時，資料信號恥則係 直接驅動一故障燈號，如紅色lED燈】1 〇。 “ 圖，係緣示如第丨圖所示之邏輯 碟- 貝料重建時動作的時序圖。當硬碟在資料重建時，資料 ==料一時序週期為τ的方波信號，且在該時序處 重置QRS係藉由將此方波信號延遲〇 25至⑽ 2時序週期τ而得；時序信號CLK則是藉由將方波产 遲(_)個時序週期τ而得，其中n係為—正整數 以本實施例為例，重置 延八,7 士里置WRS係错由對資料信號DS ^遲^刀之三個時序週期τ而得到。時序信號咖則 對：枓信號DS延遲四分之三個時序週期丁而得到。： 時序广Si型正反器1〇2係為正緣觸發的正反器，因此當 ，序L就C L K由低位準狀態轉換成 為高位準狀態時，0型正反器 /狀態且重㈣The NAND logic gate 1Q4 and the buffer 1Q6〇d type flip-flop ι〇2 are electrically coupled to the hard disk (not shown), and are respectively connected to the clock input terminal c, the reset signal input terminal HS, and the data input terminal. D receives a timing signal clk, a weight signal RS, and a data signal (10), and outputs an output signal (9) from the wheel terminal according to the operation of the timing signal clk, the reset signal RS, and the data signal (4). The 'timing signal CLK and the reset signal Rs are obtained by performing a timing processing on the data signal DS, and the positive and negative 〇 type is a positive-edge triggered flip-flop. In addition, the data signal D S indicates the current operating state of the hard disk, and the timing signal CLK and the reset signal RS are respectively obtained by delaying the data signal. Where 'when the hard disk is in the normal operating state, the data signal is in the high level state' #hard disk in the fault state, the data signal (10) is in the low level state, and when the hard disk is in the data reconstruction state, the data signal Ds It is a square wave signal. The NAND logic (four) 104 has two input terminals and one output terminal, and the two input terminals of the Le 丨〇 丨〇 4 are electrically connected to the D-type flip-flop, and are received and generated according to the data signal DS and the output signal s. - Logic signal LS. Then, '财_逻辑_1〇4 is the logical signal transmitted through the output terminal 01200901174. The buffer 106 is the output of the electrical turn NAND logic _1〇4 and receives the logic generated by the NAND logic gate 1〇4. Signal ls. In addition, the buffer (10) is more electrically connected to the hard disk, and receives the hard disk in the normal operation - the action signal ACTd, where the # hard disk is in the normal operation from the % 'logic (four) LS will enable the buffer 1 〇6, so that the action signal ACT drives a normal light signal through the buffer thief 106, such as a blue coffee light (10); ^, when the hard disk is in a fault or data reconstruction state, the data signal shame is directly driven by a fault light. , such as red lED light] 1 〇. "Figure, the edge shows the logic diagram as shown in the figure - the timing diagram of the action when the material is reconstructed. When the hard disk is reconstructed, the data == a square wave signal with a time period of τ, and The QRS is reset by delaying the square wave signal by 〇25 to (10) 2 timing period τ; the timing signal CLK is obtained by delaying the square wave by (_) timing period τ, where n is For the positive integer, this example is taken as an example. The reset delay is eight, and the 7-segment WRS system error is obtained by the three timing periods τ of the data signal DS ^ ^ ^ knife. The timing signal is correct: 枓 signal DS The delay of three quarters of the timing period is obtained.: The timing-wide Si-type flip-flop 1〇2 is a positive-edge triggered flip-flop, so when the sequence L is converted from the low-level state to the high-level state. , type 0 flip-flop / state and heavy (four)
作為輸出信號os。 才會操取資料信號DS 時動= _於硬碟資料重建As the output signal os. Will only take the data signal DS when moving = _ hard disk data reconstruction
料信號照第1圖及第2圖，在時間”時，資 ^间位#狀態轉換成低位準狀態，時序信號CLK 200901174 以及重置信號RS尚鉦任 位準狀態。其次，輸出;X 因此輸“ US仍為高 邏輯閑HM處理後，财m㈣信號ds在經由na_ LS係由低位準狀態轉㈣閘1〇4所產生的邏輯信號 〜轉換成鬲位準狀態。 RS由在時，資料信號DS在低位準狀態，重置信泸 任何變I t換成低位準狀態，時序㈣似& =成:::::號:r著重置信…高位準 邏輯信號以仍=：準所產生的 在時間t3時，資祖# & ^ 在低位準狀態，C在高位準狀態，重置信號 位準狀態。由於D型正= CLK由高位準狀態轉換成低 因此輸出信號。s仍為 為高位準狀態。 丰狀'4，且使得邏輯信號LS仍 ^ Ds 位準狀態，因^’2信號CLK由低位準狀態轉換成高 輪出信號⑽。此時1〇2會掘取資料信號DS作為 位準狀態，使得邏輯=號〇1與資料信號DS同為低 中，邏輯俨號 h 仍為咼位準狀態。在本實施例According to the first picture and the second picture, at time "time", the state of the bit # is converted to the low level state, the timing signal CLK 200901174 and the reset signal RS are still in the level state. Secondly, the output; X After the input "US is still high logic idle HM processing, the m (four) signal ds is converted into a 鬲 level state by the logic signal ~ generated by the low level state (4) gate 1 〇 4 via the na_ LS system. When the RS is at the time, the data signal DS is in the low level state, the reset signal is changed to the low level state by any change, and the timing (4) is like & =::::::: r is the reset signal...the high level logic signal is Still =: Quasi-generated at time t3, Zizu # & ^ In the low level state, C is in the high level state, reset signal level state. Since the D type positive = CLK is converted from the high level state to low, the signal is output. s is still in a high level state. The abundance is '4' and the logic signal LS is still in the Ds level state because the ^'2 signal CLK is converted from the low level state to the high wheel out signal (10). At this time, 1〇2 will dig the data signal DS as the level state, so that the logic=number 〇1 and the data signal DS are both low, and the logical 俨# is still in the 咼 level state. In this embodiment
高位準狀動/硬碟處於資料重建狀態時…直保持在 色咖燈108，而 =ACT無法通過緩衝器⑽而驅動藍 燈110。 I直接藉由資料信號DS驅動紅色LED I α第3圖’係綠示如第^圖所示之邏輯電路於硬 200901174 碟故障時動作的時序圖。當硬碟在 係為低位準狀態，且重置信…藉; 遲TR時間而得到，而時序信號咖則是藉貝如延 DS延遲TC時間而得到，其曰，貝^號 時間。 殊町k b間係大於Tr 以下將以—實施例說明邏輯電路 作的情形。請同時參照^圖及第3圖、時動 料信號DS由高位準& 1 時間U扦，資 以及重置成低位準狀態，時序信號财 ° 尚無任何變化，因此輸出 位準狀態。輪出信號OS及資料信號= 閘104處理後，NANn 由NAND邏軏 ^ 邏輯閉104所產生的邏輯 由低位準狀態轉換成高位準狀態。 Μ號LS係 在^間t2時’ f料信號Ds在低位準狀態 RS由咼位準狀離轅垃 里置彳s唬 任何變化，因此;出=位準狀態’時序… u此輸出k#u 〇s便隨著重 狀態轉換成低位準狀離。“ 置URS由南位準 的漏心缺τ 時，驗〇邏_ 104所產生 的邏軏錢LS仍為高位準狀態。 所屋生 在時間叫，㈣錢^及重 狀態，時序信號cr K Λ 岣在低位準 κ由尚位準狀態轉換成低 於D型正反器102係為正 ，低位丰狀態。由 〇s保持在低位準狀態，且使得因此輸出信號 態。在本實施例中，邏輯信^硬^仍為高位準狀 -直保持在高位準狀態，動作==故障狀態時’ 而驅動藍色LED燈108， β …、、過緩衝态10ό 而是直接藉由資料信號DS驅動 200901174 紅色LED燈11 〇。 請再參照第1圖，當硬碟在正常操作狀態時，資料信 號DS係保持在高位準狀態，因此輸出信號〇s亦會在高位 準狀態。輪出信號os及資料信號DS在經由NAND邏輯閘 1〇4處理後，NAND邏輯閘1〇4所產生的邏輯信號係為 低位準狀態。此時，可藉由邏輯信號LS啟動緩衝器1〇6， 使得動作彳§號ACT通過緩衝器ι〇6而驅動藍色LED燈 108 ’且由於資料信號Ds在高位準狀態，所以紅色led燈 110不會動作。 請參照第4圖，係繪示依照本發明一實施例之控制硬 碟顯示燈號之方法的流程圖。此方法係用以使硬碟在正常 操作以及在故障或資料重建時，分別僅顯示單一燈號以供 判別。首先，將用以表示硬碟狀態的資料信號D s延遲，並 將所延遲的資料信號DS分別作為時序信號CLK以及重置 信號RS(步驟400)。 接著，藉由正緣觸發的D型正反器1〇2根據時序信號 CLK、重置信號以以及資料信號加產生輸出信號〇3(步 驟402)。再者，將輸出信號0S與資料信號Ds作nand 邏輯之運算處理，以獲得邏輯信號Ls(步驟4〇4)。然後， 判別邏輯運算之後所得到的邏輯信號LS的位準（步驟 406)。最後，再根據邏輯信號LS的位準驅動正常燈號或故 障燈號，以表示硬碟在正常操作狀態，抑或在故障或資料 重建狀態。 在本實施例中，當邏輯信號Ls為低位準狀態時，驅動 12 200901174 故障燈號（步驟408)，而當邏 田这铒1口唬LS為南位準狀態時 則驅動正常燈號（步驟41〇)。 此外，當硬碟在正常操作狀態時，時序信號clk、重 置信號RS以及資料信號Ds會使得D型正反器1〇2所產生 的輸出信號OS’在經由與資料信號⑽作财仙邏輯之運 算處理後所獲得的賴錢LS為低位準狀態。而當硬碟在 故障或資料重建狀態時，時序信號CLK、重置俨When the high level dynamic/hard disk is in the data reconstruction state... it is held directly at the color light lamp 108, and =ACT cannot drive the blue light 110 through the buffer (10). I directly drives the red LED I α by the data signal DS. Fig. 3 is a timing chart showing the operation of the logic circuit shown in Fig. 2 in the case of a hard 200901174 disc failure. When the hard disk is in the low level state, and the reset signal is borrowed; it is obtained by delaying the TR time, and the timing signal is obtained by delaying the TC time by the delay of the DS, and then the time of the time. The difference between the k and the b b is greater than Tr. The embodiment will explain the case of the logic circuit. Please refer to the ^ diagram and the third diagram at the same time. The timing signal DS is from the high level & 1 time U扦, and is reset to the low level state. The timing signal has no change, so the level status is output. The round-out signal OS and the data signal = after the gate 104 is processed, the logic generated by the NANn by the NAND logic ^ logic close 104 is converted from the low level state to the high level state. When the LS is in the interval t2, the material signal Ds is in the low level state. The RS is set by the 咼 position. 出 里 唬 唬 唬 唬 唬 唬 , , , , , 出 出 出 位 位 u u u u u u u u u u u u u u u u u u u 〇s will be converted to a low level with the heavy state. “When the URS is missing from the south, the logic LS generated by the 〇 _ _ 104 is still in a high level state. The house is called at time, (4) money ^ and heavy state, timing signal cr K Λ 岣 is converted to a lower level than the D-type flip-flop 102 in the lower level κ, and is lower than the D-type flip-flop 102. The 〇s remain in the low level state, and thus the signal state is output. In this embodiment , the logic letter ^ hard ^ is still high level - directly maintained in the high level state, the action = = fault state ' while driving the blue LED light 108, β ...,, over the buffer state 10 ό but directly by the data signal DS Drive 200901174 Red LED light 11 〇. Please refer to Figure 1 again, when the hard disk is in normal operation state, the data signal DS is kept in the high level state, so the output signal 〇s will also be in the high level state. After the data signal DS is processed by the NAND logic gate 1〇4, the logic signal generated by the NAND logic gate 1〇4 is in a low level state. At this time, the buffer 1〇6 can be activated by the logic signal LS, so that the action彳§ ACT drives the blue LED light 108 through the buffer ι〇6 'Because the data signal Ds is in the high level state, the red LED lamp 110 does not operate. Referring to FIG. 4, a flow chart of a method for controlling the hard disk display signal according to an embodiment of the present invention is shown. It is used to make the hard disk display only a single light number for normal operation and when the fault or data is reconstructed. First, the data signal D s used to indicate the state of the hard disk is delayed, and the delayed data signal is DS is respectively used as the timing signal CLK and the reset signal RS (step 400). Next, the D-type flip-flop 1〇2 triggered by the positive edge generates an output signal according to the timing signal CLK, the reset signal, and the data signal. (Step 402) Further, the output signal OS and the data signal Ds are subjected to nand logic processing to obtain a logic signal Ls (step 4〇4). Then, the level of the logic signal LS obtained after the logic operation is discriminated (Step 406) Finally, the normal light or fault light is driven according to the level of the logic signal LS to indicate that the hard disk is in a normal operating state, or in a fault or data reconstruction state. In this embodiment, When the logic signal Ls is in the low level state, the 12200901174 fault light number is driven (step 408), and when the 田1 port LS is in the south level state, the normal light signal is driven (step 41〇). When the hard disk is in the normal operating state, the timing signal clk, the reset signal RS, and the data signal Ds cause the output signal OS' generated by the D-type flip-flop 1〇2 to be processed by the logic signal (10). The obtained LS is the low level state, and when the hard disk is in the fault or data reconstruction state, the timing signal CLK, reset 俨
及資料信號DS則是會使得〇型正反器1〇2所產生的輸出 信號OS’在經由與資料信號仍作从_邏輯之運算處理 後所獲得的邏輯信號LS為高位準狀態。 其中，由於硬碟在資料重建狀態時’資料信號係為_ 方波信號，因此便將此方波信號延遲〇_25至〇 75個時序週 期以獲得重置信號RS，並且延遲方波信號的(Ν+〇·75)個時 序週期以獲得時序信號CLK。其中Ν係為一正整數，並使 得邏輯信冑LS在硬碟處於資料重建狀態時保持在高 狀態。 由上述本發明之實施例可知，應用此控制硬碟顯示燈 號之邏輯電路及方法’可讓使用者不會在操作時對於硬^ 的顯示燈號感到混淆，能清楚且明白地判別硬碟的燈费Υ 瞭解硬碟目前的操作狀態，以利資料存取工作的進行。 雖然本發明已以實施例揭露如上’然其並非用以限定 本發明，任何所屬技術領域中具有通常知識者，在不脫離 本發明之精神和範圍内，當可作各種之更動與潤飾，因此 本發明之保護範圍當視後附之申請專利範圍所界定者為 13 200901174 準。 【圖式簡單說明】 為讓本發明之上述和其他目的、特徵、優點與實施例 能更明顯易懂，所附圖式之詳細說明如下： 第1圖係繪示依照本發明一實施例之邏輯電路的示意 圖。 第2圖係繪示如第1圖所示之邏輯電路於硬碟資料重 建時動作的時序圖。 第3圖係繪示如第1圖所示之邏輯電路於硬碟故障時 動作的時序圖。 第4圖係繪示依照本發明一實施例之控制硬碟顯示燈 號之方法的流程圖。 【主要元件符號說明】 1〇〇 :邏輯電路 102 : D型正反器 104 : NAND邏輯閘 106 :緩衝器 108 :藍色LED燈 11 0 :紅色LED燈 400〜410 :步驟 14And the data signal DS is such that the output signal OS' generated by the 正-type flip-flop 1 〇 2 is in a high level state after the logic signal LS obtained by the _ logic operation processing with the data signal. Wherein, since the hard disk is in the state of data reconstruction, the data signal is _ square wave signal, so the square wave signal is delayed by 〇25 to 个75 timing cycles to obtain the reset signal RS, and the square wave signal is delayed. (Ν+〇·75) timing cycles to obtain the timing signal CLK. The Ν is a positive integer, and the logical LS is kept high when the hard disk is in the data reconstruction state. It can be seen from the above embodiments of the present invention that the logic circuit and method for controlling the display of the hard disk display can prevent the user from being confused with the hard display signal during operation, and can clearly and clearly distinguish the hard disk. The cost of the lamp Υ Understand the current operating state of the hard disk to facilitate data access work. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and it is possible to make various changes and modifications without departing from the spirit and scope of the invention. The scope of protection of the present invention is defined by the scope of the appended patent application, which is 13 200901174. BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features, advantages and embodiments of the present invention will become more <RTIgt; Schematic diagram of a logic circuit. Fig. 2 is a timing chart showing the operation of the logic circuit shown in Fig. 1 when the hard disk data is reconstructed. Fig. 3 is a timing chart showing the operation of the logic circuit shown in Fig. 1 in the event of a hard disk failure. Figure 4 is a flow chart showing a method of controlling a hard disk display light according to an embodiment of the present invention. [Main component symbol description] 1〇〇: Logic circuit 102: D-type flip-flop 104: NAND logic gate 106: Buffer 108: Blue LED lamp 11 0: Red LED lamp 400~410: Step 14