TW200845106A - Chamber-based performance analysis method and system thereof - Google Patents

Abstract

A chamber-based performance analysis method for a wafer manufacturing system, wherein the wafer manufacturing system comprises at least one process station which has at least one tool having a plurality of chambers. A predetermined look-up table recording information corresponding to an equipment data of the tool which has a chamber identification data is first provided. Selection of at least one process station or at least one tool to be checked is then inputted by a first interface. At least one display result is provided on the first interface according to the predetermined look-up table and the selected station or tool. Then, the performances of the chambers are checked and analyzed utilizing the at least one display result.

Description

200845106 IX. Description of the Invention: Technical Field of the Invention The present invention relates to a method for analyzing the performance of a device for a wafer manufacturing system, and more particularly to a method for finding a complex chamber by using a wafer overlay. The performance of wafer equipment and the method of failure analysis. [Previous technology #f] For the production of the semiconductor industry, a wafer of at least hundreds of precision processing procedures, and as long as there is a process is not perfect, it will affect the subsequent processing and products. Quality, and often even wafer scrapping, has never been abandoned. Generally, in order to ensure the manufacturing result of the wafer, the wafer product is tested after completion, and each crystal grain on each wafer is divided into a non-defective grain or a defective grain according to different test conditions, and The test results are expressed in a wafer map (CP MAP). See Figure 1A, which shows an exemplary wafer map 100. Each square in wafer map 100 represents the test result for a die, which is color or/or error number indicating the type or extent of the error. As shown, the die 101 is shown in white and numbered 1, representing the normal die, while the die 103 and 105 are represented by different colors and numbered 5 and 12, respectively, representing different Test the failure condition, such as the situation and extent of leakage. Usually the color is dark and the number is large, indicating a higher degree of defects. Therefore, by such a wafer map display, the grain positions of the defects can be marked, and these defective crystal grains can be discarded in the subsequent processing to save manufacturing costs.

Clienfs Docket No.: PT. AP-823 TT5s Docket No: 0532-A41067-TW/Final/Jasonkung 5 200845106 Defective dies on wafers are often caused by different process factors, each in the wafer manufacturing process Improper processing of the process may cause defects in the die, and the defective die may not function properly. The cause of the defective grain must be identified in order to provide a prioritization of corrections in the production process. Performance analysis for semiconductor devices or machines can help you understand the appropriateness of each process. However, if you want to see the performance of a machine, such as the percentage of leakage, the wafer map of a wafer is not enough to represent the whole machine, but it needs to be for a period of time (such as one day or 12 hours). The test results of the wafers processed by the station are analyzed to determine the performance of the machine. Therefore, the wafer maps of the wafers processed over a period of time are all abbreviated together to form a so-called composite wafer map. The wafer overlay is used for failure analysis. The test results of each die in the figure are represented by a predetermined error number or color. For example, in a leakage test, the white part indicates good grain ' while other colors The table does not test for problematic grains. By taking this wafer overlay, you can understand the failure condition of a machine and the failure distribution, and then control the failure. Wafer manufacturing processes have a variety of different applications, such as etching or deposition machines, and there are usually several chambers in the machine. When some machines have problems causing partial failures in the wafer map to be displayed, it is not easy to find the problem in the reaction chamber in the machine. For a machine with multiple reaction chambers, it is necessary to collect and filter the wafer map generated by the wafer processed by the single reaction chamber, and then stack all the filtered wafer patterns to generate a reaction. Room level

Client5s Docket No.: PT. AP-823 TT's Docket No: 0532-A41067-TW/Final/Jasonkung 6 200845106 (chamber-level) is a classified wafer overlay, and then by checking all the wafer overlays, Know the location and failure of the reaction chamber where the failure occurred. However, on the existing test machine, each machine has hundreds of machine data (ED) data, and each machine places information about the number of the reaction chamber that executes the wafer. Among the different machine parameters, for example, the number information of the reaction chamber of the I-spot machine is placed in the machine parameter Ciwa, and the number information of the reaction chamber of the deposition machine is placed in the machine parameter CIWT. Therefore, in order to obtain a wafer overlay classified by the reaction chamber level, it is not only necessary to perform complicated screening and repeated calculations manually, but also takes a lot of time, delays the time for finding the problem, and wastes part of the time. manufacturing cost. Figure 2 shows an exemplary flow chart for generating a stack of wafers classified by reaction chamber level. First, the lot to be collected and the wafer map (CP MAP) data are specified (step S210). Next, the relevant machine parameter (E^) data is collected to find the parameter containing the number of the reaction chamber (chamber-id) (step S220). Next, a comparison table having the numbers of the wafers and the reaction chamber is prepared (step S230). Such a look-up table must be manually generated, which will have information on the processing of each wafer from that chamber (as known by the number of the reaction chamber in the machine table). Then, using the above comparison table, manually manually select the corresponding wafer map (cj> MAP) data of each reaction chamber of each machine, and then stack the selected wafer maps together to generate each machine &; corresponding wafer overlay (step S240). Please note that the action of step S24〇 will be repeated multiple times. For example, if a certain machine has N reaction chambers, step S24() needs to be repeated at least N times.

Client's Docket No.:ΡΤ. AP-823 ΤΤ s Docket No:0532-A41067-TW/Final/Jasonkung 7 200845106 For example, please refer to Figure 1B, assuming that the machine has four reaction chambers C1-C4, And in the past 12 hours, the machine 12 has processed the Deng wafer, as shown at 130 in Figure 1B. In order to understand the performance of the machine 12, the 30 wafers are further divided into wafer sets 132, 134, 136 and 138 according to the processed reaction chamber numbers ^, & and C4 ', and then wafer maps of these wafer sets Stacked to obtain corresponding wafer overlays 142, 144, and 146. As shown in Figure 1B, the reaction chambers have a darker color in the Wafer Stacks 14G and 144, indicating that the reaction chamber of the machine Δ m and C3 may fail, so: 0 or exclude the wafer from being sent into the reaction. Chambers C1 and C3. = In addition, it is often inconvenient to perform step Jo at least in the reaction chambers C1 and C3 where the failure occurs. People's Guardian Yuancheng is not. Therefore, only wafer overlays classified by machine grade are generally considered. However, this is based on the machine level. The rough wafer overlay does not control the condition of each chamber, and it may even waste more manufacturing costs due to misjudgment. For example, suppose that there are 5 reaction chambers in a machine, only one of the reaction chambers fails or fails, and the other four are positive (four), shell; the wafer overlay classified by machine grade will be normal. The phenomenon. As a result, wafers in manufacturing are likely to continue to be processed through the failed reaction chambers in the machine, resulting in more defective grains. Therefore, there is a need for a method that can accurately and simply locate the location of a reaction chamber in which a failure or malfunction occurs. [Summary of the Invention]

Client's Docket Νο_:ΡΤ· AP-823 TT's Docket No:0532-A41067-TW/Final/Jasonkung 8 200845106 In view of this, one of the objects of the present invention is to provide a method and system for performance analysis for a wafer fabrication A system for analyzing the performance of a machine with multiple reaction chambers in a wafer fabrication system. By stacking wafers, the position of the reaction chamber where failure or failure occurs is accurately and simply located. In view of the above objects, the present invention provides a reaction chamber performance analysis method suitable for use in a wafer fabrication system in which the wafer fabrication system has at least one station having at least one station including a plurality of reaction chambers. The reaction chamber performance analysis method includes the following steps. An established comparison table is provided, wherein [the established comparison table records one machine parameter (ED) data of the machine, and the machine parameter (ED) data has a corresponding reaction room information. Then, at least one station or one machine to be inspected is input by a first interface. At least one corresponding display result is generated on the first interface according to the established comparison table and the selected station or machine. Next, the performance of the reaction chamber is determined and analyzed using at least one display result. The present invention further provides a performance analysis system for analyzing the performance of a wafer manufacturing system, wherein the manufacturing system has at least one station, the station has a #V less than one machine, and the machine includes a plurality of reaction chambers. The performance analysis system includes at least one electronic device and a server, wherein the electronic device provides at least a first interface and the server provides a predetermined look-up table. The first mask has a first zone and a second zone, and the first zone is used to designate at least one inspection item. The established comparison table records one machine parameter (ED) data of the machine, and the machine parameter (ED) data has a corresponding reaction room information. The performance analysis system generates a correspondence in the second area of the first interface according to the inspection item specified by the user in the first area of the first interface and the established comparison table.

Client ?s Docket No.: PT. AP-823 TT5s Docket No: 0532-A41067-TW/Final/Jasonkung 9 200845106 Examine the display results of the project and use the displayed results to identify and analyze the performance of the wafer fabrication system. The present invention also provides a method of performance analysis for analyzing the performance of a wafer fabrication system wherein there are at least one station in the manufacturing system, at least one station on the platform, and the machine includes a plurality of reaction chambers. This method of performance analysis includes the following steps. A first interface is provided, wherein the first mask has a first area and a second area, and the first area is used to designate at least one inspection item. A stack of wafers to be inspected is generated on the second zone based on the inspection items specified in the first zone and an established comparison table. Identify and analyze the performance of the wafer fabrication system using wafer overlays. Among them, the established comparison table records one machine parameter (ED) data related to the machine, and there is a corresponding reaction room information in the machine parameter (ED) data. The above and other objects, features and advantages of the present invention will become more <RTIgt; [Embodiment] Embodiments of the present invention relate to a method for analyzing a performance of a semiconductor or a wafer manufacturing machine, and provide a method for easily generating a wafer overlay classified by a reaction chamber level, which can quickly locate a problem (a failure) The location of the machine or reaction chamber for subsequent failure handling to avoid additional manufacturing costs due to machine or reaction chamber failure. In one embodiment, by providing a history record associated with the reaction chamber, the user or online operator only has to specify (select) the station to be collected (e.g., an etching station that performs etching, a deposition station that performs deposition, and

Client's Docket Νο·:ΡΤ· AP-823 ΤΤ^ Docket No:0532-A41067-TW/Final/Jasonkung 10 200845106 Metallized metallization station, etc.) or machine, you can get the desired machine level The classification or reaction chamber grade is a classified wafer overlay, and these wafer overlays are used for failure analysis, which is effectively disposed of for a failed reaction chamber or machine. In addition, in another embodiment, the present invention provides a stack analysis interface for displaying all station, machine and/or reaction chamber information for use in a region of the overlay analysis interface in a region of the overlay analysis interface. At the same time, in another area, the user selects the wafer overlay to be displayed, so that the user can easily switch between different wafer overlays, and the position where the problem occurs can be located more quickly. The ability to find differences in the reaction chamber can be increased to ensure process accuracy. 3 is a flow chart showing a process chamber performance analysis method 300 according to an embodiment of the present invention, which is applicable to a wafer fabrication system of at least one manufacturing machine having a plurality of reaction chambers (such as the machine table 120 shown in FIG. 1B). in. Wherein, the wafer manufacturing system has at least one station, and one of the stations includes the manufacturing machine. In step S310, a predetermined comparison table is provided. The established comparison table is stored in an engineering data warehouse, which records information about one of the machine parameters of each machine in the wafer manufacturing system, and there is a corresponding reaction room information in the parameter data of the machine. For example, if the number information of the reaction chamber of an etching machine is placed in the machine parameter CIWA, the machine parameter CIWA of the etching machine will be recorded in the predetermined comparison table to find out in the subsequent processing. Its corresponding reaction chamber number information. See the description of Figure 5 below for the detailed format of this established comparison table. Next, in step S320, the user specifies the lot to be collected and the wafer map data, and in step S330, the station or machine to be collected is specified (selected). Wherein, step S320 and step

Client's Docket Νο·:ΡΤ. AP-823 TT?s Docket No:0532-A41067-TW/Final/Jasonkung 11 200845106 Step S330 provides the required input through a graphical interface. See Figure 4 and Figure 6 for the use and details of this graphical interface. In this embodiment, the user can designate (select) a station to generate a machine class as a class or a machine to generate a wafer overlay classified by the reaction chamber level. According to the selected station or machine, a wafer-in-process (WIP) data can be obtained. The WIP data is used to indicate that a wafer is attached to that machine at that time. The station handles it. Please refer to the description in Figure 5 below for the detailed format of this WIP document. Then, in step S340, corresponding wafer overlays are generated on the graphical interface according to the predetermined comparison table, batch data, wafer map data, and station or machine selection. Finally, in step S350, the wafer overlay can be used to discriminate and analyze the performance of each reaction chamber. Referring to Figure 5, there is shown a comparison table 510, a wafer-in-process (WIP) data 520, and a wafer reaction chamber number comparison table 530 in accordance with an embodiment of the present invention. The predetermined comparison table 510 includes at least one station, one machine, and a machine parameter position corresponding to the number of the reaction chamber, indicating that the reaction chamber number of each machine in each station is placed there. In a machine parameter. For example, as shown in the figure, for the machine cdA1(), the reaction chamber number is placed in the machine parameter CIW0, and for the machine EEG10, the reaction chamber number is placed on the machine. The parameter is in ClWl. That is, it can be known that the wafer is processed by the reaction chamber of the machine EEG10 by the reaction chamber number in the machine parameter CIW1 of the machine EEG10. Since the number of the reaction chamber of each machine is fixed in the number of the machine, it can be fixed and can be known in advance. Therefore, this can be collected in advance.

Client 5s Docket No.: PT. AP-823 TT5s Docket No: 0532-A41067-TW/Final/Jasonkung 12 200845106 Some information is generated to generate this established comparison table 510 for use. The work in process (WIP) data 520 includes at least one wafer number, a batch number, a time, and a processing station field to indicate that a wafer is processed by that machine at that point in time. For example, as shown, for wafers with lot number 1 and wafer numbers 1 and 3, they are processed by machine C1 at times T1 and T3, respectively, and for lot number 1 and wafer number. For a wafer of 2, it is processed by machine C2 at time T2, and so on. The wafer-reaction chamber number comparison table 530 is generated according to the established comparison table 510 and the work in process (WIP) data 520, and includes at least a batch number, a wafer number, a time, a processing machine, and a reaction chamber number block. The bit history is used to indicate the wafer history recorded by the reaction chamber corresponding to each reaction chamber number of each machine in each station, and the wafer number of the wafer number XX is at that time. The reaction chamber of the station is processed. For example, as shown in the figure, for the wafers of lot number 1 and wafer numbers 4, 10, and 16, they are the reaction chamber numbers Cl, C2 of the machine CDA10 at time T2 and T3, respectively. And the processing of the reaction chamber of C3, and so on. Please note that in the present embodiment, the wafer-reaction room number comparison table 530 in which the history of the reaction chamber is recorded is automatically generated according to the established comparison table 510 and the WIP data 520. Therefore, the user does not need to memorize. Any machine parameters or other information is very convenient. Figure 4 is a flow chart showing a method 400 for using the overlay analysis interface in accordance with an embodiment of the present invention. First, in step S410, a graphical analysis interface is provided. Next, in step S420, a selection item of a station or a machine is input in a tree menu area of the graphical analysis interface. In step S430, in the figure

Client's Docket Νο·:ΡΤ· AP-823 ΤΤ^ Docket No:0532-A41067-TW/Final/Jasonkung 13 200845106 The display result area of the analytic analysis interface displays the wafer overlay corresponding to the above-mentioned selection station. Referring to Figure 6, there is shown a schematic diagram of an overlay analysis interface 600 in accordance with the present invention. The overlay analysis interface 6〇〇 to $ has a menu area 610 and a display result area 620. The selection 610 further has a tree list 614, which presents the station option 615, the machine selection 616, and the reaction room option 617 in a tree manner for the user to select the station, the machine, and/or the item to be collected. The choice of reaction chamber. Wherein, the parent node of each node of the tree=Li 614 is the station option 615, the sub-role point of the station option 61$ displays its corresponding machine option 616, and the child nodes of the machine option 616 display its corresponding Reaction chamber option 617. The content of the tree list 614 has a different tree structure along with the list selection buttons 612 and 612-2 of the list selection area 612. When the list selection button 612_2 ([machine]) is pressed (selected), it indicates that the machine level is to be classified as a wafer map 'so the tree list 614 only displays the station option 615 and the machine option 616. The reaction chamber option 617 will not occur, ie the reaction chamber option 617 will be hidden. When the list selection button 612-1 ([reaction chamber]) is pressed (selected), it indicates that the wafer layout to be classified as the reaction chamber level is to be performed, so that the tree list area 614 displays the station option 615 and the machine table. In addition to option 616, its corresponding response to option 617 is also displayed under each machine option 616. The display result area 620 is used to display a wafer overlay 622 corresponding to the selected item of the menu area 610. In addition, the overlay analysis interface 600 further has a stack switching unit 630, and a wafer overlay for switching different options is displayed in the display result area 620. For example, as shown in Figure 6, the tree is displayed in the tree list 614.

Client's Docket No.:ΡΤ. AP-823 ΤΤ^ Docket No:0532-A41067-TW/Final/Jasonkung 14 200845106 Table 4 has 4 reaction chamber options, assuming that you want to analyze the performance of the machine 4, the reaction chamber reaction chamber 2. The selection items of the reaction chamber 3 and the reaction chamber 4 are all checked, and the table does not display the four wafer chamber levels as the classified wafer overlay 622 on the display result area 620. Therefore, the wafer overlay 622 corresponding to the reaction chamber 1 will be displayed first in the display result area 62. Then, the overlay switching unit 630 can be used to switch the wafer overlay on the display result area 62〇 to the wafer overlay 622 of the next-order reaction chamber 2, or to the crystal of the reaction chamber 4 of the previous order. Round stack 622". Due to the switching of the wafer overlay and the machine and/or reaction chamber selection, the wafer overlay of all the reaction chambers can be easily analyzed. Get the stack of wafers you want to collect, you can easily and quickly understand the performance of each reaction chamber in the machine according to the results of the wafer overlay, and accurately find the fault when the reaction chamber or machine is broken. The machine or reaction chamber that is dropped reduces the downtime caused by the broken machine or reaction chamber. For example, assume that the machine 4 has four reaction chambers 丨_4, and the reaction to 2 fails. The wafer overlays classified by the machine level are analyzed. Since the other three reaction chambers 1, 3 and 4 in the machine 4 are normal, the average result will be normal. As a result, the wafer may still be caused. Delivered to the reaction chamber 2 of the machine 4 for processing, resulting in unnecessary According to the method of the embodiment of the present invention, by analyzing the wafer overlay of the classification of the reaction chamber, it can be observed that the wafers obtained by the reaction chambers 1, 3 and 4 display a normal white area, and The wafer stack obtained in the reaction chamber 2 is partially inferior to the color of the color. Therefore, it can be known that the reaction chamber 2 has failed. Thus, the failure can be eliminated or the wafer can be sent to the reaction chamber 2 for removal.

Client’s Docket No.:ΡΤ. AP-823 TT,s Docket No:0532-A41067-TW/Final/Jasonkung 15 200845106 Processing. In addition, because of the rapid generation of wafer overlays and the provision of structured reaction chamber information displays, the computational time is greatly reduced, which not only enhances the ability to find chamber differences, but also enhances other applications (eg, reaction chamber commonality). Analysis of the ability of analysis (chamber commonality). The present invention also provides a method for performing the above-described performance analysis method. Figure 7 shows a schematic diagram of an effect analysis system 700 according to an embodiment of the present invention for analyzing the performance of a wafer manufacturing system in which at least one station is in the manufacturing system, and the station has a = one A machine table, and the machine includes a plurality of reaction chambers. The performance analysis system 7q includes at least one engineering data storage server 710 and an electronic device 72 (e.g., a personal computer or an end host). The electronic device 72 provides at least one map analysis interface 701, and the engineering data storage server 71 provides a predetermined look-up table 702. The overlay analysis interface 7〇1 and the established comparison table 7(10) are similar to the above-described overlay analysis interface 600 and the established comparison table 51〇, and the details are omitted here. The above-mentioned work item (WIp) data 52〇 and the round-reaction room number comparison table 530 may also be stored in the engineering data warehouse (EDA) server 710 at the same time. Figure 8 is a diagram showing a performance analysis environment in accordance with an embodiment of the present invention. As shown in the figure, this performance analysis loop includes, in addition to the above-described performance analysis system, a second = load server 730, a manufacturing execution system (MES) 74, and a crystal test system 75G. The 'data manned server 73 () is connected to the manufacturing system (MES) 74G and the wafer testing system 75 (), and then connected to the engineering data warehouse server 71 () of the second analysis system 7GG. Wafer test system ^

Client's Docket No.: PT. AP-823 TT^ Docket No: 0532-A41067-TW/Final/Jasonkung 16 200845106 750 produces test results for each wafer, Manufacturing Execution System (MES) 74〇 provides the above-mentioned work in progress (WIP) data and machine parameter (ED) data. These wafer test results, work in process (WIP) data, and machine parameter (ED) data are then loaded into the data load server 730. After the data loading server 73() receives the above data, the predetermined comparison table 702 is generated, and then the predetermined comparison table 702 is stored in the engineering data storage (£:1) evaluation server 71. Thus, the engineering data repository (EDW) server 710 includes this established comparison table 7〇2. In this embodiment, as described above, the electronic device in the performance analysis system 7: 720 can be based on the inspection item specified by the user in the menu area of the overlay analysis interface in the electronic device 72, and the engineering data storage servo. In the established comparison table 702, the related work in process (WIP) data is collected by the engineering data storage server 71 to generate a history information of the reaction chamber, and the specified wafers obtained in the wafer testing system 750 are collected. The test, = result, is generated on the display result area of the overlay analysis interface 701 - a wafer overlay corresponding to the search item. The resulting wafer overlay can be used to identify and analyze the performance of the wafer fabrication system. # V The above description provides several different embodiments or different methods of applying the invention. The specific devices and methods in the examples are intended to help explain the main spirit and purpose of the invention, and the invention is not limited thereto.

Therefore, the present invention has been described above by way of a preferred embodiment, and is not intended to limit the invention, and any one skilled in the art can make some changes and refinements without departing from the spirit and scope of the invention. The scope of protection of the hair = the scope of the patent application is subject to the definition of the patent application. X [Simple description of the diagram]

Clienfs Docket No.: PT. AP-823 TT’s Docket No: 〇532-A41067-TW/Final/Jasonkung 17 200845106 Figure 1A shows an exemplary wafer diagram. The first diagram shows a schematic diagram of the generation of an exemplary wafer overlay. Figure 2 is a flow chart showing an exemplary generation of a wafer overlay classified by reaction chamber level. Figure 3 is a flow chart showing a method for analyzing the efficiency of a reaction chamber in accordance with an embodiment of the present invention. Figure 4 is a flow diagram of a method of using the overlay analysis interface in accordance with an embodiment of the present invention. Figure 5 is a schematic illustration of the reaction chamber data in accordance with an embodiment of the present invention. Figure 6 is a schematic diagram showing a overlay analysis interface in accordance with an embodiment of the present invention. Figure 7 is a diagram showing a performance analysis system in accordance with an embodiment of the present invention. Figure 8 is a diagram showing a performance analysis environment in accordance with an embodiment of the present invention. [Main component symbol description] 100~ wafer map; 101, 103, 105~ die; 120~ machine; C1-C4~ reaction chamber; 130, 132, 134, 136, 138~ wafer set; 140, 142 , 144, 146~ wafer overlay; S210-S240~ steps;

Client5s Docket No.: PT. AP-823 TT?s Docket No: 0532-A41067-TW/Final/Jasonkung, &lt; 200845106 S310-S350~Step; S410-S430~Step; 510~ Established Comparison Table; 520~ Product (WIP) data; 530 ~ wafer - reaction room number comparison table; 600 ~ overlay analysis interface; 610 ~ menu area; 612 ~ list selection area; 612-1, 612-2 ~ list selection button; 614 ~ tree List of items; 615~ station option; 616~ machine option; 617~ reaction room option; 620~ display result area; 622~ wafer overlay; 630~ stack switching unit; 700~ performance analysis system; Figure analysis interface; 702 ~ established comparison table; 710 ~ engineering data storage (EDA) server; 720 ~ electronic device; 730 ~ data loading server; 740 ~ manufacturing execution system; 750 ~ wafer test system.

Client’s Docket No.:ΡΤ· AP-823 ΤΤ^ Docket No:0532-A41067-TW/Final/Jasonkung 19

Claims (1)

200845106 X. Patent Application Range: 1. A reaction chamber performance analysis method suitable for a wafer manufacturing system, wherein the wafer manufacturing system has at least one station, the platform has at least one machine, and the machine includes a plurality of reaction chambers The reaction chamber performance analysis method comprises the following steps: providing a predetermined comparison table, wherein the predetermined comparison table records information about a machine parameter of the machine, and a corresponding reaction room information is included in the parameter data of the machine; Entering at least one station or one machine to be inspected by a first interface; generating at least one corresponding display result on the first interface according to the predetermined comparison table and the selected station or the machine; And using the at least one display result to discriminate and analyze the performance of the reaction chambers. 2. The reaction chamber performance analysis method according to claim 1, wherein the step of generating at least one corresponding display result on the first interface comprises: according to the selected station or the machine, Obtaining a work item data; and generating the corresponding display result on the first interface according to the work item data and the predetermined comparison table. 3. The reaction chamber performance analysis method according to claim 1, wherein the step of inputting the machine to be inspected or the selection of the reaction chamber comprises: Client's Docket No.: ΡΤ· AP-823 TT's Docket No :0532-A41067-TW/Final/Jasonkung 20 200845106 From the menu area of one of the first interfaces, enter the machine selection or the station selection to be checked. 4. The reaction chamber performance analysis method according to claim 3, further comprising: providing a tree list for inputting the station selection or the machine selection to be checked, wherein the tree list has at least one The station selection item, the plurality of machine selection items corresponding to the station selection item, and the plurality of reaction room selection items corresponding to the machine selection item, and the station selection item is the parent node of the selection item of the machine, each One of the machine selection items is the parent node of the corresponding reaction room selection item. 5. The reaction chamber performance analysis method of claim 4, further comprising: providing a list selection button on the first interface to switch the selection of the station or the machine. 6. The reaction chamber performance analysis method according to claim 5, wherein the list selection button has a first option and a second option, and when the list selection button is the first option, the Wait for the reaction room to select the project. 7. The reaction chamber performance analysis method of claim 1, further comprising: providing a switching unit to switch the display result on the first interface. 8. The reaction chamber performance analysis method according to claim 7, wherein the at least one wafer overlay is used to discriminate and analyze the reaction Client's Docket No.: ΡΤ AP-823 TT's Docket No: 0532 -A41067-TW/Final/Jasonkung 21 200845106 The performance of the room further includes: using the switching unit, sequentially outputting the display results corresponding to the reaction chambers of a machine to the first interface; and viewing the The results are displayed to determine whether the reaction chambers of the machine have failed. 9. The method for analyzing the efficiency of a reaction chamber as described in claim 7 of the patent application, further comprising: pre-storing the predetermined comparison table in an engineering data storage server. 10. The reaction chamber performance analysis method of claim 1, wherein the display results are wafer overlays. 11 · A performance analysis system for analyzing the performance of a wafer fabrication system, wherein the wafer fabrication system has at least one station, the platform has at least one machine, and the machine includes a plurality of reaction chambers, the performance The analysis system includes: an electronic device, the electronic device provides at least one first interface, wherein the first mask has a first area and a second area, and the first area is used to designate at least one inspection item; and a server, the server provides a predetermined comparison table, wherein the predetermined comparison table records information about a machine parameter of the machine, and a corresponding reaction room information is included in the parameter data of the machine, wherein the performance analysis system And generating, according to the inspection item specified by the first area of the first interface of the user in the electronic device and the predetermined comparison table in the server, generating a pair on the second area of the first interface The display result of the item is checked, and the display result is used to discriminate and analyze the performance of the wafer manufacturing system. Client's Docket No.: ΡΤ· AP-823 ΤΤ^ Docket No:0532-A41067-TW/Finayjasonkung 22 200845106 12. The performance analysis system of claim 11, wherein the electronic device is specified by the user The inspection item is obtained from the server, and the display result of the corresponding inspection item is generated on the second area of the first interface according to the work item data and the predetermined comparison table. 13. The performance analysis system of claim 11, wherein the display result is a wafer overlay. 14. The performance analysis system of claim 11, wherein the first interface further comprises a switching unit for switching the display result on the second area. 15. The performance analysis system of claim 11, wherein the first zone further comprises a tree list for specifying the inspection item, wherein the tree list has at least one station selection item, corresponding to the station Do not select the multiple machine selection items of the project and the multiple reaction room selection items corresponding to the machine selection items, and the station selection item is the parent node of the selected items of the machines, and each of the machines selects the project system. The parent node of the project is selected for the corresponding reaction chambers. 16. A performance analysis method for analyzing the performance of a wafer fabrication system, wherein the manufacturing system has at least one station, the platform has at least one machine, and the machine includes a plurality of reaction chambers, and the performance analysis method includes The following steps are: providing a first interface, wherein the first mask has a first area and a second area, and the first area is used to specify at least one inspection item; the inspection item specified according to the first area and An established comparison table, Client?s Docket No.rPT. AP-823 TT5s Docket No: 0532-A41067-TW/Final/Jasonkung 23 200845106 A pair of wafer overlays to be inspected is generated on the second zone; Using the wafer overlay to identify and analyze the performance of the wafer fabrication system, wherein the predetermined comparison table records information about a machine parameter of the machine, and a corresponding reaction room information is included in the parameter data of the machine. . 17. For the performance analysis method described in claim 16 of the patent application, the inspection item is at least one station, one machine or one reaction room. 18. The method of performance analysis according to claim 16, wherein the step of generating a wafer overlay of the corresponding inspection item on the second area comprises: obtaining an in-process product according to the specified inspection item The tribute, and the wafer overlay of the corresponding inspection item is generated in the second area according to the work-in-progress data and the predetermined comparison table. 19. The method of performance analysis according to claim 16, wherein the first area further has a tree list for inputting the check item, wherein the tree list has at least one station selection item, corresponding to the station Do not select the multiple machine selection items of the project and the multiple reaction room selection items corresponding to the machine selection items, and the station selection item is the parent node of the selected items of the machines, and each of the machines selects the project system. The parent node of the project is selected for the corresponding reaction chambers. 20. The method of performance analysis according to claim 16, further comprising: providing a list selection button on the first interface to switch the check item 0 Client's Docket No. :ΡΤ· AP-823 TT?s 21. The performance analysis method of claim 20, wherein the list selection button further has a first option and a second option, and when When the list selection button is the first option, the reaction chamber selection items are hidden. 22. The method according to claim 21, further comprising: using the switching unit, sequentially outputting the display results corresponding to the reaction chambers of a machine to the second area; and: The display results are reviewed to determine if the reaction chambers of the machine have failed. Client’s Docket No. :ΡΤ. AP-823 TT5s Docket No:0532-A41067-TW/Final/Jasonkung