TW200840016A - Electrostatic discharge protection device - Google Patents

Electrostatic discharge protection device Download PDF

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Publication number
TW200840016A
TW200840016A TW96110714A TW96110714A TW200840016A TW 200840016 A TW200840016 A TW 200840016A TW 96110714 A TW96110714 A TW 96110714A TW 96110714 A TW96110714 A TW 96110714A TW 200840016 A TW200840016 A TW 200840016A
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Taiwan
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coupled
transistor
gate
conductive path
electrostatic discharge
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TW96110714A
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Chinese (zh)
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TWI345300B (en
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Shao-Chang Huang
Ke-Hong Chen
Ching-Yuan Lin
Hsin-Ming Chen
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Ememory Technology Inc
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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

An electrostatic discharge (ESD) protection device is provided herein. The ESD protection device comprises a first metal-oxide-semiconductor (MOS) transistor, a detect module, and a tied voltage module. A first and a second source/drain of the first MOS transistor are respectively coupled to a first and a second conductive path. The first MOS transistor transmits electrostatic currents between the first and the second conductive path when an ESD protection mode is occurred. The detect module is coupled between the first and the second conductive path and configured to provide an offset voltage to the first MOS transistor to make the first MOS transistor conduct when it is in the ESD protection mode. The tie voltage module is configured to tie a gate voltage of the first MOS transistor to make the first MOS transistor not conduct when it isn't in the ESD protection mode.

Description

200840016 υ^ουυι 23508twf.doc/n 九、發明說明: 【發明所屬之技術領域】 本發明是關於一種靜電放電防護裝置,且特別是關於 .一種在非靜電放電模式下避免漏電流發生之靜電放電防護 裝置。 ° 【先前技術】 電子產品於實際使用環境中可能會遭受靜電放電 ⑩ (electrostatic discharge,ESD)的影響而導致損壞。由於靜 電放電電壓較一般所提供的電源電壓大出甚多,而當靜電 放電發生時,此靜電放電電流便很有可能將元件燒毀。因 此必須在電路中作一些靜電放電防護措施以有效隔離靜電 放電電流,以避免元件損毁。 、習知之靜電放電保護電路多為利用閘極接地N型金氧 半(gate grounded n-channel metal-oxide-semiconductor, GGNMOS)電晶體所實施之。圖i繪示為以閑極接地n型 金氧,包晶體所實施的靜電放電保護裝置。請參照圖1,N =,氧半電晶體1 〇3為使用厚氧化層沖滅〇xide)之金氧半 電晶體,且N型金氧半電晶體1〇3的觸通電壓她阶〇11 voltage^介於6〜10伏特(v),例如:v㈣v。 、倘若核。龟路1〇2之工作電壓(pr〇gram v〇itage) V〆】、 於㈣金氧半電晶體103的觸通電壓Vt,例如·· Vp二7.5V, 則當靜電放電發生時,靜電放電之高電壓 自焊墊101進入 便有可此在N型金氧半電晶體1〇3未導通前使核心電路 1〇2運作。因此,靜電放電電流無法經N型金氧半電晶姐 5 200840016 096001 23508twfdoc/n 103而導引至接地電壓軌線,而 内部元件毀損。 桮心電路102使 由於焊墊1G1為外部電路、所有電源 與電子信號對核心電路1G2的連接此ς —電性接地 工作電壓Vp正常運作下,靜電放電防護電路:電路Ζ以 通過自己而導引至接地、外立 :包v、頊阻擋電流 電放電發生時,靜電玫二=:塾等’而且在靜 放電電流。而其中—種解地導引靜電 =,技術來降低金氧半電晶體=2觸 此金乳半電晶體的觸通電壓約為lv。 觸通- 圖2A緣不為利用表面 置。請參_A,當核心電防護裝 電壓Vp(例如:V7 5v) ,提供工作 仏 士巷 Λ、> I 201 ’ % ί1 且 206 及雷定 所構成之RC電路提供高準位信號 及二挪 208a及]Si型金氧丰+3 1乳半龟晶體200840016 υ^ουυι 23508twf.doc/n IX. Description of the Invention: [Technical Field] The present invention relates to an electrostatic discharge protection device, and more particularly to an electrostatic discharge that prevents leakage current from occurring in a non-electrostatic discharge mode. defensive equipment. ° [Prior Art] Electronic products may be damaged by electrostatic discharge (ESD) in actual use. Since the electrostatic discharge voltage is much larger than the power supply voltage generally provided, when the electrostatic discharge occurs, the electrostatic discharge current is likely to burn the components. Therefore, some electrostatic discharge protection measures must be taken in the circuit to effectively isolate the electrostatic discharge current to avoid component damage. The conventional electrostatic discharge protection circuit is mostly implemented by a gate grounded n-channel metal-oxide-semiconductor (GGNMOS) transistor. Figure i is a diagram showing an electrostatic discharge protection device implemented by crystallizing a n-type gold oxide with a dummy electrode. Referring to Figure 1, N =, oxygen semi-transistor 1 〇 3 is a gold oxide semi-transistor using a thick oxide layer to smash xide), and the contact voltage of N-type MOS transistor 1 〇 3 is 〇 11 voltage^ is between 6 and 10 volts (v), for example: v (four) v. If nuclear. The working voltage of the turtle road 1〇2 (pr〇gram v〇itage) V〆], the contact voltage Vt of the (4) MOS transistor 103, for example, Vp 7.5V, when the electrostatic discharge occurs, the static electricity The high voltage of the discharge enters from the pad 101, so that the core circuit 1〇2 can be operated before the N-type MOS transistor 1〇3 is not turned on. Therefore, the electrostatic discharge current cannot be guided to the ground voltage trajectory via the N-type MOS transistor, and the internal components are damaged. The core circuit 102 causes the connection of the core circuit 1G2 due to the pad 1G1 as an external circuit, and all the power and electronic signals are connected to the core circuit 1G2. The electrostatic discharge protection circuit: the circuit is guided by itself. To grounding, external: package v, 顼 blocking current electric discharge occurs, static electricity = = 塾 etc. and in the static discharge current. And one of them - the ground to guide the static electricity =, the technology to reduce the gold oxide semi-electric crystal = 2 touch The contact voltage of the gold-milk semi-transistor is about lv. Touch - Figure 2A is not a surface. Please refer to _A, when the core protection power supply voltage Vp (for example: V7 5v), provide work gentleman lane, > I 201 ' % ί1 and 206 and Leiding RC circuit provides high level signal and two 208a and]Si type gold oxide +3 1 milk half turtle crystal

於反相8 2G8nmb所構狀反相_。由 型金氧半電晶體加獅導通,因此N 便核心電路能正常運作。 二靜電放電之高電壓自焊塾 至N型金氧半泰曰興电晶體2〇8a將南準位信號麵合 挪導通,進而之間極,使N型金氧半電晶體 铁而植字靜包放電電流導引至接地VSS 〇 α ,供穩定的工作電壓Vp以使核心電路202正 200840016 1 23508twf.d〇c/n 常運作須經過一段時間。在工作電壓Vp提升的這段時間, 例如··工作電壓Vp由〇V提升至3 3V,报有可能會造成反 相器208内部的P型金氧半電晶體208a導通,進而使]^ 型金氧半電晶體2〇3導通,造成部分電流通過N型金氧半 電晶體203而導引至接地vss。因此靜電放電防護電路之 設計亦須能防止漏電流之發生,以避免影響核心電路之 作0Inverted by the inverse 8 2G8nmb configuration _. The type of gold oxide semi-transistor is connected with the lion, so the core circuit of N can operate normally. The high-voltage self-welding of the electrostatic discharge to the N-type gold-oxygen semi-Thai Xingxing crystal 2〇8a will turn the south-level signal surface into contact, and then the pole, so that the N-type gold-oxygen semi-transistor iron and the planting static The packet discharge current is directed to the ground VSS 〇α for a stable operating voltage Vp to allow the core circuit 202 to operate for a period of time in which 200840016 1 23508 twf.d〇c/n is normally operated. During the period when the operating voltage Vp is increased, for example, the operating voltage Vp is increased from 〇V to 3 3V, which may cause the P-type MOS transistor 208a inside the inverter 208 to be turned on, thereby making the type ^2 The gold-oxide semi-transistor 2〇3 is turned on, causing a part of the current to be conducted to the ground vss through the N-type MOS transistor 203. Therefore, the design of the ESD protection circuit must also prevent the occurrence of leakage current to avoid affecting the core circuit.

值得一提的是,N型金氧半電晶體2〇3之汲極耦接一 電性連接電源電壓之焊墊謝,在此焊塾2〇1不允許電性 ,接至擺動電壓(swing voltage),以確保核心電路2的=正 常操作下’N型金氧半電晶體2〇3為不導通,也^ 201亦不能為浮接狀態、輸入焊墊或者輸出焊塾。 圖2B_示為W2A之靜電放電防護裝置的另 2式。請麥照圖2B,焊塾201電性連接穩定之電源(歹 如:3.3V),而焊墊209為輸入烊塾或輸 冬(= 電之高電壓自焊塾册進入時,焊墊2〇1可 =j 過p型電晶體2〇8a將高準位信號輕合至N型全 、 f=使其導通,叫5丨靜電放電電流。 作祕(例如:7.5V)至详塾,使核心電路 ^i、工 時,則會使反相器罵内部的p型半曰广吊操作 發生。 j k成漏電流之 【發明内容】 本發明提供-種靜電放電防護裝置,用以在非靜電放 7 200840016 x 23508twf.doc/n 電模式下,栓制具有靜電放電防護功能之金氧半晶體之閘 極龟壓,使此金氧半電晶體不導通,以防止漏電流之發生。 本發明提出一種靜電放電防護裝置。此靜電放電防護 衣置包括第一金氧半電晶體、偵測模組、以及检制電壓模 組。第一金氧半電晶體之第一源/汲極及第二源/汲極分別 ^接第一導電路徑及第二導電路徑,藉以在靜電放電防護 模式下傳導靜電流於第一導電路徑與第二導電路徑之間。 谓測模組輕接於第一導電路徑與第二導電路徑之間,藉以 在靜電放電防護模式下提供偏壓至第一金氧半電晶體之閘 ,,使第一金氧半電晶體導通。栓制電壓模組用以在非靜 =放電防護模式下栓制第一金氧半電晶體之閘極電壓,使 第一金氧半電晶體不導通。 >上述之靜電放電防護裝置,在一實施例中偵測模組 ^括第二電阻、第一電容、以及反相器。第一電阻之第〆 端,接第-導電路徑。第—電容之第—端及第二端分別麵 ^第-電阻之第二端及第二導電路徑。反相器之輸入端及 兩出端分別電阻之第二端及第—金氧半電晶體之 閘極。 上述之靜電放電防護裝置,在一實施例中偵測模組包 第電谷、第一電阻、以及反相器。第一電容之第一端 ?接第二導電路徑。第1阻之第-端及第二端分職接 =私奋n及第二導電路徑。反相器之輸入端及輪 端刀別_接第-電容之第二端及第—金氧半電晶體之閑 8 200840016 uyuuui 23508twf.doc/n 組二===:實施例中栓制電壓模 電放電防護裝置’在—實施例 組包 一電阻。第一電容之第-端及第二端 電阻之第“體之閘極。第一 導電路徑。 冽耦接弟一電容之第二端及第二 括第-防魏置,在—實關巾制模組包 電容。第—電阻之第-端及第二端 電及第—金氧半電晶體之閘極。第-二導發“弟一端分別輕接該第—電阻之第二端及第 上述之靜電放電防護褒置 -包括第二金氧半電晶體二==顺; 極分別缺第—金氧 今甩路徑及第三導電路徑。 誕包iil電ί電防護裝置,在-實施例中栓制電壓模 、一匕括弟一 i軋半電晶體。第二金曰、 一源/汲極及閘極分別^*ΒΘ 導電路徑及第三導金料電晶體之閘極、第二 电包it,放電防魏置,在—實施例中栓制電壓模 電晶體、以及第三金氧半電晶體。第二 晶ut η Μ \弟、弟一源/及極分別耦接第一金氧半電 曰曰體之閘極及弟-導電路徑。第三金氧半電晶體之第一、 9 200840016 uywui 23508twf.doc/n 第二源/汲極及閘極分別耦接第三導電路徑、第二金 晶體之閘極及第一導電路徑。 上述之靜電放電防護裝置,在一實施例中栓制電壓模 組包括第二金氧半電晶體、以及第三金氧半電晶體。第二 金氧半電晶體之第-、第二源級極分職接第—金氧半電 ΐ體之閘極及第二導電路經。第三金氧半電晶體之第-、 弟二源級極及閘極分_接第三導電路徑、第二金氧半電 晶體之閘極及第二導電路徑。 之靜防護裝置’在—實施例中栓制電壓模 曰 ^午电阳體、以及弟二電阻。第二金氧半電 =體之弟一、第二源/汲極耦接第一金 第-導電路徑。第二電阻之m心/二&之閑極及 導雷跡w p 弟二端分_接第三 路仫及弟二金氧半電晶體之閘極。 上述之靜電放電防罐奘 組包括第二金氧半t ^衣=ί — “例中栓制電壓模 晶體之第-、第弟―電阻。第二金氧半電 第一導帝政斤 接第一金氧半電晶體之閘極及 罘一路杈。第二電阻 、「甲m及 導電路徑及第二金氧半電晶體之雜接第三 本發明因採用栓制電壓模組 】,心;=放金氧半電 及1引•放電電流_免元件之_ 電模式下 為讓本發明之上述和其他目的、特徵和優點能更明顯 10 23508twf.doc/n 200840016 易懂,下文特舉本發明之較佳告 、, 作詳細說明如下。 男& ^,並配合所附圖式, 【實施方式】 一般而言,靜電放電防護裝置有 電放電防護模式(即正常操作模式)及靜^作模式:非靜 =電路正常操作時,靜電放電防護;:::護模式。 通過自己’ ®此鱗靜電放電防魏=敵擋電流 於不存在。而當靜電放電發生時,靜電核心電路等同 發揮保護核心電路之功能, 电防護裝置必須 壓軌線、接地電餘線或者其他^墊P〜4導5丨至系統電 如習知圖2之說明’在核心電路的 定,壓_程中,具有靜電放電防護功能升至穩 ^會導通,造成部分電流通過本身而=乳半電晶體 線、接地電壓軌線或者其他焊塾 ^統電壓軌 氧半電晶體二之金 發1靜電放電防護裝置為目前防止漏電流 置。^失日1曰=為本^明之—實施例的靜電放電防護裝 3〇知、偵測槿έΗ寫Λ电防護裝置包括金氧半電晶體 要用以拾制電塵模組305。在此假設主 八e *靜電放電電流之靜電放電防護單元304包含Ν 雍^二電晶體3〇4&’然本實施例不侷限於此範圍,仍可 他Ϊ電放電防護單元之設計。如圖3B所示,靜 包屯防遵單元3〇4為由N型金氧半電晶體3〇4b與N型 11 23508twf.doc/n 200840016 金氧半電晶體304c所構成之。It is worth mentioning that the anode of the N-type MOS transistor 2〇3 is coupled to a solder pad electrically connected to the power supply voltage. Here, the solder bump 2〇1 is not allowed to be electrically connected to the swing voltage (swing Voltage), to ensure that the core circuit 2 = normal operation, 'N-type MOS transistor 2 〇 3 is non-conducting, and ^ 201 can not be floating state, input pad or output soldering. Fig. 2B shows another type of electrostatic discharge protection device of W2A. Please note 2B, the soldering iron 201 is electrically connected to a stable power supply (such as: 3.3V), and the soldering pad 209 is input or 输 winter (= electric high voltage self-welding), the solder pad 2 〇1 can be =j over p-type transistor 2〇8a to lightly match the high-level signal to the N-type full, f=to make it conductive, called 5丨 electrostatic discharge current. Secret (for example: 7.5V) to the details, The core circuit ^i, man-hour, will cause the p-type half-turn wide-lift operation inside the inverter 。. Jk becomes leakage current [Summary] The present invention provides an electrostatic discharge protection device for non- Electrostatic discharge 7 200840016 x 23508twf.doc/n In the electric mode, the gate turtle pressure of the gold-oxygen semi-crystal with electrostatic discharge protection function is plugged, so that the MOS transistor is not turned on to prevent leakage current. The invention provides an electrostatic discharge protection device, which comprises a first metal oxide semi-transistor, a detection module, and a detection voltage module. The first source/drain of the first gold-oxygen semiconductor The second source/drain is respectively connected to the first conductive path and the second conductive path, so as to transmit in the electrostatic discharge protection mode Conducting static electricity flows between the first conductive path and the second conductive path. The reference module is lightly connected between the first conductive path and the second conductive path, thereby providing a bias voltage to the first gold oxide in the electrostatic discharge protection mode The gate of the semi-transistor turns on the first gold-oxygen semi-transistor. The plug-in voltage module is used to embed the gate voltage of the first gold-oxide semi-transistor in the non-static/discharge protection mode to make the first gold The oxygen semiconductor transistor is not conductive. In the above embodiment, the detection module includes a second resistor, a first capacitor, and an inverter. The first end of the first resistor is connected to the first - a conductive path. The first end of the first capacitor and the second end are respectively opposite to the second end of the first resistor and the second conductive path. The input end of the inverter and the second end of the resistor are respectively connected to the second end of the resistor and the first The gate of the gold-oxide semi-transistor. The above-mentioned electrostatic discharge protection device, in one embodiment, detects the first valley of the module, the first resistor, and the inverter. The first end of the first capacitor is connected to the second Conductive path. The first end of the first resistance and the second end of the sub-job = private end n and the second conductive circuit The input end of the inverter and the end of the wheel are not connected to the second end of the first capacitor and the first phase of the golden oxygen semi-transistor. 200840016 uyuuui 23508twf.doc/n Group 2 ===: The voltage mode electric discharge protection device 'in the embodiment group includes a resistor. The first and second ends of the first capacitor are the first body of the gate. The first conductive path. The second coupling is coupled to the second capacitor. The end and the second bracket - the anti-Wei, the capacitor in the package of the solid-cut towel. The first and second ends of the first and second ends of the resistor and the gate of the gold-oxygen semiconductor transistor. Sending the "the second end of the first lighter to the second end of the resistor" and the above-mentioned electrostatic discharge protection device - including the second gold oxide semi-transistor two == shun; the poles respectively lack the first - the golden oxygen path and the first Three conductive paths. The iil electric protective device is used to embed a voltage mode in an embodiment, and a semi-transistor. The second metal, the source/drain and the gate respectively ^*ΒΘ the conductive path and the gate of the third gold-conducting transistor, the second package it, the discharge prevention, and the voltage in the embodiment A mode transistor, and a third MOS transistor. The second crystal ut η Μ \ brother, brother one source / and the pole are respectively coupled to the first gold oxide semi-electric body of the gate and the younger - conductive path. The first of the third MOS transistors, 9 200840016 uywui 23508 twf.doc / n second source / drain and gate are respectively coupled to the third conductive path, the gate of the second gold crystal and the first conductive path. In the above electrostatic discharge protection device, in one embodiment the plug voltage module comprises a second MOS transistor and a third MOS transistor. The first and second source stages of the second gold-oxide semi-transistor are connected to the gate of the gold-oxygen semiconductor body and the second conductive circuit. The first, the second source, and the gate of the third MOS transistor are connected to the third conductive path, the gate of the second MOS transistor, and the second conductive path. In the embodiment, the static protection device is used to embed a voltage mode, a noon electric body, and a second electric resistance. The second gold-oxygen semi-electricity = the body of the body, the second source/drain is coupled to the first gold first-conducting path. The m-heart of the second resistor / the idle pole of the second & and the guide track w p The second end of the second _ is connected to the gate of the third 仫 and the second MOS transistor. The above-mentioned electrostatic discharge anti-cansing group includes a second gold-oxygen half-t^ clothing = ί - "in the example of the voltage-mode crystal of the first - the second brother - resistance. The second gold-oxygen semi-electric first guide emperor a gate of a MOS transistor and a 杈 杈 杈 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二= discharge of gold and oxygen and 1 lead • discharge current _ free component _ in the electrical mode to make the above and other purposes, features and advantages of the present invention more obvious 10 23508twf.doc / n 200840016 easy to understand, the following special The invention is described in detail below. Male & ^, and with the accompanying drawings, [Embodiment] In general, the ESD protection device has an electric discharge protection mode (ie, a normal operation mode) and a static ^ Mode: Non-static = ESD protection during normal operation of the circuit;::: Protection mode. By yourself's this scale electrostatic discharge anti-Wei = enemy current does not exist. When electrostatic discharge occurs, the electrostatic core circuit is equivalent Play the role of protecting the core circuit, electric protection device Pressure rail line, grounding power line or other ^P P~4 lead 5丨 to the system power as shown in the description of Figure 2 'In the core circuit's fixed, pressure _ range, with electrostatic discharge protection function rises to stability ^ Will be turned on, causing part of the current to pass through itself = milk semi-transistor line, ground voltage trajectory or other soldering system voltage rail oxygen semi-transistor two of the blonde 1 electrostatic discharge protection device to prevent leakage current current. 1 曰 = ^ 之 实施 实施 实施 实施 实施 实施 实施 实施 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电 静电The electrostatic discharge protection unit 304 of the e* electrostatic discharge current comprises a transistor 3〇4&', but the embodiment is not limited to this range, and the design of the electric discharge protection unit can be further illustrated. As shown in FIG. 3B, The static inclusion prevention unit 3〇4 is composed of an N-type oxy-oxygen semiconductor 3〇4b and an N-type 11 23508 twf.doc/n 200840016 MOS semi-transistor 304c.

於本實施例中,靜電放電防護單元3〇4内部的N型金 氧半電晶體304a是具有厚氧化層之金氧半電晶體。電晶體 304a之第一、第二源/汲極分別耦接第一導電路徑3〇1及第 一¥包路徑302’用以在靜電放電防護模式下傳導靜電流 於第一導電路徑301與第二導電路徑3〇2之間。偵測模組 306耦接第一導電路徑3〇1與第二導電路徑3〇2之間,而 偵測杈組306包括電阻3〇6a、電容3〇补,以及?型金氧半 電晶體306c及N型金氧半電晶體3〇6d所構成之反相器 住利电麼模組3〇5包括N型金氧半電晶體3〇化,其中 電晶體·之第-、第二源/汲極分別耦接N 车=+¾晶體3〇4&之閘極及第二導電路徑,且N型全 乳+ =晶體3G5a之閘極轉接第三導電路徑303。 ’ 輸出&進^之^自悍塾啊例如:輸人焊塾或者 體3〇6c將高準位^^反人相器3〇9⑽的P型金氧半電晶 極,使N型金氧半電乳半電晶體30<之閘 護模式下,N型合^日日體 * 111此在靜電放電防 導引至第電晶體3°4a能及時將靜電放電電法 在本實施例中,第二導带 軌線(例如,统=7如可以為—第1壓 型金氧半+ 提供第-電壓3 財-晶體3〇5a之閘極。在正f操作模式下== 12 200840016 〜J3508twf.doc/n 會使N型金氧半電晶體3G5a導通。因此 二、电防魏置正常操作時(即非靜電放 了 過導通之N型金氧半電晶體施來拉低 體3〇如之閉極電壓,使_金氧半電晶體3〇4^ =曰曰 错以防止漏電流之發生。 个净逋, 遠接使在非靜電放電防護模式下將焊墊307電性 連接擺動祕(swing她age),造成侧模 ^ ,準位信號^型金氧半電晶體綱a,但仍 = 制N型金氧半電晶體綱&之閘極電壓,= 1氧^ %日日體3G4a不導通,明免漏電流之發生。 士值:于-提的是,當靜電放電之高電壓自料册 =第三導電路徑3〇3可視為浮接,因此能在不受 f ί電晶體3〇5a之影響下’透過反相器309内部的P型金In the present embodiment, the N-type oxy-oxygen semiconductor 304a inside the electrostatic discharge protection unit 3〇4 is a gold-oxygen semi-transistor having a thick oxide layer. The first and second source/drain electrodes of the transistor 304a are respectively coupled to the first conductive path 3〇1 and the first package path 302′ for conducting static electricity to the first conductive path 301 and the first in the electrostatic discharge protection mode. The two conductive paths are between 3〇2. The detecting module 306 is coupled between the first conductive path 〇1 and the second conductive path 〇2, and the detecting 杈 group 306 includes the resistor 3〇6a, the capacitor 3 〇, and ? The MOS transistor 306c and the N-type MOS transistor 3〇6d are composed of an inverter, and the module 3〇5 includes an N-type MOS transistor, in which the transistor is The first and second source/drain electrodes are respectively coupled to the gate of the N-car=+3⁄4 crystal 3〇4& and the second conductive path, and the gate of the N-type full milk+=gate 3G5a is switched to the third conductive path 303 . ' Output & into ^ ^ ^ 悍塾 ah, for example: input welding or body 3 〇 6c will be high-level ^ ^ anti-human phase 3 〇 9 (10) P-type gold oxide semi-electrode, so that N-type gold In the mode of the oxygen semi-emulsion semi-transistor 30<, the N-type combination of the Japanese body* 111, which can prevent the electrostatic discharge from being discharged to the third transistor 3°4a in time, can be electrostatic discharge electric current in this embodiment. The second guide rail line (for example, the system = 7 can be - the first type of gold oxide half + provide the first - voltage 3 - crystal 3 〇 5a gate. In the positive f mode of operation == 12 200840016 ~J3508twf.doc/n will make the N-type MOS transistor 3G5a turn on. Therefore, when the electric anti-Wei set is in normal operation (that is, the non-electrostatic discharge is turned on, the N-type MOS transistor is applied to pull down the body 3 For example, the closed-circuit voltage makes the _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Swinging her (swing her age), causing the side mode ^, the level signal ^ type MOS semi-electrode crystal a, but still = the N-type MOS semi-crystal crystal & gate voltage, = 1 oxygen ^ % Japanese body 3G4a does not conduct It is clear that the leakage current occurs. Value: In the case of the high voltage of the electrostatic discharge, the third conductive path 3〇3 can be regarded as a floating connection, so it can be used without the f ί transistor 3〇5a Under the influence of 'P type gold through the inside of the inverter 309

氧“ %晶體306c將高準位信號耦合至N 304a之閘極使其導通。 &金料心曰體 料’反相器309内部的p型金氧半電晶體施㈣ 電晶體3_-般為厚氧化層之金氧半電晶體,而 拾制電壓模組305内部的Ν型金氧半電晶體3〇5a可依梦 =術或使用者需求設計為薄氧化層之金氧半電晶體或者 尽氧化層之金氧半電晶體。 本實施例可以利用αΐδ/ζπ^υν^ν)製實 若第三導電路徑303電性連接之第—電“ ^性連接之電壓’則N型金氧半電晶體觸之寬長比(W/L) 可以為/0.44/zm’P型金氧半電晶體施之寬長比 13 200840016 v//w v 玉 23508twfd〇c/n ()了乂為姐/0.44#m,N型全氧丰令 長比(W/L)可以Λι β 1孟虱+電晶體305a之貧 乂馬bm/0.44#m〇N切冬气卜 見 面積較P型金氧半電曰#二支i乳半電晶體3〇5a 小的多,使N型全型金氣半電晶體, 至於干擾㈣^^電日日日體孤在靜電放電過程中不 此外,:ί電晶體之閉極電堡。 右弟二¥電路徑303電性連接夕穿 墊307電性連接之♦ 連接之弟一電壓與埤 &不相同,在本實施例中,第一Oxygen "% crystal 306c couples the high-level signal to the gate of N 304a to turn it on. & gold core 曰 body material' p-type MOS transistor inside inverter 309 (4) transistor 3_- It is a gold oxide semi-transistor with a thick oxide layer, and the Ν-type MOS transistor 3〇5a inside the pick-up voltage module 305 can be designed as a thin oxide layer of gold oxide semi-transistor according to the dream or the user's requirements. Or a gold oxide semi-electrode of an oxide layer. In this embodiment, α ΐ δ / ζ π ^ υ ν ^ ν) can be used to make the third conductive path 303 electrically connected to the first - "the voltage of the ^ ^ connection" N gold Oxygen semi-transistor touch width to length ratio (W / L) can be /0.44 / zm 'P type MOS semi-transistor applied width to length ratio 13 200840016 v / / wv jade 23508twfd 〇 c / n () Sister / 0.44 #m, N type full oxygen rich ratio (W / L) can Λι β 1 Meng Hao + transistor 305a poor horse bm / 0.44 # m〇N cut winter air see area than P type gold Oxygen semi-electric 曰# two i-milk semi-transistors 3〇5a small, so that N-type full-type gold gas semi-transistor, as for interference (four) ^ ^ electricity day and day in the electrostatic discharge process is not in addition,: ί Electric crystal of the closed electric castle. Right brother two electric circuit 303 electrical connection 夕 wear pad 307 electrical connection ♦ connection brother a voltage is different from 埤 & in this embodiment, the first

生連接之電壓即可栓二:氧口 曰曰體304a之閘極電屋,以防止漏電流之發生。乳、 圖3C緣示為本發明另一實施例之靜電放雷防,壯 置。請參照圖3A鱼圄γθ静电放电防遵巢 了黑-队^广 圖與圖从不同之處在於多 二C 311拴制Ν型金氧半電晶體304a之 =拾制電壓模组311包括p型金氧半電晶體 八P型金氧半電晶體311a之第一、第二源/汲極 勿別,接系統電壓轨線VDD及反相$ 3〇9之輸入端,而p i孟氧半龟日日體311a之閘極♦禺接第四導電路徑31〇。 在本貝施例中第四導電路徑31〇可以為一第二電壓軌 線,用以提供第二電壓至P型金氧半電晶體311&之閘極, 使P型金氧半電晶體3ila導通。因此在非靜電放電防護模 式下,透過導通之P型金氧半電晶體3lla提供高準位信號 至反相器309的輸入端,進而拴制n型金氧半電晶體3〇4a 之閘極電壓。在本發明另一實施例中,可以僅使用一組拾 制電壓模組3Π來拾制N型金氧半電晶體304a之閘極電 壓。 14 200840016 uyouui 23508twf.doc/n 如上述實施例圖3A之說明,圖4緣 — 例圖3A中债測模組3〇6的另—種實施^路。為主柄明貫施 獅包括電請與電阻4 4之 Γ,二端分別綱一導電路徑3〇1及;;: 弟一^,電阻402之第二端_第二㈣_ =The voltage of the connection can be plugged into two: the oxygen port The gate of the body 304a is used to prevent leakage current. The milk, Fig. 3C, shows the electrostatic discharge prevention and reinforcement of another embodiment of the present invention. Please refer to FIG. 3A, the fish 圄 θ θ 静电 静电 了 了 了 黑 黑 黑 黑 黑 黑 黑 黑 黑 黑 黑 黑 黑 黑 广 广 广 广 广 广 广 广 广 广 = = = = = = = = = = 拾 拾 拾 拾 拾The first and second source/drain electrodes of the type MOS semi-transistor eight P-type MOS transistor 311a are not connected to the input terminal of the system voltage rail VDD and the inverted $3〇9, and the pi monoxide half The gate of the turtle day body 311a is connected to the fourth conductive path 31〇. In the present embodiment, the fourth conductive path 31 〇 may be a second voltage trajectory for providing a second voltage to the gate of the P-type MOS transistor 311 & P-type MOS transistor 3ila Turn on. Therefore, in the non-electrostatic discharge protection mode, the P-type MOS transistor 3111a is turned on to provide a high-level signal to the input terminal of the inverter 309, thereby clamping the gate of the n-type MOS transistor 3〇4a. Voltage. In another embodiment of the invention, the gate voltage of the N-type MOS transistor 304a can be picked up using only one set of pick-up voltage modules 3A. 14 200840016 uyouui 23508twf.doc/n As illustrated in the above embodiment of FIG. 3A, FIG. 4 is an alternative embodiment of the debt testing module 3〇6 of FIG. 3A. For the main handle Mingshi Shishi, including the electric and the resistance 4 4, the two ends respectively, a conductive path 3〇1 and;;: brother one ^, the second end of the resistor 402 _ second (four) _ =

模組篇内的節點Α _至靜電放電防護^綱 如上述實施例圖3A之說明,圖5A繪 施例圖3A中㈣電壓模組3〇5的另—種實施電路。'主二 =A型,,模組3〇5包括N型金氧半電晶體:、 之第-、第電晶體5〇2 ’其中N型金氧半電晶體501 一導電路^及極分職接靜電放電防護單元綱及第 一寺私路徑302。P型金氧半電晶體5〇2之 没極及閘極分別_第三導電路徑撕、= 體5〇1之閘極及第二導電路徑3〇2。 I乳+ ^曰 侧實施例圖3A《說明,圖5B緣示為本發明實施 _ " 拾制電壓模組305的另一種實施電路。請參照 圖帝’拾制電壓模組305包括N型金氧半電晶體5〇3: 金氧半電晶體5〇3之第-、第二源/汲極 :耦接靜,電防護單元304及第二導電路徑3〇2,且 电戶4之第—端與第二端分別叙接第三導電路徑go]及 N型金氧半電晶體5〇3之閘極。 、值彳于—提的是,上述實施例中靜電放電防護單元3〇4 ,以N型金氧半電晶體所實施之。本發明棚領域具有通 系知識者應當知道,亦可使用p金氧半電晶體實施之,接 15 200840016 υ^ουυι 23508twf.d〇c/n 下來將舉出另一種實施例以便本領域具有通常知識者能輕 易施行本發明。 圖6A繪示為本發明另一實施例之靜電放電防護裝 置。請參照圖6A,此靜電放電防護裝置包括P型金氧半電 晶體604a、偵測模組606、以及拴制電壓模組6〇5。p型: 氧半電晶體604a之第一、第二源/汲極分別耦接第一導電 路位601及弟一^導電路徑602,用以在靜電放電防護模式 下傳導靜電流於第一導電路徑601與第二導電路徑& 間。偵測模組606耦接第一導電路徑601與第二導電路护 602之間’且偵測模組6〇6包括電容606a、電阻606b,以 及反相器606c。。 拴,電壓模組605包括P型金氧半電晶體,其中 P型金氧半電晶體6〇5a之第—、第二源/沒極分別耗接p 型金氧半電晶體604a之閘極及第一導電路徑,且p型金氧 半電晶體605a之閘極耦接第三導電路徑6〇3。 當靜電放電之高電壓自焊墊6G7(例如:輸人焊塾或者 輸出焊墊)進入時,偵測模組6〇6提供偏壓至p型金氧半電 晶體6〇4a之閘極,使p型金氧半電晶體6〇4a導通,及日^ 地導引靜電放電電流至第-導電路徑謝(例如:系統電壓 執線VDDWX社靜躲電電流通馳^電路_。 在本實施例中,第三導電路徑6〇3可以為一第一電壓 軌線,用以提供第一€壓至P型金氧半電晶體咖之問 極’―使p型金氧半電晶體605a導通。因此在非靜電放電防 羞权式下,透過導通之P型金氧半電晶體來拉高p 16 200840016 23508twf.doc/n 型金氧半電晶體604a之閘極電壓,藉以避免漏電流之發 生。 圖6B繪示為本發明之一實施例的靜電放電防護裝 置。請參照圖6A與圖6B,圖6B與圖6A不同之處在於多 了另一拾制電壓模組611拴制P型金氧半電晶體604a之閘 極電壓。拾制電壓模組611包括N型金氧半電晶體611a, 其中N型金氧半電晶體611a之第一、第二源/汲極及閘極 分別耦接接地電壓轨線VSS、反相器606c之輸入端及第四 導電路徑610。 在本實施例中,第四導電路徑610可以為一第二電壓 轨線’用以提供第二電壓至N型金氧半電晶體611a之閘 極,使N型金氧半電晶體6iia導通。因此在非靜電放電 防護模式下’透過導通之N型金氧半電晶體611a來提供 低準位信號至反相器6〇6c之輸入端,進而拉高p型金氧半 電晶體604a之閘極電壓,使P型金氧半電晶體6〇扣不導 通,以防止漏電流之發生。在本發明另一實施例中,可以 僅使用一組拾制電壓模組611來栓制p型金氧半電晶體 604a之閘極電壓。 如上述實施例圖6A之說明,圖7繪示為本發明實施 例圖6A中偵測電壓模組6〇6的另一種實施電路。請參照 圖7,偵測模組606包括電阻7〇1與電容7〇2,其中電阻 7〇1之第-端及第二端分_接第—導電路徑_及電容 〇2之第為,电合7〇2之第二端麵接第二導電路徑礙。 偵測模組606⑽節點B _至靜電放電防護單元6〇4。 17 200840016 096001 23508tw£doc/n 如上述貝施例圖6A之說明,圖8A繪示為本發明每 施例圖6A中技制電愿模組6〇5的另—種實施電路。言主二 照圖8A,技制電_組6()5包括p型金氧半電晶體^、 型金氧半電晶體802 ’其中P型金氧半電晶體801 弟一、弟一源/汲極分別耦接靜電放電防護單元604及裳 -導電路徑602。N型金氧半電晶體8〇2之第_ 没極及閘極分職接第三導電路徑6G3、p型丰了曰 體801之閘極及第一導電路徑6〇2。 弘日日 上述實施例圖6A之說明,圖8B緣示為本發 圖6A中检制電壓模組6〇5的另一種實施電路。往炎日^ =t制電壓模組6G5包括p型金氧半電晶體二二 私阻804。P型金氧半電晶體8〇3之第—、 別搞接靜餘電防料元6G4衫—導魏彳 阻804之第-端與第二端分別麵接第三導電 的且电The node Α _ to the ESD protection in the module section is as illustrated in Fig. 3A of the above embodiment, and Fig. 5A illustrates another implementation circuit of the voltage module 3 〇 5 of (4) in Fig. 3A. 'Main two = A type, the module 3 〇 5 includes N-type MOS semi-transistor:, the first -, the second transistor 5 〇 2 'where N-type MOS semi-transistor 501 a lead circuit ^ and the pole The occupational electrostatic discharge protection unit and the first temple private path 302. The P-type MOS transistor 5 〇 2 has a pole and a gate _ a third conductive path tear, a body 5 〇 1 gate and a second conductive path 3 〇 2 . I milk + ^ 曰 side embodiment FIG. 3A "Description, FIG. 5B shows another implementation circuit of the _ " pickup voltage module 305 of the present invention. Please refer to Tudi's pick-up voltage module 305 including N-type MOS semi-transistor 5〇3: the first and second source/drain of the MOS semi-transistor 5〇3: coupled static, the electric protection unit 304 And the second conductive path 3〇2, and the first end and the second end of the electric household 4 respectively connect the third conductive path go] and the gate of the N-type MOS transistor 5〇3. The value is that the electrostatic discharge protection unit 3〇4 in the above embodiment is implemented by an N-type gold oxide semi-electrode. It should be known to those skilled in the art of sheds of the present invention that they can also be implemented using p-gold oxide semi-transistors, and another embodiment will be given in the field of 15 200840016 υ^ουυι 23508twf.d〇c/n. The knowledgeable person can easily implement the present invention. Figure 6A is a diagram showing an electrostatic discharge protection device according to another embodiment of the present invention. Referring to FIG. 6A, the ESD protection device includes a P-type MOS transistor 604a, a detection module 606, and a clamping voltage module 〇5. The p-type: the first and second source/drain electrodes of the oxygen semiconductor 604a are respectively coupled to the first conductive circuit bit 601 and the first conductive path 602 for conducting electrostatic current to the first conductive in the electrostatic discharge protection mode. The path 601 is between the second conductive path & The detecting module 606 is coupled between the first conductive path 601 and the second conductive circuit guard 602, and the detecting module 6〇6 includes a capacitor 606a, a resistor 606b, and an inverter 606c. . The voltage module 605 includes a P-type MOS transistor, wherein the first and second sources of the P-type MOS transistor 6 〇 5a respectively consume the gate of the p-type MOS transistor 604a. And a first conductive path, and the gate of the p-type MOS transistor 605a is coupled to the third conductive path 6〇3. When the high voltage of the electrostatic discharge enters from the bonding pad 6G7 (for example, the input pad or the output pad), the detecting module 6〇6 provides a bias voltage to the gate of the p-type MOS transistor 6〇4a. The p-type MOS transistor 6〇4a is turned on, and the ESD current is guided to the first-conducting path (for example, the system voltage line VDDWX is quietly escaping current ^^ circuit _. In this embodiment The third conductive path 〇3 may be a first voltage trajectory for providing a first voltage to the P-type MOS transistor 503a. Therefore, under the non-electrostatic discharge anti-shock mode, the gate voltage of the p-type MOS transistor is boosted by the P-type MOS transistor, so as to avoid the occurrence of leakage current. 6B illustrates an electrostatic discharge protection device according to an embodiment of the present invention. Referring to FIG. 6A and FIG. 6B, FIG. 6B differs from FIG. 6A in that another pickup voltage module 611 is used to clamp the P-type gold. The gate voltage of the oxygen semiconductor 604a. The pickup voltage module 611 includes an N-type MOS transistor 611a, wherein the N-type gold oxide half The first and second source/drain electrodes and the gate of the transistor 611a are respectively coupled to the ground voltage rail VSS, the input end of the inverter 606c, and the fourth conductive path 610. In this embodiment, the fourth conductive path 610 It may be a second voltage rail 'to provide a second voltage to the gate of the N-type MOS transistor 611a, so that the N-type MOS transistor 6iia is turned on. Therefore, the pass-through is performed in the non-electrostatic discharge protection mode. The N-type MOS transistor 611a provides a low-level signal to the input terminal of the inverter 6〇6c, thereby pulling up the gate voltage of the p-type MOS transistor 604a to make the P-type MOS transistor. 6〇 does not conduct to prevent leakage current. In another embodiment of the invention, only one set of pick-up voltage modules 611 can be used to plug the gate voltage of the p-type MOS transistor 604a. FIG. 7 illustrates another implementation circuit of the detection voltage module 6〇6 of FIG. 6A according to an embodiment of the present invention. Referring to FIG. 7, the detection module 606 includes a resistor 7〇1 and The capacitor 7〇2, wherein the first end and the second end of the resistor 7〇1 are connected to the first conductive path _ and the capacitor 〇2 First, the second end face of the electrical junction 7〇2 is connected to the second conductive path. The detection module 606(10) node B_ to the electrostatic discharge protection unit 6〇4. 17 200840016 096001 23508tw£doc/n FIG. 6A is an illustration of another implementation circuit of the technical power module 6〇5 of FIG. 6A for each embodiment of the present invention. The main body is shown in FIG. 8A, and the technical group 6 () 5 The invention comprises a p-type MOS transistor, a MOS transistor 802 ′, wherein the P-type MOS transistor 801, the first source, the drain source are respectively coupled to the electrostatic discharge protection unit 604 and the skirt-conductive path 602 . The _th pole and the gate of the N-type MOS transistor 8 〇 2 are connected to the third conductive path 6G3, and the p-type is the gate of the body 801 and the first conductive path 6〇2. Hong Ri Ri The above embodiment is illustrated in Fig. 6A, and Fig. 8B shows another implementation circuit of the detected voltage module 6〇5 in Fig. 6A. To the day of the fire ^ = t voltage module 6G5 includes p-type gold oxide semi-transistor two or two private resistance 804. P-type MOS semi-transistor 8〇3 of the first -, do not engage in static electricity and anti-material element 6G4 shirt - guide Wei 彳 804 the first end and the second end respectively face the third conductive and electricity

型金氧半電晶體803之閘極。 、 卫03及P 综上所述,本發明實施例之靜電放 栓制電壓模組來栓制具有靜電放電防 為利用 =閘峨,使具有靜電放電防護功能:全電晶 不¥通’以避免漏電流之發生。另外 :財电晶體 下’亦能具有靜電放電防護功能之金氧:2防護模式 靜電放電電流。 乳+電晶體及時導引 雖然本發明已以較佳實施例揭露如上,妙 限定本發明,任何所屬技術領 <、並非用以 脫離本發明之精神和範_,#可;知識者,在不 二許之更動與濶飾, 18 200840016 uyouui 23508twf.doc/n 所界定者 因此本發明之保護範圍當視後附之申 為準。 T月寻利粍圍 【圖式簡單說明】 圖1繪示為以閘極接地Ν型金氧半電曰 放電保護裝置。 99趲所實施的靜電 圖2Α繪示為利用表面觸發技術之靜電玫♦上 圖2Β繪示為圖2Α之靜電放電防護裝认方又衣置。 方式。 的另一種耦接 置 圖3Α纟會不為本發明 之一實施例的靜電 丁兔放電防護襞 圖3Β繪示為本發明實施例圖3Α中靜電 ^ 一種眚綠堂政。 电防護單元 之-實施例之靜電玫電防護農 之另一種實施電路 圖3 C繪不為本發明 置。 的另一種 — 圖4繪示為本發明實施例圖3Α中偵測模組 實施電路。 一 電壓模組的 圖5Α繪示為本發明實施例圖3Α中拾制 另一種實施電路。 圖5 Β繪示為本發明實施例圖3 Α中拾制電壓 一種實施電路。 '' 】力 置。 圖6A繪示為本發明之一實施例之靜電放電防護裝 置。 圖6B繪示為本發明之一實施例之靜電放電防護穿 19 200840016 096001 23508twf.doc/n 圖7繪示為本發明實施例圖6A中偵測模組的另一種 實施電路。 圖8A繪示為本發明實施例圖6A中栓制電壓模組的 另一種實施電路。 圖8B繪示為本發明實施例圖6A中栓制電壓模組的另 一種實施電路。 【主要元件符號說明】 VDD :系統電壓軌線 VSS :接地電壓軌線 101、 201、209、307、607 ··焊墊 102、 202、308、608 :核心電路 103、 203、208b、304a、304b、304c、305a、306d、 501、503、611a、802 : N型金氧半電晶體The gate of the type MOS transistor 803. In summary, the electrostatic plugging voltage module of the embodiment of the present invention has an electrostatic discharge prevention function for use, and has an electrostatic discharge protection function: the full electric crystal is not used. Avoid leakage currents. In addition: under the financial crystal crystal can also have the electrostatic discharge protection of the gold oxygen: 2 protection mode electrostatic discharge current. The present invention has been disclosed in the preferred embodiments as described above, and the present invention is not limited to the spirit and scope of the present invention. The two changes and the decoration, 18 200840016 uyouui 23508twf.doc / n The scope of protection of the present invention is therefore subject to the appended claims. T month to find profit and sufficiency [Simplified description of the figure] Figure 1 shows the gate-grounded 金 type MOS electric discharge device. Figure 9Α shows the electrostatic discharge using the surface trigger technology. Figure 2Β shows the electrostatic discharge protection of Figure 2 and the clothing. the way. Another type of coupling FIG. 3 is not an electrostatic discharge of the rabbit according to an embodiment of the present invention. FIG. 3 is a diagram showing the static electricity in FIG. Electric Protection Unit - Another Embodiment of the Electrostatic Rose Protection Agriculture of the Embodiment FIG. 3C is not the present invention. Another type of Figure 4 is a circuit for implementing the detection module of Figure 3 in accordance with an embodiment of the present invention. Figure 5A of a voltage module illustrates another embodiment of the implementation of the embodiment of the present invention. FIG. 5 is a schematic diagram of an implementation circuit of the pickup voltage in FIG. 3 according to an embodiment of the present invention. '' 】 Force. Figure 6A illustrates an electrostatic discharge protection device in accordance with one embodiment of the present invention. FIG. 6B illustrates an electrostatic discharge protection according to an embodiment of the present invention. 19 200840016 096001 23508 twf.doc/n FIG. 7 illustrates another implementation circuit of the detection module of FIG. 6A according to an embodiment of the present invention. FIG. 8A illustrates another implementation circuit of the plug voltage module of FIG. 6A according to an embodiment of the present invention. FIG. 8B illustrates another implementation circuit of the plug voltage module of FIG. 6A according to an embodiment of the present invention. [Description of main component symbols] VDD: system voltage rail VSS: ground voltage rails 101, 201, 209, 307, 607 · pads 102, 202, 308, 608: core circuits 103, 203, 208b, 304a, 304b , 304c, 305a, 306d, 501, 503, 611a, 802: N-type gold oxide semi-transistor

208a、306c、311a、502、604a、605a、801、803 : P 型金氧半電晶體 206、 306a、402、504、606b、701、804 :電阻 207、 306b、401、606a、702 ··電容 301、 601 :第一導電路徑 302、 602 :第二導電路徑 303、 603 :第三導電路徑 304、 604 :靜電放電防護單元 305、 311、605、611 :栓制電壓模組 306、 606 :偵測模組 309、 606c :反相器 310、 610 :第四導電路徑 20208a, 306c, 311a, 502, 604a, 605a, 801, 803: P-type MOS transistors 206, 306a, 402, 504, 606b, 701, 804: resistors 207, 306b, 401, 606a, 702 · capacitor 301, 601: first conductive path 302, 602: second conductive path 303, 603: third conductive path 304, 604: electrostatic discharge protection unit 305, 311, 605, 611: plug voltage module 306, 606: Detect Modules 309, 606c: inverters 310, 610: fourth conductive path 20

Claims (1)

200840016 096001 23508tw£doc/n 十、申請專利範圍: 1.:種靜電放電防護裝置,包括: /一第孟氧半電晶體,其第一源/没極搞接—— 路控’其第二源你極減―第二導電路經,用:導電 =防護模式下傳導靜電流於該第—導 第巧放 路徑之間; ,、一導電 祕該第—導電雜與 在靜電放電防護模式下提供—偏壓至以 ;^之_ ’使該第—錄半電晶體導通,·以及孟 該第-金氧半電 =静禮私防龜式下拾制 不導通。之閘極電屢’使該第—金氧半電晶體 2.如申請專利翻第^ 其中該谓測模組包括: ^放包防縣置, 二端耦接該第-導電路徑; 第二端第-電阻之第二端,其 反相态,其輸入端耦接該 出端輕接該第—金氧半電晶體之閘極之弟一知其輸 更包=如申st專利範圍第2項所述之靜電放電防護裝置, —第二栓制電壓模組,复 , 壓,使該第—錢m式不下耸检制該反相器之輸入端電 乳卞私日日體不導通。 21 200840016 vyOyjyj i 23508twf.doc/n 4·如申請專利範圍第2項所述之靜電放電防護裝置, 其中該栓制電壓模組耦接至該反相器之輪入端。 5·如申請專利範圍第1項所述之靜電放電防護裝置, 其中該偵測模組包括: 弟一電谷,其第一端_接該第一導電路徑; 一第一電阻,其第一端耦接該第_電容之第二端,其 第二端麵接該第二導電路徑;以及200840016 096001 23508tw£doc/n X. Patent application scope: 1.: Electrostatic discharge protection device, including: / a first Meng oxygen semi-transistor, its first source / no pole connection - road control 'the second The source is extremely reduced. The second conductive circuit is used. Conductive=protective mode conducts static electricity between the first and the first guiding path; ,, a conductive secret, the first conductive impurity and the electrostatic discharge protection mode. Providing - biasing to; ^ _ 'to make the first recording semi-transistor turned on, · and Meng the first - golden oxygen semi-electric = static private anti-turf type under the non-conducting. The gate electrode is repeatedly used to make the first-gold oxide semi-transistor 2. If the patent application is turned over, the test module includes: ^ the package is placed in the county, and the second end is coupled to the first conductive path; The second end of the first-resistor is in an inverted state, and the input end of the first-side resistor is coupled to the output terminal to lightly connect the gate of the first-thick oxygen-oxygen transistor to know that the input package is the same as the patent scope of the application. The electrostatic discharge protection device according to the second item, the second plug voltage module, the complex voltage, the voltage, so that the first money m does not fall under the control system, the input end of the inverter is not transparent. . The electrostatic discharge protection device of claim 2, wherein the plug voltage module is coupled to the wheel end of the inverter. 5. The electrostatic discharge protection device of claim 1, wherein the detection module comprises: a first electric gate, the first end of which is connected to the first conductive path; and a first resistor, the first of which The end is coupled to the second end of the _ capacitor, and the second end is connected to the second conductive path; 一反相器,其輸入端耦接該第一電容之第二端,其輸 出端搞接該第一金氧半電晶體之閘極。 6.如申請專利範圍第5項所述之靜電放電防護裝置, 更包括: 一第二拴制電壓模組,其耦接至該反相器之輸入端, 用以在非a靜電放電防護模式下栓制該反相器之輸入端電 壓,使該第一金氧半電晶體不導通。 7·如巾睛專利範圍第5項所述之靜電放電防護裝置, ,、中該栓制電壓模組耦接至該反相器之輪入端。 豆月專利範圍第1項所述之靜電放電防護裝置, 八rtn壓模,接至該第—金氧半電晶體之閘極。 其㈣1項所叙靜電放€防護裝置, 端糕垃二電容’其第—端•接該第—導電路徑,·^第-_接,卜金氧半電晶體之祕;以及 /、弟- 第-嫂阻,其第—端祕該第—電容之第二端,A 弟一舄耦接該第二導電路徑。 、其 22 200840016 uyouui 23508twf.doc/n 10. 如申請專利範圍第1項所述之靜電放電防護裝 置,其中該偵測模組包括: 一第一電阻,其第一端耦接該第一導電路徑,其第二 端耦接該第一金氧半電晶體之閘極;以及 一第一電容,其第一端耦接該第一電阻之第二端,其 第二端耦接該第二導電路徑。 11. 如申請專利範圍第1項所述之靜電放電防護裝 置,其中該栓制電壓模組包括: 一第二金氧半電晶體,其第一源/汲極耦接該第一金氧 半電晶體之閘極,其第二源/汲極耦接該第一導電路徑,其 閘極耦接一第三導電路徑。 12. 如申請專利範圍第1項所述之靜電放電防護裝 置,其中該栓制電壓模組包括: 一第二金氧半電晶體,其第一源/汲極耦接該第一金氧 半電晶體之閘極,其第二源/汲極耦接該第二導電路徑,其 閘極耦接一第三導電路徑。 13. 如申請專利範圍第1項所述之靜電放電防護裝 置,其中該栓制電壓模組包括: 一第二金氧半電晶體,其第一源/汲極耦接該第一金氧 半電晶體之閘極,其弟二源及極輛接該弟一導電路控,以 及 一第三金氧半電晶體,其第一源/汲極耦接一第三導電 路徑,其第二源/汲極耦接該第二金氧半電晶體之閘極,其 閘極耦接該第一導電路徑。 23 200840016 wuul/i· 23508twf.doc/n 14. 如申請專利範圍第i項所述之靜♦ 置,其中該栓制電壓模組包括·· 兔故電昤幾舉 一第二金氧半電晶體,其第一源/汲極耦 半電晶體之閘極’其第二源/沒極祕 及 —趣;, -第三金氧半電晶體,其第—源/沒極 、 路從’其第n_接該第二金氧半電B日· _$導务 閘極耦接該第二導電路徑。 體文闈扭,^ 15. 如申請專利範圍第!項所述之靜 ’、 置,其中該栓制電壓模組包括: 電昤幾}^ 一第二金氧半電晶體,其第— =電晶體之閘極’其第二獅耦接該:, -第二電阻,其第一端耦接— 端耦接該第二金氧半電晶體之閘極。路麵,其第 巢 =如申請專利範圍第i項所述之靜 置,八中該栓制電壓模組包括: 故電防護 —第二金氧半電晶體,其第— 以 :電晶體之_,衫二·極㈣金氧 —第二電阻,其第一端耦接一 端叙接該第二金氧半電晶體之閘極路徑,其第二 17·如申請專利範圍第i項 置,其中該第一導I /I之静電放電防護裝 ^书路徑為糸統電壓執線。 24 23508twf.doc/n 200840016 18. 如申請專利範圍第1項所述之靜電放電防護裝 置,其中該第一導電路徑耦接至一輸入焊墊。 19. 如申請專利範圍第1項所述之靜電放電防護裝 置,其中該第一導電路徑耦接至一輸出焊墊。 20. 如申請專利範圍第1項所述之靜電放電防護裝 置,其中該第二導電路徑為接地電壓軌線。 21. 如申請專利範圍第1項所述之靜電放電防護裝 置,其中該第二導電路徑耦接至一輸入悍墊。 22. 如申請專利範圍第1項所述之靜電放電防護裝 置,其中該第二導電路徑耦接至一輸出焊墊。 23. 如申請專利範圍第1項所述之靜電放電防護裝 置,其中該第三導電路徑為一第一電壓軌線。An inverter has an input end coupled to the second end of the first capacitor, and an output end coupled to the gate of the first MOS transistor. 6. The electrostatic discharge protection device of claim 5, further comprising: a second clamp voltage module coupled to the input end of the inverter for use in a non-electrostatic discharge protection mode The input terminal voltage of the inverter is depressed to make the first MOS transistor not conductive. 7. The electrostatic discharge protection device of claim 5, wherein the plug voltage module is coupled to the wheel end of the inverter. The electrostatic discharge protection device described in the first paragraph of the bean patent range, the eight rtn stamper is connected to the gate of the first-thick oxygen-oxide semi-transistor. (4) The static electricity discharge protection device mentioned in 1 item, the end cake and the second capacitor 'the first end of the terminal' are connected to the first conductive path, · ^第__, the secret of the gold oxide semi-transistor; and /, brother - The first-side resistor, the first end of the first-capacitor, the second end of the capacitor, is coupled to the second conductive path. 10. The device of claim 1, wherein the detecting module comprises: a first resistor, the first end of which is coupled to the first conductive a second end coupled to the gate of the first MOS transistor; and a first capacitor having a first end coupled to the second end of the first resistor and a second end coupled to the second end Conductive path. 11. The electrostatic discharge protection device of claim 1, wherein the plug voltage module comprises: a second MOS transistor, the first source/drain is coupled to the first oxy-half The gate of the transistor has a second source/drain coupled to the first conductive path and a gate coupled to a third conductive path. 12. The electrostatic discharge protection device of claim 1, wherein the plug voltage module comprises: a second MOS transistor, the first source/drain is coupled to the first oxy-half The gate of the transistor has a second source/drain coupled to the second conductive path and a gate coupled to a third conductive path. 13. The electrostatic discharge protection device of claim 1, wherein the plug voltage module comprises: a second MOS transistor, the first source/drain is coupled to the first oxy-half half The gate of the transistor, the second source and the pole of the transistor are connected to the circuit control of the brother, and a third gold oxide semi-transistor, the first source/drain is coupled to a third conductive path, and the second source thereof The gate is coupled to the gate of the second MOS transistor, and the gate is coupled to the first conductive path. 23 200840016 wuul/i· 23508twf.doc/n 14. As described in the scope of application of the scope of the patent item i, wherein the plug-in voltage module includes · rabbits, several electricians, a second gold-oxygen and semi-electric The crystal, the gate of the first source/drain-coupled half-transistor's second source/not very secret--interest;, - the third gold-oxygen semi-transistor, its first-source/no-pole, the way from The nth_the second gold-oxygen half-electric B-day _$ guiding gate is coupled to the second conductive path. Body style, ^ 15. If you apply for patent scope! The static voltage device, wherein the voltage voltage module comprises: a second metal oxide semi-transistor, the first -= the gate of the transistor 'the second lion coupled to the: a second resistor coupled to the first end of the second resistor is coupled to the gate of the second MOS transistor. Pavement, the first nest = as described in the scope of claim i, the plug-in voltage module includes:: electric protection - the second gold-oxygen semi-transistor, the first - to: the transistor _ a second resistor of the second pole (four) gold oxide-second resistor, the first end of which is coupled to one end of the gate path of the second gold-oxygen semiconductor transistor, and the second 17th of which is set forth in claim i, wherein The first I/I electrostatic discharge protection device path is a system voltage line. The electrostatic discharge protection device of claim 1, wherein the first conductive path is coupled to an input pad. 19. The ESD protection device of claim 1, wherein the first conductive path is coupled to an output pad. 20. The ESD protection device of claim 1, wherein the second conductive path is a ground voltage trajectory. 21. The ESD protection device of claim 1, wherein the second conductive path is coupled to an input pad. 22. The ESD protection device of claim 1, wherein the second conductive path is coupled to an output pad. 23. The ESD protection device of claim 1, wherein the third conductive path is a first voltage rail. 2525
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI387093B (en) * 2009-08-26 2013-02-21 Faraday Tech Corp High-voltage-tolerant esd clamp circuit with low leakage current fabricated by low-voltage cmos process
TWI401784B (en) * 2010-12-16 2013-07-11 Ememory Technology Inc Electrostatic discharge protection apparatus
TWI739811B (en) * 2016-11-18 2021-09-21 台灣積體電路製造股份有限公司 Layout of semiconductor device, semiconductor device and operation thereof
TWI795068B (en) * 2021-11-11 2023-03-01 世界先進積體電路股份有限公司 Electrostatic discharge protection circuit
US11811222B2 (en) 2021-12-16 2023-11-07 Vanguard International Semiconductor Corporation Electrostatic discharge protection circuit

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI387093B (en) * 2009-08-26 2013-02-21 Faraday Tech Corp High-voltage-tolerant esd clamp circuit with low leakage current fabricated by low-voltage cmos process
TWI401784B (en) * 2010-12-16 2013-07-11 Ememory Technology Inc Electrostatic discharge protection apparatus
TWI739811B (en) * 2016-11-18 2021-09-21 台灣積體電路製造股份有限公司 Layout of semiconductor device, semiconductor device and operation thereof
TWI795068B (en) * 2021-11-11 2023-03-01 世界先進積體電路股份有限公司 Electrostatic discharge protection circuit
US11811222B2 (en) 2021-12-16 2023-11-07 Vanguard International Semiconductor Corporation Electrostatic discharge protection circuit

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