200839838 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種曝光系統、光罩裝置與曝光方法 ’特別是指一種半導體微影曝光系統、光罩裝置與曝光方 法。 【先前技術】 為降低生產成本與提高晶片反應速度，許多晶圓廠都 致力於在一晶片中設置最多之電晶體，而其中影響晶片之 電晶體數量多寡的便是光微影術（optical lith〇graphy)。但 近年來光微影術已逐漸遇到頻頸，隨著半導體元件尺寸的 不斷微縮，用以進行電路圖形之投影的光罩（ph〇t〇 mask) 上的孔隙覓度與孔隙間之間距亦需相對縮小，以便於晶圓 表面之光阻劑層上曝光形成具有奈米線寬的電路圖形，但 是當孔隙寬度與兩孔隙之間距過小時，光線穿透光罩時所 產生干涉與繞射現象，會嚴重影響曝光之成相品質，因此 如何提升光微影術之解析度已成為各晶圓廠極力發展的目 標。 【發明内容】 因此’本發明之目的，即在提供一種用於半導體光微 影製程中，可避免光罩對位不準及降低干涉與繞射等干擾 ，况而可於晶圓上精確曝光形成細小線寬之電路圖形的 光罩裝置。 θ之$目的’在於提供-種可於晶圓上精確曝 先形成細顿寬之電路®形的微料光系統。 200839838 本毛月之再一目@，在於提供一種以上述微影曝光系 統進行微影製程之方法。 於是，本發明光罩裝置，可用以控制一曝光光源之光 線對晶圓進行曝光之區域，i包含一光罩，及一第一遮光 板與-第二遮光板。該光罩包括多數相間隔並可分別使曝 光光源之練往下穿透的第-與第二微影區，且該等微影 區相配合構成-預定微影複製至晶圓之圖樣。該等遮光板 是可彼此替換地單獨與該光罩縱向㈣，且第—遮光板具 有多數相間隔並僅使穿透該等第—微影區之光線可射向晶 圓的第-曝光區，而第二遮光板具有多數相間隔並僅使穿 透該等第二微影區之光線可射向晶圓的第二曝光區。 於疋本卷明从影曝光糸統，適用於設置在一半導體 製程壞境中，而可對一頂面塗覆有光阻劑之晶圓進行微影 曝光，並包含一設置於晶圓上方並可產生射向晶圓之光線 的曝光光源、一設置於曝光光源與晶圓間且可使往下穿透 之光線聚焦射向晶圓頂面之預定曝光區域的透鏡裝置，及 一設置於曝光光源與透鏡裝置間之光罩裝置。該光罩裝置 包括一光罩，及局部部位可遮光之一第一與一第二遮光板 ，該光罩具有多數相間隔並可分別使光線往下穿透，且相 配合構成一欲微影至晶圓之圖樣的第一與第二微影區，該 等遮光板是可彼此替換地單獨與該光罩縱向排列，且第一 遮光板具有多數相間隔並僅使穿透該等第一微影區之光線 可射向透鏡裝置的第一曝光區，而第二遮光板具有多數相 間隔並僅使穿透該等第二微影區之光線可射向透鏡裝置的 6 200839838 第二曝光區。 "^是，本發明-種微影曝光方法，是以上述之微影曝 • 光系統對—晶圓進行微影曝^，包含以下步驟··⑴將該光 罩没置定位於-曝光光源與一透鏡裝置間，並使晶圓與光 罩對位，（b )冑第一 ^光板與該光軍縱向排列地設置定位 、，並驅使曝光光源發光，僅使往下穿透該等第二微影區之 光線可穿透透鏡裝置，而對晶圓進行微影曝光；及（c)移 離第一遮光板，並將第二遮光板與光罩縱向排列設置定位 . ，驅使曝光光源發光，僅使往下穿透該等第一微影區之光 線穿透透鏡裝置，而對晶圓進行微影曝光。 【實施方式】 有關本發明之前述及其他技術内容、特點與功效，在 以下配合參考圖式之二個較佳實施例的詳細說明中，將可 清楚的呈現。 在本發明被詳細描述之前，要注意的是，在以下的說 g 明内容中’類似的元件是以相同的編號來表示。 如圖1〜4所示，本發明微影曝光系統之第一較佳實施 例，可以設置於半導體製程環境中，而用以對一頂面被覆 有光阻劑（圖未示）之晶圓100進行微影曝光，而構成具 有細小線寬之電路圖樣（圖未示）。該微影曝光系統包含一 間隔設置於晶圓100上方之並可產生曝光所需之光的曝光 光源3、一間隔設置於曝光光源3與晶圓100間並可使光線 穿透之透鏡裝置4，及一間隔設置於曝光光源3與晶圓1〇〇 間之光罩裝置5。 7 200839838 在本實施例中’該透鏡裝置4具有二上、下間隔地設 置於曝光光源3下方，且分別位於光罩裝置5上、下方之 透鏡單元41，但實施時，該透鏡裝置4可不設置光罩裝置 5上方的透鏡單元41，僅於光罩裝置5與晶圓間設置 一透鏡單元41，但實施時不以此為限。由於該曝光光源3 與透鏡裝置4皆為習知構件，且非本發明之創作重點，因 此不再詳述。 該光罩裝置5是設置於該等透鏡單元41間，並包括一 光罩51、一第一遮光板52,及一第二遮光板53。該光罩 51具有多數彼此緊密間隔排列且可分別使光往下穿透之第 微衫區5 11與第二微影區512，且該等微影區5〗丨、5 j 2 相配合構成一預定微影複製到晶圓1〇〇上的電路圖樣51〇。 該光罩51是由一可透光材料製成之片狀光罩本體513，及 一被覆固定於光罩本體513底面之不透光第一遮光體514 、、且a而成，且邊第一遮光體514於光罩本體5丨3上圍繞界 定出該等微影區511、512。 該第遮光板52具有多數相間隔且可分別使光線往下 穿透之第一曝光區521，第二遮光板53則具有多數相間隔 且可使光線往下穿透之第二曝光區531。該等遮光板兄、 53疋刀別由一可供光線往下穿透之平板狀板本體 _及一被覆固定於板本體522、532頂面之不透光第二遮光 脸523、533組合而成，且該第二遮光體523、533會於相 對應板本體522、532上圍繞界定出該等曝光區521、531。 在本實施例中，該等遮光體514、523、533皆為金屬 200839838 絡（Cr) ’但實施時’該等透光體514、523、533材質皆不 m為a T要可阻止曝光光源3產生的光穿透即可。 該等遮光板52、53是能夠彼此替換地單獨與該光罩51 •縱向平行排列設置定位，當該等遮光板52、53分別盘光罩 51縱向平行㈣時，在本實施财，是⑽列設置於光罩 51下方為例進行說明，該㈣光板52、53之該等曝光區 521、531會分別對應位於該等微影區5ii、512正下方。亦 Ί-遮光板52縱向平行地排列設置於光罩Η下方時 帛$光板52之第二遮光體523會將往下穿透該等第二 _ 微影區512之光線擋住，僅讓穿透第一微影1 511之光^ 彺下穿透該等第-曝光區521而射向透鏡單元41。而第二 遮光板53之第二遮光體533則可將往下穿透該等第一微影 區512之光線擋住，僅讓穿透該等第二微影區5ιι之光線 可往下穿透該等第二曝光區531而射向透鏡單元4卜 藉著該等遮光板52、53分別僅能使穿透該等第一微影 區511或第二微影區512的光線射向透鏡單元4丨的設計， 來提局穿透光罩裝置5並往下射向透鏡單元41之光線間的 間距，而降低干涉與繞射干擾的現象。 如圖1、2、5所示，當要以上述微影曝光系統對被覆 有光阻劑之晶圓100頂面進行微影曝光時，其步驟如下： 步驟（一）：將該微影曝光系統設置於一製程環境中， 並對應位於晶圓100上方，且將晶圓1〇〇與光罩裝置5之 光罩51相互對位㈣光光源3與上方透鏡單元41的下方 ’使曝光光源3產生之光線可經由透鏡單元41往下穿透該 9 200839838 微影區511、512。 步驟（二）：將第-遮光板52設置定位於光罩51下方 ，，並驅使曝光光源3發光，藉由該第—遮光板Μ之第二遮 光體523將穿透該等第微 _ 于乐一微〜£ 512之光線擋住，僅讓 ，該等第一，影區511之光線往下穿透該等第-曝光區521 制並被透鏡單70 41聚焦而對晶圓⑽頂面預定區域之光阻 _ :進行微影曝光’而產生—與該等第一微影區5ΐι外型相對 應之微小圖樣（圖未示）。 #驟（）_閉曝光光源3，並將第-遮光板52移離 罩51下方，再將第二遮光板53設置定位於光罩51下方 :然後，驅使曝光光源3發光，藉由第二遮光板53之第二 ^體533將穿透光阜51之該等第一微影區5ii之光線播 住’僅讓穿透該等第二與旦彡 一微心區512之光線往下穿透，並被 早70 41聚焦而對晶圓1⑼頂面狀區域之光阻劑進行 7曝光’而產生與該等第二微影區512之外型相對應的 另一微小圖樣（圖未示）。 人，、才/驟（一）與步驟（三）所得之微小圖樣的組 :’即為該光罩51之電路圖樣510的微縮版，透過重複上 述步驟，便可將亦g ς 7 ⑽各部位。、 之電路圖樣510微縮複製至晶圓 二由上述該等遮光板52、53之曝光區521、531結構 梦时—可日力彺下牙透光罩51與遮光板52、53而射向透 疋41之光線的間距（piteh)，進而降低光干涉與繞射 干擾現象，並配合兩次曝光的方式，將光罩Η之該等微 10 200839838 影區511、512構成的電路圖樣51〇分區曝光呈像於晶圓 100上，藉此提高微影曝光品質與微影曝光所構成之圖樣線 寬解間隔。同時，因為僅抽換該等遮光板52、53，光罩5 亚無移動而與晶圓100的相對位置固定，所以可避免第一 一微衫區511、512呈像在晶圓100上之相對位置不準的 問題產生。200839838 IX. Description of the Invention: [Technical Field] The present invention relates to an exposure system, a reticle device, and an exposure method ‘, particularly, a semiconductor lithography exposure system, a reticle device, and an exposure method. [Prior Art] In order to reduce the production cost and increase the speed of wafer reaction, many fabs are working on setting up the largest number of transistors in a wafer, and the number of transistors affecting the wafer is optical lithography. 〇graphy). However, in recent years, photolithography has gradually encountered a frequency neck. As the size of semiconductor components continues to shrink, the aperture between the apertures and the apertures used to project the projection of the circuit pattern (por〇t〇mask) It also needs to be relatively narrowed so that the photoresist layer on the surface of the wafer is exposed to form a circuit pattern having a nanowire width. However, when the aperture width is too small between the two apertures, interference and winding occurs when the light penetrates the mask. The phenomenon of shooting will seriously affect the quality of the phase of exposure. Therefore, how to improve the resolution of photolithography has become the goal of the development of various fabs. SUMMARY OF THE INVENTION Therefore, the object of the present invention is to provide a semiconductor photolithography process that avoids misalignment of the mask and reduces interference such as interference and diffraction, and can be accurately exposed on the wafer. A reticle device that forms a circuit pattern of a small line width. The $purpose of θ is to provide a micro-light system that can be accurately exposed on a wafer to form a thin-width circuit® shape. 200839838 The second month of this month is to provide a method for lithography process using the above-mentioned lithography exposure system. Thus, the reticle device of the present invention can be used to control the area where the exposure light source exposes the wafer, i includes a reticle, and a first visor and a second visor. The reticle includes a plurality of first and second lithography regions spaced apart from each other and capable of penetrating the exposure light source downwardly, and the lithography regions cooperate to form a pattern of predetermined lithography to be copied to the wafer. The visors are replaceable separately from the reticle longitudinal direction (4), and the first visor has a plurality of spaced intervals and only allows light passing through the lithographic regions to be directed toward the first exposure region of the wafer And the second visor has a plurality of spaced intervals and only allows light that penetrates the second lithography regions to be directed toward the second exposure region of the wafer. In 疋本本明明, the film exposure system is suitable for setting in a semiconductor manufacturing environment, and can perform lithographic exposure on a top surface coated with a photoresist, and includes a film disposed on the wafer and An exposure light source capable of generating light incident on the wafer, a lens device disposed between the exposure light source and the wafer and capable of focusing the light penetrating downward toward a predetermined exposure area of the top surface of the wafer, and a lens disposed at the exposure A reticle device between the light source and the lens device. The reticle device comprises a reticle, and a partial portion can block one of the first and a second visor, wherein the reticle has a plurality of spaced intervals and can respectively penetrate the light downwards, and cooperate to form a desired lithography And the first and second lithography regions of the pattern of the wafer, the visors are separately and longitudinally arranged with the reticle, and the first visor has a plurality of intervals and only penetrates the first The light in the lithography zone can be directed to the first exposure zone of the lens device, and the second visor has a plurality of spaced and only allows light that penetrates the second lithography zone to be directed toward the lens device. Area. "^ Yes, the lithography exposure method of the present invention is to perform lithography exposure on the wafer by the above-mentioned lithography exposure/light system, and includes the following steps: (1) the photomask is not positioned at-exposure Between the light source and a lens device, and aligning the wafer with the reticle, (b) 胄 the first light plate and the light army are arranged in a longitudinal direction, and driving the exposure light source to emit light, and only penetrating downwards The light in the second lithography region can penetrate the lens device to perform lithographic exposure on the wafer; and (c) move away from the first visor and position the second visor and the reticle longitudinally to drive the exposure. The light source emits light, and only the light penetrating through the first lithography regions is penetrated through the lens device to perform lithographic exposure on the wafer. The above and other technical contents, features and effects of the present invention will be apparent from the following detailed description of the preferred embodiments of the invention. Before the present invention is described in detail, it is to be noted that the same elements are denoted by the same reference numerals in the following description. As shown in FIG. 1 to FIG. 4, the first preferred embodiment of the lithography exposure system of the present invention can be disposed in a semiconductor processing environment for coating a top surface with a photoresist (not shown). 100 is subjected to lithography exposure to form a circuit pattern having a small line width (not shown). The lithography exposure system includes an exposure light source 3 disposed above the wafer 100 and capable of generating light required for exposure, and a lens device 4 disposed between the exposure light source 3 and the wafer 100 and allowing light to pass therethrough. And a mask device 5 disposed between the exposure light source 3 and the wafer 1 . 7 200839838 In the present embodiment, the lens device 4 has two lens units 41 disposed below the exposure light source 3 and spaced apart from the exposure light source 3, and respectively located below and below the mask unit 5. However, the lens unit 4 may be omitted. The lens unit 41 is disposed above the reticle device 5, and only one lens unit 41 is disposed between the reticle device 5 and the wafer, but is not limited thereto. Since both the exposure light source 3 and the lens device 4 are well-known components and are not the focus of the present invention, they will not be described in detail. The reticle device 5 is disposed between the lens units 41 and includes a reticle 51, a first visor 52, and a second visor 53. The reticle 51 has a plurality of micro-shirt regions 5 11 and a second lithography region 512 which are closely spaced from each other and can respectively penetrate the light downward, and the lithographic regions 5 丨 and 5 j 2 are matched to each other. A predetermined lithography is copied to the circuit pattern 51 on the wafer. The reticle 51 is a sheet-like reticle body 513 made of a light-transmissive material, and a opaque first light-shielding body 514 which is fixed to the bottom surface of the reticle body 513, and is formed by a A light blocking body 514 surrounds the reticle body 5丨3 to define the lithographic regions 511 and 512. The first visor 52 has a plurality of first exposure regions 521 spaced apart from each other to allow light to pass downward, and the second visor 53 has a plurality of second exposure regions 531 spaced apart to allow light to pass downward. The opaque brothers and the 53 knives are not separated by a flat plate body _ which can penetrate the light downwards and a opaque second opaque face 523, 533 which is fixed to the top surfaces of the plate bodies 522 and 532. The second light blocking bodies 523, 533 surround the corresponding plate bodies 522, 532 to define the exposed regions 521, 531. In this embodiment, the light-shielding bodies 514, 523, and 533 are all metal 200839838 (Cr) 'but when implemented, the light-transmitting bodies 514, 523, 533 are not made of a T to prevent the exposure light source. 3 The generated light can be penetrated. The visors 52, 53 are arbitrarily arranged in parallel with the reticle 51 in the longitudinal direction, and when the visors 52, 53 are longitudinally parallel (four), respectively, in this implementation, (10) The columns are disposed below the mask 51 as an example. The exposure regions 521 and 531 of the (4) light panels 52 and 53 are respectively located directly below the lithography regions 5ii and 512. Also, when the visors 52 are arranged in parallel in the longitudinal direction of the reticle, the second opaque body 523 of the illuminating plate 52 blocks the light that penetrates the second lithography area 512 downwards, and only allows penetration. The light of the first lithography 1 511 passes through the first-exposure regions 521 and is directed toward the lens unit 41. The second light blocking body 533 of the second visor 53 can block the light that penetrates the first lithographic area 512 downwards, and only allows the light penetrating the second lithographic area 5 ι to penetrate downward. The second exposure regions 531 are directed toward the lens unit 4, and the light passing through the first lithography regions 511 or the second lithography regions 512 can be directed to the lens unit by the visors 52, 53 respectively. The design of the cymbal is to reduce the interference between the light passing through the reticle device 5 and directed downward toward the lens unit 41, thereby reducing interference and diffraction interference. As shown in FIGS. 1, 2, and 5, when the top surface of the photoresist 100 coated with the photoresist is subjected to the lithography exposure by the above-described lithography exposure system, the steps are as follows: Step (1): Exposing the lithography The system is disposed in a process environment and correspondingly located above the wafer 100, and aligns the wafer 1 〇〇 with the reticle 51 of the reticle device 5 (4) below the light source 3 and the upper lens unit 41 to make the exposure light source The generated light can penetrate the 9 200839838 lithography areas 511, 512 through the lens unit 41. Step (2): positioning the first visor 52 under the reticle 51, and driving the exposure light source 3 to emit light, and the second light shielding body 523 of the first visor 将 will penetrate the first _ The light of Le-Mic ~ £512 is blocked, so that only the first, shadow of the shadow zone 511 penetrates the first-exposure zone 521 and is focused by the lens unit 70 41 to be placed on the top surface of the wafer (10). The photoresist of the region _: is subjected to lithographic exposure to produce a tiny pattern (not shown) corresponding to the shape of the first lithographic region 5ΐι. #骤()_Close the exposure light source 3, and move the first visor 52 away from the cover 51, and then position the second visor 53 under the reticle 51: then, the exposure light source 3 is driven to emit light, by the second The second body 533 of the visor 53 spreads the light passing through the first lithographic regions 5ii of the aperture 51 to 'only pass through the light of the second and the first micro-center 512. Through, and is exposed by the early 70 41 to 7 expose the photoresist of the top surface of the wafer 1 (9) to produce another tiny pattern corresponding to the shape of the second lithography region 512 (not shown) ). The group of tiny patterns obtained by the person, the sequel (1) and the step (3): 'that is, the miniature version of the circuit pattern 510 of the reticle 51, by repeating the above steps, it is also possible to also g ς 7 (10) Part. The circuit pattern 510 is micro-replicated to the wafer 2. The exposure regions 521 and 531 of the light-shielding plates 52 and 53 are configured to be in a dream-time, and the sun-transparent lower-transmissive cover 51 and the light-shielding plates 52 and 53 are irradiated. The pitch of the light of 疋41 (piteh), thereby reducing the phenomenon of light interference and diffraction interference, and in combination with the double exposure method, the mask pattern 51 〇, the circuit pattern formed by the masks 511, 512 The exposure is applied to the wafer 100, thereby improving the gap width between the lithographic exposure quality and the lithographic exposure. At the same time, since only the visors 52, 53 are replaced, the reticle 5 is sub-moved and fixed relative to the wafer 100, so that the first micro-shirt regions 511, 512 can be prevented from being imaged on the wafer 100. A problem with relative positional inaccuracies arises.
在本實施例中，共設置有兩片遮光板52、53，並藉由 該等遮光板52、53之該等曝光區521、531的分佈設計， 來將穿透光罩51《光線區分成兩部分，而可分別於晶圓 100上曝光形成不同之圖樣。但實施時，遮光板數量可依光 罩51之該等祕影區密度與數量而增加，例如可採用五片遮 光板來將光罩51之微影區區分成五個獨立部分，並藉由五 次微影曝光的步驟，將電路圖樣51〇分區微影於晶圓ι〇〇 另外本只％例之光罩51是設置於該等遮光板52、53 上方，且光罩51的該等第一遮光體514是被覆於光罩本體 513底面’而4等遮光板52、53之第二遮光體⑵、是 f別被覆於該等板本體似、532頂面，但實施時，光罩51 =置於遮光板52、53上方之態樣可以有下列其它類型，以 第一遮光板52為例進行說明： 如圖所示之態樣··第-遮光體514被覆於光罩本體 氐面°亥等第二遮光體523被覆於該板本體522底面。 如圖1所示之態樣：第一遮光體514被覆於光罩本體 頁面4等第二遮光體523被覆於板本體522頂面。 11 200839838 如圖8所示之態樣：第一遮光體514被覆於光罩本體 513頂面，該等第二遮光體523被覆於該板本體522底面。 上述光罩51設置於該等遮光板52、53上方的方式， 使得曝光光源3的光可先穿透該等微影區5丨！、5 ! 2後，再 被下方之第一或第二遮光板52、53分區擋住。但實施時， 亦可將該等遮光板52、53縱向排列地分別設置於光罩51 上方，以第一遮光板52為例，第一遮光板52可先將往下 射向光罩51之該等第二微影區512光線預先擋住，僅使穿 透第一遮光板52之該等第一曝光區521的光線能往下繼續 牙透該等第一微影區511，而射向透鏡單元41，所以同樣可 藉由該等遮光板52、53之二次分區曝光步驟來提升微影曝 光之品質。 且實靶日寸，光罩51之第一遮光體514，及該等遮光板 52、53之第二遮光體523、533的設置方式，亦具有多種態 樣乂該光罩51和第—遮光板52之排列為例，分別如圖 所示，不再詳述。另外，光罩5卜第一遮光板52與 第一遮光板53之縱向排列方式可依需要而改變，不以上述 型態為限。 圖13 14所示，本發明微影曝光系統第二較佳實施 例與第-實_差異處僅在於：該光罩裝^ 5之結構設計 。為方便說明，在以下說明中將僅針對本實施例與第一實 施例差異處進行說明。 在本實施例中，同樣是以光罩51 ^置於該等遮光板Μ 、53上方為例進行說明。該光罩η是由光罩本體513及多 12 200839838 數間隔被覆於光罩本體513 I面之不透光第-遮光體514 組合而成’且該等第-遮光冑514於光罩本體5i3上 出該等相間隔’並可使光線往下穿透射向該等遮光板〜 53之第-與第二微影區511、512。在本實施例中， 一遮光f 514是以長條狀為例進行說明，且該等微影區川 二2疋分別位於二相鄰第_遮光體514間，但實施時，該 等第一遮光體514外型不以此為限。 該等遮光板52、53是分別由可透光板本體522、532, 及多數間隔被覆於板本體522、532頂面且不透光第二遮光 體523、533組合而成。其中，第一遮光板52之該等第二 遮光體523是對應位於該等第二微影區512正下方， 將往下穿透該等第二微影區512的光線擔住，並與板本體 522相配合界定出該等相間隔並對應位於該等第一微影區 511正下方’而可使光線往下穿透射向透鏡單元q — 曝光區521。 —第二遮光板53之該等第二遮光體⑶是對應位於該等 第^一微影區511正下古 ^ y 、 下方，而可將往下穿透該等第一微影區 511的光下擋住’並與板本體532相配合界定出該等相 並對應位於該等第二微影區512正下方m㈣ 穿透射向透鏡單元41之第二曝光區531。 耩由上述光罩51與該等遮光板52、53之結構設計， 同樣可透過上述微影光方法，分別將鮮Η之該等第一血 第二微影區511、1 /、 12所構成之圖樣微縮複製至晶圓ι〇〇上 。同樣的4等光罩51與該等遮光板m #可依照第 13 200839838 -實施例所述之各種組合方式進行組合排列，不再費述。 歸納上述，藉由該光罩裝置5之該等遮枝52、53可分別 肖以擋住穿透光罩51之該等第二與第—微影區512、5ΐι的 . 光線，或預先將射向該等第二或第一微影區512、511之光 線分別擋住的分次分區曝光設計，可增加每次曝光時，往 下穿透該光罩裝置5並射向透鏡單元41之光線間距（p滅 )，所以穿透該等第一微影區511或穿透該等第二微影區 512之光線所產生的干涉與繞射現象會大幅降低，進而可提 • 高曝光光線對晶圓100微影曝光之呈像品質，相對提升晶 . ® _曝光顯影後所產生之微縮電路圖樣的線寬間隔，使 得該微影曝光系統可應用於更小線寬圖樣之微影曝光，進 而可在晶圓100上形成更多且線寬更小之電晶體，而相對 提升產能與降低成本。因此，確實可達到本發明之目的。 惟以上所述者，僅為本發明之一較佳實施例而已，當 不能以此限定本發明實施之範圍，即大凡依本發明申請: 利範圍及發明說明内容所作之簡單的等效變化與修飾，皆 •仍屬本發明專利涵蓋之範圍内。 【圖式簡單說明】 圖1疋本發明械影曝光系統之第一較佳實施例與一晶 圓搭配使用時的立體示意圖，說明以一光罩裝置之一第一 - 遮光板進行微影曝光時的情況； . 圖2是類似圖1之視圖，說明以光罩裝置之一第二遮 光板進行微影曝光時的情況； 圖3是該光罩裝置之一光罩對應設置於第一遮光板上 14 200839838 方時的側視示意圖； 圖4疋該光罩裝置之光罩對應設置於第二遮光板上方 時的侧視示意圖； 圖5疋本發明微影曝光方法之較佳實施例的流程圖； 圖6疋類似圖3之視圖，說明光罩與第一遮光板之不 同排列組合方式； 圖7疋類似圖3之視圖，說明光罩與第一遮光板之不 同排列組合方式； 圖8疋類似圖3之視圖，說明光罩與第一遮光板之不 同排列組合方式； 圖9疋該光罩裝置之光罩對應設置於第一遮光板下方 時的側視示意圖； 圖10是類似圖9之視圖，說明光罩與第一遮光板之不 同排列組合方式； 圖11是類似圖9之視圖，說明光罩與第一遮光板之不 同排列組合方式； 圖12是類似圖9之視圖，說明光罩與第一遮光板之不 同排列組合方式； 圖13是本發明微影曝光系統之第二較佳實施例與一晶 圓搭配使用時的立體示意圖，說明以一光罩裝置之一第一 遮光板進行微影曝光時的情況；及 圖14是類似圖13之視圖，說明以光罩裝置之一第二 遮光板進行微影曝光時的情況。 15 200839838 【主要元件符號說明】 100···· ...晶圓 514···· …第 一遮光體 3 ........ ...曝光光源 52...··. …第 一遮光板 4....... ...透鏡裝置 521 .... …第 一曝光區 41...... …透鏡單元 522···· 5 ....... …光罩裝置 523 …· …第 二遮光體 51...... ...光罩 53...... …第 二遮光板 510···· ...電路圖樣 531 .... …第 二曝光區 511 .... ,…第一微影區 532.... —板本體 512.........第二微影區 533 ........第二遮光體 513.……光罩本體 16In this embodiment, a plurality of light shielding plates 52 and 53 are disposed in total, and the distribution of the exposure regions 521 and 531 of the light shielding plates 52 and 53 is used to divide the light into the mask 51. The two parts can be separately exposed on the wafer 100 to form different patterns. However, when implemented, the number of visors can be increased according to the density and quantity of the phantom regions of the reticle 51. For example, five visors can be used to divide the lithography area of the reticle 51 into five independent parts, and by five In the sub-lithographic exposure step, the circuit pattern 51 〇 is subdivided into the wafer ι 〇〇, and only the reticle 51 of the % example is disposed above the visors 52, 53 and the reticle 51 The light-shielding body 514 is a second light-shielding body (2) that is coated on the bottom surface of the mask body 513 and the light-shielding plates 52 and 53 of the four layers, and is not covered by the main body of the plate 532. However, when implemented, the mask 51 is implemented. The first light shielding plate 52 is exemplified as the following: The first light blocking plate 52 is taken as an example. The first light blocking body 514 is covered on the mask body. The second light blocking body 523 such as °H is covered on the bottom surface of the plate body 522. As shown in Fig. 1, the first light blocking body 514 is covered on the top surface of the plate body 522 by the second light blocking body 523 such as the mask body page. 11 200839838 As shown in FIG. 8 , the first light blocking body 514 is covered on the top surface of the mask body 513 , and the second light blocking bodies 523 are covered on the bottom surface of the board body 522 . The reticle 51 is disposed above the opaque plates 52, 53 such that the light of the exposure light source 3 can penetrate the lithography regions 5 先 first! After 5! 2, it is blocked by the first or second visor 52, 53 below. However, in the implementation, the visors 52 and 53 may be disposed vertically above the reticle 51. The first visor 52 may be used as the first visor 52, and the first visor 52 may be directed downward toward the reticle 51. The second lithographic regions 512 are pre-blocked, so that only the light passing through the first exposed regions 521 of the first visor 52 can continue to penetrate the first lithographic regions 511 and be directed toward the lens. Unit 41, so the second sub-area exposure step of the visors 52, 53 can also be used to improve the quality of lithography exposure. And the actual target size, the first light-shielding body 514 of the mask 51, and the second light-shielding bodies 523, 533 of the light-shielding plates 52, 53 are also arranged in various manners, the light-shield 51 and the first light-shielding The arrangement of the plates 52 is taken as an example, as shown in the drawings, and will not be described in detail. In addition, the longitudinal arrangement of the photomask 5 and the first visor 52 and the first visor 53 may be changed as needed, and is not limited to the above-described type. As shown in Fig. 13 14 , the second preferred embodiment of the lithographic exposure system of the present invention differs from the first embodiment in that it is only in the structural design of the reticle mount 5 . For convenience of explanation, only differences between the present embodiment and the first embodiment will be described in the following description. In the present embodiment, the mask 51 is also placed above the light-shielding plates 53, 53 as an example for description. The mask η is formed by combining the mask body 513 and the opaque first light-shielding body 514 which are overlapped on the surface of the mask body 513 I by a plurality of layers 12,398,398, and the first light-shielding 514 is applied to the mask body 5i3. The phase spacing is raised and the light can be transmitted downwardly through the first and second lithography regions 511, 512 of the visors 535. In the present embodiment, a light-shielding f 514 is described by taking an elongated strip as an example, and the lithographic regions are located between two adjacent first light-blocking bodies 514, but in practice, the first The shape of the light shielding body 514 is not limited thereto. The visors 52 and 53 are formed by combining the opaque plate bodies 522 and 532 and the top surfaces of the plate bodies 522 and 532 at a plurality of intervals, and opaque second light shielding bodies 523 and 533. The second light blocking bodies 523 of the first visor 52 are located directly below the second lithographic regions 512, and are supported by the light passing through the second lithographic regions 512, and the board The body 522 cooperates to define the phase intervals and is located directly below the first lithography regions 511' to allow light to pass downward through the lens unit q to the exposure region 521. The second light-shielding bodies (3) of the second light-shielding plate 53 are correspondingly located below the first lithography area 511 and below, and can penetrate the first lithographic areas 511 downward. The light is blocked by 'and cooperates with the plate body 532 to define the phase and correspondingly located below the second lithography area 512 m(4) through the second exposure zone 531 of the transmission lens unit 41.结构 The structure of the reticle 51 and the visors 52 and 53 can be similarly configured by the lithography method to form the second photographic regions 511, 1 / and 12 of the first blood. The pattern is miniaturely copied onto the wafer. The same four-dimensional mask 51 and the light-shielding plates m # can be arranged in combination according to various combinations described in the embodiment of the present invention, and will not be described. In summary, the visors 52, 53 of the reticle device 5 can respectively block the light passing through the second and first lithographic regions 512, 5 ι of the reticle 51, or pre-shoot The split-area exposure design that blocks the light of the second or first lithography regions 512, 511, respectively, increases the distance between the light that passes through the reticle device 5 and is directed toward the lens unit 41 at each exposure. (p off), so the interference and diffraction phenomenon caused by the light passing through the first lithography area 511 or penetrating the second lithography area 512 is greatly reduced, thereby further improving the exposure light to the crystal The image quality of the round 100 lithography exposure, relative to the line width spacing of the miniature circuit pattern produced by the crystal _ _ exposure development, so that the lithography exposure system can be applied to the lithographic exposure of the smaller line width pattern, and thus More transistors with smaller line widths can be formed on the wafer 100, while increasing throughput and reducing costs. Therefore, the object of the present invention can be achieved. However, the above description is only a preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, that is, the application of the present invention: the simple equivalent change of the scope of the invention and the description of the invention Modifications, all of which are still within the scope of the invention patent. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view showing the first preferred embodiment of the mechanical shadow exposure system of the present invention in combination with a wafer, illustrating the first-light ray exposure of a photomask device. Figure 2 is a view similar to Figure 1 illustrating the case of lithographic exposure with a second visor of the reticle device; Figure 3 is a reticle of the reticle device corresponding to the first opacity Figure 4 is a side elevational view of the reticle of the reticle device corresponding to the second visor; Figure 5 is a schematic view of a preferred embodiment of the lithographic exposure method of the present invention Figure 6 is a view similar to Figure 3, illustrating a different arrangement of the reticle and the first visor; Figure 7 is a view similar to Figure 3, illustrating a different arrangement of the reticle and the first visor; 8疋 is similar to the view of FIG. 3, illustrating a different arrangement of the reticle and the first visor; FIG. 9 is a side view of the reticle of the reticle device corresponding to the underside of the first visor; FIG. Figure 9 is a view illustrating the mask Figure 11 is a view similar to Figure 9 illustrating a different arrangement of the reticle and the first visor; Figure 12 is a view similar to Figure 9 illustrating the reticle and the first opaque FIG. 13 is a perspective view showing a second preferred embodiment of the lithography exposure system of the present invention in combination with a wafer, illustrating lithographic exposure by using a first visor of a reticle device; The case of FIG. 14 is a view similar to FIG. 13 and illustrates the case when the lithography is performed by the second visor of the reticle device. 15 200839838 [Description of main component symbols] 100···· ...wafer 514····...first light-shielding body 3 ........ exposure light source 52...··. First light shielding plate 4.. . . . lens device 521 .... first exposure area 41 ... lens unit 522 ···· 5 ....... ... reticle device 523 ... ... ... second light blocking body 51 ... ... reticle 53 ... ... second visor 510 ... ... ... circuit pattern 531 ... The second exposure area 511 ...., ... the first lithography area 532.... - the board body 512 .... the second lithography area 533 ........ Second light shielding body 513....... reticle body 16