TW200737517A - CMOS device with improved gap filling - Google Patents

CMOS device with improved gap filling

Info

Publication number
TW200737517A
TW200737517A TW096103664A TW96103664A TW200737517A TW 200737517 A TW200737517 A TW 200737517A TW 096103664 A TW096103664 A TW 096103664A TW 96103664 A TW96103664 A TW 96103664A TW 200737517 A TW200737517 A TW 200737517A
Authority
TW
Taiwan
Prior art keywords
mos device
gap filling
cmos device
improved gap
spacer
Prior art date
Application number
TW096103664A
Other languages
English (en)
Other versions
TWI328876B (en
Inventor
Ju-Wang Hsu
Chih-Hsin Ko
Jyu-Horng Shieh
Baw-Ching Perng
Syun-Ming Jang
Original Assignee
Taiwan Semiconductor Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg Co Ltd filed Critical Taiwan Semiconductor Mfg Co Ltd
Publication of TW200737517A publication Critical patent/TW200737517A/zh
Application granted granted Critical
Publication of TWI328876B publication Critical patent/TWI328876B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823807Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823864Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7843Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being an applied insulating layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/981Utilizing varying dielectric thickness
TW096103664A 2006-03-30 2007-02-01 Cmos device with improved gap filling TWI328876B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/393,369 US7378308B2 (en) 2006-03-30 2006-03-30 CMOS devices with improved gap-filling

Publications (2)

Publication Number Publication Date
TW200737517A true TW200737517A (en) 2007-10-01
TWI328876B TWI328876B (en) 2010-08-11

Family

ID=38574323

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096103664A TWI328876B (en) 2006-03-30 2007-02-01 Cmos device with improved gap filling

Country Status (3)

Country Link
US (1) US7378308B2 (zh)
CN (1) CN100505263C (zh)
TW (1) TWI328876B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI467701B (zh) * 2007-10-31 2015-01-01 Advanced Micro Devices Inc 在半導體裝置的接觸層堆疊中藉由連續提供高應力蝕刻停止材料與層間介電質而成的應力轉移

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5092340B2 (ja) * 2006-10-12 2012-12-05 富士通セミコンダクター株式会社 半導体装置及びその製造方法
US7494878B2 (en) * 2006-10-25 2009-02-24 United Microelectronics Corp. Metal-oxide-semiconductor transistor and method of forming the same
US8536619B2 (en) 2007-02-05 2013-09-17 Taiwan Semiconductor Manufacturing Company, Ltd. Strained MOS device and methods for forming the same
JPWO2008117430A1 (ja) * 2007-03-27 2010-07-08 富士通マイクロエレクトロニクス株式会社 半導体装置の製造方法、半導体装置
DE102007025342B4 (de) * 2007-05-31 2011-07-28 Globalfoundries Inc. Höheres Transistorleistungsvermögen von N-Kanaltransistoren und P-Kanaltransistoren durch Verwenden einer zusätzlichen Schicht über einer Doppelverspannungsschicht
US7989891B2 (en) * 2007-05-31 2011-08-02 Globalfoundries Inc. MOS structures with remote contacts and methods for fabricating the same
US7834389B2 (en) * 2007-06-15 2010-11-16 Taiwan Semiconductor Manufacturing Company, Ltd. Triangular space element for semiconductor device
DE102007057686B4 (de) * 2007-11-30 2011-07-28 GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG, 01109 Verfahren und Halbleiterbauelement mit einer Schutzschicht zum Reduzieren der Verspannungsrelaxation in einer Doppelverspannungsbeschichtungstechnik
JP2009277849A (ja) * 2008-05-14 2009-11-26 Toshiba Corp 半導体装置及びその製造方法
US7820518B2 (en) * 2008-05-29 2010-10-26 Infineon Technologies Ag Transistor fabrication methods and structures thereof
DE102008059649B4 (de) * 2008-11-28 2013-01-31 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Geringere topographieabhängige Unregelmäßigkeiten während der Strukturierung zweier unterschiedlicher verspannungsinduzierender Schichten in der Kontaktebene eines Halbleiterbauelements
US8017997B2 (en) * 2008-12-29 2011-09-13 International Business Machines Corporation Vertical metal-insulator-metal (MIM) capacitor using gate stack, gate spacer and contact via
CN102214575A (zh) * 2010-04-02 2011-10-12 中芯国际集成电路制造(上海)有限公司 Mos晶体管的制作方法
US8404534B2 (en) * 2011-02-11 2013-03-26 Shiang-Bau Wang End-to-end gap fill using dielectric film
US8969922B2 (en) * 2012-02-08 2015-03-03 Taiwan Semiconductor Manufacturing Company, Ltd. Field effect transistors and method of forming the same
US9685535B1 (en) 2016-09-09 2017-06-20 International Business Machines Corporation Conductive contacts in semiconductor on insulator substrate
CN108987261B (zh) * 2017-06-01 2022-05-17 联华电子股份有限公司 半导体结构及其制造方法
CN109148371A (zh) * 2017-06-16 2019-01-04 台湾积体电路制造股份有限公司 半导体装置及其制造方法
CN109300838A (zh) * 2017-07-25 2019-02-01 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
CN107437508A (zh) * 2017-09-13 2017-12-05 上海华力微电子有限公司 场效应晶体管及其形成方法
US11289604B2 (en) * 2019-08-02 2022-03-29 United Microelectronics Corp. Method for fabricating a semiconductor device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6156598A (en) * 1999-12-13 2000-12-05 Chartered Semiconductor Manufacturing Ltd. Method for forming a lightly doped source and drain structure using an L-shaped spacer
US6849546B1 (en) 2003-11-04 2005-02-01 Taiwan Semiconductor Manufacturing Co. Method for improving interlevel dielectric gap filling over semiconductor structures having high aspect ratios
US6849549B1 (en) * 2003-12-04 2005-02-01 Taiwan Semiconductor Manufacturing Co., Ltd Method for forming dummy structures for improved CMP and reduced capacitance
US7220630B2 (en) * 2004-05-21 2007-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Method for selectively forming strained etch stop layers to improve FET charge carrier mobility
US7432553B2 (en) * 2005-01-19 2008-10-07 International Business Machines Corporation Structure and method to optimize strain in CMOSFETs

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI467701B (zh) * 2007-10-31 2015-01-01 Advanced Micro Devices Inc 在半導體裝置的接觸層堆疊中藉由連續提供高應力蝕刻停止材料與層間介電質而成的應力轉移

Also Published As

Publication number Publication date
US20070235823A1 (en) 2007-10-11
CN100505263C (zh) 2009-06-24
TWI328876B (en) 2010-08-11
CN101047182A (zh) 2007-10-03
US7378308B2 (en) 2008-05-27

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