TW200737341A - Dry etching method - Google Patents

Dry etching method

Info

Publication number
TW200737341A
TW200737341A TW095130464A TW95130464A TW200737341A TW 200737341 A TW200737341 A TW 200737341A TW 095130464 A TW095130464 A TW 095130464A TW 95130464 A TW95130464 A TW 95130464A TW 200737341 A TW200737341 A TW 200737341A
Authority
TW
Taiwan
Prior art keywords
gas
overetching
dry etching
etching method
provides
Prior art date
Application number
TW095130464A
Other languages
English (en)
Other versions
TWI360176B (zh
Inventor
Kenichi Kuwabara
Satoshi Une
Tomoyoshi Ichimaru
Masamichi Sakaguchi
Naoki Yasui
Original Assignee
Hitachi High Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi High Tech Corp filed Critical Hitachi High Tech Corp
Publication of TW200737341A publication Critical patent/TW200737341A/zh
Application granted granted Critical
Publication of TWI360176B publication Critical patent/TWI360176B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Plasma & Fusion (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW095130464A 2006-03-17 2006-08-18 Dry etching method TW200737341A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006074020A JP4865373B2 (ja) 2006-03-17 2006-03-17 ドライエッチング方法

Publications (2)

Publication Number Publication Date
TW200737341A true TW200737341A (en) 2007-10-01
TWI360176B TWI360176B (zh) 2012-03-11

Family

ID=38518454

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095130464A TW200737341A (en) 2006-03-17 2006-08-18 Dry etching method

Country Status (4)

Country Link
US (1) US20070218696A1 (zh)
JP (1) JP4865373B2 (zh)
KR (1) KR100848362B1 (zh)
TW (1) TW200737341A (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5250476B2 (ja) * 2009-05-11 2013-07-31 株式会社日立ハイテクノロジーズ ドライエッチング方法
CN102376553B (zh) * 2010-08-05 2013-06-12 中芯国际集成电路制造(上海)有限公司 一种栅极刻蚀方法
KR101623654B1 (ko) * 2014-11-25 2016-05-23 아주대학교산학협력단 플라즈마 가스를 사용한 실리콘 기판 식각방법

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4855017A (en) * 1985-05-03 1989-08-08 Texas Instruments Incorporated Trench etch process for a single-wafer RIE dry etch reactor
US5208180A (en) * 1992-03-04 1993-05-04 Micron Technology, Inc. Method of forming a capacitor
US5439833A (en) * 1994-03-15 1995-08-08 National Semiconductor Corp. Method of making truly complementary and self-aligned bipolar and CMOS transistor structures with minimized base and gate resistances and parasitic capacitance
JPH08115900A (ja) * 1994-10-18 1996-05-07 Sony Corp シリコン系材料層のパターニング方法
JP3371180B2 (ja) * 1995-06-09 2003-01-27 ソニー株式会社 配線形成方法
KR100230981B1 (ko) * 1996-05-08 1999-11-15 김광호 반도체장치 제조공정의 플라즈마 식각 방법
US6479373B2 (en) * 1997-02-20 2002-11-12 Infineon Technologies Ag Method of structuring layers with a polysilicon layer and an overlying metal or metal silicide layer using a three step etching process with fluorine, chlorine, bromine containing gases
US6322714B1 (en) * 1997-11-12 2001-11-27 Applied Materials Inc. Process for etching silicon-containing material on substrates
US6635185B2 (en) * 1997-12-31 2003-10-21 Alliedsignal Inc. Method of etching and cleaning using fluorinated carbonyl compounds
US6074952A (en) * 1998-05-07 2000-06-13 Vanguard International Semiconductor Corporation Method for forming multi-level contacts
US6143611A (en) * 1998-07-30 2000-11-07 Micron Technology, Inc. Semiconductor processing methods, methods of forming electronic components, and transistors
JP2000252259A (ja) * 1999-02-25 2000-09-14 Sony Corp ドライエッチング方法及び半導体装置の製造方法
US6583065B1 (en) * 1999-08-03 2003-06-24 Applied Materials Inc. Sidewall polymer forming gas additives for etching processes
US6235643B1 (en) * 1999-08-10 2001-05-22 Applied Materials, Inc. Method for etching a trench having rounded top and bottom corners in a silicon substrate
US6261967B1 (en) * 2000-02-09 2001-07-17 Infineon Technologies North America Corp. Easy to remove hard mask layer for semiconductor device fabrication
JP2001237415A (ja) * 2000-02-21 2001-08-31 Nec Corp 半導体装置の製造方法
US6670278B2 (en) * 2001-03-30 2003-12-30 Lam Research Corporation Method of plasma etching of silicon carbide
JP2003077838A (ja) * 2001-08-30 2003-03-14 Toshiba Corp 半導体製造装置のドライクリーニング時期判定システム、半導体製造装置のドライクリーニング方法、半導体製造装置のドライクリーニングシステム及び半導体装置の製造方法
US6528418B1 (en) * 2001-09-20 2003-03-04 Hynix Semiconductor Inc. Manufacturing method for semiconductor device
US6921723B1 (en) * 2002-04-23 2005-07-26 Applied Materials, Inc. Etching method having high silicon-to-photoresist selectivity
US6716570B2 (en) * 2002-05-23 2004-04-06 Institute Of Microelectronics Low temperature resist trimming process
US20040018739A1 (en) * 2002-07-26 2004-01-29 Applied Materials, Inc. Methods for etching using building blocks
US7141505B2 (en) * 2003-06-27 2006-11-28 Lam Research Corporation Method for bilayer resist plasma etch
US7344965B2 (en) * 2003-12-10 2008-03-18 International Business Machines Corporation Method of etching dual pre-doped polysilicon gate stacks using carbon-containing gaseous additions
US7012027B2 (en) * 2004-01-27 2006-03-14 Taiwan Semiconductor Manufacturing Company, Ltd. Zirconium oxide and hafnium oxide etching using halogen containing chemicals
JP4723871B2 (ja) * 2004-06-23 2011-07-13 株式会社日立ハイテクノロジーズ ドライエッチング装置
US7109085B2 (en) * 2005-01-11 2006-09-19 Taiwan Semiconductor Manufacturing Co., Ltd. Etching process to avoid polysilicon notching

Also Published As

Publication number Publication date
JP2007250940A (ja) 2007-09-27
JP4865373B2 (ja) 2012-02-01
TWI360176B (zh) 2012-03-11
KR20070094434A (ko) 2007-09-20
US20070218696A1 (en) 2007-09-20
KR100848362B1 (ko) 2008-07-24

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees