TW200726092A - PLL apparatus with power saving mode and method for implementing the same - Google Patents

PLL apparatus with power saving mode and method for implementing the same

Info

Publication number
TW200726092A
TW200726092A TW095137222A TW95137222A TW200726092A TW 200726092 A TW200726092 A TW 200726092A TW 095137222 A TW095137222 A TW 095137222A TW 95137222 A TW95137222 A TW 95137222A TW 200726092 A TW200726092 A TW 200726092A
Authority
TW
Taiwan
Prior art keywords
power saving
loop filter
implementing
saving mode
voltage
Prior art date
Application number
TW095137222A
Other languages
English (en)
Inventor
Shang-Ping Chen
Tse-Hsiang Hsu
Original Assignee
Mediatek Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mediatek Inc filed Critical Mediatek Inc
Publication of TW200726092A publication Critical patent/TW200726092A/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/0802—Details of the phase-locked loop the loop being adapted for reducing power consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
TW095137222A 2005-12-29 2006-10-05 PLL apparatus with power saving mode and method for implementing the same TW200726092A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/321,921 US20070153949A1 (en) 2005-12-29 2005-12-29 PLL apparatus with power saving mode and method for implementing the same

Publications (1)

Publication Number Publication Date
TW200726092A true TW200726092A (en) 2007-07-01

Family

ID=38214518

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095137222A TW200726092A (en) 2005-12-29 2006-10-05 PLL apparatus with power saving mode and method for implementing the same

Country Status (3)

Country Link
US (1) US20070153949A1 (zh)
CN (1) CN1992528B (zh)
TW (1) TW200726092A (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7929648B2 (en) * 2006-03-31 2011-04-19 Ati Technologies Inc. Clock error detection apparatus and method
US7830212B2 (en) 2007-07-30 2010-11-09 Mediatek Inc. Phase locked loop, voltage controlled oscillator, and phase-frequency detector
US7612589B2 (en) * 2007-10-12 2009-11-03 Mediatek Inc. Phase-locked loop and control method utilizing the same
US9605995B2 (en) 2013-11-08 2017-03-28 Apple Inc. Wobble detection via software defined phase-lock loops

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5128632A (en) * 1991-05-16 1992-07-07 Motorola, Inc. Adaptive lock time controller for a frequency synthesizer and method therefor
WO1993005578A1 (en) * 1991-08-30 1993-03-18 Fujitsu Limited Frequency synthesizer
JPH0613898A (ja) * 1992-06-29 1994-01-21 Nec Corp 周波数シンセサイザ
US5548249A (en) * 1994-05-24 1996-08-20 Matsushita Electric Industrial Co., Ltd. Clock generator and method for generating a clock
US5864572A (en) * 1996-08-26 1999-01-26 Sun Microsystems, Inc. Oscillator runaway detect and reset circuit for PLL clock generator
US5949261A (en) * 1996-12-17 1999-09-07 Cypress Semiconductor Corp. Method and circuit for reducing power and/or current consumption
JPH10224212A (ja) * 1997-02-05 1998-08-21 Mitsubishi Electric Corp フェイズロックループ回路
JPH10308667A (ja) * 1997-05-02 1998-11-17 Nec Corp Ｐｌｌ周波数シンセサイザ
US5978425A (en) * 1997-05-23 1999-11-02 Hitachi Micro Systems, Inc. Hybrid phase-locked loop employing analog and digital loop filters
US9455722B2 (en) * 2005-11-30 2016-09-27 Ati Technologies Ulc Method and apparatus for fast locking of a clock generating circuit

Also Published As

Publication number Publication date
CN1992528A (zh) 2007-07-04
CN1992528B (zh) 2011-04-20
US20070153949A1 (en) 2007-07-05

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