TW200618152A - Method and apparatus for producing co-planar bonding pads on a substrate - Google Patents

Method and apparatus for producing co-planar bonding pads on a substrate

Info

Publication number
TW200618152A
TW200618152A TW094125589A TW94125589A TW200618152A TW 200618152 A TW200618152 A TW 200618152A TW 094125589 A TW094125589 A TW 094125589A TW 94125589 A TW94125589 A TW 94125589A TW 200618152 A TW200618152 A TW 200618152A
Authority
TW
Taiwan
Prior art keywords
bonding pads
substrate
producing
planar
planar bonding
Prior art date
Application number
TW094125589A
Other languages
English (en)
Inventor
Edward L Malantonio
Edward Laurent
Ilan Hanoon
Original Assignee
K&S Interconnect Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by K&S Interconnect Inc filed Critical K&S Interconnect Inc
Publication of TW200618152A publication Critical patent/TW200618152A/zh

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/0735Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card arranged on a flexible frame or film
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R3/00Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments, e.g. of probe tips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/06711Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2889Interfaces, e.g. between probe and tester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/118Post-treatment of the bump connector
    • H01L2224/1183Reworking, e.g. shaping
    • H01L2224/1184Reworking, e.g. shaping involving a mechanical process, e.g. planarising the bump connector

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Measuring Leads Or Probes (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
TW094125589A 2004-07-28 2005-07-28 Method and apparatus for producing co-planar bonding pads on a substrate TW200618152A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US59182804P 2004-07-28 2004-07-28

Publications (1)

Publication Number Publication Date
TW200618152A true TW200618152A (en) 2006-06-01

Family

ID=35124721

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094125589A TW200618152A (en) 2004-07-28 2005-07-28 Method and apparatus for producing co-planar bonding pads on a substrate

Country Status (7)

Country Link
US (1) US7393773B2 (zh)
EP (1) EP1774583A2 (zh)
JP (1) JP2008508519A (zh)
KR (1) KR20070083514A (zh)
CN (1) CN101002311A (zh)
TW (1) TW200618152A (zh)
WO (1) WO2006014894A2 (zh)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006091454A1 (en) * 2005-02-24 2006-08-31 Sv Probe Pte Ltd. Probes for a wafer test apparatus
KR100716434B1 (ko) * 2006-04-17 2007-05-10 주식회사 파이컴 프로브 본딩 방법 및 프로브 카드 제조 방법
US7608484B2 (en) * 2006-10-31 2009-10-27 Texas Instruments Incorporated Non-pull back pad package with an additional solder standoff
KR100703044B1 (ko) * 2007-01-12 2007-04-09 (주)에이펙스 검사용 프로브 카드 및 그 제조 방법
US7803693B2 (en) * 2007-02-15 2010-09-28 John Trezza Bowed wafer hybridization compensation
US7779593B2 (en) * 2007-03-21 2010-08-24 Chicago Metallic Corporation Wall angle with pre-punched locating tabs
KR100920228B1 (ko) * 2007-11-21 2009-10-05 삼성전기주식회사 열가소성 수지를 이용한 프로브 카드
US8505805B2 (en) * 2008-10-09 2013-08-13 Honeywell International Inc. Systems and methods for platinum ball bonding
KR101378012B1 (ko) 2012-03-14 2014-03-24 삼성전자주식회사 멀티 어레이형 초음파 프로브 장치 및 멀티 어레이형 초음파 프로브 장치의 제조 방법
WO2016044786A1 (en) * 2014-09-19 2016-03-24 Celadon Systems, Inc. Probe card with stress relieving feature
US20170023617A1 (en) * 2015-06-10 2017-01-26 Translarity, Inc. Shaping of contact structures for semiconductor test, and associated systems and methods
JP6683920B2 (ja) * 2016-02-24 2020-04-22 富士通株式会社 並列処理装置、電力係数算出プログラムおよび電力係数算出方法
US10001508B2 (en) * 2016-06-17 2018-06-19 International Business Machines Corporation Integrated self-coining probe
CN206832861U (zh) * 2017-07-06 2018-01-02 合肥鑫晟光电科技有限公司 测试探针及印刷电路板测试装置
US20220359456A1 (en) * 2021-05-10 2022-11-10 Ap Memory Technology Corporation Semiconductor structure and methods for bonding tested wafers and testing pre-bonded wafers

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5663654A (en) * 1990-08-29 1997-09-02 Micron Technology, Inc. Universal wafer carrier for wafer level die burn-in
US5559054A (en) * 1994-12-23 1996-09-24 Motorola, Inc. Method for ball bumping a semiconductor device
US5765744A (en) 1995-07-11 1998-06-16 Nippon Steel Corporation Production of small metal bumps
US6483328B1 (en) * 1995-11-09 2002-11-19 Formfactor, Inc. Probe card for probing wafers with raised contact elements
US6880245B2 (en) * 1996-03-12 2005-04-19 International Business Machines Corporation Method for fabricating a structure for making contact with an IC device
US5929521A (en) * 1997-03-26 1999-07-27 Micron Technology, Inc. Projected contact structure for bumped semiconductor device and resulting articles and assemblies
JPH1145954A (ja) * 1997-07-28 1999-02-16 Hitachi Ltd フリップチップ接続方法、フリップチップ接続構造体およびそれを用いた電子機器
JPH11326379A (ja) * 1998-03-12 1999-11-26 Fujitsu Ltd 電子部品用コンタクタ及びその製造方法及びコンタクタ製造装置
JP2000133672A (ja) * 1998-10-28 2000-05-12 Seiko Epson Corp 半導体装置及びその製造方法、回路基板並びに電子機器
JP2000150560A (ja) * 1998-11-13 2000-05-30 Seiko Epson Corp バンプ形成方法及びバンプ形成用ボンディングツール、半導体ウエーハ、半導体チップ及び半導体装置並びにこれらの製造方法、回路基板並びに電子機器
US6527163B1 (en) * 2000-01-21 2003-03-04 Tessera, Inc. Methods of making bondable contacts and a tool for making such contacts
US6523255B2 (en) * 2001-06-21 2003-02-25 International Business Machines Corporation Process and structure to repair damaged probes mounted on a space transformer
US6849935B2 (en) * 2002-05-10 2005-02-01 Sarnoff Corporation Low-cost circuit board materials and processes for area array electrical interconnections over a large area between a device and the circuit board
JP4291209B2 (ja) * 2004-05-20 2009-07-08 エルピーダメモリ株式会社 半導体装置の製造方法
JP4264388B2 (ja) * 2004-07-01 2009-05-13 富士通株式会社 半導体チップの接合方法および接合装置

Also Published As

Publication number Publication date
JP2008508519A (ja) 2008-03-21
WO2006014894A3 (en) 2006-05-04
CN101002311A (zh) 2007-07-18
KR20070083514A (ko) 2007-08-24
EP1774583A2 (en) 2007-04-18
WO2006014894A2 (en) 2006-02-09
US20060022690A1 (en) 2006-02-02
US7393773B2 (en) 2008-07-01

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