TW200616331A - Voltage tolerant structure for I/O cells - Google Patents
Voltage tolerant structure for I/O cellsInfo
- Publication number
- TW200616331A TW200616331A TW094132386A TW94132386A TW200616331A TW 200616331 A TW200616331 A TW 200616331A TW 094132386 A TW094132386 A TW 094132386A TW 94132386 A TW94132386 A TW 94132386A TW 200616331 A TW200616331 A TW 200616331A
- Authority
- TW
- Taiwan
- Prior art keywords
- transistor
- pmos pull
- input
- coupled
- voltage
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0410264A FR2875950B1 (fr) | 2004-09-28 | 2004-09-28 | Structure tolerante a la tension pour des cellules d'entree/ sortie |
US11/028,934 US7180331B2 (en) | 2004-09-28 | 2005-01-03 | Voltage tolerant structure for I/O cells |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200616331A true TW200616331A (en) | 2006-05-16 |
Family
ID=34950107
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094132386A TW200616331A (en) | 2004-09-28 | 2005-09-20 | Voltage tolerant structure for I/O cells |
Country Status (3)
Country | Link |
---|---|
US (1) | US7180331B2 (zh) |
FR (1) | FR2875950B1 (zh) |
TW (1) | TW200616331A (zh) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7742265B2 (en) * | 2005-06-06 | 2010-06-22 | Standard Microsystems Corporation | High voltage power supply clamp circuitry for electrostatic discharge (ESD) protection |
US7907003B2 (en) * | 2009-01-14 | 2011-03-15 | Standard Microsystems Corporation | Method for improving power-supply rejection |
GB2469636B8 (en) * | 2009-04-20 | 2017-08-02 | Advanced Risc Mach Ltd | Protecting lower voltage domain devices during operation in a higher voltage domain |
US8902554B1 (en) * | 2013-06-12 | 2014-12-02 | Cypress Semiconductor Corporation | Over-voltage tolerant circuit and method |
US9484911B2 (en) | 2015-02-25 | 2016-11-01 | Qualcomm Incorporated | Output driver with back-powering prevention |
US10090838B2 (en) * | 2015-09-30 | 2018-10-02 | Silicon Laboratories Inc. | Over voltage tolerant circuit |
CN107147388B (zh) * | 2017-04-21 | 2020-10-16 | 北京时代民芯科技有限公司 | 一种低潜通cmos三态输出电路 |
TWI685196B (zh) * | 2019-01-24 | 2020-02-11 | 瑞昱半導體股份有限公司 | 切換裝置與漏電控制方法 |
US11575259B2 (en) * | 2021-07-08 | 2023-02-07 | Qualcomm Incorporated | Interface circuit with robust electrostatic discharge |
US20230098179A1 (en) * | 2021-09-29 | 2023-03-30 | Texas Instruments Incorporated | Reducing back powering in i/o circuits |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0766710A (ja) * | 1993-08-26 | 1995-03-10 | Hitachi Ltd | 入出力バッファ回路 |
US5723987A (en) * | 1996-06-06 | 1998-03-03 | Intel Corporation | Level shifting output buffer with p channel pulldown transistors which are bypassed |
US6194923B1 (en) * | 1996-10-08 | 2001-02-27 | Nvidia Corporation | Five volt tolerant output driver |
US5952848A (en) * | 1997-03-14 | 1999-09-14 | Lucent Technologies Inc. | High-voltage tolerant input buffer in low-voltage technology |
US5926056A (en) * | 1998-01-12 | 1999-07-20 | Lucent Technologies Inc. | Voltage tolerant output buffer |
US6150843A (en) * | 1998-01-29 | 2000-11-21 | Vlsi Technology, Inc. | Five volt tolerant I/O buffer |
US6130556A (en) * | 1998-06-16 | 2000-10-10 | Lsi Logic Corporation | Integrated circuit I/O buffer with 5V well and passive gate voltage |
US6144221A (en) | 1998-07-02 | 2000-11-07 | Seiko Epson Corporation | Voltage tolerant interface circuit |
US6388475B1 (en) | 1999-12-29 | 2002-05-14 | Intle Corporation | Voltage tolerant high drive pull-up driver for an I/O buffer |
GB2374475B (en) | 2000-12-15 | 2005-05-11 | Micron Technology Inc | Input-output buffer circuit and method for avoiding inadvertent conduction of a pull-up transistor |
US6714043B1 (en) * | 2002-05-16 | 2004-03-30 | Lattice Semiconductor Corporation | Output buffer having programmable drive current and output voltage limits |
-
2004
- 2004-09-28 FR FR0410264A patent/FR2875950B1/fr not_active Expired - Fee Related
-
2005
- 2005-01-03 US US11/028,934 patent/US7180331B2/en not_active Expired - Fee Related
- 2005-09-20 TW TW094132386A patent/TW200616331A/zh unknown
Also Published As
Publication number | Publication date |
---|---|
FR2875950B1 (fr) | 2008-04-04 |
US20060066355A1 (en) | 2006-03-30 |
FR2875950A1 (fr) | 2006-03-31 |
US7180331B2 (en) | 2007-02-20 |
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