TW200614396A - Bumping process and structure thereof - Google Patents

Bumping process and structure thereof

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Publication number
TW200614396A
TW200614396A TW093132122A TW93132122A TW200614396A TW 200614396 A TW200614396 A TW 200614396A TW 093132122 A TW093132122 A TW 093132122A TW 93132122 A TW93132122 A TW 93132122A TW 200614396 A TW200614396 A TW 200614396A
Authority
TW
Taiwan
Prior art keywords
photo
opening
forming
resist layer
copper pillar
Prior art date
Application number
TW093132122A
Other languages
English (en)
Other versions
TWI242253B (en
Inventor
Min-Lung Huang
Yi-Hsin Chen
Jia-Bin Chen
Original Assignee
Advanced Semiconductor Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Priority to TW093132122A priority Critical patent/TWI242253B/zh
Priority to US11/229,547 priority patent/US20060088992A1/en
Application granted granted Critical
Publication of TWI242253B publication Critical patent/TWI242253B/zh
Publication of TW200614396A publication Critical patent/TW200614396A/zh

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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

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TW093132122A 2004-10-22 2004-10-22 Bumping process and structure thereof TWI242253B (en)

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TWI254995B (en) * 2004-01-30 2006-05-11 Phoenix Prec Technology Corp Presolder structure formed on semiconductor package substrate and method for fabricating the same
TWI307613B (en) * 2005-03-29 2009-03-11 Phoenix Prec Technology Corp Circuit board formed conductor structure method for fabrication
DE102009010885B4 (de) * 2009-02-27 2014-12-31 Advanced Micro Devices, Inc. Metallisierungssystem eines Halbleiterbauelements mit Metallsäulen mit einem kleineren Durchmesser an der Unterseite und Herstellungsverfahren dafür
US9035459B2 (en) 2009-04-10 2015-05-19 International Business Machines Corporation Structures for improving current carrying capability of interconnects and methods of fabricating the same
US9627254B2 (en) * 2009-07-02 2017-04-18 Flipchip International, Llc Method for building vertical pillar interconnect
US8637392B2 (en) * 2010-02-05 2014-01-28 International Business Machines Corporation Solder interconnect with non-wettable sidewall pillars and methods of manufacture
US8492892B2 (en) 2010-12-08 2013-07-23 International Business Machines Corporation Solder bump connections
US9324557B2 (en) * 2014-03-14 2016-04-26 Avago Technologies General Ip (Singapore) Pte. Ltd. Method for fabricating equal height metal pillars of different diameters
US9859213B2 (en) * 2015-12-07 2018-01-02 Dyi-chung Hu Metal via structure
JP6713809B2 (ja) * 2016-03-31 2020-06-24 株式会社荏原製作所 基板の製造方法及び基板
US10636758B2 (en) 2017-10-05 2020-04-28 Texas Instruments Incorporated Expanded head pillar for bump bonds
US11164845B2 (en) * 2020-01-30 2021-11-02 International Business Machines Corporation Resist structure for forming bumps
US11901307B2 (en) * 2020-03-30 2024-02-13 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device including electromagnetic interference (EMI) shielding and method of manufacture
CN113053866A (zh) * 2020-03-30 2021-06-29 台湾积体电路制造股份有限公司 半导体器件及其制造方法
CN111540721A (zh) * 2020-06-23 2020-08-14 甬矽电子(宁波)股份有限公司 凸块封装结构和凸块封装结构的制作方法

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CN1236489C (zh) * 1998-03-27 2006-01-11 精工爱普生株式会社 半导体装置及其制造方法、电路基板和电子装置
US6638847B1 (en) * 2000-04-19 2003-10-28 Advanced Interconnect Technology Ltd. Method of forming lead-free bump interconnections
JP2002134545A (ja) * 2000-10-26 2002-05-10 Oki Electric Ind Co Ltd 半導体集積回路チップ及び基板、並びにその製造方法
JP3989869B2 (ja) * 2003-04-14 2007-10-10 沖電気工業株式会社 半導体装置及びその製造方法

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