TW200607030A - Process for protecting solder joints and structure for alleviating electromigration and joule heating in solder joints - Google Patents

Process for protecting solder joints and structure for alleviating electromigration and joule heating in solder joints

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Publication number
TW200607030A
TW200607030A TW093123344A TW93123344A TW200607030A TW 200607030 A TW200607030 A TW 200607030A TW 093123344 A TW093123344 A TW 093123344A TW 93123344 A TW93123344 A TW 93123344A TW 200607030 A TW200607030 A TW 200607030A
Authority
TW
Taiwan
Prior art keywords
solder joints
electromigration
joule heating
protecting
alleviating
Prior art date
Application number
TW093123344A
Other languages
English (en)
Inventor
Zhi Chen
Chang-Ching Ye
King-Ning Tu
Original Assignee
Univ Nat Chiao Tung
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Nat Chiao Tung filed Critical Univ Nat Chiao Tung
Priority to TW093123344A priority Critical patent/TW200607030A/zh
Priority to US11/068,255 priority patent/US20060027933A1/en
Publication of TW200607030A publication Critical patent/TW200607030A/zh

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    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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    • H01L2924/049Nitrides composed of metals from groups of the periodic table
    • H01L2924/04944th Group
    • H01L2924/04941TiN
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049Nitrides composed of metals from groups of the periodic table
    • H01L2924/04955th Group
    • H01L2924/04953TaN
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
TW093123344A 2004-08-04 2004-08-04 Process for protecting solder joints and structure for alleviating electromigration and joule heating in solder joints TW200607030A (en)

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TW093123344A TW200607030A (en) 2004-08-04 2004-08-04 Process for protecting solder joints and structure for alleviating electromigration and joule heating in solder joints
US11/068,255 US20060027933A1 (en) 2004-08-04 2005-02-28 Process for protecting solder joints and structure for alleviating electromigration and joule heating in solder joints

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US7947978B2 (en) * 2005-12-05 2011-05-24 Megica Corporation Semiconductor chip with bond area
US7262603B1 (en) * 2006-06-28 2007-08-28 Lenovo (Singapore) Pte. Ltd System and method for sensing the formation of tin whiskers
US7812448B2 (en) * 2006-08-07 2010-10-12 Freescale Semiconductor, Inc. Electronic device including a conductive stud over a bonding pad region
KR100857365B1 (ko) * 2007-02-28 2008-09-05 주식회사 네패스 반도체 장치의 범프 구조물
US20090140401A1 (en) * 2007-11-30 2009-06-04 Stanley Craig Beddingfield System and Method for Improving Reliability of Integrated Circuit Packages
US8022543B2 (en) * 2008-03-25 2011-09-20 International Business Machines Corporation Underbump metallurgy for enhanced electromigration resistance
US7968975B2 (en) 2008-08-08 2011-06-28 International Business Machines Corporation Metal wiring structure for integration with through substrate vias
KR20100079183A (ko) * 2008-12-30 2010-07-08 주식회사 동부하이텍 반도체 패키지 장치와 그 제조 방법
TWI397983B (zh) * 2008-12-31 2013-06-01 Ind Tech Res Inst 封裝載板與接合結構
JP5316261B2 (ja) * 2009-06-30 2013-10-16 富士通株式会社 マルチチップモジュールおよびプリント基板ユニット並びに電子機器
US8581420B2 (en) 2010-10-18 2013-11-12 Taiwan Semiconductor Manufacturing Company, Ltd. Under-bump metallization (UBM) structure and method of forming the same
US9159687B2 (en) * 2012-07-31 2015-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Solder bump for ball grid array
US11444048B2 (en) * 2017-10-05 2022-09-13 Texas Instruments Incorporated Shaped interconnect bumps in semiconductor devices
US11233024B2 (en) * 2019-12-23 2022-01-25 Micron Technology, Inc. Methods for forming substrate terminal pads, related terminal pads and substrates and assemblies incorporating such terminal pads

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US6593649B1 (en) * 2001-05-17 2003-07-15 Megic Corporation Methods of IC rerouting option for multiple package system applications
US6586322B1 (en) * 2001-12-21 2003-07-01 Taiwan Semiconductor Manufacturing Co., Ltd. Method of making a bump on a substrate using multiple photoresist layers
US7410833B2 (en) * 2004-03-31 2008-08-12 International Business Machines Corporation Interconnections for flip-chip using lead-free solders and having reaction barrier layers

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9024441B2 (en) 2011-12-30 2015-05-05 Industrial Technology Research Institute Bump structure and electronic packaging solder joint structure and fabricating method thereof

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