TW200606615A - System and method for generating a jittered test signal - Google Patents

System and method for generating a jittered test signal

Info

Publication number
TW200606615A
TW200606615A TW094114225A TW94114225A TW200606615A TW 200606615 A TW200606615 A TW 200606615A TW 094114225 A TW094114225 A TW 094114225A TW 94114225 A TW94114225 A TW 94114225A TW 200606615 A TW200606615 A TW 200606615A
Authority
TW
Taiwan
Prior art keywords
speed
signal
jittered
jitter
full
Prior art date
Application number
TW094114225A
Other languages
English (en)
Other versions
TWI307460B (en
Inventor
Mohamed M Hafed
Geoffrey D Duerden
Gordon W Roberts
Original Assignee
Dft Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dft Microsystems Inc filed Critical Dft Microsystems Inc
Publication of TW200606615A publication Critical patent/TW200606615A/zh
Application granted granted Critical
Publication of TWI307460B publication Critical patent/TWI307460B/zh

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/46—Monitoring; Testing
    • H04B3/462—Testing group delay or phase shift, e.g. timing jitter
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31708—Analysis of signal quality
    • G01R31/31709—Jitter measurements; Jitter generators
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31725—Timing aspects, e.g. clock distribution, skew, propagation delay
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Nonlinear Science (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Manipulation Of Pulses (AREA)
TW094114225A 2004-05-03 2005-05-03 System, method and integrated circuit chip for generating a jittered test signal and a system and method for functional circuitry testing TWI307460B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US56810204P 2004-05-03 2004-05-03
US11/114,572 US7315574B2 (en) 2004-05-03 2005-04-26 System and method for generating a jittered test signal

Publications (2)

Publication Number Publication Date
TW200606615A true TW200606615A (en) 2006-02-16
TWI307460B TWI307460B (en) 2009-03-11

Family

ID=35320924

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094114225A TWI307460B (en) 2004-05-03 2005-05-03 System, method and integrated circuit chip for generating a jittered test signal and a system and method for functional circuitry testing

Country Status (6)

Country Link
US (1) US7315574B2 (zh)
EP (1) EP1747617A4 (zh)
CN (1) CN1985459B (zh)
CA (1) CA2564351A1 (zh)
TW (1) TWI307460B (zh)
WO (1) WO2005109666A2 (zh)

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EP1610137B1 (en) * 2004-06-24 2009-05-20 Verigy (Singapore) Pte. Ltd. Per-pin clock synthesis
US8327204B2 (en) 2005-10-27 2012-12-04 Dft Microsystems, Inc. High-speed transceiver tester incorporating jitter injection
US7596173B2 (en) * 2005-10-28 2009-09-29 Advantest Corporation Test apparatus, clock generator and electronic device
US7809052B2 (en) * 2006-07-27 2010-10-05 Cypress Semiconductor Corporation Test circuit, system, and method for testing one or more circuit components arranged upon a common printed circuit board
US7835479B2 (en) * 2006-10-16 2010-11-16 Advantest Corporation Jitter injection apparatus, jitter injection method, testing apparatus, and communication chip
US20080133175A1 (en) * 2006-12-03 2008-06-05 Lobuono Mark Anthony Test interface for software-based sequence of event recording systems
US7536621B2 (en) * 2006-12-08 2009-05-19 Teradyne, Inc. Quantized data-dependent jitter injection using discrete samples
US7466140B2 (en) * 2006-12-25 2008-12-16 Advantest Corporation Signal generation circuit, jitter injection circuit, semiconductor chip and test apparatus
DE112008001125T5 (de) * 2007-04-24 2010-02-18 Advantest Corp. Prüfgerät und Prüfverfahren
KR101505193B1 (ko) * 2007-06-18 2015-03-23 삼성전자주식회사 직교주파수분할다중접속방식의 이동 통신시스템에서 심볼전송 방법 및 장치
CN102006160B (zh) * 2007-12-24 2013-09-11 瑞昱半导体股份有限公司 用来产生抖动时钟信号的抖动产生器
US7917319B2 (en) 2008-02-06 2011-03-29 Dft Microsystems Inc. Systems and methods for testing and diagnosing delay faults and for parametric testing in digital circuits
US8228972B2 (en) 2008-06-04 2012-07-24 Stmicroelectronics, Inc. SERDES with jitter-based built-in self test (BIST) for adapting FIR filter coefficients
US8014465B2 (en) * 2008-06-10 2011-09-06 Advantest Corporation Digital modulator, digital modulating method, digital transceiver system, and testing apparatus
TWI405079B (zh) * 2009-08-11 2013-08-11 Wistron Corp 電子裝置輸出測試方法、系統及平台
US8310383B2 (en) * 2009-12-30 2012-11-13 Jds Uniphase Corporation Generating a jittered digital signal using a serializer device
US9222972B1 (en) * 2010-09-17 2015-12-29 Altera Corporation On-die jitter generator
CN104205713B (zh) * 2012-03-28 2018-08-17 华为技术有限公司 发射器噪声注入
CN102645628B (zh) * 2012-04-19 2014-01-22 北京航空航天大学 一种数字电路板在线测试的固高固低故障注入电路及方法
US8811458B2 (en) * 2012-10-04 2014-08-19 Qualcomm Incorporated Digitally controlled jitter injection for built in self-testing (BIST)
CN104954044A (zh) * 2014-03-28 2015-09-30 北京大学 一种基于bist的高速串行io接口抖动容限测试方法和电路
DE102015212243A1 (de) * 2015-06-30 2017-01-05 TRUMPF Hüttinger GmbH + Co. KG Vorrichtung zur Erzeugung mehrerer Takt- oder Hochfrequenzsignale
US11131706B2 (en) * 2015-12-08 2021-09-28 International Business Machines Corporation Degradation monitoring of semiconductor chips
US10571501B2 (en) * 2016-03-16 2020-02-25 Intel Corporation Technologies for verifying a de-embedder for interconnect measurement
US10693589B2 (en) * 2018-06-18 2020-06-23 Huawei Technologies Co., Ltd. Serdes with jitter injection self stress mechanism
US10805064B1 (en) * 2019-04-23 2020-10-13 Ciena Corporation Built-in jitter loading and state of polarization generation to characterize optical transceivers
US11528102B1 (en) 2021-08-18 2022-12-13 International Business Machines Corporation Built-in-self-test and characterization of a high speed serial link receiver
US11662381B2 (en) 2021-08-18 2023-05-30 International Business Machines Corporation Self-contained built-in self-test circuit with phase-shifting abilities for high-speed receivers

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EP0345390A1 (en) * 1988-06-08 1989-12-13 Hewlett-Packard Limited Improvement in or Relating to Jitter Circuits
US5903605A (en) 1995-03-30 1999-05-11 Intel Corporation Jitter detection method and apparatus
US5835501A (en) 1996-03-04 1998-11-10 Pmc-Sierra Ltd. Built-in test scheme for a jitter tolerance test of a clock and data recovery unit
JP2950370B2 (ja) 1997-03-27 1999-09-20 日本電気株式会社 Ｐｌｌジッタ測定方法及び集積回路
JPH1138100A (ja) * 1997-07-18 1999-02-12 Advantest Corp 半導体試験装置
DE69801827T2 (de) * 1998-11-14 2002-03-28 Agilent Technologies Inc Taktgenerator
JP4445114B2 (ja) 2000-01-31 2010-04-07 株式会社アドバンテスト ジッタ測定装置及びその方法
US6868504B1 (en) * 2000-08-31 2005-03-15 Micron Technology, Inc. Interleaved delay line for phase locked and delay locked loops
US6594595B2 (en) 2001-04-03 2003-07-15 Advantest Corporation Apparatus for and method of measuring cross-correlation coefficient between signals
JP4216198B2 (ja) 2002-02-26 2009-01-28 株式会社アドバンテスト 測定装置、及び測定方法
US7184469B2 (en) * 2003-02-06 2007-02-27 Verigy Pte. Ltd. Systems and methods for injection of test jitter in data bit-streams
JP4323873B2 (ja) * 2003-06-13 2009-09-02 富士通株式会社 入出力インタフェース回路
US7158899B2 (en) * 2003-09-25 2007-01-02 Logicvision, Inc. Circuit and method for measuring jitter of high speed signals
US7295604B2 (en) * 2003-11-24 2007-11-13 International Business Machines Corporation Method for determining jitter of a signal in a serial link and high speed serial link
US7236555B2 (en) * 2004-01-23 2007-06-26 Sunrise Telecom Incorporated Method and apparatus for measuring jitter
US7242209B2 (en) * 2004-05-03 2007-07-10 Dft Microsystems, Inc. System and method for testing integrated circuits

Also Published As

Publication number Publication date
WO2005109666A2 (en) 2005-11-17
EP1747617A2 (en) 2007-01-31
CA2564351A1 (en) 2005-11-17
EP1747617A4 (en) 2009-05-13
US20050271131A1 (en) 2005-12-08
CN1985459A (zh) 2007-06-20
CN1985459B (zh) 2010-08-11
TWI307460B (en) 2009-03-11
WO2005109666A3 (en) 2006-12-14
US7315574B2 (en) 2008-01-01

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MM4A Annulment or lapse of patent due to non-payment of fees