TW200603255A - Method of manufacturing a semiconductor device and semiconductor device obtained by means of said method - Google Patents

Method of manufacturing a semiconductor device and semiconductor device obtained by means of said method

Info

Publication number
TW200603255A
TW200603255A TW094108401A TW94108401A TW200603255A TW 200603255 A TW200603255 A TW 200603255A TW 094108401 A TW094108401 A TW 094108401A TW 94108401 A TW94108401 A TW 94108401A TW 200603255 A TW200603255 A TW 200603255A
Authority
TW
Taiwan
Prior art keywords
cavity
dielectric layer
semiconductor
semiconductor body
walls
Prior art date
Application number
TW094108401A
Other languages
English (en)
Inventor
Noort Wibo Daniel Van
Eyup Aksen
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Publication of TW200603255A publication Critical patent/TW200603255A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
TW094108401A 2004-03-23 2005-03-18 Method of manufacturing a semiconductor device and semiconductor device obtained by means of said method TW200603255A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP04101185 2004-03-23

Publications (1)

Publication Number Publication Date
TW200603255A true TW200603255A (en) 2006-01-16

Family

ID=34961182

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094108401A TW200603255A (en) 2004-03-23 2005-03-18 Method of manufacturing a semiconductor device and semiconductor device obtained by means of said method

Country Status (7)

Country Link
US (1) US7381656B2 (zh)
EP (1) EP1730771A1 (zh)
JP (1) JP2007531259A (zh)
KR (1) KR20060133024A (zh)
CN (1) CN100505208C (zh)
TW (1) TW200603255A (zh)
WO (1) WO2005093824A1 (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8995921B2 (en) 2004-09-10 2015-03-31 Interdigital Technology Corporation Measurement support for a smart antenna in a wireless communication system
CN101341590B (zh) * 2005-12-22 2011-05-11 Nxp股份有限公司 制造半导体器件的方法
US7919388B2 (en) * 2008-05-30 2011-04-05 Freescale Semiconductor, Inc. Methods for fabricating semiconductor devices having reduced gate-drain capacitance
US7838389B2 (en) * 2008-05-30 2010-11-23 Freescale Semiconductor, Inc. Enclosed void cavity for low dielectric constant insulator
CN102867883B (zh) * 2011-07-08 2015-04-22 茂迪股份有限公司 半导体基材表面结构与形成此表面结构的方法
FR3009887B1 (fr) * 2013-08-20 2015-09-25 Commissariat Energie Atomique Procede ameliore de separation entre une zone active d'un substrat et sa face arriere ou une portion de sa face arriere
DE102017127010B4 (de) * 2017-11-16 2021-12-09 Infineon Technologies Ag Verbundwafer und Verfahren zur Herstellung eines Halbleiterbauelements

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2443122A1 (fr) 1978-11-14 1980-06-27 Commissariat Energie Atomique Dispositif de stockage d'une source de photons et d'irradiation d'un corps par le rayonnement de la source
DE3715232A1 (de) 1987-05-07 1988-11-17 Siemens Ag Verfahren zur substratkontaktierung bei der herstellung von durch isolationsgraeben getrennten bipolartransistorschaltungen
US5576221A (en) * 1993-12-20 1996-11-19 Nec Corporation Manufacturing method of semiconductor device
US5972758A (en) * 1997-12-04 1999-10-26 Intel Corporation Pedestal isolated junction structure and method of manufacture
US6285057B1 (en) * 1999-11-17 2001-09-04 National Semiconductor Corporation Semiconductor device combining a MOSFET structure and a vertical-channel trench-substrate field effect device
US6291310B1 (en) * 1999-11-24 2001-09-18 Fairfield Semiconductor Corporation Method of increasing trench density for semiconductor
US20030045119A1 (en) * 2001-09-06 2003-03-06 Hsiao-Lei Wang Method for forming a bottle-shaped trench
US6727150B2 (en) * 2002-07-26 2004-04-27 Micron Technology, Inc. Methods of forming trench isolation within a semiconductor substrate including, Tshaped trench with spacers
KR100745885B1 (ko) * 2006-07-28 2007-08-02 주식회사 하이닉스반도체 반도체 소자 및 그 제조 방법

Also Published As

Publication number Publication date
US7381656B2 (en) 2008-06-03
US20070197043A1 (en) 2007-08-23
CN100505208C (zh) 2009-06-24
WO2005093824A1 (en) 2005-10-06
CN1934697A (zh) 2007-03-21
JP2007531259A (ja) 2007-11-01
KR20060133024A (ko) 2006-12-22
EP1730771A1 (en) 2006-12-13

Similar Documents

Publication Publication Date Title
TW200603255A (en) Method of manufacturing a semiconductor device and semiconductor device obtained by means of said method
TW200802713A (en) Manufacturing method of semiconductor device
WO2004075248A3 (fr) Procede de revetement d'une surface, fabrication d'interconnexions en microelectronique utilisant ce procede, et circuits integres
TW200616053A (en) A method for making a semiconductor device that includes a metal gate electrode
TW200705541A (en) Manufacturing method of nano-sticker
WO2006028731A3 (en) Multiple-depth sti trenches in integrated circuit fabrication
EP1432032A3 (en) Semiconductor chip stack and method for manufacturing the same
TW365049B (en) Manufacturing method for shallow trench isolation structure
TW200701817A (en) Method for producing polymeric capacitive ultrasonic transducer
WO2005013349A3 (en) Controlled growth of highly uniform, oxide layers, especially ultrathin layers
WO2008091579A3 (en) Memory having a vertical access device
WO2008052762A3 (de) Halbleiteranordnung und verfahren zur herstellung einer halbleiteranordnung
TW200729409A (en) Method for fabricating semiconductor device
TW200623264A (en) A method for forming a thin complete high-permittivity dielectric layer
TW200520219A (en) Manufacturing method for semiconductor device and semiconductor device
TW200710946A (en) Method for manufacturing semiconductor apparatus and the semiconductor apparatus
WO2002101818A3 (en) Method for isolating semiconductor devices
TW200713569A (en) Bottle-shaped trench and method of fabricating the same
TW200729499A (en) Method of forming a semiconductor device
TW200616212A (en) Method for manufacturing thin film integrated circuit
TW200629432A (en) Method of manufacturing a wiring substrate and an electronic instrument
WO2007018875A8 (en) Improved chamber for a microelectromechanical device
ATE501523T1 (de) Selektive bildung einer verbindung, die ein halbleitermaterial und ein metallmaterial in einem substrat enthält, mit hilfe einer germaniumoxydschicht
WO2009038686A3 (en) Hermetic wafer level cavity package
GB2411289B (en) Forming a semiconductor device