WO2009038686A3 - Hermetic wafer level cavity package - Google Patents
Hermetic wafer level cavity package Download PDFInfo
- Publication number
- WO2009038686A3 WO2009038686A3 PCT/US2008/010746 US2008010746W WO2009038686A3 WO 2009038686 A3 WO2009038686 A3 WO 2009038686A3 US 2008010746 W US2008010746 W US 2008010746W WO 2009038686 A3 WO2009038686 A3 WO 2009038686A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- wafer level
- cavity
- container
- cavity package
- level cavity
- Prior art date
Links
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00277—Processes for packaging MEMS devices for maintaining a controlled atmosphere inside of the cavity containing the MEMS
- B81C1/00293—Processes for packaging MEMS devices for maintaining a controlled atmosphere inside of the cavity containing the MEMS maintaining a controlled atmosphere with processes not provided for in B81C1/00285
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2203/00—Forming microstructural systems
- B81C2203/01—Packaging MEMS
- B81C2203/0118—Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2203/00—Forming microstructural systems
- B81C2203/01—Packaging MEMS
- B81C2203/0172—Seals
- B81C2203/019—Seals characterised by the material or arrangement of seals between parts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Casings For Electric Apparatus (AREA)
- Micromachines (AREA)
Abstract
A microelectronic device (100) comprises a device container comprising top and bottom opposing substrates (110,120) spaced apart by support walls (130) forming a cavity (160) therebetween. A top surface (114) of the bottom substrate (110) comprises a plurality of peripheral regions outside of the cavity (160), with at least one peripheral region comprising a plurality of exposed contacts (140). The microelectronic device 100) further comprises a microelectronic element (150) disposed in the cavity of the device container, and a nonporous metal layer (170) overlying at least a portion of the top substrate and support walls of the container. A wafer level process of fabricating the microelectronic device (100) is also disclosed.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US99381907P | 2007-09-14 | 2007-09-14 | |
US60/993,819 | 2007-09-14 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2009038686A2 WO2009038686A2 (en) | 2009-03-26 |
WO2009038686A3 true WO2009038686A3 (en) | 2009-07-09 |
Family
ID=40468682
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2008/010746 WO2009038686A2 (en) | 2007-09-14 | 2008-09-12 | Hermetic wafer level cavity package |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO2009038686A2 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
MX2010011563A (en) | 2008-04-22 | 2010-11-12 | Schering Corp | Phenyl-substituted 2-imino-3-methyl pyrrolo pyrimidinone compounds as bace-1 inhibitors, compositions, and their use. |
WO2012171663A1 (en) * | 2011-06-15 | 2012-12-20 | Eth Zurich | Low-temperature wafer-level packaging and direct electrical interconnection |
US9714166B2 (en) * | 2014-07-16 | 2017-07-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Thin film structure for hermetic sealing |
JP2017181624A (en) * | 2016-03-29 | 2017-10-05 | セイコーエプソン株式会社 | Electro-optical device, electro-optical unit, and electronic apparatus |
WO2020033193A1 (en) * | 2018-08-07 | 2020-02-13 | Corning Incorporated | Hermetically sealed package |
DE102023102349A1 (en) * | 2023-01-31 | 2024-08-01 | Carl Zeiss Smt Gmbh | Method for manufacturing a system with two modules |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004025727A1 (en) * | 2002-09-10 | 2004-03-25 | Frank Niklaus | Method for sealing a microcavity and package comprising at least one microcavity |
US20050263866A1 (en) * | 2004-05-27 | 2005-12-01 | Chang-Fegn Wan | Hermetic pacakging and method of manufacture and use therefore |
US20060043601A1 (en) * | 2002-11-14 | 2006-03-02 | Wolfgang Pahl | Hermetically encapsulated component and waferscale method for the production thereof |
US20060076670A1 (en) * | 2004-10-08 | 2006-04-13 | Lim Ohk K | Micro-electro-mechanical system (MEMS) package having metal sealing member |
EP1741668A2 (en) * | 2005-07-05 | 2007-01-10 | Shinko Electric Industries Co., Ltd. | Method for encasing a MEMS device and packaged device |
-
2008
- 2008-09-12 WO PCT/US2008/010746 patent/WO2009038686A2/en active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004025727A1 (en) * | 2002-09-10 | 2004-03-25 | Frank Niklaus | Method for sealing a microcavity and package comprising at least one microcavity |
US20060043601A1 (en) * | 2002-11-14 | 2006-03-02 | Wolfgang Pahl | Hermetically encapsulated component and waferscale method for the production thereof |
US20050263866A1 (en) * | 2004-05-27 | 2005-12-01 | Chang-Fegn Wan | Hermetic pacakging and method of manufacture and use therefore |
US20060076670A1 (en) * | 2004-10-08 | 2006-04-13 | Lim Ohk K | Micro-electro-mechanical system (MEMS) package having metal sealing member |
EP1741668A2 (en) * | 2005-07-05 | 2007-01-10 | Shinko Electric Industries Co., Ltd. | Method for encasing a MEMS device and packaged device |
Also Published As
Publication number | Publication date |
---|---|
WO2009038686A2 (en) | 2009-03-26 |
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