WO2008052762A3 - Halbleiteranordnung und verfahren zur herstellung einer halbleiteranordnung - Google Patents

Halbleiteranordnung und verfahren zur herstellung einer halbleiteranordnung Download PDF

Info

Publication number
WO2008052762A3
WO2008052762A3 PCT/EP2007/009454 EP2007009454W WO2008052762A3 WO 2008052762 A3 WO2008052762 A3 WO 2008052762A3 EP 2007009454 W EP2007009454 W EP 2007009454W WO 2008052762 A3 WO2008052762 A3 WO 2008052762A3
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor arrangement
fabricating
component layer
substrate
layer
Prior art date
Application number
PCT/EP2007/009454
Other languages
English (en)
French (fr)
Other versions
WO2008052762A2 (de
Inventor
Alida Wuertz
Original Assignee
Atmel Germany Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Germany Gmbh filed Critical Atmel Germany Gmbh
Publication of WO2008052762A2 publication Critical patent/WO2008052762A2/de
Publication of WO2008052762A3 publication Critical patent/WO2008052762A3/de

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00222Integrating an electronic processing unit with a micromechanical structure
    • B81C1/00246Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00Forming microstructural systems
    • B81C2203/07Integrating an electronic processing unit with a micromechanical structure
    • B81C2203/0707Monolithic integration, i.e. the electronic processing unit is formed on or in the same substrate as the micromechanical structure
    • B81C2203/0735Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Micromachines (AREA)
  • Element Separation (AREA)

Abstract

Halbleiteranordnung und Verfahren zur Herstellung einer Halbleiteranordnung: mit einem Substrat (1), mit einer Bauelementeschicht (3) aus einem einkristallinem Halbleitermaterial, mit einer Isolatorschicht (2), die zwischen dem Substrat (1 ) und der Bauelementeschicht (3) ausgebildet ist und die Bauelementeschicht (3) vom Substrat (1) isoliert (SOI), mit einer Anzahl von Bauelementen (140), die in der Bauelementeschicht (3) ausgebildet sind, mit einer Grabenstruktur (13), die an die Isolatorschicht (2) angrenzt und die mit einer Füllung verfüllt ist um zumindest ein Bauelement (140) der Anzahl von Bauelementen (140) innerhalb der Bauelementeschicht (3) in lateraler Richtung zu isolieren, wobei die Füllung ein Dielektrikum aufweist, und mit einer freitragenden Mikrostruktur (150, 250, 350, 450, 550), die in einem durch die Grabenstruktur (13) festgelegten Strukturbereich (151, 251, 351, 451, 551 ) ausgebildet ist.
PCT/EP2007/009454 2006-11-01 2007-10-31 Halbleiteranordnung und verfahren zur herstellung einer halbleiteranordnung WO2008052762A2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US85575006P 2006-11-01 2006-11-01
US60/855,750 2006-11-01
DE102006051597A DE102006051597A1 (de) 2006-11-02 2006-11-02 Halbleiteranordnung und Verfahren zur Herstellung einer Halbleiteranordnung

Publications (2)

Publication Number Publication Date
WO2008052762A2 WO2008052762A2 (de) 2008-05-08
WO2008052762A3 true WO2008052762A3 (de) 2008-07-17

Family

ID=39264755

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2007/009454 WO2008052762A2 (de) 2006-11-01 2007-10-31 Halbleiteranordnung und verfahren zur herstellung einer halbleiteranordnung

Country Status (3)

Country Link
US (1) US20080099860A1 (de)
DE (1) DE102006051597A1 (de)
WO (1) WO2008052762A2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007329295A (ja) * 2006-06-08 2007-12-20 Hitachi Ltd 半導体及びその製造方法
KR100829607B1 (ko) * 2006-10-23 2008-05-14 삼성전자주식회사 전기적-기계적 비휘발성 메모리 장치 및 그 제조 방법
CN101548465B (zh) * 2006-12-05 2012-09-05 明锐有限公司 用于mems振荡器的方法及设备
FR2932790B1 (fr) * 2008-06-23 2010-08-20 Commissariat Energie Atomique Procede de fabrication d'un dispositif electromecanique comprenant au moins un element actif.
US7943410B2 (en) * 2008-12-10 2011-05-17 Stmicroelectronics, Inc. Embedded microelectromechanical systems (MEMS) semiconductor substrate and related method of forming
US8564103B2 (en) * 2009-06-04 2013-10-22 Taiwan Semiconductor Manufacturing Company, Ltd. Method of manufacturing an electronic device
JP2012080165A (ja) * 2010-09-30 2012-04-19 Yamaha Corp コンデンサマイクロホンアレイチップ
US8779534B2 (en) * 2010-11-04 2014-07-15 Meggitt (Orange County), Inc. Low-G MEMS acceleration switch
DE102010062062B4 (de) 2010-11-26 2022-07-28 Robert Bosch Gmbh Verfahren zum Herstellen von MEMS-Strukturen und MEMS-Struktur
CN104541141B (zh) * 2012-02-15 2017-08-18 罗伯特·博世有限公司 具有掺杂电极的压力传感器
US9181086B1 (en) 2012-10-01 2015-11-10 The Research Foundation For The State University Of New York Hinged MEMS diaphragm and method of manufacture therof
DE102013204475A1 (de) * 2013-03-14 2014-09-18 Robert Bosch Gmbh Herstellungsverfahren für ein mikromechanisches Bauelement und entsprechendes mikromechanisches Bauelement
DE102017216835B9 (de) * 2017-09-22 2022-06-30 Infineon Technologies Ag MEMS-Bauelement und Herstellungsverfahren für ein MEMS-Bauelement
CN108566174A (zh) * 2018-04-17 2018-09-21 武汉大学 预设空腔防护墙型薄膜体声波谐振器及制备方法
US11596058B2 (en) * 2019-03-08 2023-02-28 Qorvo Us, Inc. Fiducials for laminate structures
US11575081B2 (en) * 2019-11-26 2023-02-07 Vanguard International Semiconductor Singapore Pte. Ltd. MEMS structures and methods of forming MEMS structures
CN113810009B (zh) * 2021-09-22 2023-03-24 武汉敏声新技术有限公司 薄膜体声波谐振器及其制备方法、薄膜体声波滤波器

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19651269A1 (de) * 1996-06-14 1997-12-18 Mitsubishi Electric Corp Halbleiterbeschleunigungssensor
WO1998057529A1 (en) * 1997-06-13 1998-12-17 The Regents Of The University Of California Microfabricated high aspect ratio device with electrical isolation and interconnections
EP1695937A2 (de) * 2005-02-25 2006-08-30 Hitachi, Ltd. Integriertes mikromechanisches System und dessen Herstellung

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6399516B1 (en) * 1998-10-30 2002-06-04 Massachusetts Institute Of Technology Plasma etch techniques for fabricating silicon structures from a substrate
DE102004043233B4 (de) * 2003-09-10 2014-02-13 Denso Corporation Verfahren zum Herstellen eines beweglichen Abschnitts einer Halbleitervorrichtung
JP4569322B2 (ja) * 2005-03-02 2010-10-27 株式会社デンソー 可動センサ素子

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19651269A1 (de) * 1996-06-14 1997-12-18 Mitsubishi Electric Corp Halbleiterbeschleunigungssensor
WO1998057529A1 (en) * 1997-06-13 1998-12-17 The Regents Of The University Of California Microfabricated high aspect ratio device with electrical isolation and interconnections
EP1695937A2 (de) * 2005-02-25 2006-08-30 Hitachi, Ltd. Integriertes mikromechanisches System und dessen Herstellung

Also Published As

Publication number Publication date
WO2008052762A2 (de) 2008-05-08
US20080099860A1 (en) 2008-05-01
DE102006051597A1 (de) 2008-05-08

Similar Documents

Publication Publication Date Title
WO2008052762A3 (de) Halbleiteranordnung und verfahren zur herstellung einer halbleiteranordnung
WO2008051503A3 (en) Light-emitter-based devices with lattice-mismatched semiconductor structures
EP2244300A3 (de) Halbleiterbauelement mit einer vergrabenen Isolierschicht und Verfahren zu seiner Herstellung
WO2009108311A3 (en) Isolated transistors and diodes and isolation and termination structures for semiconductor die
CN101924139B (zh) 一种应变沟道场效应晶体管及其制备方法
WO2006135505A3 (en) Capacitorless dram over localized soi
WO2007136582A3 (en) Indented structure for encapsulated devices and method of manufacture
EP1710834A3 (de) Doppelgraben für Isolierung von Halbleiterbauelementen
WO2012050321A3 (ko) 3차원 구조의 메모리 소자를 제조하는 방법 및 장치
EP1860686A3 (de) Halbleiterspeichervorrichtung mit Steuergate-Elektrode in einer Vertiefung und Verfahren zur Herstellung der Halbleiterspeichervorrichtung
WO2007130729A3 (en) Method of forming a semiconductor device and structure thereof
WO2008017986A3 (en) Integrated device
WO2010002516A3 (en) Low-cost double structure substrates and methods for their manufacture
WO2008057671A3 (en) Electronic device including a conductive structure extending through a buried insulating layer
WO2004070817A3 (en) Method of eliminating residual carbon from flowable oxide fill material
WO2007095061A3 (en) Device including semiconductor nanocrystals and a layer including a doped organic material and methods
GB0815287D0 (en) Organic electronic devices and methods of making the same using solution processing techniques
TW200607094A (en) Semiconductor device and method of manufacturing thereof
WO2007140288A3 (en) Formation of improved soi substrates using bulk semiconductor wafers
WO2009013315A3 (de) Halbleitersubstrat mit durchkontaktierung und verfahren zu seiner herstellung
GB2497033A (en) One-mask phase change memory process integration
TW200709415A (en) Gate pattern of semiconductor device and method for fabricating the same
WO2012050322A3 (ko) 3차원 구조의 메모리 소자를 제조하는 방법 및 장치
WO2011070316A3 (en) Electronic device
TW200802622A (en) Semiconductor device with bulb recess and saddle fin and method of manufacturing the same

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07819487

Country of ref document: EP

Kind code of ref document: A2

122 Ep: pct application non-entry in european phase

Ref document number: 07819487

Country of ref document: EP

Kind code of ref document: A2