TW200531199A - Semiconductor substrate - Google Patents

Abstract

The present invention provides a semiconductor substrate, which is partitioned along scribing lines so as to form a plurality of IC regions encompassed by seal rings, wherein a passivation opening is formed in the scribing line in which a monitoring element is formed within a monitoring element region, which is encompassed by secondary seal rings, which are constituted by metal layers, oxidation layers and via holes. The secondary seal rings are formed to encompass the periphery of the monitoring element, which can thus precisely monitor characteristics of integrated circuits because it is Possible to prevent water and impurities from infiltrating into the monitoring element region which is thus stabilized in characteristics.

Description

200531199 IX. Description of the invention: The present invention seeks priority from the owner of the patent φ J Jiaming No. 2004-17586, the content of which is incorporated herein by reference. [Technical field to which the invention belongs] The present invention relates to a semiconductor substrate having a monitoring element for testing 1C formed in a year-old line. [Prior art]

:: A plurality of 1C's are simultaneously formed on the surface of a semiconductor substrate (or a single semiconductor wafer) at the same time. In the final step of manufacturing, a dicing machine is used to cut along the scribe lines, and individual wafers of a semiconductor device are separated in this way. Various defects that occur in the 1C formation private sequence, such as film defects and crystal defects, will be scattered on the surface of the semiconductor substrate, thus causing a defect of 1 (:; therefore, it is preferable to cut the semiconductor substrate before inspecting it into a wafer for inspection. Defective wafers are excluded from this. For this reason, a monitoring element is formed outside the wafer area to monitor the characteristics of the semiconductor element and various values related to the ongoing semiconductor element formation process. Before the semiconductor substrate is cut into wafers, First use the monitoring element to perform the feature inspection. This allows the quality and defects of the IC chip to be determined before the IC chip is mounted on an individual semiconductor device. Generally, the monitoring element is formed by a score line ±, thereby performing a feature inspection at $ Later, when the semiconductor substrate is divided into wafers, the i-control element can be damaged by a cutting machine. The scribe lines are linear regions formed between 1 (: regions, and each scribe line has a channel for forming a separate wafer. Thief width. Various methods have been developed to use scribe lines to form monitoring elements for testing. For example, Japanese Patent Application 95452.doc 2 00531199 Publication No. S57-113241 discloses that a monitoring element for monitoring a basic circuit characteristic or a U-parameter is formed on or around the scribed line. This patent application publication No. S59-14663 is disclosed as The accuracy of the pressure defect caused by the crystalline defect is increased, and the control element is added in the area and the monitoring element is formed along the score line. Figure 10 is a plan view showing the layout of the monitoring element arranged in the score line. Among them, two scribe lines 202 are formed between the 1C area 201 of the four sins, and a plurality of monitoring elements 203 with connecting ridges for characteristic measurement are formed in the scribe lines 202. Reference number 204 indicates therein The passivation layer is removed to facilitate cutting of the passivation openings. As described above, the monitoring element 203 is formed using the scribe line 202 which is a blank area on the semiconductor substrate, and after the formation of 1 (:, the scribe line 202 is formed along the scribe line 202. The semiconductor substrate is cut and the wafer is separated in this way. Japanese Patent Application Publication No. H07-37839 discloses a semiconductor device as follows: it has a structure that surrounds the periphery of 1C with a seal ring, When the semiconductor substrate is cut into wafers, water or impurities causing characteristic defects are prevented from penetrating into the cutting surface. FIG. 11 is a cross-sectional view showing a seal ring structure for protecting 1C, which is formed in 1C region 201. A plurality of Each 1C region 201 is formed on the surface of the silicon substrate 211 and is each composed of an integrated circuit and a multilayer wiring, wherein a seal ring structure is formed around the IC region to prevent water and impurities from penetrating therein. In this seal ring structure A first interlayer insulating film 214, a first wiring layer 216, a second interlayer insulating film 218, a second wiring layer 22o, and a passivation film 222 are continuously formed to cover the ends of the field oxide film 212 and surround the silicon substrate 211. 95452.doc 200531199 1C region 201 formed on the surface. CVD oxide films and SOG (Spin On Glass) films formed by spin-coating a silicon oxide solution are often used as interlayer insulating films 214 and 218. In addition, a silicon nitride film produced by plasma CVD is often used as the passivation film 222. FIG. 12 is a plan view enlarging the periphery of the monitoring element 203 formed in the scribed line 202 of the boundary between the adjacent 10 regions 201, in which a seal ring 205 is formed to surround the 1C region 2 (Π, while monitoring No sealing ring is formed in the periphery of the monitoring element 203 formed in the element region 231 and the scribe line 202. Spring FIG. 13 is a cross-sectional view taken along the line E-E in FIG. 12. The scribe line 02 The uppermost surface is covered with a "solid" passivation film 222 partially removed in the passivation opening 204, which partially exposes an interlayer insulating film 21 5-2 such as a CVD oxide film or a sog film. CVD oxide film And SOG film has a very low water blocking ability because it can pass water through it, so it cannot effectively protect the monitoring element 203. As mentioned above, various measures for blocking water penetration are generally adjusted around the IC in the IC chip. However, there is no measure to adapt the monitoring element to prevent water penetration. For this reason, in a 1C wafer with a monitoring element, the water penetrating into the scribed passivation openings causes a zero charge in the interlayer insulation film, causing The characteristics of the monitoring elements are very unstable. This makes it difficult for the monitoring element to achieve the purpose of accurately monitoring the internal condition of the 1C wafer. [Summary of the Invention] According to the present invention, the semiconductor substrate is divided along the scribe line to form a plurality of cymbals surrounded by a seal ring, wherein the scribes are formed in the scribe line Passivation opening, which forms a monitoring element in a monitoring element area that is to be enclosed by the seal. Sub 95452.doc 200531199 can surround the surrounding of the monitoring element, which is characterized in this way because it can prevent water and other impurities from penetrating. Stable features. In addition, each time the sealing ring is connected to the Shixi substrate, thereby stabilizing the well potential and improving the accuracy of the monitoring. In addition, some of the sealing rings are required to enjoy the seal reed forming the ic area from the door ^ The same function of mountain seal%, thereby being effectively used

The area intended for scribe lines is formed, thereby reducing the width. In addition, the -part of the secondary seal ring between the monitoring element area and the passivation opening in the f-line is removed to easily estimate the diffusion rate of water in the interlayer insulation layer of the monitoring element area. The width of the seal ring is preferably greater than the width of the secondary seal ring. In addition, the starting ring and the sealing ring also have a laminated structure having a plurality of metal layers, and the metal layers are laminated through the insulating layer and connected to each other through the contact hole. In addition, the secondary seal ring has a laminate having a plurality of metal layers, and the structure is specifically laminated through an insulating layer and insulated from each other by a via hole. In this way, the long-term guarantee can be guaranteed for the formation of ...

It is necessary for the sealing ring system to form a precise monitoring integrated circuit to the monitoring component area, and therefore the reliability of the sealing ring; therefore, the total area used to form the secondary sealing ring can be reduced, and the quality of wafer production for each substrate can be improved. rate. [Embodiment] The present invention will be described in further detail by way of examples with reference to the accompanying drawings. A semiconductor substrate having a monitoring element according to a preferred embodiment of the present invention will be described with reference to FIGS. 1 to 3, wherein the same parts as those shown in FIGS. 〇 to 丨 3 are denoted by the same reference numbers, and for the sake of simplicity and explanation Therefore, figures 丨 to 3 are not drawn to scale. Fig. 1 is a plan view showing the surroundings of the monitoring element 203 formed in the scribe line 202. The plan view ′ scribe line is formed between the seal ring 205 surrounding the 1C region 201 (not explicitly drawn). A plurality of 1C regions 201 are formed on a semiconductor substrate (not shown) in a matrix form. FIG. 丄 shows a basic part of a sealing ring used to explain the protection monitoring element 203. On the left side of FIG. 1, a passivation opening 204 is formed by removing a solid passivation film that may prevent cutting. On the right side of FIG. 1, the monitoring element region 231 is formed and surrounded by a secondary sealing ring 206 used to protect the monitoring element 203. The monitoring element 203 is formed in the monitoring element area 231. In this specific embodiment, a secondary sealing ring 206 for protecting the monitoring element 203 is formed in the periphery of the monitoring element region 231, and a width of the sealing ring 205 used for forming the above 1 (: region 201) is formed. In comparison, the width has been reduced. FIG. 2 is a cross-sectional view taken along line A_A in FIG. 1, which shows the basic part of the secondary seal ring 206. The secondary seal ring 206 used to protect the monitoring element 203 is based on Three metal layers 1M, 2M, and 3M with interlayer insulation films 215_ 丨 and 125_2 sandwiched between them. Vias 219 are continuously formed between the metal layers 1M-3M of the interlayer insulation film to generate a surrounding monitoring in a plan view. The pattern of the element 203 can thereby partially break the interlayer insulating film. Specifically, a field oxide film 212 is formed on a silicon substrate (not shown); a field oxide film 2 12 is formed as a first interlayer insulating film 2丨 4_ 丨 c VD oxide film; and forming a first metal layer 1M on the CVD oxide film. A second interlayer insulation composed of a CVD oxide film 214-2, an SOG film 215-1, and a CVD oxide film 214-3. The film 213 is formed on the metal layer. It is oxidized by CVD. The third interlayer insulating film 2 1 7 composed of the film 214-4, the SOG film 215_2, and the CVD oxide film 214-5 is formed on the second 95452.doc 200531199 metal layer 2M formed on the second interlayer insulating film 2 丨 3. In addition, a purification film 222 is formed on the upper surface of the second mongolian layer 3M formed on the CVD oxide film 214-5. That is, a secondary structure having the above-mentioned cross-sectional structure is formed around the monitoring element region 231. The sealing ring 206 is required. As mentioned above, the secondary sealing ring 206 used for protecting the monitoring element 203 can provide the interlayer insulating films 2 13 and 2 each composed of three layers (ie, a CVD oxide film, a SOG film, and a CVD oxide film). 17 through holes 2 19, whereby the interlayer insulating films 2 13 and 2 1 7 are partially broken. A secondary seal ring 206 having the above-mentioned cross-sectional structure is formed to surround the monitoring element region 231. The secondary seal ring 2 〇6 is characterized in that: in each of the interlayer insulating films 213 and 217, the SOG film that is weaker in water penetration is locally interrupted; therefore, it can effectively prevent water from penetrating into the monitoring element 203. The design of the secondary sealing ring 206 can be vertically arranged Three metal layers 1M-3M and conduction 219 connections; therefore, compared with the above-mentioned sealing ring 205, the width of the secondary sealing ring 206 can be reduced, the details of which are shown in Figure 3, Figure 3 is along the line! Line B_B, a cross-sectional view is taken, which shows the relevant The basic part of the seal ring 205 used to form the 1C region 201. Here, the seal ring 205 can be adapted to a 1 (: zone 201) having four wiring layers (ie, metal layers 1M, 2M, 3M, and 4M). Specifically, a CVD oxide film 214-1 serving as a first interlayer insulating film is formed on a field oxide film (not shown); a first metal layer 1M is formed on the first interlayer insulating film; A first interlayer insulating film 2 丨 3 composed of a Cvd oxide film 214-2, an SOG film 215.1, and a CVD oxide film 214-3 is formed on the metal layer; and the second interlayer insulation is provided via the second metal layer ... A third interlayer insulating film 217 composed of a CVD oxide film 214_4 and a sog film 5 2 CVD hafnium oxide film 214-5 is formed on 臈 2Π. No. 95452.doc 200531199 A metal layer 1 M and a second metal layer 2M are directly connected together through a contact hole 223 ′. A sidewall 221 is formed to ensure the connection between the metal layers 1M and 2M. Similarly, a third metal layer 3M and a fourth metal layer 4M are formed on the second interlayer insulating film 2 1 7 with the details omitted. In addition, a passivation film 222 is formed on the uppermost surface. The above-mentioned seal ring 205 needs to have a sufficient width to ensure long-term reliability. In contrast, the monitoring element 203 needs only short-term protection by the secondary sealing ring 206. Compared with the seal ring 205, the use of secondary wiring rules such as the size of the via 219 and the width of the metal layer 1M-3M is sufficient to form the secondary seal ring 206. In this way, the total area occupied by the sealing ring 206 can be reduced. Next, the main points of the method for manufacturing a semiconductor substrate will be described, in which 1C is formed by a conventionally known method, so it will be omitted so as not to make the explanation too complicated. The formation of the secondary seal ring used to protect the monitoring element will be explained below. The secondary sealing ring system is simultaneously formed with the corresponding monitoring element, electrode, wiring, insulation film and other necessary parts. An element is formed on the surface of the Shi Xi substrate. then,

Limbus. Contact holes are formed in the CVD oxide film. For a P-type substrate, a P-type impurity doped region (ie, a p-well) is formed to prepare a field oxide film to separate

In order to form the first via hole, the second interlayer insulating film is etched by the second thin film, the SOG thin film, and CVD. The second interlayer insulating film is partially interrupted. 95452.doc 200531199 Similarly, a second metal layer, an m- ^ 9 interlayer insulating film, a second via hole, and a third metal layer are continuously formed. Finally, a "solid" passivation film (such as a 'silicon nitride film') is formed on the total area of the current control element area to form a monitoring element in it. Next, a modification example of the third embodiment of the present invention will be described with reference to Figs. 4 to 9. Fig. 4 is a plan view showing a layout of monitoring elements arranged in a scribe line on a surface of a semiconductor substrate according to a first modified example of the third embodiment of the present invention. , And map! Compared with the semiconductor substrate shown, the semiconductor substrate of FIG. 4 is characterized by the secondary sealing ring 206 used for protecting the monitoring element 203 and the well area connection of the silicon substrate, of which the secondary sealing ring 206 and the measurement Well pads 207 are connected. According to the structure shown in FIG. 4, the well potential of the monitoring element 203 can be stabilized, and thus the measurement accuracy can be improved. In addition, the above-mentioned structure is advantageous in that, after the subsequent dry etching and wet etching, it is difficult to cause etching surface corrosion and roughening caused by the scribe process. Fig. 5 is a cross-sectional view taken along the line C-C of Fig. 4 showing the essential part of the secondary seal ring 206 used for the security monitoring t-piece 203. The basic structure of the person concerned is to be similar to that shown in Fig. 6; therefore, detailed descriptions thereof will be omitted. Compared with the structure shown in FIG. 6, the structure shown in FIG. 5 is characterized in that the secondary seal ring 206 is connected to the P + well extraction portion 208 in the p-well area of the substrate. 95452.doc -13- 200531199 Fig. 6 is a cross-sectional view taken along the line D-Df of Fig. 4, which shows the essential part of the seal ring 205 used to form the region 1C 201. The basic structure of the sealing ring 205 shown in Fig. 6 is similar to that shown in Fig. 3; therefore, detailed description thereof will be omitted. Compared with the structure shown in FIG. 3, the structure shown in FIG. 6 is characterized in that: the seal ring 205 is connected to the p + well extraction portion 208 of the substrate. The manufacturing method of the secondary seal ring 206 of the first modified example shown in FIG. 5 is similar to the manufacturing method of the secondary seal ring 206 shown in FIG. 2; therefore, a detailed description thereof will be omitted. Next, FIG. 7 is a plan view showing a layout of monitoring elements arranged in a scribe line on the surface of a semiconductor substrate according to a second modified example of the specific embodiment. In this example, the secondary seal rings 206-1, 206-2 share the function of the seal ring 205 used to form the 1C area and are formed substantially in the same structure of the seal ring 205, with the secondary seal ring 206-1 The seal ring 205 is formed continuously, and the formation of another secondary seal ring 206-2 has nothing to do with the seal ring 205, because it is used to protect the monitoring element 203. The basic structures of the seal rings 205, 206-1, and 206-2 are similar to those described in connection with the specific embodiment and the first modified example, and therefore, a detailed description thereof will be omitted. The second modified example of FIG. 7 is characterized in that the sealing rings 205, 206-1, and 206-2 share the same function and basically have the same structure, and it is obvious that the total area of the sealing ring is related to P low, which is beneficial Fully or partially reduce the width of the scribe line. Next, FIG. 8 is a plan view showing a layout of monitoring elements arranged in a scribe line on the surface of a semiconductor substrate according to a third modified example of the specific embodiment.相比 Compared to the semiconductor substrate shown in FIG. 7, 95452.doc -14- 200531199 of the semiconductor substrate shown in FIG. 8 is characterized in that the monitoring element 203 is not formed in the central region of the scribe line 202 but is scribed. In a slightly offset position within 202; specifically, in FIG. 8, the monitoring element 203 is offset upward in the scribe line 202. This effectively prevents cracking. The structural focus and specific embodiments of the third modified example and its similarity to the above-mentioned first and second modified examples; therefore, detailed descriptions thereof will be omitted. Next, FIG. 9 is a plan view showing a layout of monitoring elements arranged in a scribe line on the surface of a semiconductor substrate according to a fourth modified example of the specific embodiment. A feature of this example is that a part of the secondary seal ring 206_2 formed between the passivation opening 204 and the monitoring element region 231 to surround the monitoring element region 231 is removed to form a sealed opening 261. In the above-mentioned structure without any water-blocking via hole in the sealed opening 261, water existing in the passivation opening 204 may penetrate the SOG film (not shown) and penetrate into the monitoring element region 231. By monitoring the change of the monitoring characteristics of the monitoring element 203, it is possible to estimate the speed at which water diffuses into the interlayer film (not shown) of the monitoring element area 231, and then apply it to several pieces that are incorporated into the integrated circuit The simulation of resistance and the occurrence of integrated circuit defects. Because the present invention can be implemented in several forms without departing from the spirit or essential features of the present invention, the above specific embodiments are illustrative and not restrictive, because the scope of the present invention is defined by the scope of the appended patents. Not defined by the above description, i therefore hope that all changes within the limits of the scope of patent applications or equivalents of such limits are included in the scope of patent applications. [Brief Description of the Drawings] The present invention will explain in detail these and other aspects of the present invention 95452.doc -15 · 200531199 with reference to the following drawings in the embodiment 5. Figure 1 shows the best embodiment of the present invention A plan view of the layout of the monitoring elements, sealing rings, and 1C area formed on the semiconductor substrate of the embodiment; FIG. 2 is a cross-sectional view taken along line A_A of the figure i, which shows the secondary protection used for monitoring the 7L pieces The basic part of the seal ring; / 3 is a cross-sectional view taken along the line BB of FIG. 1, which shows the basic part of the seal ring used to form the area 1C; FIG. 4 shows the first embodiment of the present invention. _Modified plan view of the layout of the monitoring elements in the scribe line on the surface of the modified semiconductor substrate; Figure 5 is a cross-sectional view taken along the line c_c of Figure 4, which shows the secondary seal ring used for monitoring compliance with 7L parts The basic part of

FIG. 6 is a top view taken along line D in FIG. 4, which shows the basic part of the sealing ring used to open y to 1C £; second is a scribe line shown on a semiconductor substrate according to a second modified example of a specific embodiment of the present invention; FIG. 8 is a plan view showing the arrangement of the monitoring device in the scribe line on the semiconductor substrate of the third modified example of the present invention. The second embodiment is a specific implementation of the present invention. The fourth modified example is a plan view of the layout of the monitoring elements in the semi-conductive scribe line;

FIG. 10 is a plan view showing a layout of monitoring elements arranged in a scribe line on the surface of a semiconductor substrate on which several Ic regions are formed; and FIG. 11 is a diagram showing a PI for adjusting the 1 (: region). 1 2 A 15 ~ Shan Yuzhan, cross-section view of the mouth structure; Figure 12 is an enlarged plan view of the monitor not formed in the scribe line; and 95452.doc -16- 200531199 diagram of the monitoring element in the 4 piece area 13 is a cross-sectional view taken along the line E-E 'of FIG. 12. [Description of main component symbols] 1M, 2M, 3M, 4M metal layer 201 1C area 202 203 206' 206-1, 206-2 204 Monitoring element secondary seal ring passivation opening

205 207 208 214-5 214-4 211 214-3 212 214- 2 215- 1, 213 214-1 214 216 217 218

125-2 Seal ring pad P + well capture part of CVD oxide film CVD oxide film silicon substrate CVD oxide film field oxide film CVD oxide film interlayer insulating film second interlayer insulating film CVD oxide film first interlayer insulating film first wiring layer Third interlayer insulating film 95452.doc -17 · 200531199 219 Vias 220 Second wiring layer 221 Side wall 222 Purification film 223 Contact hole 231 Monitoring element area 261 Sealed opening 95452.doc -18-

Claims (1)

200531199 X. Scope of patent application: 1.-A semiconductor substrate divided along a scribe line to form a plurality of semiconductor substrates surrounded by a seal ring, wherein a passivation opening is formed in the scribe line, wherein a secondary seal ring is used. A monitoring element is formed in a surrounding area of monitoring k70. 2. The semiconductor substrate as claimed in claim 1. The substrate is connected. One of these secondary sealing rings and one silicon 3. If requested! Semiconductor substrate, in which a part of the secondary sealing rings co-dried to form the same function of the sealing rings used in the 1C area. 4. If requested, the semiconductor substrate is removed, and the monitoring is located in the engraving. A part of the secondary seal ring between the element area and the passivation opening. The semiconductor substrate as claimed in claim 1, wherein the seal is soiled—the width is greater than a width of the secondary seal ring. 6. The semiconductor substrate according to claim 1, wherein the seal ring has a laminated structure with a plurality of metal layers, and the metal layers are laminated together through an insulating layer and connected to each other through a contact hole. For example, the semiconductor substrate of claim 1, wherein the secondary sealing ring has a laminated structure with a plurality of metal layers, the metal layers are laminated together by an insulating layer and through a via. Insulate each other. 95452.doc