TW200522341A - Method for manufacturing wafer level image sensor package with chip on glass configuration and structure of the same - Google Patents

Method for manufacturing wafer level image sensor package with chip on glass configuration and structure of the same Download PDF

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TW200522341A
TW200522341A TW92136314A TW92136314A TW200522341A TW 200522341 A TW200522341 A TW 200522341A TW 92136314 A TW92136314 A TW 92136314A TW 92136314 A TW92136314 A TW 92136314A TW 200522341 A TW200522341 A TW 200522341A
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Taiwan
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wafer
chip
glass
item
glass substrate
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TW92136314A
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Chinese (zh)
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TWI241018B (en
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Yeong-Ching Chao
John Liu
Yau-Rung Lee
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Chipmos Technologies Inc
Chipmos Technologies Bermuda
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Abstract

A method for manufacturing wafer level image sensor package with chip on glass configuration is disclosed. At first, the method is providing a wafer with a plurality of image sensing chips. Each image sensing chip forms a sensing area and a plurality of bumps on its active area. Then, the method is providing a glass substrate with a plurality of substrate units which are defined by a plurality of cutting lines. Each substrate unit has a plurality of through holes which are corresponding to the bumps. The glass substrate is formed a sealing layer which is covering the through holes and the cutting lines. Then, the glass substrate and the wafer are attached together so that the bumps of the image sensing chips are electrically connecting with the through holes of the substrate units. Then, the glass substrate and the wafer are cut to finish the wafer level image sensor package.

Description

200522341 五、發明說明(1) 【發明所屬之技術領域】 本發明係有關於一種影像感測器之製造方法,特別係 有關於一種晶圓級玻璃覆晶影像感測器之製造方法。 【先前技術】 隨著科技的發展,愈來愈多的個人化手攜式電子產品 都會使用到影像感測器,例如數位相機、數位攝影機、手 機及個人數位助理〔PDA〕等,習知之影像感測器〔Image Sensor〕係將一影像感測晶片,例如互補金屬氧化半導體 〔complementary metal oxide semiconductor , CMOS〕,裝設於一容晶穴内,該容晶穴係可為一導線架或 硬質印刷電路板形成之預模體〔pre-mold〕,或為〆陶瓷 基板形成之凹槽,再以一透明蓋密封,而在密封影像感測 晶片之空間内通常係為真空或填充有惰性氣體,以防止水 氣或塵粒侵入。 美 揭示有 板、複 該基板 導線係 個凸出 影像感 線之凸 該第一 感測晶 國專利第6, 548, 7 59號 一種習知之影像感測器 性連接導線、一 數個電 具有一 設於該 部,該 測晶片 出部所 表面係 片之第 開口及一 基板之開 些凸出部 係設於該 支撐,該 形成有一 一表面, 定義該 口,該 係延伸 基板之 影像感 主動區 該玻璃 預鑽孔之影像感測器」係 ,該影像感 衫像感測晶片及一 開口之側壁,該些 些電性連接導線係 出該基板之開口之 開口,並由該些電 測晶片係具有一第 ’該玻璃窗係結合 固係覆蓋並保護該 測器係包含一基 玻璃窗, 電性連接 具有複數 側壁,該 性連接導 一表面, 於該影像 影像感測 200522341 五、發明說明(2) 晶片之主動 該影像感測 仍會降低該 【發明内容 本發明 像感測器之 之玻璃基板 基板單元之 保護該些影 器之尺寸等 本發明 像感測器之 表面之玻璃 孔與切割線 玻璃基板與 表面,避免 〔chipping 本發明 像感測器, 晶片,該些 該些凸塊之 感測區,而 依本發 首先,提供 區,由於該玻璃窗必須以一黏膠層直接貼設於 晶片之主動區上,該黏膠層雖然為透明的,但 影像感測晶片之主動區之解析度。 之主要目的係在於提供一種晶圓級玻璃覆晶影 製造方法,利用貼合一包含有複數個基板單元 與一包含有複數個影像感測晶片之晶圓,該些 尺寸係等於該些影像感測晶片之尺寸,以完全 像感測晶片之主動面,而且製造出之影像感測 於影像感測晶片之尺寸。 之次一目的係在於提供一種晶圓級玻璃覆晶影 製造方法,利用提供一形成有一密封層於第一 基板,該密封層係覆蓋該玻璃基板之電性導通 ,於貼合該玻璃基板與一晶圓之後,在切割該 該晶圓時’以該密封層保護該玻璃基板之第— 該玻璃基板之第一表面產生背崩 3 ° 之再一目的係在於提供一種晶圓級玻璃復晶影 利用一形成有複數個擋堤〔dam〕之影像感測 擋堤係設於該些影像感測晶片之該些感測區與 間,以避免一密封層覆蓋至該影像感測晶片之 污染該影像感測晶片之感測區。 明之晶圓級玻璃覆晶影像感測器之製造方法, 一包含有複數個影像感測晶片之晶圓,每一影200522341 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a method for manufacturing an image sensor, and more particularly to a method for manufacturing a wafer-level glass-on-chip image sensor. [Previous technology] With the development of technology, more and more personal hand-held electronic products will use image sensors, such as digital cameras, digital cameras, mobile phones, and personal digital assistants (PDAs). The image sensor is an image sensor chip, such as a complementary metal oxide semiconductor (CMOS), installed in a capacitor cavity, which can be a lead frame or hard printing A pre-mold formed by a circuit board, or a groove formed by a ceramic substrate, is sealed with a transparent cover, and the space in which the image sensing wafer is sealed is usually vacuum or filled with an inert gas. To prevent moisture or dust particles from entering. The United States has disclosed that there is a plate, and the conductor of the substrate is a convex projection of the image sensing line. The first sensing crystal patent No. 6,548, 7 59 is a conventional image sensor connection lead, and a number of electrical devices. One is provided in the part, the first opening of the system sheet on the surface of the test chip out part and the protrusions of the substrate are provided on the support, and a surface is formed to define the mouth, which is an image of the extended substrate In the active area, the glass pre-drilled image sensor is a system. The image sensor shirt is like a sensor chip and an open side wall, and the electrical connection wires are connected to the opening of the opening of the substrate. The electrical measurement chip system has a first glass window system combined with a solid system to cover and protect the measurement system. The measurement system includes a base glass window, the electrical connection has a plurality of side walls, and the electrical connection leads to a surface. 2. Description of the invention (2) The active sensing of the chip will still reduce the image of the present invention. [SUMMARY OF THE INVENTION The glass substrate substrate unit of the image sensor of the present invention protects the size of the image sensors and other image sensing of the present invention The glass holes and cutting lines on the surface of the glass substrate and the surface avoid [chipping the sensing area of the present invention like sensors, wafers, the bumps, etc., and according to the present invention, first, the area is provided. An adhesive layer is directly attached to the active area of the chip. Although the adhesive layer is transparent, the resolution of the active area of the image sensor chip is measured. The main purpose is to provide a wafer-level glass-on-silicon manufacturing method, by bonding a wafer containing a plurality of substrate units and a wafer containing a plurality of image sensing wafers, the dimensions are equal to the image sensing The size of the chip is measured so as to be exactly like the active surface of the sensor chip, and the manufactured image is sensed on the size of the image sensor chip. A second objective is to provide a wafer-level glass-on-silicon manufacturing method. By providing a sealing layer formed on a first substrate, the sealing layer covers the electrical conduction of the glass substrate, and is bonded to the glass substrate and After a wafer, when the wafer is cut, the first layer of the glass substrate is protected by the sealing layer—the first surface of the glass substrate has a backburst of 3 °. Another purpose is to provide a wafer-level glass polycrystal The image utilizes an image sensing barrier formed with a plurality of dams, which are arranged in the sensing regions and spaces of the image sensing chips to avoid a sealing layer covering the image sensing chip from contamination. A sensing area of the image sensing chip. A method for manufacturing a wafer-level glass-on-chip image sensor of Ming Dynasty, a wafer including a plurality of image sensing wafers,

200522341 五、發明說明(3) 像感測晶片係具有一主動面及一背面,每一主動面係形成 有一感測區及複數個凸塊,該些凸塊係設於該些影像感測 晶片之該些主動面周邊,再提供一包含有複數個基板單元 之玻璃基板’該玻璃基板係具有一第--表面及'第二表 面,該些基板單元之間係定義有複數個切割線,每一基板 單元係具有複數個電性導通孔,該些電性導通孔係貫穿該 玻璃基板之該第一表面及該第二表面,並對應該些影像感 測晶片之該些凸塊,該玻璃基板之該第一表面係形成有一 密封層,該密封層係覆蓋該些基板單元之該些電性導通孔 與該些切割線,之後,貼合該玻璃基板與該晶圓,使得該 些影像感測晶片之該些凸塊與該些基板單元之該些電性導 通孔電性連接,之後,植接複數個銲球於該玻璃基板之該 第二表面,該些銲球係與該些電性導通孔電性連接·,再切 割該玻璃基板與該晶圓,以完成該晶圓級玻璃覆晶影像感 測器。 【實施方式】 參閱所附圖式,本創作將列舉以下之實施例說明。 依本發明之一具體實施例,一種晶圓級玻璃覆晶影像 感測器之製造方法如下所述,請參閱第1A圖,首先,提供 一包含有複數個影像感測晶片11之晶圓1 〇,該些影像感測 晶片11係為一種光感測晶片〔optical sensing chip〕、 電知编合農置〔charge coup 1 ed device,CCD〕、互補式 金屈氧化半導體〔complementary metal oxide semiconductor,CMOS〕或光電二極體〔photodiode〕’200522341 V. Description of the invention (3) The image sensing chip has an active surface and a back surface, and each active surface is formed with a sensing area and a plurality of bumps, and the bumps are provided on the image sensing chips. Around the active surfaces, a glass substrate including a plurality of substrate units is provided. The glass substrate has a first surface and a second surface, and a plurality of cutting lines are defined between the substrate units. Each substrate unit has a plurality of electrical vias, and the electrical vias penetrate the first surface and the second surface of the glass substrate, and correspond to the bumps of the image sensing wafers. A sealing layer is formed on the first surface of the glass substrate, and the sealing layer covers the electrical vias and the cutting lines of the substrate units, and then the glass substrate and the wafer are bonded to each other so that the The bumps of the image sensing wafer are electrically connected to the electrical vias of the substrate units, and then a plurality of solder balls are implanted on the second surface of the glass substrate, and the solder balls are connected to the Electrical via Connect and cut the glass substrate and the wafer to complete the wafer-level glass-on-chip image sensor. [Embodiment] With reference to the attached drawings, the present invention will enumerate the following embodiment descriptions. According to a specific embodiment of the present invention, a method for manufacturing a wafer-level glass-on-chip image sensor is described below. Please refer to FIG. 1A. First, a wafer 1 including a plurality of image sensing chips 11 is provided. 〇 The image sensing chips 11 are an optical sensing chip, a charge coup 1 ed device (CCD), and a complementary metal oxide semiconductor. CMOS] or photodiode [photodiode] '

第10頁 200522341 五、發明說明(4) 每一影像感測晶片11係具有一主動面1 2及一背面1 3,每一 主動面1 2係形成有一感測區1 4及複數個凸塊1 5,該些凸塊 1 5係設於該些影像感測晶片11之主動面1 2周邊,較佳地, 該些影像感測晶片11之主動面1 2係形成有複數個檔堤1 6 〔dam〕,其係設於該些影像感測晶片11之感測區1 4與凸 塊1 5之間,且該些影像感測晶片1 1之背面1 3係形成有一背 膠保護層17 ;再請參閱第圖,提供一包含有複數個基板 單元21之玻璃基板20,該玻璃基板20之尺寸係等於該晶圓 10之尺寸,且該些基板單元21之尺寸亦等於該些影像感測 晶片11之尺寸,該玻璃基板20係具有一第一表面22及一第 上表面2 3,該些基板單元2 1之間係定義有複數個切割線 2 4,每一基板單元2 1係具有複數個電性導通孔2 5,該些電 性導通孔25係貫穿該玻璃基板20之第一表面22及第二表面 2 3,並對應該些影像感測晶片11之凸塊1 5,該玻璃基板2 0 之第一表面2 2係形成有一密封層2 6,該密封層2 6係覆蓋該 些基板單元21之電性導通孔25與切割線24,該密封層26係 可為B階異方性導電膠〔B-stage anisotropic conductive paste,B -stage ACP〕或異方性導電膜 〔anisotropic conductive film,ACF〕,當該密封層 26 係為B階異方性導電膠,其係以印刷形成於該玻璃基板2〇 X 之第一表面2 2,並經過第一階段烘烤,以降低其流動性, 當該密封層2 6係為異方性導電膜時,其係直接貼設於該玻 璃基板20之第一表面22,該玻璃基板2〇之第二表面23係形 成有複數個重分配跡線2 7 ’其係連接該些電性導通孔2 5,Page 10 200522341 V. Description of the invention (4) Each image sensing chip 11 has an active surface 12 and a back surface 1 3, and each active surface 12 has a sensing area 14 and a plurality of bumps. 15. The bumps 15 are provided around the active surfaces 1 2 of the image sensing wafers 11. Preferably, the active surfaces 1 2 of the image sensing wafers 11 are formed with a plurality of banks 1. 6 [dam], which is located between the sensing regions 14 and the bumps 15 of the image sensing chips 11 and the back surface 1 3 of the image sensing chips 11 is formed with a protective adhesive layer 17; please refer to the figure again, and provide a glass substrate 20 including a plurality of substrate units 21, the size of the glass substrate 20 is equal to the size of the wafer 10, and the size of the substrate units 21 is also equal to the images To sense the size of the wafer 11, the glass substrate 20 has a first surface 22 and a first upper surface 2 3, and a plurality of cutting lines 2 4 are defined between the substrate units 2 1, and each substrate unit 2 1 Has a plurality of electrical vias 25, and the electrical vias 25 pass through the first surface 22 and the second surface of the glass substrate 20 2 3, and corresponding to the bumps 15 of the image sensing wafers 11, a sealing layer 26 is formed on the first surface 22 of the glass substrate 20, and the sealing layer 26 covers the substrate units 21. Electrical via 25 and cutting line 24. The sealing layer 26 may be a B-stage anisotropic conductive paste (B-stage ACP) or an anisotropic conductive film (ACF). When the sealing layer 26 is a B-stage anisotropic conductive adhesive, it is formed on the first surface 22 of the glass substrate 20X by printing, and is baked in the first stage to reduce its fluidity. When the sealing layer 26 is an anisotropic conductive film, it is directly attached to the first surface 22 of the glass substrate 20, and the second surface 23 of the glass substrate 20 is formed with a plurality of redistribution traces 2. 7 'It is connected to these electrical vias 2 5 ,

第11頁 200522341 五、發明說明(5) 該些重分配跡線27係為扇出〔fafl 〇ut〕,以增加間距, 如果该些影像感測晶片丨丨之感測區丨4係接近整個主動面i 2 之面積時’即該些影像感測晶片11之凸塊1 5離該些影像感 測晶片11之側邊很接近時,且該些凸塊丨5之間距夠大時, 該玻璃基板2 0之第二表面23即不需形成該些重分配跡線 2 7 ’再请參閱第1 C圖,貼合該玻璃基板2 〇與該晶圓1 〇,使 得該些影像感測晶片11之凸塊1 5與該些基板單元2 1之電性 導通孔25電性連接,且該些影像感測晶片丨丨之感測區丨4與 該些基板單元21係形成有一密閉空間,在本實施例中,貼 合該玻璃基板2 0與該晶圓1 〇係在氮氣或惰性氣體之環境下 作業’故該些影像感測晶片11之感測區1 4與該些基板單元 1 4之間係填充有氮氣與惰性氣體之其中之一;再請參閱第 1D圖,植接複數個銲球30於該玻璃基板20之第二表面23之 重分配跡線2 7或電性導通孔2 5,以與該些電性導通孔2 5電 性連接;再請參閱第1 E圖,切割該玻璃基板2 〇與該晶圓 1 0,以完成該晶圓級玻璃覆晶影像感測器,切割該玻璃基 板2 0與該晶圓1 0之方法係選自於雷射切割、鑽石刀切割與 喷砂切割之其中之一。 由於該些基板單元2 1之尺寸係等於該些影像感測晶片 11之尺寸,可完全保護該些影像感測晶片11之主動面1 2 , ⑯ 而且製造出之影像感測器之尺寸可完全等於該些影像感測 晶片11之尺寸,而在製造過程中,該玻璃基板20之尺寸係 等於該晶圓10之尺寸,易於搬運、處理,且治具可共用, 此外,該密封層26係覆蓋該些基板單元21之間之切割線Page 11 200522341 V. Description of the invention (5) The redistribution traces 27 are fan-out [fafl 〇ut] to increase the spacing. If the image sensing chip 丨 丨 the sensing area 丨 4 is close to the whole When the area of the active surface i 2 'is the time when the bumps 15 of the image sensing wafers 11 are close to the sides of the image sensing wafers 11 and the distance between the bumps 5 is sufficiently large, the The second surface 23 of the glass substrate 20 does not need to form the redistribution traces 2 7 ′. Referring to FIG. 1C again, the glass substrate 2 0 and the wafer 1 0 are bonded, so that the image sensing is performed. The bumps 15 of the wafer 11 are electrically connected to the electrical vias 25 of the substrate units 21, and the image sensing wafers 丨 丨 the sensing area 丨 4 and the substrate units 21 form a closed space. In this embodiment, bonding the glass substrate 20 and the wafer 10 is performed under an environment of nitrogen or inert gas. Therefore, the sensing regions 14 of the image sensing wafers 11 and the substrate units 14 is filled with one of nitrogen and inert gas; please refer to FIG. 1D again, a plurality of solder balls 30 are implanted in the glass. The redistribution traces 27 or the electrical vias 25 of the second surface 23 of the substrate 20 are electrically connected to the electrical vias 25; and referring to FIG. 1E, the glass substrate 2 is cut. And the wafer 10 to complete the wafer-level glass-on-chip image sensor, and the method of cutting the glass substrate 20 and the wafer 10 is selected from laser cutting, diamond knife cutting, and sandblasting cutting. One of them. Since the sizes of the substrate units 21 are equal to the sizes of the image sensing wafers 11, the active surfaces 1 2 of the image sensing wafers 11 can be completely protected, and the size of the manufactured image sensors can be completely It is equal to the size of the image sensing wafers 11, and in the manufacturing process, the size of the glass substrate 20 is equal to the size of the wafer 10, which is easy to handle and handle, and the fixtures can be shared. In addition, the sealing layer 26 is Covering the cutting lines between the substrate units 21

200522341 五、發明說明(6) 2 4,在切割該玻璃基板2 0與該晶圓1 0時,該密封展2 6係可k 避免該玻璃基板20之第一表面22產生背崩〔chipping〕, 而設於該些影像感測晶片11之感測區1 4與凸塊1 5之間之古歹 些擋堤16 ’可避免貼合該玻璃基板20與該晶圓1〇時,該^ 封層2 6復蓋至該些影像感測晶片1 1之感測區丨4,而不會污 染該些影像感測晶片1 1之感測區1 4。 ' 本發明之保護範圍當視後附之申請專利範圍所界定者 為準,任何熟知此項技藝者,在不脫離本發明之精神和範 圍内所作之任何變化與修改,均屬於本發明之保護範圍。200522341 V. Description of the invention (6) 2 4. When cutting the glass substrate 20 and the wafer 10, the seal 26 can prevent the first surface 22 of the glass substrate 20 from chipping back. The barriers 16 ′ provided between the sensing areas 14 and the bumps 15 of the image sensing chips 11 can prevent the glass substrate 20 and the wafer 10 from being bonded. The sealing layer 2 6 covers the sensing regions 4 of the image sensing chips 11 1 without contaminating the sensing regions 14 of the image sensing chips 11 1. '' The scope of protection of the present invention shall be determined by the scope of the attached patent application. Any changes and modifications made by those skilled in the art without departing from the spirit and scope of the present invention shall be protected by the present invention. range.

200522341 圖式簡單說明 【圖式簡單說明】 第1 A至1 E圖··依據本發明之一具體實施例,一種晶圓級玻 璃覆晶影像感測器之製造方法,一影像感測 晶片在製造過程中之截面示意圖。 元件符號簡單說明: 10晶圓 11影像感測晶片12 14感測區 15 1 7背膠保護層 2 0玻璃基板 21基板單元 22 24切割線 25 2 7 重分配跡線 30 銲球 主動面 凸塊 13背面 16擋堤 第一表面 電性導通孔 2 3第二表面 26密封層200522341 Brief description of the drawings [Simplified description of the drawings] Figures 1 A to 1 E · According to a specific embodiment of the present invention, a method for manufacturing a wafer-level glass-on-chip image sensor, an image sensing chip is in Schematic cross-section during the manufacturing process. Simple explanation of component symbols: 10 wafers 11 image sensing wafers 12 14 sensing areas 15 1 7 adhesive protection layer 2 0 glass substrate 21 substrate unit 22 24 cutting lines 25 2 7 redistribution trace 30 solder ball active surface bump 13 back surface 16 bank first surface electrical via 2 3 second surface 26 sealing layer

第14頁Page 14

Claims (1)

200522341 六、申請專利範圍 【中請專利範圍】 1、一種晶圓級玻璃覆晶影像感測器之製造方法,包含·· 提供一包含有複數個影像感測晶片之晶圓,每一影像 感測晶片係具有一主動面及一背面,每一主動面係形成 有一感測區及複數個凸塊,該些凸塊係設於該些影像感 測晶片之該些主動面周邊;200522341 6. Scope of patent application [Scope of patent requested] 1. A method for manufacturing wafer-level glass-on-chip image sensor, including: · Providing a wafer including a plurality of image sensing chips, each image sensor The test chip has an active surface and a back surface, and each active surface is formed with a sensing area and a plurality of bumps, and the bumps are arranged around the active surfaces of the image sensing chips; 提供一包含有複數個基板單元之玻璃基板,該玻璃基 板係具有一第一表面及一第二表面,該些基板單元之間 係定義有複數個切割線,每一基板單元係具有複數個電 性導通孔,該些電性導通孔係貫穿該玻璃基板之該第一 表面及該第二表面,並對應該些影像感測晶片之該些凸 塊’該玻璃基板之該第一表面係形成有一密封層,該密 封層係覆蓋該些基板單元之該些電性導通孔與該些切割 線; 貼合β玄玻璃基板與遺晶圓’使得該些影像感測晶片之 該些凸塊與該些基板單元之該些電性導通孔電性連接; 及 , 切割該玻璃基板與該晶圓。 、如申請專利範圍第1項所述之晶圓級玻璃覆晶影像感 測器之製造方法,其中該些基板單元之尺寸係等於該此I 影像感測晶片之尺寸。 、如申請專利範圍第1項所述之晶圓級玻璃覆晶影像感 測器之製造方法,其中該玻璃基板之尺寸係等於該晶圓 之尺寸。A glass substrate including a plurality of substrate units is provided. The glass substrate has a first surface and a second surface. A plurality of cutting lines are defined between the substrate units, and each substrate unit has a plurality of electrical lines. Conductive vias, the electrical vias penetrate the first surface and the second surface of the glass substrate, and are formed on the bumps corresponding to the image sensing wafers, the first surface of the glass substrate There is a sealing layer, which covers the electrical vias and the cutting lines of the substrate units; the β-glass substrate and the missing wafer are bonded to each other so that the bumps of the image sensing wafers and the The electrical vias of the substrate units are electrically connected; and, the glass substrate and the wafer are cut. The method for manufacturing a wafer-level glass-on-chip image sensor as described in item 1 of the scope of the patent application, wherein the size of the substrate units is equal to the size of the I image-sensing wafer. 2. The method for manufacturing a wafer-level glass-on-chip image sensor as described in item 1 of the scope of patent application, wherein the size of the glass substrate is equal to the size of the wafer. 200522341 六、申請專利範圍 4、 如申請專利範圍第1項所述之晶圓級玻璃覆晶影像感 測器之製造方法,其中該密封層係不覆蓋該些影像感測 晶片之該些感測區。 5、 如申請專利範圍第1項所述之晶圓級玻璃覆晶影像感 測器之製造方法,其中該密封層係為B階異方性導電膠 〔B stage anisotropic conductive paste , B-stage ACP〕 〇 6、如申請專利範圍第i項所述之晶圓級玻璃覆晶影像感 測器之製造方法,其中該密封層係為異方性導電膜 〔anisotropic conductiVe film ,ACF〕。 7、如申請專利範圍第1項所述之晶圓級玻璃覆晶影像感 測器之製造方法,其中該玻璃基板之該第二表面係形成 有複數個重分配跡線,其係連接該些電性導通孔。 8、 、如申請專利範圍第7項所述之晶圓級玻璃覆晶影像感 測器之製造方法,其另包含植接複數個銲球於該些重八 配跡線’以與該些電性導通孔電性連接^ 刀 9、 如申請專利範圍第1項所述之晶圓級玻璃覆晶影像感 測器之製造方法,其中該些影像感測晶片之該些主動$面 係形成有複數個擋堤〔dain〕,其係設於該些影像感測 晶片之該些感測區與該些凸塊之間。 〆 1 〇、如申請專利範圍第1項所述之晶圓級玻璃覆晶影像 測器之製造方法,其中該些影像感測晶片之該些 係形成有一背膠保護層。 11、如申請專利範圍第1項所述之晶圓級玻璃覆晶影像感200522341 VI. Application Patent Scope 4. The manufacturing method of the wafer-level glass-on-chip image sensor described in item 1 of the patent application scope, wherein the sealing layer does not cover the sensing of the image sensing wafers Area. 5. The method for manufacturing a wafer-level glass-on-chip image sensor as described in item 1 of the patent application scope, wherein the sealing layer is a B-stage anisotropic conductive paste (B-stage ACP) ] 〇6. The method for manufacturing a wafer-level glass-on-chip image sensor as described in item i of the patent application range, wherein the sealing layer is an anisotropic conductive film (ACF). 7. The method for manufacturing a wafer-level glass-on-chip image sensor as described in item 1 of the scope of patent application, wherein the second surface of the glass substrate is formed with a plurality of redistribution traces, which are connected to these Electrical vias. 8. The method for manufacturing a wafer-level glass chip-on-chip image sensor as described in item 7 of the scope of the patent application, which further includes implanting a plurality of solder balls on the heavy eight alignment traces to communicate with the electrical circuits. Electrical connection of the conductive via ^ Blade 9. The method for manufacturing a wafer-level glass-on-chip image sensor as described in item 1 of the scope of patent application, wherein the active surfaces of the image sensing wafers are formed with A plurality of dams are provided between the sensing areas of the image sensing chips and the bumps. 〆 10. The method for manufacturing a wafer-level glass-on-chip image sensor as described in item 1 of the scope of patent application, wherein the image sensing wafers are formed with a protective adhesive layer. 11. Wafer-level glass flip-chip image sensing as described in item 1 of the scope of patent application 200522341200522341 測器之製造方法,其中該些影像感測晶片之該些感測 區與該些基板早元之間係填充有氮氣與惰性氣贈之户 中之一。 、 六、申請專利範圍 1 2、如申請專利範圍第1項所述之晶圓級玻璃覆晶影像 測器之製造方法,其中切割該玻璃基板與該晶% 圓/之/ 法係選自於雷射切割、鑽石刀切割與嘴砂切割之其中 —— 0 1 3、一種晶圓級玻璃覆晶影像感測器,包含: 一影像感測晶片,其係具有一主動面及一背面,今 主動面係形成有一感測區及複數個凸塊,該些凸塊係、 設於該影像感測晶片之該主動面周邊; 一玻璃基板單元,該玻璃基板單元係具有一第—表 面、一第二表面及複數個電性導通孔,該些電性導通 孔係貫穿該玻璃基板單元之該第一表面及該第二表 面’並電性連接該影像感測晶片之該些凸塊; 一密封層,其係形成於該玻璃基板單元之該第一表 面’該密封層係覆蓋該些玻璃基板單元之該些電性導 通孔;及 複數個銲球,其係植接於該玻璃基板單元之該第二 表面。 1 4、如申請專利範圍第丨3項所述之晶圓級玻璃覆晶影像 感測器’其中該玻璃基板單元之尺寸係等於該影像感 測晶片之尺寸。 1 5、如申請專利範圍第丨3項所述之晶圓級玻璃覆晶影像A method for manufacturing a detector, wherein one of the households filled with nitrogen and inert gas is provided between the sensing areas of the image sensing wafers and the substrate early cells. 6. The scope of patent application 1 2. The manufacturing method of the wafer-level glass chip-on-chip image sensor as described in item 1 of the scope of patent application, wherein the method of cutting the glass substrate and the crystal% circle / of / is selected from Among laser cutting, diamond knife cutting and mouth sand cutting-0 1 3. A wafer-level glass chip-on-chip image sensor, including: an image sensing chip, which has an active surface and a back surface. The active surface is formed with a sensing area and a plurality of bumps, and the bumps are provided around the active surface of the image sensing chip; a glass substrate unit, the glass substrate unit has a first surface, a A second surface and a plurality of electrical vias, the electrical vias penetrate through the first surface and the second surface of the glass substrate unit, and are electrically connected to the bumps of the image sensing chip; A sealing layer is formed on the first surface of the glass substrate unit; the sealing layer covers the electrical vias of the glass substrate units; and a plurality of solder balls are planted on the glass substrate unit The second table surface. 14. The wafer-level glass chip-on-chip image sensor as described in item 3 of the patent application scope, wherein the size of the glass substrate unit is equal to the size of the image sensing wafer. 1 5 、 Wafer-level glass flip-chip image as described in item 丨 3 of the scope of patent application 第17頁 200522341 六、申請專利範圍 感測器, 感測區。 16、 如申請 感測器, 〔B-stag ACP〕。 17、 如申請 感測器, t an i sot 18、 如申請 感測器, 複數個重 銲球。 19、 如申請 感測器, 數個擋堤 區與該些 2 0、如申請 感測器, 膠保護層 21、如申請 感測器, 板單元之 其中該密封層係不覆蓋該影像感測晶片之該 專利範圍第1 3項所述之晶圓級玻璃覆晶影像 其中該密封層係為B階異方性導電膠 e anisotropic conductive paste , B-stage 專利範圍第1 3項所述之晶圓級玻璃覆晶影像 其中該密封層係為異方性導電膜 ropic conductive ,ACF〕。 專利範圍第1 3項所述之晶圓級玻璃覆晶影像 其中該玻璃基板單元之該第二表面係形成有 分配跡線,其係連接該些電性導通孔與該些 專利範圍第1 3項所述之晶圓級玻璃覆晶影像 其中該影像感測晶片之該主動面係形成有複 〔d a in〕,其係設於該影像感測0曰片之該感測 凸塊之間。 專利範圍第1 3項所述之晶圓級玻璃覆晶影像 其中該影像感測晶片之該背面係形成有一背 〇 專利範圍第1 3項所述之晶圓級玻璃覆晶影像 其中該影像感測晶片之該感測區與該玻璃基 間係填充有氮氣與惰性氣體之其中之一。Page 17 200522341 6. Scope of patent application Sensor, sensing area. 16. If applying for a sensor, [B-stag ACP]. 17. If applying for a sensor, t an i sot 18. If applying for a sensor, a plurality of re-soldering balls. 19. If applying for a sensor, several bank areas and these 20, such as applying for a sensor, glue protection layer 21, such as applying for a sensor, wherein the sealing layer of the board unit does not cover the image sensing The wafer-level glass-on-chip image described in the patent range of item 13 of the wafer, wherein the sealing layer is a B-stage anisotropic conductive paste, the crystal described in item 13 of the B-stage patent range In the round-level glass flip-chip image, the sealing layer is an anisotropic conductive film (ropic conductive, ACF). The wafer-level glass-on-chip image described in item 13 of the patent scope, wherein the second surface of the glass substrate unit is formed with distribution traces, which are connected between the electrical vias and the patent scope 1 3 In the wafer-level glass-on-chip image described in the item, the active surface of the image sensing chip is formed with a da in, which is disposed between the sensing bumps of the image sensing chip. The wafer-level glass-on-chip image described in item 13 of the patent scope, wherein the back surface of the image sensing wafer is formed with a back. The wafer-level glass-on-chip image described in item 13 of the patent scope, wherein the image sensing The space between the sensing area of the test chip and the glass substrate is filled with one of nitrogen and an inert gas. 第18頁Page 18
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI393197B (en) * 2008-07-16 2013-04-11 Chipmos Technoligies Inc Chip package
US9761630B2 (en) 2012-03-26 2017-09-12 Sharp Kabushiki Kaisha Method for manufacturing image pickup module
TWI603392B (en) * 2013-09-30 2017-10-21 三星鑽石工業股份有限公司 Breaking method and breaking device of wafer laminated body for image sensor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI393197B (en) * 2008-07-16 2013-04-11 Chipmos Technoligies Inc Chip package
US9761630B2 (en) 2012-03-26 2017-09-12 Sharp Kabushiki Kaisha Method for manufacturing image pickup module
TWI603392B (en) * 2013-09-30 2017-10-21 三星鑽石工業股份有限公司 Breaking method and breaking device of wafer laminated body for image sensor

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