TWI404198B - Sensor package structure and method thereof - Google Patents
Sensor package structure and method thereof Download PDFInfo
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- TWI404198B TWI404198B TW098113393A TW98113393A TWI404198B TW I404198 B TWI404198 B TW I404198B TW 098113393 A TW098113393 A TW 098113393A TW 98113393 A TW98113393 A TW 98113393A TW I404198 B TWI404198 B TW I404198B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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Abstract
Description
本發明係關於一種半導體積體電路之覆晶(flip chip)封裝，尤指一種適用於感測器之可防止溢膠的覆晶封裝結構與方法。The present invention relates to a flip chip package for a semiconductor integrated circuit, and more particularly to a flip chip package structure and method suitable for a sensor for preventing overfilling.
電荷耦合元件(CCD)影像感測器為一可將光學圖樣或影像轉換為電荷圖樣或電子影像之電子元件。CCD包含數個感光單元，此感光單元具有修正、儲存、與傳輸電荷至另一感光單元之能力。矽的感光性質會影響影像感測器設計之材料選擇。每一感光單元代表一畫素。半導體技術與設計規則支配畫素之行列結構與矩陣結構，並由位於晶粒邊緣之一或多個輸出放大器修正由CCD傳出之訊號。一電子影像藉由一系列之脈衝獲得，此脈衝在另一脈衝傳輸至輸出放大器傳輸後依行列順序傳輸一畫素之電荷，此時輸出放大器轉換電荷為電壓。外部電路以一適當之形式傳輸輸出訊號以偵測或擷取。A charge coupled device (CCD) image sensor is an electronic component that converts an optical pattern or image into a charge pattern or an electronic image. The CCD contains a number of photosensitive cells that have the ability to modify, store, and transfer charge to another photosensitive unit. The photographic properties of ruthenium affect the choice of materials for image sensor design. Each photosensitive unit represents a pixel. The semiconductor technology and design rules govern the matrix structure and matrix structure of the pixel, and the signal transmitted by the CCD is corrected by one or more output amplifiers located at the edge of the die. An electronic image is obtained by a series of pulses that transmit a pixel of charge in a row sequence after another pulse is transmitted to the output amplifier, at which point the output amplifier converts the charge to a voltage. The external circuit transmits the output signal in an appropriate form for detection or retrieval.
互補式金屬氧化半導體影像感測器操作電壓低於電荷耦合元件(CCD)影像感測器，其為減少電量損耗利於攜帶。每一CMOS主動式畫素感測單元本身具有暫存之放大器，其可獨立做讀寫動作。一般使用之畫素感測單元具有四個電晶體與一光感單元。此畫素感測單元具有一傳輸閘極以將光感測器與一具電容之浮擴散(floating diffusion)區隔；一介於浮擴散與電源供應之重置閘極(reset gate)；一共汲極組態電晶體(source-follower transistor)係將讀出線電容暫存於浮擴散中；以及一列選擇閘極，以連接畫素感測單元至讀出線。所有行連接之畫素均與一共同感測放大器相接。The complementary metal oxide semiconductor image sensor operates at a voltage lower than that of a charge coupled device (CCD) image sensor, which is advantageous for reducing power loss and carrying. Each CMOS active pixel sensing unit itself has a temporary amplifier that can perform read and write operations independently. A commonly used pixel sensing unit has four transistors and a light sensing unit. The pixel sensing unit has a transmission gate to separate the photo sensor from a floating diffusion of a capacitor; a reset gate between the floating diffusion and the power supply; The source-follower transistor temporarily stores the sense line capacitance in the floating diffusion; and a column selects the gate to connect the pixel sensing unit to the readout line. All line connected pixels are connected to a common sense amplifier.
相較於CCD影像感測器，CMOS影像感測器除具有低耗能外，由於其去耦與結晶特性，通常設計較為簡單。故其設計容易小型化並具有較少之支撐電路需求。Compared with CCD image sensors, CMOS image sensors have a low design and are generally simple in design due to their decoupling and crystallization characteristics. Therefore, the design is easy to miniaturize and has less support circuit requirements.
請參考『第1圖』，係為先前技術所揭露之影像感測器之玻璃覆晶封裝構造，封裝結構100主要包含一玻璃基板110、一影像感測器晶片120以及一點塗膠體130。玻璃基板110係承載影像感測器晶片120並提供電訊轉接與光接受路徑之功能。點塗膠體130係局部密封影像感測器晶片120並牢固結合影像感測器晶片120至玻璃基板110。玻璃基板110係具有複數個連接墊111以及一密閉擋環112。該些連接墊111係排列於密閉擋環112之周邊外圍。密閉擋環112與該些連接墊111之底層係形成有一黏著層114，以固著於玻璃基板110。Please refer to FIG. 1 , which is a glass flip chip package structure of the image sensor disclosed in the prior art. The package structure 100 mainly includes a glass substrate 110 , an image sensor wafer 120 , and a dot coating body 130 . The glass substrate 110 carries the image sensor wafer 120 and provides the functions of a telecommunications transfer and a light receiving path. The dot-coating body 130 partially seals the image sensor wafer 120 and firmly bonds the image sensor wafer 120 to the glass substrate 110. The glass substrate 110 has a plurality of connection pads 111 and a hermetic ring 112. The connection pads 111 are arranged on the periphery of the periphery of the sealing ring 112. The sealing ring 112 and the bottom layer of the connecting pads 111 are formed with an adhesive layer 114 to be fixed to the glass substrate 110.
影像感測器晶片120係設於玻璃基板110上，影像感測器晶片120係具有一主動面121及一相對之背面122。主動面121係包含一光感測區123，其內設有影像感測元件。主動面121上設置有複數個可變形凸塊124(deformable bump)，其係位於主動面121處之複數個銲墊125上，以接合至該些連接墊111。所以玻璃基板110之設計上，密閉擋環112可與連接墊111約為等高以發揮擋膠效果。密閉擋環112係環繞於光感測區123之外，以阻擋點塗膠體130流入光感測區123內。The image sensor wafer 120 is disposed on the glass substrate 110. The image sensor wafer 120 has an active surface 121 and an opposite back surface 122. The active surface 121 includes a light sensing area 123 in which an image sensing element is disposed. The active surface 121 is provided with a plurality of deformable bumps 124 on the plurality of pads 125 at the active surface 121 for bonding to the connection pads 111. Therefore, in the design of the glass substrate 110, the sealing ring 112 can be approximately equal to the connection pad 111 to exert a blocking effect. The sealing ring 112 surrounds the light sensing area 123 to block the point coating gel 130 from flowing into the light sensing area 123.
根據本發明揭露之一實施例之一種感測器之封裝結構，包括一基板，其係具有複數個第一連接墊；一密閉擋環，設置於基板上；一感測器晶片，具有一主動面，主動面係包含一感測區；複數個第二連接墊；複數個聚合體凸塊，設置於主動面上，並且電性連結第二連接墊，其中聚合體凸塊之高度係低於密閉擋環之高度；以及一膠體，其係形成於基板上並局部填充在基板與感測器晶片之間，以包覆些聚合體凸塊，膠體並接觸第一連接墊；其中，密閉擋環係環繞於感測區之外，以阻擋點塗膠體流入感測區內。A package structure of a sensor according to an embodiment of the invention includes a substrate having a plurality of first connection pads, a sealing ring disposed on the substrate, and a sensor chip having an active The active surface system comprises a sensing region; a plurality of second connecting pads; a plurality of polymer bumps disposed on the active surface and electrically connected to the second connecting pad, wherein the height of the polymer bumps is lower than a height of the closed retaining ring; and a colloid formed on the substrate and partially filled between the substrate and the sensor wafer to cover the polymer bumps, the colloid and contacting the first connecting pad; wherein, the sealing block The ring system surrounds the sensing area to block the point of application of the gel into the sensing area.
根據本發明揭露之另一實施例之一種感測器之封裝結構，包括一基板，其係具有複數個第一連接墊；一感測器晶片，具有一主動面，主動面係包含一感測區；複數個第二連接墊；一密閉擋環，設置於感測器晶片之主動面上，並圍繞感測區；複數個聚合體凸塊，設置於主動面上，並且電性連結第二連接墊，其中等聚合體凸塊之高度係低於密閉擋環之高度；以及一膠體，其係形成於基板上並局部填充在基板與感測器晶片之間，以包覆些聚合體凸塊，膠體並接觸第一連接墊；其中，密閉擋環係環繞於感測區之外，以阻擋點塗膠體流入感測區內。A package structure of a sensor according to another embodiment of the present invention includes a substrate having a plurality of first connection pads, a sensor chip having an active surface, and the active surface system including a sensing a plurality of second connection pads; a closed stop ring disposed on the active surface of the sensor wafer and surrounding the sensing area; a plurality of polymer bumps disposed on the active surface and electrically connected to the second a connection pad, wherein the height of the polymer bump is lower than a height of the sealing ring; and a colloid formed on the substrate and partially filled between the substrate and the sensor wafer to cover the polymer bump The block, the colloid and contacting the first connection pad; wherein the sealing ring surrounds the sensing area to block the point coating gel from flowing into the sensing area.
以上之關於本發明內容之說明及以下之實施方式之說明係用以示範與解釋本發明之精神與原理，並且提供本發明之專利申請範圍更進一步之解釋。The above description of the present invention and the following description of the embodiments of the present invention are intended to illustrate and explain the spirit and principles of the invention.
以下在實施方式中詳細敘述本發明之詳細特徵，其內容足以使任何熟習相關技藝者了解本發明之技術內容並據以實施，且根據本說明書所揭露之內容、申請專利範圍及圖式，任何熟習相關技藝者可輕易地理解本發明相關之目的。以下之實施例係進一步詳細說明本發明之觀點，但非以任何觀點限制本發明之範疇。The detailed features of the present invention are described in detail below in the embodiments, which are sufficient to enable those skilled in the art to understand the technical contents of the present invention and to implement the present invention. The related objects of the present invention can be easily understood by those skilled in the art. The following examples are intended to describe the present invention in further detail, but are not intended to limit the scope of the invention.
請參考『第2圖』，係為本發明所揭露之感測器之封裝構造，感測器之封裝結構200主要包含一基板210以及一感測器晶片220。基板210係承載感測器晶片220並提供電訊轉接之功能，可為玻璃基板、半導體基板、或者可承載晶片或半導體元件之基板。基板210形成有複數個第一連接墊211與一密閉擋環212。該等連接墊係排列於該密閉擋環212之周邊外圍。Please refer to FIG. 2 , which is a package structure of the sensor disclosed in the present invention. The package structure 200 of the sensor mainly includes a substrate 210 and a sensor wafer 220 . The substrate 210 carries the sensor wafer 220 and provides a function of telecommunications switching, and may be a glass substrate, a semiconductor substrate, or a substrate that can carry a wafer or a semiconductor element. The substrate 210 is formed with a plurality of first connection pads 211 and a sealing ring 212. The connection pads are arranged on the periphery of the periphery of the sealing ring 212.
感測器晶片220係具有一主動面221及一相對之背面222。主動面221係包含一感測區223，其內設有感測元件。感測器晶片220亦具有第二連接墊227。感測器晶片220在一實施例中係為一CMOS影像感測晶片，也可為其它感測器晶片，例如微機電(MEMS)感測器或者加速度方向感測器。主動面221上設置有複數個聚合體凸塊224(polymer bump)，該等聚合體凸塊224電性連結感測器晶片220上的第二連接墊227。The sensor wafer 220 has an active surface 221 and an opposite back surface 222. The active surface 221 includes a sensing region 223 having sensing elements disposed therein. The sensor wafer 220 also has a second connection pad 227. In one embodiment, the sensor wafer 220 is a CMOS image sensing wafer, and may be other sensor wafers, such as microelectromechanical (MEMS) sensors or acceleration direction sensors. A plurality of polymer bumps 224 are disposed on the active surface 221. The polymer bumps 224 are electrically connected to the second connection pads 227 on the sensor wafer 220.
膠體230係填充於感測器晶片220與基板210之間，膠體230填充於密閉擋環212之周圍，並包覆該等聚合體凸塊224。其中，密閉擋環212係環繞於感測區223之外，以阻擋膠體230流入該感測區223內。在一具體之實施例中，膠體230係為異方性導電膠(Anisotropic Conductive Film，ACF)。因此，感測器晶片220可透過膠體230及導電粒子232與第一連接墊211形成電性連接。在另一具體實施例中，膠體230與/或膠體231亦可使用非導電性膠(Non-Conductive Film，NCF)。The colloid 230 is filled between the sensor wafer 220 and the substrate 210. The colloid 230 is filled around the sealing ring 212 and covers the polymer bumps 224. The sealing ring 212 surrounds the sensing region 223 to block the colloid 230 from flowing into the sensing region 223 . In a specific embodiment, the colloid 230 is an anisotropic conductive film (ACF). Therefore, the sensor wafer 220 can be electrically connected to the first connection pad 211 through the colloid 230 and the conductive particles 232. In another embodiment, the colloid 230 and/or the colloid 231 may also use Non-Conductive Film (NCF).
在一具體之實施例中，封裝結構200係可另包含有一電路板240，其係貼設於基板210之其中一側，並透過膠體231與第一連接墊211形成電性連接。膠體231同樣為異方性導電膠膜。電路板240可為軟性電路板。In a specific embodiment, the package structure 200 further includes a circuit board 240 attached to one side of the substrate 210 and electrically connected to the first connection pad 211 through the colloid 231. The colloid 231 is also an anisotropic conductive film. Circuit board 240 can be a flexible circuit board.
在另一具體實施例中，可在聚合體凸塊224另形成一導電層225，以與第一連接墊211形成電性連接，如『第3A圖』所示。此外，也可在聚合體凸塊224中形成一貫孔228，並填充導電材料，另亦形成一導電層229，如『第3B圖』所示，這種方式為了方便後續的說明定義為內孔式導電層。『第3A圖』與『第3B圖』中的膠體為了簡化圖式起見並沒有繪示導電粒子。當然，『第3A圖』與『第3B圖』中的膠體可為異方性導電膠與非導電性膠。惟在『第2圖』中的聚合體凸塊224具有導電特性，因此不需導電層，而『第3A圖』及『第3B圖』中的聚合體凸塊224則不具有導電特性，因此需要導電層。因此，在膠體有兩種選擇的情況下，配合具有導電性與不具有導電性的聚合體凸塊，一共會有四種組合之實施態樣。In another embodiment, a conductive layer 225 may be further formed on the polymer bump 224 to form an electrical connection with the first connection pad 211, as shown in FIG. 3A. In addition, a uniform hole 228 may be formed in the polymer bump 224 and filled with a conductive material, and a conductive layer 229 is also formed, as shown in FIG. 3B. This mode is defined as a hole for convenience in the following description. Conductive layer. The colloids in "3A" and "3B" do not show conductive particles for the sake of simplifying the drawing. Of course, the colloids in "3A" and "3B" may be anisotropic conductive adhesives and non-conductive adhesives. However, the polymer bump 224 in "Fig. 2" has a conductive property, so that a conductive layer is not required, and the polymer bump 224 in "Fig. 3A" and "3B" has no conductive property, so A conductive layer is required. Therefore, in the case where the colloid has two options, there are a total of four combinations of embodiments in combination with the polymer bumps having conductivity and non-conductivity.
在另一具體實施例中，可將密閉檔環213設置於感測器晶片220之主動面221上，如『第4圖』所示。而在『第4圖』之實施例，其係將聚合體凸塊226，如前述之聚合體凸塊224，形成於基板210上。惟並非必須，亦可如前述之實施例，將聚合體凸塊226設置於感測器晶片220之主動面221上。在此等實施例中，亦可使用異方性導電膠或非導電性膠。同樣地，當使用非導電性膠，需在聚合體凸塊226另形成一導電層以與第一連接墊211形成電性連接。In another embodiment, the sealing ring 213 can be disposed on the active surface 221 of the sensor wafer 220, as shown in FIG. In the embodiment of FIG. 4, a polymer bump 226, such as the aforementioned polymer bump 224, is formed on the substrate 210. However, it is not necessary to provide the polymer bumps 226 on the active surface 221 of the sensor wafer 220 as in the foregoing embodiments. In such embodiments, an anisotropic conductive paste or a non-conductive paste may also be used. Similarly, when a non-conductive paste is used, a conductive layer is additionally formed on the polymer bumps 226 to form an electrical connection with the first connection pads 211.
在先前技術中，凸塊的高度係與密閉擋環等高。在本發明前述之實施例中，聚合體凸塊之高度係低於密閉擋環之高度。聚合體凸塊與密閉擋環係使用相同的高分子材料。In the prior art, the height of the bump is as high as the closed retaining ring. In the foregoing embodiments of the invention, the height of the polymeric bumps is lower than the height of the closed retaining ring. The polymer block and the hermetic ring are made of the same polymer material.
以下說明影像感測器之玻璃覆晶封裝方法。其中該步驟的順序並非固定不變及不可或缺的，有些步驟可同時進行、省略或增加，此流程圖係以較廣及簡易的方式描述本發明的步驟特徵，並非用以限定本發明的製造方法步驟順序及次數。The glass flip chip packaging method of the image sensor will be described below. The order of the steps is not fixed and indispensable, and some steps may be performed, omitted or added at the same time. This flowchart describes the steps of the present invention in a broader and simple manner, and is not intended to limit the present invention. Manufacturing method step sequence and number of times.
請參考『第5A圖』，首先提供一基板310，基板310上形成有複數個第一連接墊311與一密閉擋環312，基板310可為玻璃基板、半導體基板、或者可承載晶片或半導體元件之基板。第一連接墊311係以金屬材料形成，例如銅或金。另提供一感測器晶片320，如『第5B圖』所示。感測器晶片320係具有一主動面321及一相對之背面322。主動面321係包含一感測區323，其內設有感測元件。感測器晶片320為一CMOS影像感測晶片或其它感測器晶片，例如微機電(MEMS)感測器或者加速度方向感測器。主動面321上設置有複數個第二連接墊327與複數個聚合體凸塊324(polymer bump)，兩者相互連接。接著，以膠體330透過熱壓製程(Thermal Bonding)接合基板310與感測器晶片320，膠體330先填充在密閉擋環312之周圍，再將基板310與感測器晶片320壓合，以使膠體330包覆該等聚合體凸塊324並使膠體接觸該等第一連接墊311，如『第5C圖』所示。。Referring to FIG. 5A, a substrate 310 is formed. The substrate 310 is formed with a plurality of first connection pads 311 and a sealing ring 312. The substrate 310 can be a glass substrate, a semiconductor substrate, or can carry a wafer or a semiconductor component. The substrate. The first connection pad 311 is formed of a metal material such as copper or gold. A sensor chip 320 is also provided, as shown in FIG. 5B. The sensor wafer 320 has an active surface 321 and an opposite back surface 322. The active surface 321 includes a sensing region 323 having sensing elements disposed therein. The sensor wafer 320 is a CMOS image sensing wafer or other sensor wafer, such as a microelectromechanical (MEMS) sensor or an acceleration direction sensor. The active surface 321 is provided with a plurality of second connection pads 327 and a plurality of polymer bumps 324, which are connected to each other. Next, the substrate 310 and the sensor wafer 320 are bonded by the colloid 330 through a thermal bonding. The colloid 330 is first filled around the sealing ring 312, and then the substrate 310 and the sensor wafer 320 are pressed together. The colloid 330 covers the polymer bumps 324 and causes the colloid to contact the first connection pads 311 as shown in FIG. 5C. .
如前所述，膠體可使用異方性導電膠或非導電性膠。當使用非導電性膠時，需在聚合體凸塊324形成一導電層325，如『第5D圖』所示。此一導電層的形成當然也可採用『第3B圖』所示之實施態樣。As mentioned above, the colloid may use an anisotropic conductive paste or a non-conductive paste. When a non-conductive paste is used, a conductive layer 325 is formed on the polymer bumps 324 as shown in FIG. 5D. The formation of this conductive layer can of course also adopt the embodiment shown in FIG. 3B.
請參考『第6A圖』至『第6C圖』，係為本發明所揭露之感測器之封裝方法之另一實施例。首先提供一基板410，基板410可為玻璃基板、半導體基板、或者可承載晶片或半導體元件之基板。基板410上形成有複數個第一連接墊411，第一連接墊411係以金屬材料形成，例如銅或金。另提供一感測器晶片420，如『第6B圖』所示。感測器晶片420係具有一主動面421及一相對之背面422。主動面421係包含一感測區423，其內設有感測元件。感測器晶片420為一CMOS影像感測晶片或其它感測器晶片，例如微機電(MEMS)感測器或者加速度方向感測器。主動面421上設置有複數個聚合體凸塊424(polymer bump)與一密閉擋環412，另形成有複數個第二連接墊427與複數個聚合體凸塊424連接。接著，以膠體430透過熱壓製程(Thermal Bonding)接合基板410與感測器晶片420，膠體430先填充在密閉擋環412之周圍，再將基板410與感測器晶片420壓合，以使膠體430包覆該等聚合體凸塊424並使膠體並接觸該等第一連接墊411。Please refer to "6A" to "6C", which is another embodiment of the method for packaging the sensor disclosed in the present invention. First, a substrate 410 is provided. The substrate 410 can be a glass substrate, a semiconductor substrate, or a substrate that can carry a wafer or a semiconductor component. A plurality of first connection pads 411 are formed on the substrate 410, and the first connection pads 411 are formed of a metal material such as copper or gold. A sensor wafer 420 is also provided, as shown in FIG. 6B. The sensor die 420 has an active surface 421 and an opposite back surface 422. The active surface 421 includes a sensing region 423 having sensing elements disposed therein. The sensor wafer 420 is a CMOS image sensing wafer or other sensor wafer, such as a microelectromechanical (MEMS) sensor or an acceleration direction sensor. The active surface 421 is provided with a plurality of polymer bumps 424 and a sealing ring 412, and a plurality of second connecting pads 427 are formed to be connected to the plurality of polymer bumps 424. Next, the substrate 410 and the sensor wafer 420 are bonded by the colloid 430 through a thermal bonding. The colloid 430 is first filled around the sealing ring 412, and then the substrate 410 and the sensor wafer 420 are pressed together. The colloid 430 encloses the polymeric bumps 424 and causes the colloids to contact the first connection pads 411.
如前所述，膠體可使用異方性導電膠或非導電性膠。當使用非導電性膠時，需在聚合體凸塊424形成一導電層425，如『第6D圖』所示。此一導電層的形成當然也可採用『第3B圖』所示之實施態樣。As mentioned above, the colloid may use an anisotropic conductive paste or a non-conductive paste. When a non-conductive paste is used, a conductive layer 425 is formed on the polymer bumps 424 as shown in FIG. 6D. The formation of this conductive layer can of course also adopt the embodiment shown in FIG. 3B.
在『第6A圖』至『第6D圖』之實施例中，係聚合體凸塊與密閉擋環係形成於影像感測器之主動面，且聚合體凸塊之高度係低於密閉擋環之高度。因此，可使用半透式的光罩，控制曝光的能量深度以達成不同的顯影深度。因此，可在一次曝光顯影的製程中完成聚合體凸塊與密閉擋環的製作。其可透過在光罩上以不同的曝光孔徑或不同的曝光密度才達成。In the embodiment of the "6A" to "6D", the polymer bump and the closed retaining ring are formed on the active surface of the image sensor, and the height of the polymer bump is lower than the closed retaining ring. The height. Thus, a translucent reticle can be used to control the depth of energy of the exposure to achieve different depths of development. Therefore, the fabrication of the polymer bump and the closed retaining ring can be completed in the process of one exposure development. It can be achieved by different exposure apertures or different exposure densities on the reticle.
以上實施例揭露一種感測器之封裝結構，以防止封裝時膠體流入感測器晶片之感測區內。以上實施例所揭露之封裝結構可應用於影像感測器晶片之覆晶封裝，以防止封裝時膠體流入感測器晶片之光感測區內。The above embodiment discloses a package structure of a sensor to prevent the colloid from flowing into the sensing region of the sensor wafer during packaging. The package structure disclosed in the above embodiments can be applied to a flip chip package of an image sensor chip to prevent the gel from flowing into the light sensing region of the sensor chip during packaging.
雖然本發明以前述之實施例揭露如上，然其並非用以限定本發明。在不脫離本發明之精神和範圍內，所為之更動與潤飾，均屬本發明之專利保護範圍。關於本發明所界定之保護範圍請參考所附之申請專利範圍。Although the present invention has been disclosed above in the foregoing embodiments, it is not intended to limit the invention. It is within the scope of the invention to be modified and modified without departing from the spirit and scope of the invention. Please refer to the attached patent application for the scope of protection defined by the present invention.
100．．．封裝結構100. . . Package structure
110．．．玻璃基板110. . . glass substrate
111．．．連接墊111. . . Connection pad
112．．．密閉擋環112. . . Closed ring
114．．．黏著層114. . . Adhesive layer
120．．．影像感測器晶片120. . . Image sensor chip
121．．．主動面121. . . Active surface
122．．．背面122. . . back
123．．．光感測區123. . . Light sensing area
124．．．可變形凸塊124. . . Deformable bump
125．．．銲墊125. . . Solder pad
130．．．點塗膠體130. . . Point coating gel
200．．．封裝結構200. . . Package structure
210．．．基板210. . . Substrate
211．．．第一連接墊211. . . First connection pad
212．．．密閉擋環212. . . Closed ring
213．．．密閉擋環213. . . Closed ring
220．．．感測器晶片220. . . Sensor chip
221．．．主動面221. . . Active surface
222．．．背面222. . . back
223．．．感測區223. . . Sensing area
224．．．聚合體凸塊224. . . Polymer bump
225．．．導電層225. . . Conductive layer
226．．．聚合體凸塊226. . . Polymer bump
227．．．第二連接墊227. . . Second connection pad
228．．．貫孔228. . . Through hole
229．．．導電層229. . . Conductive layer
230．．．膠體230. . . colloid
231．．．膠體231. . . colloid
232．．．導電粒子232. . . Conductive particle
240．．．電路板240. . . Circuit board
310．．．基板310. . . Substrate
311．．．第一連接墊311. . . First connection pad
312．．．密閉擋環312. . . Closed ring
320．．．感測器晶片320. . . Sensor chip
321．．．主動面321. . . Active surface
322．．．背面322. . . back
323．．．感測區323. . . Sensing area
324．．．聚合體凸塊324. . . Polymer bump
325．．．導電層325. . . Conductive layer
327．．．第二連接墊327. . . Second connection pad
330．．．膠體330. . . colloid
410．．．基板410. . . Substrate
411．．．第一連接墊411. . . First connection pad
412．．．密閉擋環412. . . Closed ring
420．．．感測器晶片420. . . Sensor chip
421．．．主動面421. . . Active surface
422．．．背面422. . . back
423．．．感測區423. . . Sensing area
424．．．聚合體凸塊424. . . Polymer bump
425．．．導電層425. . . Conductive layer
427．．．第二連接墊427. . . Second connection pad
430．．．膠體430. . . colloid
第1圖係為先前技術所揭露之感測器之封裝結構。Figure 1 is a package structure of a sensor disclosed in the prior art.
第2圖係為本發明所揭露之感測器之封裝結構之一實施例。FIG. 2 is an embodiment of a package structure of the sensor disclosed in the present invention.
第3A圖～第3B圖係為本發明所揭露之感測器之封裝結構之另一實施例。3A-3B are another embodiment of the package structure of the sensor disclosed in the present invention.
第4圖係為本發明所揭露之感測器之封裝結構之另一實施例。Figure 4 is another embodiment of the package structure of the sensor disclosed in the present invention.
第5A圖～第5D圖係為本發明所揭露之感測器之封裝方法之一實施例。5A-5D are one embodiment of a method of packaging a sensor disclosed in the present invention.
第6A圖～第6D圖係為本發明所揭露之感測器之封裝方法之另一實施例。6A to 6D are another embodiment of a method of packaging a sensor disclosed in the present invention.
200．．．封裝結構200. . . Package structure
210．．．基板210. . . Substrate
211．．．第一連接墊211. . . First connection pad
212．．．密閉擋環212. . . Closed ring
220．．．感測器晶片220. . . Sensor chip
221．．．主動面221. . . Active surface
222．．．背面222. . . back
223．．．感測區223. . . Sensing area
224．．．聚合體凸塊224. . . Polymer bump
225．．．導電層225. . . Conductive layer
227．．．第二連接墊227. . . Second connection pad
230．．．膠體230. . . colloid
231．．．膠體231. . . colloid
240．．．電路板240. . . Circuit board
Claims (18)
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| TW560020B (en) * | 2002-04-15 | 2003-11-01 | Advanced Semiconductor Eng | A wafer-level package with a cavity and fabricating method thereof |
| TW200520175A (en) * | 2003-11-25 | 2005-06-16 | Ja-Uk Koo | Flip chip bonding method for enhancing the performance of connection in flip chip packaging process and layered metal architecture of substrate for stud bump |
| TWM314431U (en) * | 2007-01-10 | 2007-06-21 | Powergate Optical Inc | Packaging structure of CCM lens module |
| TW201039438A (en) * | 2009-04-22 | 2010-11-01 | Ind Tech Res Inst | Sensor package structure and method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW560020B (en) * | 2002-04-15 | 2003-11-01 | Advanced Semiconductor Eng | A wafer-level package with a cavity and fabricating method thereof |
| TW200520175A (en) * | 2003-11-25 | 2005-06-16 | Ja-Uk Koo | Flip chip bonding method for enhancing the performance of connection in flip chip packaging process and layered metal architecture of substrate for stud bump |
| TWM314431U (en) * | 2007-01-10 | 2007-06-21 | Powergate Optical Inc | Packaging structure of CCM lens module |
| TW201039438A (en) * | 2009-04-22 | 2010-11-01 | Ind Tech Res Inst | Sensor package structure and method thereof |
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